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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/spia.c
3 *
4 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
5 *
6 *
7 * 10-29-2001 TG change to support hardwarespecific access
8 * to controllines (due to change in nand.c)
9 * page_cache added
10 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000011 * $Id: spia.c,v 1.25 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Overview:
18 * This is a device driver for the NAND flash device found on the
19 * SPIA board which utilizes the Toshiba TC58V64AFT part. This is
20 * a 64Mibit (8MiB x 8 bits) NAND flash device.
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/module.h>
27#include <linux/mtd/mtd.h>
28#include <linux/mtd/nand.h>
29#include <linux/mtd/partitions.h>
30#include <asm/io.h>
31
32/*
33 * MTD structure for SPIA board
34 */
35static struct mtd_info *spia_mtd = NULL;
36
37/*
38 * Values specific to the SPIA board (used with EP7212 processor)
39 */
40#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
41#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
David Woodhousee0c7d762006-05-13 18:07:53 +010042#define SPIA_PEDR 0x0080 /*
43 * IO offset to Port E data register
44 * where the CLE, ALE and NCE pins
45 * are wired to.
46 */
47#define SPIA_PEDDR 0x00c0 /*
48 * IO offset to Port E data direction
49 * register so we can control the IO
50 * lines.
51 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
53/*
54 * Module stuff
55 */
56
57static int spia_io_base = SPIA_IO_BASE;
58static int spia_fio_base = SPIA_FIO_BASE;
59static int spia_pedr = SPIA_PEDR;
60static int spia_peddr = SPIA_PEDDR;
61
62module_param(spia_io_base, int, 0);
63module_param(spia_fio_base, int, 0);
64module_param(spia_pedr, int, 0);
65module_param(spia_peddr, int, 0);
66
67/*
68 * Define partitions for flash device
69 */
Jesper Juhl3c6bee12006-01-09 20:54:01 -080070static const struct mtd_partition partition_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 {
David Woodhousee0c7d762006-05-13 18:07:53 +010072 .name = "SPIA flash partition 1",
73 .offset = 0,
74 .size = 2 * 1024 * 1024},
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 {
David Woodhousee0c7d762006-05-13 18:07:53 +010076 .name = "SPIA flash partition 2",
77 .offset = 2 * 1024 * 1024,
78 .size = 6 * 1024 * 1024}
Linus Torvalds1da177e2005-04-16 15:20:36 -070079};
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
David Woodhousee0c7d762006-05-13 18:07:53 +010081#define NUM_PARTITIONS 2
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000083/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 * hardware specific access to control-lines
85*/
David Woodhousee0c7d762006-05-13 18:07:53 +010086static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
87{
88 switch (cmd) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90 case NAND_CTL_SETCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x01; break;
91 case NAND_CTL_CLRCLE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x01; break;
92
93 case NAND_CTL_SETALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x02; break;
94 case NAND_CTL_CLRALE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x02; break;
95
96 case NAND_CTL_SETNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) &= ~0x04; break;
97 case NAND_CTL_CLRNCE: (*(volatile unsigned char *) (spia_io_base + spia_pedr)) |= 0x04; break;
David Woodhousee0c7d762006-05-13 18:07:53 +010098 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070099}
100
101/*
102 * Main initialization routine
103 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100104int __init spia_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105{
106 struct nand_chip *this;
107
108 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100109 spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 if (!spia_mtd) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100111 printk("Unable to allocate SPIA NAND MTD device structure.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 return -ENOMEM;
113 }
114
115 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100116 this = (struct nand_chip *)(&spia_mtd[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117
118 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100119 memset(spia_mtd, 0, sizeof(struct mtd_info));
120 memset(this, 0, sizeof(struct nand_chip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
122 /* Link the private data with the MTD structure */
123 spia_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100124 spia_mtd->owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125
126 /*
127 * Set GPIO Port E control register so that the pins are configured
128 * to be outputs for controlling the NAND flash.
129 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100130 (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
132 /* Set address of NAND IO lines */
David Woodhousee0c7d762006-05-13 18:07:53 +0100133 this->IO_ADDR_R = (void __iomem *)spia_fio_base;
134 this->IO_ADDR_W = (void __iomem *)spia_fio_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 /* Set address of hardware control function */
136 this->hwcontrol = spia_hwcontrol;
137 /* 15 us command delay time */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000138 this->chip_delay = 15;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
140 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100141 if (nand_scan(spia_mtd, 1)) {
142 kfree(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 return -ENXIO;
144 }
145
146 /* Register the partitions */
147 add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS);
148
149 /* Return happy */
150 return 0;
151}
David Woodhousee0c7d762006-05-13 18:07:53 +0100152
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153module_init(spia_init);
154
155/*
156 * Clean up routine
157 */
158#ifdef MODULE
David Woodhousee0c7d762006-05-13 18:07:53 +0100159static void __exit spia_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160{
161 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100162 nand_release(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163
164 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100165 kfree(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166}
David Woodhousee0c7d762006-05-13 18:07:53 +0100167
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168module_exit(spia_cleanup);
169#endif
170
171MODULE_LICENSE("GPL");
172MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com");
173MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board");