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Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001/*
2 *
3 * Linux MegaRAID driver for SAS based RAID controllers
4 *
5 * Copyright (c) 2003-2005 LSI Logic Corporation.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * FILE : megaraid_sas.h
13 */
14
15#ifndef LSI_MEGARAID_SAS_H
16#define LSI_MEGARAID_SAS_H
17
Randy Dunlapa69b74d2007-01-05 22:41:48 -080018/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040019 * MegaRAID SAS Driver meta data
20 */
Sumant Patro05e9ebb2007-05-17 05:47:51 -070021#define MEGASAS_VERSION "00.00.03.10-rc5"
22#define MEGASAS_RELDATE "May 17, 2007"
23#define MEGASAS_EXT_VERSION "Thu May 17 10:09:32 PDT 2007"
Sumant Patro0e989362006-06-20 15:32:37 -070024
25/*
26 * Device IDs
27 */
28#define PCI_DEVICE_ID_LSI_SAS1078R 0x0060
29#define PCI_DEVICE_ID_LSI_VERDE_ZCR 0x0413
30
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040031/*
32 * =====================================
33 * MegaRAID SAS MFI firmware definitions
34 * =====================================
35 */
36
37/*
38 * MFI stands for MegaRAID SAS FW Interface. This is just a moniker for
39 * protocol between the software and firmware. Commands are issued using
40 * "message frames"
41 */
42
Randy Dunlapa69b74d2007-01-05 22:41:48 -080043/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040044 * FW posts its state in upper 4 bits of outbound_msg_0 register
45 */
46#define MFI_STATE_MASK 0xF0000000
47#define MFI_STATE_UNDEFINED 0x00000000
48#define MFI_STATE_BB_INIT 0x10000000
49#define MFI_STATE_FW_INIT 0x40000000
50#define MFI_STATE_WAIT_HANDSHAKE 0x60000000
51#define MFI_STATE_FW_INIT_2 0x70000000
52#define MFI_STATE_DEVICE_SCAN 0x80000000
Sumant Patroe3bbff92006-10-03 12:28:49 -070053#define MFI_STATE_BOOT_MESSAGE_PENDING 0x90000000
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040054#define MFI_STATE_FLUSH_CACHE 0xA0000000
55#define MFI_STATE_READY 0xB0000000
56#define MFI_STATE_OPERATIONAL 0xC0000000
57#define MFI_STATE_FAULT 0xF0000000
58
59#define MEGAMFI_FRAME_SIZE 64
60
Randy Dunlapa69b74d2007-01-05 22:41:48 -080061/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040062 * During FW init, clear pending cmds & reset state using inbound_msg_0
63 *
64 * ABORT : Abort all pending cmds
65 * READY : Move from OPERATIONAL to READY state; discard queue info
66 * MFIMODE : Discard (possible) low MFA posted in 64-bit mode (??)
67 * CLR_HANDSHAKE: FW is waiting for HANDSHAKE from BIOS or Driver
Sumant Patroe3bbff92006-10-03 12:28:49 -070068 * HOTPLUG : Resume from Hotplug
69 * MFI_STOP_ADP : Send signal to FW to stop processing
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040070 */
Sumant Patroe3bbff92006-10-03 12:28:49 -070071#define MFI_INIT_ABORT 0x00000001
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040072#define MFI_INIT_READY 0x00000002
73#define MFI_INIT_MFIMODE 0x00000004
74#define MFI_INIT_CLEAR_HANDSHAKE 0x00000008
Sumant Patroe3bbff92006-10-03 12:28:49 -070075#define MFI_INIT_HOTPLUG 0x00000010
76#define MFI_STOP_ADP 0x00000020
77#define MFI_RESET_FLAGS MFI_INIT_READY| \
78 MFI_INIT_MFIMODE| \
79 MFI_INIT_ABORT
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040080
Randy Dunlapa69b74d2007-01-05 22:41:48 -080081/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040082 * MFI frame flags
83 */
84#define MFI_FRAME_POST_IN_REPLY_QUEUE 0x0000
85#define MFI_FRAME_DONT_POST_IN_REPLY_QUEUE 0x0001
86#define MFI_FRAME_SGL32 0x0000
87#define MFI_FRAME_SGL64 0x0002
88#define MFI_FRAME_SENSE32 0x0000
89#define MFI_FRAME_SENSE64 0x0004
90#define MFI_FRAME_DIR_NONE 0x0000
91#define MFI_FRAME_DIR_WRITE 0x0008
92#define MFI_FRAME_DIR_READ 0x0010
93#define MFI_FRAME_DIR_BOTH 0x0018
94
Randy Dunlapa69b74d2007-01-05 22:41:48 -080095/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -040096 * Definition for cmd_status
97 */
98#define MFI_CMD_STATUS_POLL_MODE 0xFF
99
Randy Dunlapa69b74d2007-01-05 22:41:48 -0800100/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400101 * MFI command opcodes
102 */
103#define MFI_CMD_INIT 0x00
104#define MFI_CMD_LD_READ 0x01
105#define MFI_CMD_LD_WRITE 0x02
106#define MFI_CMD_LD_SCSI_IO 0x03
107#define MFI_CMD_PD_SCSI_IO 0x04
108#define MFI_CMD_DCMD 0x05
109#define MFI_CMD_ABORT 0x06
110#define MFI_CMD_SMP 0x07
111#define MFI_CMD_STP 0x08
112
113#define MR_DCMD_CTRL_GET_INFO 0x01010000
114
115#define MR_DCMD_CTRL_CACHE_FLUSH 0x01101000
116#define MR_FLUSH_CTRL_CACHE 0x01
117#define MR_FLUSH_DISK_CACHE 0x02
118
119#define MR_DCMD_CTRL_SHUTDOWN 0x01050000
120#define MR_ENABLE_DRIVE_SPINDOWN 0x01
121
122#define MR_DCMD_CTRL_EVENT_GET_INFO 0x01040100
123#define MR_DCMD_CTRL_EVENT_GET 0x01040300
124#define MR_DCMD_CTRL_EVENT_WAIT 0x01040500
125#define MR_DCMD_LD_GET_PROPERTIES 0x03030000
126
127#define MR_DCMD_CLUSTER 0x08000000
128#define MR_DCMD_CLUSTER_RESET_ALL 0x08010100
129#define MR_DCMD_CLUSTER_RESET_LD 0x08010200
130
Randy Dunlapa69b74d2007-01-05 22:41:48 -0800131/*
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400132 * MFI command completion codes
133 */
134enum MFI_STAT {
135 MFI_STAT_OK = 0x00,
136 MFI_STAT_INVALID_CMD = 0x01,
137 MFI_STAT_INVALID_DCMD = 0x02,
138 MFI_STAT_INVALID_PARAMETER = 0x03,
139 MFI_STAT_INVALID_SEQUENCE_NUMBER = 0x04,
140 MFI_STAT_ABORT_NOT_POSSIBLE = 0x05,
141 MFI_STAT_APP_HOST_CODE_NOT_FOUND = 0x06,
142 MFI_STAT_APP_IN_USE = 0x07,
143 MFI_STAT_APP_NOT_INITIALIZED = 0x08,
144 MFI_STAT_ARRAY_INDEX_INVALID = 0x09,
145 MFI_STAT_ARRAY_ROW_NOT_EMPTY = 0x0a,
146 MFI_STAT_CONFIG_RESOURCE_CONFLICT = 0x0b,
147 MFI_STAT_DEVICE_NOT_FOUND = 0x0c,
148 MFI_STAT_DRIVE_TOO_SMALL = 0x0d,
149 MFI_STAT_FLASH_ALLOC_FAIL = 0x0e,
150 MFI_STAT_FLASH_BUSY = 0x0f,
151 MFI_STAT_FLASH_ERROR = 0x10,
152 MFI_STAT_FLASH_IMAGE_BAD = 0x11,
153 MFI_STAT_FLASH_IMAGE_INCOMPLETE = 0x12,
154 MFI_STAT_FLASH_NOT_OPEN = 0x13,
155 MFI_STAT_FLASH_NOT_STARTED = 0x14,
156 MFI_STAT_FLUSH_FAILED = 0x15,
157 MFI_STAT_HOST_CODE_NOT_FOUNT = 0x16,
158 MFI_STAT_LD_CC_IN_PROGRESS = 0x17,
159 MFI_STAT_LD_INIT_IN_PROGRESS = 0x18,
160 MFI_STAT_LD_LBA_OUT_OF_RANGE = 0x19,
161 MFI_STAT_LD_MAX_CONFIGURED = 0x1a,
162 MFI_STAT_LD_NOT_OPTIMAL = 0x1b,
163 MFI_STAT_LD_RBLD_IN_PROGRESS = 0x1c,
164 MFI_STAT_LD_RECON_IN_PROGRESS = 0x1d,
165 MFI_STAT_LD_WRONG_RAID_LEVEL = 0x1e,
166 MFI_STAT_MAX_SPARES_EXCEEDED = 0x1f,
167 MFI_STAT_MEMORY_NOT_AVAILABLE = 0x20,
168 MFI_STAT_MFC_HW_ERROR = 0x21,
169 MFI_STAT_NO_HW_PRESENT = 0x22,
170 MFI_STAT_NOT_FOUND = 0x23,
171 MFI_STAT_NOT_IN_ENCL = 0x24,
172 MFI_STAT_PD_CLEAR_IN_PROGRESS = 0x25,
173 MFI_STAT_PD_TYPE_WRONG = 0x26,
174 MFI_STAT_PR_DISABLED = 0x27,
175 MFI_STAT_ROW_INDEX_INVALID = 0x28,
176 MFI_STAT_SAS_CONFIG_INVALID_ACTION = 0x29,
177 MFI_STAT_SAS_CONFIG_INVALID_DATA = 0x2a,
178 MFI_STAT_SAS_CONFIG_INVALID_PAGE = 0x2b,
179 MFI_STAT_SAS_CONFIG_INVALID_TYPE = 0x2c,
180 MFI_STAT_SCSI_DONE_WITH_ERROR = 0x2d,
181 MFI_STAT_SCSI_IO_FAILED = 0x2e,
182 MFI_STAT_SCSI_RESERVATION_CONFLICT = 0x2f,
183 MFI_STAT_SHUTDOWN_FAILED = 0x30,
184 MFI_STAT_TIME_NOT_SET = 0x31,
185 MFI_STAT_WRONG_STATE = 0x32,
186 MFI_STAT_LD_OFFLINE = 0x33,
187 MFI_STAT_PEER_NOTIFICATION_REJECTED = 0x34,
188 MFI_STAT_PEER_NOTIFICATION_FAILED = 0x35,
189 MFI_STAT_RESERVATION_IN_PROGRESS = 0x36,
190 MFI_STAT_I2C_ERRORS_DETECTED = 0x37,
191 MFI_STAT_PCI_ERRORS_DETECTED = 0x38,
192
193 MFI_STAT_INVALID_STATUS = 0xFF
194};
195
196/*
197 * Number of mailbox bytes in DCMD message frame
198 */
199#define MFI_MBOX_SIZE 12
200
201enum MR_EVT_CLASS {
202
203 MR_EVT_CLASS_DEBUG = -2,
204 MR_EVT_CLASS_PROGRESS = -1,
205 MR_EVT_CLASS_INFO = 0,
206 MR_EVT_CLASS_WARNING = 1,
207 MR_EVT_CLASS_CRITICAL = 2,
208 MR_EVT_CLASS_FATAL = 3,
209 MR_EVT_CLASS_DEAD = 4,
210
211};
212
213enum MR_EVT_LOCALE {
214
215 MR_EVT_LOCALE_LD = 0x0001,
216 MR_EVT_LOCALE_PD = 0x0002,
217 MR_EVT_LOCALE_ENCL = 0x0004,
218 MR_EVT_LOCALE_BBU = 0x0008,
219 MR_EVT_LOCALE_SAS = 0x0010,
220 MR_EVT_LOCALE_CTRL = 0x0020,
221 MR_EVT_LOCALE_CONFIG = 0x0040,
222 MR_EVT_LOCALE_CLUSTER = 0x0080,
223 MR_EVT_LOCALE_ALL = 0xffff,
224
225};
226
227enum MR_EVT_ARGS {
228
229 MR_EVT_ARGS_NONE,
230 MR_EVT_ARGS_CDB_SENSE,
231 MR_EVT_ARGS_LD,
232 MR_EVT_ARGS_LD_COUNT,
233 MR_EVT_ARGS_LD_LBA,
234 MR_EVT_ARGS_LD_OWNER,
235 MR_EVT_ARGS_LD_LBA_PD_LBA,
236 MR_EVT_ARGS_LD_PROG,
237 MR_EVT_ARGS_LD_STATE,
238 MR_EVT_ARGS_LD_STRIP,
239 MR_EVT_ARGS_PD,
240 MR_EVT_ARGS_PD_ERR,
241 MR_EVT_ARGS_PD_LBA,
242 MR_EVT_ARGS_PD_LBA_LD,
243 MR_EVT_ARGS_PD_PROG,
244 MR_EVT_ARGS_PD_STATE,
245 MR_EVT_ARGS_PCI,
246 MR_EVT_ARGS_RATE,
247 MR_EVT_ARGS_STR,
248 MR_EVT_ARGS_TIME,
249 MR_EVT_ARGS_ECC,
250
251};
252
253/*
254 * SAS controller properties
255 */
256struct megasas_ctrl_prop {
257
258 u16 seq_num;
259 u16 pred_fail_poll_interval;
260 u16 intr_throttle_count;
261 u16 intr_throttle_timeouts;
262 u8 rebuild_rate;
263 u8 patrol_read_rate;
264 u8 bgi_rate;
265 u8 cc_rate;
266 u8 recon_rate;
267 u8 cache_flush_interval;
268 u8 spinup_drv_count;
269 u8 spinup_delay;
270 u8 cluster_enable;
271 u8 coercion_mode;
272 u8 alarm_enable;
273 u8 disable_auto_rebuild;
274 u8 disable_battery_warn;
275 u8 ecc_bucket_size;
276 u16 ecc_bucket_leak_rate;
277 u8 restore_hotspare_on_insertion;
278 u8 expose_encl_devices;
279 u8 reserved[38];
280
281} __attribute__ ((packed));
282
283/*
284 * SAS controller information
285 */
286struct megasas_ctrl_info {
287
288 /*
289 * PCI device information
290 */
291 struct {
292
293 u16 vendor_id;
294 u16 device_id;
295 u16 sub_vendor_id;
296 u16 sub_device_id;
297 u8 reserved[24];
298
299 } __attribute__ ((packed)) pci;
300
301 /*
302 * Host interface information
303 */
304 struct {
305
306 u8 PCIX:1;
307 u8 PCIE:1;
308 u8 iSCSI:1;
309 u8 SAS_3G:1;
310 u8 reserved_0:4;
311 u8 reserved_1[6];
312 u8 port_count;
313 u64 port_addr[8];
314
315 } __attribute__ ((packed)) host_interface;
316
317 /*
318 * Device (backend) interface information
319 */
320 struct {
321
322 u8 SPI:1;
323 u8 SAS_3G:1;
324 u8 SATA_1_5G:1;
325 u8 SATA_3G:1;
326 u8 reserved_0:4;
327 u8 reserved_1[6];
328 u8 port_count;
329 u64 port_addr[8];
330
331 } __attribute__ ((packed)) device_interface;
332
333 /*
334 * List of components residing in flash. All str are null terminated
335 */
336 u32 image_check_word;
337 u32 image_component_count;
338
339 struct {
340
341 char name[8];
342 char version[32];
343 char build_date[16];
344 char built_time[16];
345
346 } __attribute__ ((packed)) image_component[8];
347
348 /*
349 * List of flash components that have been flashed on the card, but
350 * are not in use, pending reset of the adapter. This list will be
351 * empty if a flash operation has not occurred. All stings are null
352 * terminated
353 */
354 u32 pending_image_component_count;
355
356 struct {
357
358 char name[8];
359 char version[32];
360 char build_date[16];
361 char build_time[16];
362
363 } __attribute__ ((packed)) pending_image_component[8];
364
365 u8 max_arms;
366 u8 max_spans;
367 u8 max_arrays;
368 u8 max_lds;
369
370 char product_name[80];
371 char serial_no[32];
372
373 /*
374 * Other physical/controller/operation information. Indicates the
375 * presence of the hardware
376 */
377 struct {
378
379 u32 bbu:1;
380 u32 alarm:1;
381 u32 nvram:1;
382 u32 uart:1;
383 u32 reserved:28;
384
385 } __attribute__ ((packed)) hw_present;
386
387 u32 current_fw_time;
388
389 /*
390 * Maximum data transfer sizes
391 */
392 u16 max_concurrent_cmds;
393 u16 max_sge_count;
394 u32 max_request_size;
395
396 /*
397 * Logical and physical device counts
398 */
399 u16 ld_present_count;
400 u16 ld_degraded_count;
401 u16 ld_offline_count;
402
403 u16 pd_present_count;
404 u16 pd_disk_present_count;
405 u16 pd_disk_pred_failure_count;
406 u16 pd_disk_failed_count;
407
408 /*
409 * Memory size information
410 */
411 u16 nvram_size;
412 u16 memory_size;
413 u16 flash_size;
414
415 /*
416 * Error counters
417 */
418 u16 mem_correctable_error_count;
419 u16 mem_uncorrectable_error_count;
420
421 /*
422 * Cluster information
423 */
424 u8 cluster_permitted;
425 u8 cluster_active;
426
427 /*
428 * Additional max data transfer sizes
429 */
430 u16 max_strips_per_io;
431
432 /*
433 * Controller capabilities structures
434 */
435 struct {
436
437 u32 raid_level_0:1;
438 u32 raid_level_1:1;
439 u32 raid_level_5:1;
440 u32 raid_level_1E:1;
441 u32 raid_level_6:1;
442 u32 reserved:27;
443
444 } __attribute__ ((packed)) raid_levels;
445
446 struct {
447
448 u32 rbld_rate:1;
449 u32 cc_rate:1;
450 u32 bgi_rate:1;
451 u32 recon_rate:1;
452 u32 patrol_rate:1;
453 u32 alarm_control:1;
454 u32 cluster_supported:1;
455 u32 bbu:1;
456 u32 spanning_allowed:1;
457 u32 dedicated_hotspares:1;
458 u32 revertible_hotspares:1;
459 u32 foreign_config_import:1;
460 u32 self_diagnostic:1;
461 u32 mixed_redundancy_arr:1;
462 u32 global_hot_spares:1;
463 u32 reserved:17;
464
465 } __attribute__ ((packed)) adapter_operations;
466
467 struct {
468
469 u32 read_policy:1;
470 u32 write_policy:1;
471 u32 io_policy:1;
472 u32 access_policy:1;
473 u32 disk_cache_policy:1;
474 u32 reserved:27;
475
476 } __attribute__ ((packed)) ld_operations;
477
478 struct {
479
480 u8 min;
481 u8 max;
482 u8 reserved[2];
483
484 } __attribute__ ((packed)) stripe_sz_ops;
485
486 struct {
487
488 u32 force_online:1;
489 u32 force_offline:1;
490 u32 force_rebuild:1;
491 u32 reserved:29;
492
493 } __attribute__ ((packed)) pd_operations;
494
495 struct {
496
497 u32 ctrl_supports_sas:1;
498 u32 ctrl_supports_sata:1;
499 u32 allow_mix_in_encl:1;
500 u32 allow_mix_in_ld:1;
501 u32 allow_sata_in_cluster:1;
502 u32 reserved:27;
503
504 } __attribute__ ((packed)) pd_mix_support;
505
506 /*
507 * Define ECC single-bit-error bucket information
508 */
509 u8 ecc_bucket_count;
510 u8 reserved_2[11];
511
512 /*
513 * Include the controller properties (changeable items)
514 */
515 struct megasas_ctrl_prop properties;
516
517 /*
518 * Define FW pkg version (set in envt v'bles on OEM basis)
519 */
520 char package_version[0x60];
521
522 u8 pad[0x800 - 0x6a0];
523
524} __attribute__ ((packed));
525
526/*
527 * ===============================
528 * MegaRAID SAS driver definitions
529 * ===============================
530 */
531#define MEGASAS_MAX_PD_CHANNELS 2
532#define MEGASAS_MAX_LD_CHANNELS 2
533#define MEGASAS_MAX_CHANNELS (MEGASAS_MAX_PD_CHANNELS + \
534 MEGASAS_MAX_LD_CHANNELS)
535#define MEGASAS_MAX_DEV_PER_CHANNEL 128
536#define MEGASAS_DEFAULT_INIT_ID -1
537#define MEGASAS_MAX_LUN 8
538#define MEGASAS_MAX_LD 64
539
Sumant Patro658dced2006-10-03 13:09:14 -0700540#define MEGASAS_DBG_LVL 1
541
Sumant Patro05e9ebb2007-05-17 05:47:51 -0700542#define MEGASAS_FW_BUSY 1
543
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400544/*
545 * When SCSI mid-layer calls driver's reset routine, driver waits for
546 * MEGASAS_RESET_WAIT_TIME seconds for all outstanding IO to complete. Note
547 * that the driver cannot _actually_ abort or reset pending commands. While
548 * it is waiting for the commands to complete, it prints a diagnostic message
549 * every MEGASAS_RESET_NOTICE_INTERVAL seconds
550 */
551#define MEGASAS_RESET_WAIT_TIME 180
Sumant Patro2a3681e2006-10-03 13:19:21 -0700552#define MEGASAS_INTERNAL_CMD_WAIT_TIME 180
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400553#define MEGASAS_RESET_NOTICE_INTERVAL 5
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400554#define MEGASAS_IOCTL_CMD 0
Sumant Patro05e9ebb2007-05-17 05:47:51 -0700555#define MEGASAS_DEFAULT_CMD_TIMEOUT 90
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400556
557/*
558 * FW reports the maximum of number of commands that it can accept (maximum
559 * commands that can be outstanding) at any time. The driver must report a
560 * lower number to the mid layer because it can issue a few internal commands
561 * itself (E.g, AEN, abort cmd, IOCTLs etc). The number of commands it needs
562 * is shown below
563 */
564#define MEGASAS_INT_CMDS 32
565
566/*
567 * FW can accept both 32 and 64 bit SGLs. We want to allocate 32/64 bit
568 * SGLs based on the size of dma_addr_t
569 */
570#define IS_DMA64 (sizeof(dma_addr_t) == 8)
571
572#define MFI_OB_INTR_STATUS_MASK 0x00000002
573#define MFI_POLL_TIMEOUT_SECS 10
574
Sumant Patrof9876f02006-02-03 15:34:35 -0800575#define MFI_REPLY_1078_MESSAGE_INTERRUPT 0x80000000
Sumant Patro0e989362006-06-20 15:32:37 -0700576
577/*
578* register set for both 1068 and 1078 controllers
579* structure extended for 1078 registers
580*/
Sumant Patrof9876f02006-02-03 15:34:35 -0800581
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400582struct megasas_register_set {
Sumant Patrof9876f02006-02-03 15:34:35 -0800583 u32 reserved_0[4]; /*0000h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400584
Sumant Patrof9876f02006-02-03 15:34:35 -0800585 u32 inbound_msg_0; /*0010h*/
586 u32 inbound_msg_1; /*0014h*/
587 u32 outbound_msg_0; /*0018h*/
588 u32 outbound_msg_1; /*001Ch*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400589
Sumant Patrof9876f02006-02-03 15:34:35 -0800590 u32 inbound_doorbell; /*0020h*/
591 u32 inbound_intr_status; /*0024h*/
592 u32 inbound_intr_mask; /*0028h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400593
Sumant Patrof9876f02006-02-03 15:34:35 -0800594 u32 outbound_doorbell; /*002Ch*/
595 u32 outbound_intr_status; /*0030h*/
596 u32 outbound_intr_mask; /*0034h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400597
Sumant Patrof9876f02006-02-03 15:34:35 -0800598 u32 reserved_1[2]; /*0038h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400599
Sumant Patrof9876f02006-02-03 15:34:35 -0800600 u32 inbound_queue_port; /*0040h*/
601 u32 outbound_queue_port; /*0044h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400602
Sumant Patrof9876f02006-02-03 15:34:35 -0800603 u32 reserved_2[22]; /*0048h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400604
Sumant Patrof9876f02006-02-03 15:34:35 -0800605 u32 outbound_doorbell_clear; /*00A0h*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400606
Sumant Patrof9876f02006-02-03 15:34:35 -0800607 u32 reserved_3[3]; /*00A4h*/
608
609 u32 outbound_scratch_pad ; /*00B0h*/
610
611 u32 reserved_4[3]; /*00B4h*/
612
613 u32 inbound_low_queue_port ; /*00C0h*/
614
615 u32 inbound_high_queue_port ; /*00C4h*/
616
617 u32 reserved_5; /*00C8h*/
618 u32 index_registers[820]; /*00CCh*/
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -0400619
620} __attribute__ ((packed));
621
622struct megasas_sge32 {
623
624 u32 phys_addr;
625 u32 length;
626
627} __attribute__ ((packed));
628
629struct megasas_sge64 {
630
631 u64 phys_addr;
632 u32 length;
633
634} __attribute__ ((packed));
635
636union megasas_sgl {
637
638 struct megasas_sge32 sge32[1];
639 struct megasas_sge64 sge64[1];
640
641} __attribute__ ((packed));
642
643struct megasas_header {
644
645 u8 cmd; /*00h */
646 u8 sense_len; /*01h */
647 u8 cmd_status; /*02h */
648 u8 scsi_status; /*03h */
649
650 u8 target_id; /*04h */
651 u8 lun; /*05h */
652 u8 cdb_len; /*06h */
653 u8 sge_count; /*07h */
654
655 u32 context; /*08h */
656 u32 pad_0; /*0Ch */
657
658 u16 flags; /*10h */
659 u16 timeout; /*12h */
660 u32 data_xferlen; /*14h */
661
662} __attribute__ ((packed));
663
664union megasas_sgl_frame {
665
666 struct megasas_sge32 sge32[8];
667 struct megasas_sge64 sge64[5];
668
669} __attribute__ ((packed));
670
671struct megasas_init_frame {
672
673 u8 cmd; /*00h */
674 u8 reserved_0; /*01h */
675 u8 cmd_status; /*02h */
676
677 u8 reserved_1; /*03h */
678 u32 reserved_2; /*04h */
679
680 u32 context; /*08h */
681 u32 pad_0; /*0Ch */
682
683 u16 flags; /*10h */
684 u16 reserved_3; /*12h */
685 u32 data_xfer_len; /*14h */
686
687 u32 queue_info_new_phys_addr_lo; /*18h */
688 u32 queue_info_new_phys_addr_hi; /*1Ch */
689 u32 queue_info_old_phys_addr_lo; /*20h */
690 u32 queue_info_old_phys_addr_hi; /*24h */
691
692 u32 reserved_4[6]; /*28h */
693
694} __attribute__ ((packed));
695
696struct megasas_init_queue_info {
697
698 u32 init_flags; /*00h */
699 u32 reply_queue_entries; /*04h */
700
701 u32 reply_queue_start_phys_addr_lo; /*08h */
702 u32 reply_queue_start_phys_addr_hi; /*0Ch */
703 u32 producer_index_phys_addr_lo; /*10h */
704 u32 producer_index_phys_addr_hi; /*14h */
705 u32 consumer_index_phys_addr_lo; /*18h */
706 u32 consumer_index_phys_addr_hi; /*1Ch */
707
708} __attribute__ ((packed));
709
710struct megasas_io_frame {
711
712 u8 cmd; /*00h */
713 u8 sense_len; /*01h */
714 u8 cmd_status; /*02h */
715 u8 scsi_status; /*03h */
716
717 u8 target_id; /*04h */
718 u8 access_byte; /*05h */
719 u8 reserved_0; /*06h */
720 u8 sge_count; /*07h */
721
722 u32 context; /*08h */
723 u32 pad_0; /*0Ch */
724
725 u16 flags; /*10h */
726 u16 timeout; /*12h */
727 u32 lba_count; /*14h */
728
729 u32 sense_buf_phys_addr_lo; /*18h */
730 u32 sense_buf_phys_addr_hi; /*1Ch */
731
732 u32 start_lba_lo; /*20h */
733 u32 start_lba_hi; /*24h */
734
735 union megasas_sgl sgl; /*28h */
736
737} __attribute__ ((packed));
738
739struct megasas_pthru_frame {
740
741 u8 cmd; /*00h */
742 u8 sense_len; /*01h */
743 u8 cmd_status; /*02h */
744 u8 scsi_status; /*03h */
745
746 u8 target_id; /*04h */
747 u8 lun; /*05h */
748 u8 cdb_len; /*06h */
749 u8 sge_count; /*07h */
750
751 u32 context; /*08h */
752 u32 pad_0; /*0Ch */
753
754 u16 flags; /*10h */
755 u16 timeout; /*12h */
756 u32 data_xfer_len; /*14h */
757
758 u32 sense_buf_phys_addr_lo; /*18h */
759 u32 sense_buf_phys_addr_hi; /*1Ch */
760
761 u8 cdb[16]; /*20h */
762 union megasas_sgl sgl; /*30h */
763
764} __attribute__ ((packed));
765
766struct megasas_dcmd_frame {
767
768 u8 cmd; /*00h */
769 u8 reserved_0; /*01h */
770 u8 cmd_status; /*02h */
771 u8 reserved_1[4]; /*03h */
772 u8 sge_count; /*07h */
773
774 u32 context; /*08h */
775 u32 pad_0; /*0Ch */
776
777 u16 flags; /*10h */
778 u16 timeout; /*12h */
779
780 u32 data_xfer_len; /*14h */
781 u32 opcode; /*18h */
782
783 union { /*1Ch */
784 u8 b[12];
785 u16 s[6];
786 u32 w[3];
787 } mbox;
788
789 union megasas_sgl sgl; /*28h */
790
791} __attribute__ ((packed));
792
793struct megasas_abort_frame {
794
795 u8 cmd; /*00h */
796 u8 reserved_0; /*01h */
797 u8 cmd_status; /*02h */
798
799 u8 reserved_1; /*03h */
800 u32 reserved_2; /*04h */
801
802 u32 context; /*08h */
803 u32 pad_0; /*0Ch */
804
805 u16 flags; /*10h */
806 u16 reserved_3; /*12h */
807 u32 reserved_4; /*14h */
808
809 u32 abort_context; /*18h */
810 u32 pad_1; /*1Ch */
811
812 u32 abort_mfi_phys_addr_lo; /*20h */
813 u32 abort_mfi_phys_addr_hi; /*24h */
814
815 u32 reserved_5[6]; /*28h */
816
817} __attribute__ ((packed));
818
819struct megasas_smp_frame {
820
821 u8 cmd; /*00h */
822 u8 reserved_1; /*01h */
823 u8 cmd_status; /*02h */
824 u8 connection_status; /*03h */
825
826 u8 reserved_2[3]; /*04h */
827 u8 sge_count; /*07h */
828
829 u32 context; /*08h */
830 u32 pad_0; /*0Ch */
831
832 u16 flags; /*10h */
833 u16 timeout; /*12h */
834
835 u32 data_xfer_len; /*14h */
836 u64 sas_addr; /*18h */
837
838 union {
839 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: req */
840 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: req */
841 } sgl;
842
843} __attribute__ ((packed));
844
845struct megasas_stp_frame {
846
847 u8 cmd; /*00h */
848 u8 reserved_1; /*01h */
849 u8 cmd_status; /*02h */
850 u8 reserved_2; /*03h */
851
852 u8 target_id; /*04h */
853 u8 reserved_3[2]; /*05h */
854 u8 sge_count; /*07h */
855
856 u32 context; /*08h */
857 u32 pad_0; /*0Ch */
858
859 u16 flags; /*10h */
860 u16 timeout; /*12h */
861
862 u32 data_xfer_len; /*14h */
863
864 u16 fis[10]; /*18h */
865 u32 stp_flags;
866
867 union {
868 struct megasas_sge32 sge32[2]; /* [0]: resp [1]: data */
869 struct megasas_sge64 sge64[2]; /* [0]: resp [1]: data */
870 } sgl;
871
872} __attribute__ ((packed));
873
874union megasas_frame {
875
876 struct megasas_header hdr;
877 struct megasas_init_frame init;
878 struct megasas_io_frame io;
879 struct megasas_pthru_frame pthru;
880 struct megasas_dcmd_frame dcmd;
881 struct megasas_abort_frame abort;
882 struct megasas_smp_frame smp;
883 struct megasas_stp_frame stp;
884
885 u8 raw_bytes[64];
886};
887
888struct megasas_cmd;
889
890union megasas_evt_class_locale {
891
892 struct {
893 u16 locale;
894 u8 reserved;
895 s8 class;
896 } __attribute__ ((packed)) members;
897
898 u32 word;
899
900} __attribute__ ((packed));
901
902struct megasas_evt_log_info {
903 u32 newest_seq_num;
904 u32 oldest_seq_num;
905 u32 clear_seq_num;
906 u32 shutdown_seq_num;
907 u32 boot_seq_num;
908
909} __attribute__ ((packed));
910
911struct megasas_progress {
912
913 u16 progress;
914 u16 elapsed_seconds;
915
916} __attribute__ ((packed));
917
918struct megasas_evtarg_ld {
919
920 u16 target_id;
921 u8 ld_index;
922 u8 reserved;
923
924} __attribute__ ((packed));
925
926struct megasas_evtarg_pd {
927 u16 device_id;
928 u8 encl_index;
929 u8 slot_number;
930
931} __attribute__ ((packed));
932
933struct megasas_evt_detail {
934
935 u32 seq_num;
936 u32 time_stamp;
937 u32 code;
938 union megasas_evt_class_locale cl;
939 u8 arg_type;
940 u8 reserved1[15];
941
942 union {
943 struct {
944 struct megasas_evtarg_pd pd;
945 u8 cdb_length;
946 u8 sense_length;
947 u8 reserved[2];
948 u8 cdb[16];
949 u8 sense[64];
950 } __attribute__ ((packed)) cdbSense;
951
952 struct megasas_evtarg_ld ld;
953
954 struct {
955 struct megasas_evtarg_ld ld;
956 u64 count;
957 } __attribute__ ((packed)) ld_count;
958
959 struct {
960 u64 lba;
961 struct megasas_evtarg_ld ld;
962 } __attribute__ ((packed)) ld_lba;
963
964 struct {
965 struct megasas_evtarg_ld ld;
966 u32 prevOwner;
967 u32 newOwner;
968 } __attribute__ ((packed)) ld_owner;
969
970 struct {
971 u64 ld_lba;
972 u64 pd_lba;
973 struct megasas_evtarg_ld ld;
974 struct megasas_evtarg_pd pd;
975 } __attribute__ ((packed)) ld_lba_pd_lba;
976
977 struct {
978 struct megasas_evtarg_ld ld;
979 struct megasas_progress prog;
980 } __attribute__ ((packed)) ld_prog;
981
982 struct {
983 struct megasas_evtarg_ld ld;
984 u32 prev_state;
985 u32 new_state;
986 } __attribute__ ((packed)) ld_state;
987
988 struct {
989 u64 strip;
990 struct megasas_evtarg_ld ld;
991 } __attribute__ ((packed)) ld_strip;
992
993 struct megasas_evtarg_pd pd;
994
995 struct {
996 struct megasas_evtarg_pd pd;
997 u32 err;
998 } __attribute__ ((packed)) pd_err;
999
1000 struct {
1001 u64 lba;
1002 struct megasas_evtarg_pd pd;
1003 } __attribute__ ((packed)) pd_lba;
1004
1005 struct {
1006 u64 lba;
1007 struct megasas_evtarg_pd pd;
1008 struct megasas_evtarg_ld ld;
1009 } __attribute__ ((packed)) pd_lba_ld;
1010
1011 struct {
1012 struct megasas_evtarg_pd pd;
1013 struct megasas_progress prog;
1014 } __attribute__ ((packed)) pd_prog;
1015
1016 struct {
1017 struct megasas_evtarg_pd pd;
1018 u32 prevState;
1019 u32 newState;
1020 } __attribute__ ((packed)) pd_state;
1021
1022 struct {
1023 u16 vendorId;
1024 u16 deviceId;
1025 u16 subVendorId;
1026 u16 subDeviceId;
1027 } __attribute__ ((packed)) pci;
1028
1029 u32 rate;
1030 char str[96];
1031
1032 struct {
1033 u32 rtc;
1034 u32 elapsedSeconds;
1035 } __attribute__ ((packed)) time;
1036
1037 struct {
1038 u32 ecar;
1039 u32 elog;
1040 char str[64];
1041 } __attribute__ ((packed)) ecc;
1042
1043 u8 b[96];
1044 u16 s[48];
1045 u32 w[24];
1046 u64 d[12];
1047 } args;
1048
1049 char description[128];
1050
1051} __attribute__ ((packed));
1052
Sumant Patro1341c932006-01-25 12:02:40 -08001053 struct megasas_instance_template {
1054 void (*fire_cmd)(dma_addr_t ,u32 ,struct megasas_register_set __iomem *);
1055
1056 void (*enable_intr)(struct megasas_register_set __iomem *) ;
Sumant Patrob274cab2006-10-03 12:52:12 -07001057 void (*disable_intr)(struct megasas_register_set __iomem *);
Sumant Patro1341c932006-01-25 12:02:40 -08001058
1059 int (*clear_intr)(struct megasas_register_set __iomem *);
1060
1061 u32 (*read_fw_status_reg)(struct megasas_register_set __iomem *);
1062 };
1063
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001064struct megasas_instance {
1065
1066 u32 *producer;
1067 dma_addr_t producer_h;
1068 u32 *consumer;
1069 dma_addr_t consumer_h;
1070
1071 u32 *reply_queue;
1072 dma_addr_t reply_queue_h;
1073
1074 unsigned long base_addr;
1075 struct megasas_register_set __iomem *reg_set;
1076
1077 s8 init_id;
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001078
1079 u16 max_num_sge;
1080 u16 max_fw_cmds;
1081 u32 max_sectors_per_req;
1082
1083 struct megasas_cmd **cmd_list;
1084 struct list_head cmd_pool;
1085 spinlock_t cmd_pool_lock;
1086 struct dma_pool *frame_dma_pool;
1087 struct dma_pool *sense_dma_pool;
1088
1089 struct megasas_evt_detail *evt_detail;
1090 dma_addr_t evt_detail_h;
1091 struct megasas_cmd *aen_cmd;
1092 struct semaphore aen_mutex;
1093 struct semaphore ioctl_sem;
1094
1095 struct Scsi_Host *host;
1096
1097 wait_queue_head_t int_cmd_wait_q;
1098 wait_queue_head_t abort_cmd_wait_q;
1099
1100 struct pci_dev *pdev;
1101 u32 unique_id;
1102
Sumant Patroe4a082c2006-05-30 12:03:37 -07001103 atomic_t fw_outstanding;
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001104 u32 hw_crit_error;
Sumant Patro1341c932006-01-25 12:02:40 -08001105
1106 struct megasas_instance_template *instancet;
Sumant Patro5d018ad2006-10-03 13:13:18 -07001107 struct tasklet_struct isr_tasklet;
Sumant Patro05e9ebb2007-05-17 05:47:51 -07001108
1109 u8 flag;
1110 unsigned long last_time;
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001111};
1112
1113#define MEGASAS_IS_LOGICAL(scp) \
1114 (scp->device->channel < MEGASAS_MAX_PD_CHANNELS) ? 0 : 1
1115
1116#define MEGASAS_DEV_INDEX(inst, scp) \
1117 ((scp->device->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL) + \
1118 scp->device->id
1119
1120struct megasas_cmd {
1121
1122 union megasas_frame *frame;
1123 dma_addr_t frame_phys_addr;
1124 u8 *sense;
1125 dma_addr_t sense_phys_addr;
1126
1127 u32 index;
1128 u8 sync_cmd;
1129 u8 cmd_status;
1130 u16 abort_aen;
1131
1132 struct list_head list;
1133 struct scsi_cmnd *scmd;
1134 struct megasas_instance *instance;
1135 u32 frame_count;
1136};
1137
1138#define MAX_MGMT_ADAPTERS 1024
1139#define MAX_IOCTL_SGE 16
1140
1141struct megasas_iocpacket {
1142
1143 u16 host_no;
1144 u16 __pad1;
1145 u32 sgl_off;
1146 u32 sge_count;
1147 u32 sense_off;
1148 u32 sense_len;
1149 union {
1150 u8 raw[128];
1151 struct megasas_header hdr;
1152 } frame;
1153
1154 struct iovec sgl[MAX_IOCTL_SGE];
1155
1156} __attribute__ ((packed));
1157
1158struct megasas_aen {
1159 u16 host_no;
1160 u16 __pad1;
1161 u32 seq_num;
1162 u32 class_locale_word;
1163} __attribute__ ((packed));
1164
1165#ifdef CONFIG_COMPAT
1166struct compat_megasas_iocpacket {
1167 u16 host_no;
1168 u16 __pad1;
1169 u32 sgl_off;
1170 u32 sge_count;
1171 u32 sense_off;
1172 u32 sense_len;
1173 union {
1174 u8 raw[128];
1175 struct megasas_header hdr;
1176 } frame;
1177 struct compat_iovec sgl[MAX_IOCTL_SGE];
1178} __attribute__ ((packed));
1179
Sumant Patro0e989362006-06-20 15:32:37 -07001180#define MEGASAS_IOC_FIRMWARE32 _IOWR('M', 1, struct compat_megasas_iocpacket)
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001181#endif
1182
Sumant Patrocb59aa62006-01-25 11:53:25 -08001183#define MEGASAS_IOC_FIRMWARE _IOWR('M', 1, struct megasas_iocpacket)
Bagalkote, Sreenivasc4a3e0a2005-09-20 17:46:58 -04001184#define MEGASAS_IOC_GET_AEN _IOW('M', 3, struct megasas_aen)
1185
1186struct megasas_mgmt_info {
1187
1188 u16 count;
1189 struct megasas_instance *instance[MAX_MGMT_ADAPTERS];
1190 int max_index;
1191};
1192
1193#endif /*LSI_MEGARAID_SAS_H */