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Zou Nan hai8187a2b2010-05-21 09:08:55 +08001#ifndef _INTEL_RINGBUFFER_H_
2#define _INTEL_RINGBUFFER_H_
3
4struct intel_hw_status_page {
5 void *page_addr;
6 unsigned int gfx_addr;
7 struct drm_gem_object *obj;
8};
9
Daniel Vetter870e86d2010-08-02 16:29:44 +020010#define I915_READ_TAIL(ring) I915_READ(RING_TAIL(ring->mmio_base))
11#define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL(ring->mmio_base), val)
Daniel Vetter6c0e1c52010-08-02 16:33:33 +020012#define I915_READ_START(ring) I915_READ(RING_START(ring->mmio_base))
13#define I915_WRITE_START(ring, val) I915_WRITE(RING_START(ring->mmio_base), val)
Daniel Vetter570ef602010-08-02 17:06:23 +020014#define I915_READ_HEAD(ring) I915_READ(RING_HEAD(ring->mmio_base))
15#define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD(ring->mmio_base), val)
Daniel Vetter7f2ab692010-08-02 17:06:59 +020016#define I915_READ_CTL(ring) I915_READ(RING_CTL(ring->mmio_base))
17#define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL(ring->mmio_base), val)
Daniel Vetter870e86d2010-08-02 16:29:44 +020018
Zou Nan hai8187a2b2010-05-21 09:08:55 +080019struct drm_i915_gem_execbuffer2;
20struct intel_ring_buffer {
21 const char *name;
Chris Wilson92204342010-09-18 11:02:01 +010022 enum intel_ring_id {
23 RING_RENDER = 0x1,
24 RING_BSD = 0x2,
Chris Wilson549f7362010-10-19 11:19:32 +010025 RING_BLT = 0x4,
Chris Wilson92204342010-09-18 11:02:01 +010026 } id;
Daniel Vetter333e9fe2010-08-02 16:24:01 +020027 u32 mmio_base;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080028 unsigned long size;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080029 void *virtual_start;
30 struct drm_device *dev;
31 struct drm_gem_object *gem_object;
32
33 unsigned int head;
34 unsigned int tail;
Chris Wilson780f0ca2010-09-23 17:45:39 +010035 int space;
Zou Nan hai8187a2b2010-05-21 09:08:55 +080036 struct intel_hw_status_page status_page;
37
38 u32 irq_gem_seqno; /* last seq seem at irq time */
39 u32 waiting_gem_seqno;
40 int user_irq_refcount;
41 void (*user_irq_get)(struct drm_device *dev,
42 struct intel_ring_buffer *ring);
43 void (*user_irq_put)(struct drm_device *dev,
44 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080045
46 int (*init)(struct drm_device *dev,
47 struct intel_ring_buffer *ring);
48
Chris Wilson297b0c52010-10-22 17:02:41 +010049 void (*write_tail)(struct drm_device *dev,
50 struct intel_ring_buffer *ring,
51 u32 value);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080052 void (*flush)(struct drm_device *dev,
53 struct intel_ring_buffer *ring,
54 u32 invalidate_domains,
55 u32 flush_domains);
56 u32 (*add_request)(struct drm_device *dev,
57 struct intel_ring_buffer *ring,
Zou Nan hai8187a2b2010-05-21 09:08:55 +080058 u32 flush_domains);
Chris Wilsonf787a5f2010-09-24 16:02:42 +010059 u32 (*get_seqno)(struct drm_device *dev,
60 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080061 int (*dispatch_gem_execbuffer)(struct drm_device *dev,
62 struct intel_ring_buffer *ring,
63 struct drm_i915_gem_execbuffer2 *exec,
64 struct drm_clip_rect *cliprects,
65 uint64_t exec_offset);
Chris Wilson55889782010-11-02 10:38:58 +000066 void (*cleanup)(struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +080067
68 /**
69 * List of objects currently involved in rendering from the
70 * ringbuffer.
71 *
72 * Includes buffers having the contents of their GPU caches
73 * flushed, not necessarily primitives. last_rendering_seqno
74 * represents when the rendering involved will be completed.
75 *
76 * A reference is held on the buffer while on this list.
77 */
78 struct list_head active_list;
79
80 /**
81 * List of breadcrumbs associated with GPU requests currently
82 * outstanding.
83 */
84 struct list_head request_list;
85
Chris Wilsona56ba562010-09-28 10:07:56 +010086 /**
Chris Wilson64193402010-10-24 12:38:05 +010087 * List of objects currently pending a GPU write flush.
88 *
89 * All elements on this list will belong to either the
90 * active_list or flushing_list, last_rendering_seqno can
91 * be used to differentiate between the two elements.
92 */
93 struct list_head gpu_write_list;
94
95 /**
Chris Wilsona56ba562010-09-28 10:07:56 +010096 * Do we have some not yet emitted requests outstanding?
97 */
98 bool outstanding_lazy_request;
99
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800100 wait_queue_head_t irq_queue;
101 drm_local_map_t map;
Chris Wilson55889782010-11-02 10:38:58 +0000102
103 void *private;
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800104};
105
106static inline u32
107intel_read_status_page(struct intel_ring_buffer *ring,
108 int reg)
109{
110 u32 *regs = ring->status_page.page_addr;
111 return regs[reg];
112}
113
114int intel_init_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100115 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800116void intel_cleanup_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100117 struct intel_ring_buffer *ring);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800118int intel_wait_ring_buffer(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100119 struct intel_ring_buffer *ring, int n);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800120void intel_ring_begin(struct drm_device *dev,
Chris Wilsonab6f8e32010-09-19 17:53:44 +0100121 struct intel_ring_buffer *ring, int n);
Chris Wilsone898cd22010-08-04 15:18:14 +0100122
123static inline void intel_ring_emit(struct drm_device *dev,
124 struct intel_ring_buffer *ring,
125 unsigned int data)
126{
127 unsigned int *virt = ring->virtual_start + ring->tail;
128 *virt = data;
129 ring->tail += 4;
130}
131
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800132void intel_ring_advance(struct drm_device *dev,
133 struct intel_ring_buffer *ring);
134
135u32 intel_ring_get_seqno(struct drm_device *dev,
136 struct intel_ring_buffer *ring);
137
Xiang, Haihao5c1143b2010-09-16 10:43:11 +0800138int intel_init_render_ring_buffer(struct drm_device *dev);
139int intel_init_bsd_ring_buffer(struct drm_device *dev);
Chris Wilson549f7362010-10-19 11:19:32 +0100140int intel_init_blt_ring_buffer(struct drm_device *dev);
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800141
Daniel Vetter79f321b2010-09-24 21:20:10 +0200142u32 intel_ring_get_active_head(struct drm_device *dev,
143 struct intel_ring_buffer *ring);
Daniel Vetter447da182010-09-24 21:49:27 +0200144void intel_ring_setup_status_page(struct drm_device *dev,
145 struct intel_ring_buffer *ring);
Daniel Vetter79f321b2010-09-24 21:20:10 +0200146
Zou Nan hai8187a2b2010-05-21 09:08:55 +0800147#endif /* _INTEL_RINGBUFFER_H_ */