Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * regmap based irq_chip |
| 3 | * |
| 4 | * Copyright 2011 Wolfson Microelectronics plc |
| 5 | * |
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/export.h> |
Paul Gortmaker | 51990e8 | 2012-01-22 11:23:42 -0500 | [diff] [blame] | 14 | #include <linux/device.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 15 | #include <linux/regmap.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/interrupt.h> |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 18 | #include <linux/irqdomain.h> |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 19 | #include <linux/pm_runtime.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 20 | #include <linux/slab.h> |
| 21 | |
| 22 | #include "internal.h" |
| 23 | |
| 24 | struct regmap_irq_chip_data { |
| 25 | struct mutex lock; |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 26 | struct irq_chip irq_chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 27 | |
| 28 | struct regmap *map; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 29 | const struct regmap_irq_chip *chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 30 | |
| 31 | int irq_base; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 32 | struct irq_domain *domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 33 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 34 | int irq; |
| 35 | int wake_count; |
| 36 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 37 | unsigned int *status_buf; |
| 38 | unsigned int *mask_buf; |
| 39 | unsigned int *mask_buf_def; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 40 | unsigned int *wake_buf; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 41 | |
| 42 | unsigned int irq_reg_stride; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | static inline const |
| 46 | struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data, |
| 47 | int irq) |
| 48 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 49 | return &data->chip->irqs[irq]; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 50 | } |
| 51 | |
| 52 | static void regmap_irq_lock(struct irq_data *data) |
| 53 | { |
| 54 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 55 | |
| 56 | mutex_lock(&d->lock); |
| 57 | } |
| 58 | |
| 59 | static void regmap_irq_sync_unlock(struct irq_data *data) |
| 60 | { |
| 61 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 62 | struct regmap *map = d->map; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 63 | int i, ret; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 64 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 65 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 66 | if (d->chip->runtime_pm) { |
| 67 | ret = pm_runtime_get_sync(map->dev); |
| 68 | if (ret < 0) |
| 69 | dev_err(map->dev, "IRQ sync failed to resume: %d\n", |
| 70 | ret); |
| 71 | } |
| 72 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 73 | /* |
| 74 | * If there's been a change in the mask write it back to the |
| 75 | * hardware. We rely on the use of the regmap core cache to |
| 76 | * suppress pointless writes. |
| 77 | */ |
| 78 | for (i = 0; i < d->chip->num_regs; i++) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 79 | reg = d->chip->mask_base + |
| 80 | (i * map->reg_stride * d->irq_reg_stride); |
Xiaofan Tian | 36ac914 | 2012-08-30 17:03:35 +0800 | [diff] [blame] | 81 | if (d->chip->mask_invert) |
| 82 | ret = regmap_update_bits(d->map, reg, |
| 83 | d->mask_buf_def[i], ~d->mask_buf[i]); |
| 84 | else |
| 85 | ret = regmap_update_bits(d->map, reg, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 86 | d->mask_buf_def[i], d->mask_buf[i]); |
| 87 | if (ret != 0) |
| 88 | dev_err(d->map->dev, "Failed to sync masks in %x\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 89 | reg); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 90 | } |
| 91 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 92 | if (d->chip->runtime_pm) |
| 93 | pm_runtime_put(map->dev); |
| 94 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 95 | /* If we've changed our wakeup count propagate it to the parent */ |
| 96 | if (d->wake_count < 0) |
| 97 | for (i = d->wake_count; i < 0; i++) |
| 98 | irq_set_irq_wake(d->irq, 0); |
| 99 | else if (d->wake_count > 0) |
| 100 | for (i = 0; i < d->wake_count; i++) |
| 101 | irq_set_irq_wake(d->irq, 1); |
| 102 | |
| 103 | d->wake_count = 0; |
| 104 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 105 | mutex_unlock(&d->lock); |
| 106 | } |
| 107 | |
| 108 | static void regmap_irq_enable(struct irq_data *data) |
| 109 | { |
| 110 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 111 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 112 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 113 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 114 | d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | static void regmap_irq_disable(struct irq_data *data) |
| 118 | { |
| 119 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 120 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 121 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 122 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 123 | d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 124 | } |
| 125 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 126 | static int regmap_irq_set_wake(struct irq_data *data, unsigned int on) |
| 127 | { |
| 128 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 129 | struct regmap *map = d->map; |
| 130 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
| 131 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 132 | if (on) { |
Laxman Dewangan | 55ac85e | 2012-12-19 19:42:28 +0530 | [diff] [blame^] | 133 | if (d->wake_buf) |
| 134 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 135 | &= ~irq_data->mask; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 136 | d->wake_count++; |
| 137 | } else { |
Laxman Dewangan | 55ac85e | 2012-12-19 19:42:28 +0530 | [diff] [blame^] | 138 | if (d->wake_buf) |
| 139 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 140 | |= irq_data->mask; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 141 | d->wake_count--; |
| 142 | } |
| 143 | |
| 144 | return 0; |
| 145 | } |
| 146 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 147 | static const struct irq_chip regmap_irq_chip = { |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 148 | .irq_bus_lock = regmap_irq_lock, |
| 149 | .irq_bus_sync_unlock = regmap_irq_sync_unlock, |
| 150 | .irq_disable = regmap_irq_disable, |
| 151 | .irq_enable = regmap_irq_enable, |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 152 | .irq_set_wake = regmap_irq_set_wake, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 153 | }; |
| 154 | |
| 155 | static irqreturn_t regmap_irq_thread(int irq, void *d) |
| 156 | { |
| 157 | struct regmap_irq_chip_data *data = d; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 158 | const struct regmap_irq_chip *chip = data->chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 159 | struct regmap *map = data->map; |
| 160 | int ret, i; |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 161 | bool handled = false; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 162 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 163 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 164 | if (chip->runtime_pm) { |
| 165 | ret = pm_runtime_get_sync(map->dev); |
| 166 | if (ret < 0) { |
| 167 | dev_err(map->dev, "IRQ thread failed to resume: %d\n", |
| 168 | ret); |
| 169 | return IRQ_NONE; |
| 170 | } |
| 171 | } |
| 172 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 173 | /* |
| 174 | * Ignore masked IRQs and ack if we need to; we ack early so |
| 175 | * there is no race between handling and acknowleding the |
| 176 | * interrupt. We assume that typically few of the interrupts |
| 177 | * will fire simultaneously so don't worry about overhead from |
| 178 | * doing a write per register. |
| 179 | */ |
| 180 | for (i = 0; i < data->chip->num_regs; i++) { |
Mark Brown | 38e7f5d | 2012-05-17 13:59:40 +0100 | [diff] [blame] | 181 | ret = regmap_read(map, chip->status_base + (i * map->reg_stride |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 182 | * data->irq_reg_stride), |
| 183 | &data->status_buf[i]); |
| 184 | |
| 185 | if (ret != 0) { |
| 186 | dev_err(map->dev, "Failed to read IRQ status: %d\n", |
| 187 | ret); |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 188 | if (chip->runtime_pm) |
| 189 | pm_runtime_put(map->dev); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 190 | return IRQ_NONE; |
| 191 | } |
| 192 | |
| 193 | data->status_buf[i] &= ~data->mask_buf[i]; |
| 194 | |
| 195 | if (data->status_buf[i] && chip->ack_base) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 196 | reg = chip->ack_base + |
| 197 | (i * map->reg_stride * data->irq_reg_stride); |
| 198 | ret = regmap_write(map, reg, data->status_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 199 | if (ret != 0) |
| 200 | dev_err(map->dev, "Failed to ack 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 201 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 202 | } |
| 203 | } |
| 204 | |
| 205 | for (i = 0; i < chip->num_irqs; i++) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 206 | if (data->status_buf[chip->irqs[i].reg_offset / |
| 207 | map->reg_stride] & chip->irqs[i].mask) { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 208 | handle_nested_irq(irq_find_mapping(data->domain, i)); |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 209 | handled = true; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 210 | } |
| 211 | } |
| 212 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 213 | if (chip->runtime_pm) |
| 214 | pm_runtime_put(map->dev); |
| 215 | |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 216 | if (handled) |
| 217 | return IRQ_HANDLED; |
| 218 | else |
| 219 | return IRQ_NONE; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 220 | } |
| 221 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 222 | static int regmap_irq_map(struct irq_domain *h, unsigned int virq, |
| 223 | irq_hw_number_t hw) |
| 224 | { |
| 225 | struct regmap_irq_chip_data *data = h->host_data; |
| 226 | |
| 227 | irq_set_chip_data(virq, data); |
Yunfan Zhang | 8138073 | 2012-09-08 03:53:25 -0700 | [diff] [blame] | 228 | irq_set_chip(virq, &data->irq_chip); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 229 | irq_set_nested_thread(virq, 1); |
| 230 | |
| 231 | /* ARM needs us to explicitly flag the IRQ as valid |
| 232 | * and will set them noprobe when we do so. */ |
| 233 | #ifdef CONFIG_ARM |
| 234 | set_irq_flags(virq, IRQF_VALID); |
| 235 | #else |
| 236 | irq_set_noprobe(virq); |
| 237 | #endif |
| 238 | |
| 239 | return 0; |
| 240 | } |
| 241 | |
| 242 | static struct irq_domain_ops regmap_domain_ops = { |
| 243 | .map = regmap_irq_map, |
| 244 | .xlate = irq_domain_xlate_twocell, |
| 245 | }; |
| 246 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 247 | /** |
| 248 | * regmap_add_irq_chip(): Use standard regmap IRQ controller handling |
| 249 | * |
| 250 | * map: The regmap for the device. |
| 251 | * irq: The IRQ the device uses to signal interrupts |
| 252 | * irq_flags: The IRQF_ flags to use for the primary interrupt. |
| 253 | * chip: Configuration for the interrupt controller. |
| 254 | * data: Runtime data structure for the controller, allocated on success |
| 255 | * |
| 256 | * Returns 0 on success or an errno on failure. |
| 257 | * |
| 258 | * In order for this to be efficient the chip really should use a |
| 259 | * register cache. The chip driver is responsible for restoring the |
| 260 | * register values used by the IRQ controller over suspend and resume. |
| 261 | */ |
| 262 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 263 | int irq_base, const struct regmap_irq_chip *chip, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 264 | struct regmap_irq_chip_data **data) |
| 265 | { |
| 266 | struct regmap_irq_chip_data *d; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 267 | int i; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 268 | int ret = -ENOMEM; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 269 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 270 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 271 | for (i = 0; i < chip->num_irqs; i++) { |
| 272 | if (chip->irqs[i].reg_offset % map->reg_stride) |
| 273 | return -EINVAL; |
| 274 | if (chip->irqs[i].reg_offset / map->reg_stride >= |
| 275 | chip->num_regs) |
| 276 | return -EINVAL; |
| 277 | } |
| 278 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 279 | if (irq_base) { |
| 280 | irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); |
| 281 | if (irq_base < 0) { |
| 282 | dev_warn(map->dev, "Failed to allocate IRQs: %d\n", |
| 283 | irq_base); |
| 284 | return irq_base; |
| 285 | } |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 286 | } |
| 287 | |
| 288 | d = kzalloc(sizeof(*d), GFP_KERNEL); |
| 289 | if (!d) |
| 290 | return -ENOMEM; |
| 291 | |
Mark Brown | 2431d0a | 2012-05-13 11:18:34 +0100 | [diff] [blame] | 292 | *data = d; |
| 293 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 294 | d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 295 | GFP_KERNEL); |
| 296 | if (!d->status_buf) |
| 297 | goto err_alloc; |
| 298 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 299 | d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 300 | GFP_KERNEL); |
| 301 | if (!d->mask_buf) |
| 302 | goto err_alloc; |
| 303 | |
| 304 | d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 305 | GFP_KERNEL); |
| 306 | if (!d->mask_buf_def) |
| 307 | goto err_alloc; |
| 308 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 309 | if (chip->wake_base) { |
| 310 | d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 311 | GFP_KERNEL); |
| 312 | if (!d->wake_buf) |
| 313 | goto err_alloc; |
| 314 | } |
| 315 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 316 | d->irq_chip = regmap_irq_chip; |
Stephen Warren | ca14275 | 2012-08-01 11:40:48 -0600 | [diff] [blame] | 317 | d->irq_chip.name = chip->name; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 318 | d->irq = irq; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 319 | d->map = map; |
| 320 | d->chip = chip; |
| 321 | d->irq_base = irq_base; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 322 | |
| 323 | if (chip->irq_reg_stride) |
| 324 | d->irq_reg_stride = chip->irq_reg_stride; |
| 325 | else |
| 326 | d->irq_reg_stride = 1; |
| 327 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 328 | mutex_init(&d->lock); |
| 329 | |
| 330 | for (i = 0; i < chip->num_irqs; i++) |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 331 | d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 332 | |= chip->irqs[i].mask; |
| 333 | |
| 334 | /* Mask all the interrupts by default */ |
| 335 | for (i = 0; i < chip->num_regs; i++) { |
| 336 | d->mask_buf[i] = d->mask_buf_def[i]; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 337 | reg = chip->mask_base + |
| 338 | (i * map->reg_stride * d->irq_reg_stride); |
Xiaofan Tian | 36ac914 | 2012-08-30 17:03:35 +0800 | [diff] [blame] | 339 | if (chip->mask_invert) |
| 340 | ret = regmap_update_bits(map, reg, |
| 341 | d->mask_buf[i], ~d->mask_buf[i]); |
| 342 | else |
| 343 | ret = regmap_update_bits(map, reg, |
Mark Brown | 0eb46ad | 2012-08-01 20:29:14 +0100 | [diff] [blame] | 344 | d->mask_buf[i], d->mask_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 345 | if (ret != 0) { |
| 346 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 347 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 348 | goto err_alloc; |
| 349 | } |
| 350 | } |
| 351 | |
Stephen Warren | 40052ca | 2012-08-01 13:57:24 -0600 | [diff] [blame] | 352 | /* Wake is disabled by default */ |
| 353 | if (d->wake_buf) { |
| 354 | for (i = 0; i < chip->num_regs; i++) { |
| 355 | d->wake_buf[i] = d->mask_buf_def[i]; |
| 356 | reg = chip->wake_base + |
| 357 | (i * map->reg_stride * d->irq_reg_stride); |
| 358 | ret = regmap_update_bits(map, reg, d->wake_buf[i], |
| 359 | d->wake_buf[i]); |
| 360 | if (ret != 0) { |
| 361 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
| 362 | reg, ret); |
| 363 | goto err_alloc; |
| 364 | } |
| 365 | } |
| 366 | } |
| 367 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 368 | if (irq_base) |
| 369 | d->domain = irq_domain_add_legacy(map->dev->of_node, |
| 370 | chip->num_irqs, irq_base, 0, |
| 371 | ®map_domain_ops, d); |
| 372 | else |
| 373 | d->domain = irq_domain_add_linear(map->dev->of_node, |
| 374 | chip->num_irqs, |
| 375 | ®map_domain_ops, d); |
| 376 | if (!d->domain) { |
| 377 | dev_err(map->dev, "Failed to create IRQ domain\n"); |
| 378 | ret = -ENOMEM; |
| 379 | goto err_alloc; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags, |
| 383 | chip->name, d); |
| 384 | if (ret != 0) { |
| 385 | dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 386 | goto err_domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 387 | } |
| 388 | |
| 389 | return 0; |
| 390 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 391 | err_domain: |
| 392 | /* Should really dispose of the domain but... */ |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 393 | err_alloc: |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 394 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 395 | kfree(d->mask_buf_def); |
| 396 | kfree(d->mask_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 397 | kfree(d->status_buf); |
| 398 | kfree(d); |
| 399 | return ret; |
| 400 | } |
| 401 | EXPORT_SYMBOL_GPL(regmap_add_irq_chip); |
| 402 | |
| 403 | /** |
| 404 | * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip |
| 405 | * |
| 406 | * @irq: Primary IRQ for the device |
| 407 | * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip() |
| 408 | */ |
| 409 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) |
| 410 | { |
| 411 | if (!d) |
| 412 | return; |
| 413 | |
| 414 | free_irq(irq, d); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 415 | /* We should unmap the domain but... */ |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 416 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 417 | kfree(d->mask_buf_def); |
| 418 | kfree(d->mask_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 419 | kfree(d->status_buf); |
| 420 | kfree(d); |
| 421 | } |
| 422 | EXPORT_SYMBOL_GPL(regmap_del_irq_chip); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 423 | |
| 424 | /** |
| 425 | * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip |
| 426 | * |
| 427 | * Useful for drivers to request their own IRQs. |
| 428 | * |
| 429 | * @data: regmap_irq controller to operate on. |
| 430 | */ |
| 431 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data) |
| 432 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 433 | WARN_ON(!data->irq_base); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 434 | return data->irq_base; |
| 435 | } |
| 436 | EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 437 | |
| 438 | /** |
| 439 | * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ |
| 440 | * |
| 441 | * Useful for drivers to request their own IRQs. |
| 442 | * |
| 443 | * @data: regmap_irq controller to operate on. |
| 444 | * @irq: index of the interrupt requested in the chip IRQs |
| 445 | */ |
| 446 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq) |
| 447 | { |
Mark Brown | bfd6185d | 2012-06-05 14:29:36 +0100 | [diff] [blame] | 448 | /* Handle holes in the IRQ list */ |
| 449 | if (!data->chip->irqs[irq].mask) |
| 450 | return -EINVAL; |
| 451 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 452 | return irq_create_mapping(data->domain, irq); |
| 453 | } |
| 454 | EXPORT_SYMBOL_GPL(regmap_irq_get_virq); |
Mark Brown | 90f790d | 2012-08-20 21:45:05 +0100 | [diff] [blame] | 455 | |
| 456 | /** |
| 457 | * regmap_irq_get_domain(): Retrieve the irq_domain for the chip |
| 458 | * |
| 459 | * Useful for drivers to request their own IRQs and for integration |
| 460 | * with subsystems. For ease of integration NULL is accepted as a |
| 461 | * domain, allowing devices to just call this even if no domain is |
| 462 | * allocated. |
| 463 | * |
| 464 | * @data: regmap_irq controller to operate on. |
| 465 | */ |
| 466 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data) |
| 467 | { |
| 468 | if (data) |
| 469 | return data->domain; |
| 470 | else |
| 471 | return NULL; |
| 472 | } |
| 473 | EXPORT_SYMBOL_GPL(regmap_irq_get_domain); |