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Kukjin Kimf1fee582010-09-08 19:25:44 +09001/* linux/arch/arm/mach-s5p64x0/dma.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22*/
23
24#include <linux/platform_device.h>
25#include <linux/dma-mapping.h>
26
27#include <mach/map.h>
28#include <mach/irqs.h>
29#include <mach/regs-clock.h>
30
31#include <plat/devs.h>
32#include <plat/s3c-pl330-pdata.h>
33
34static u64 dma_dmamask = DMA_BIT_MASK(32);
35
36static struct resource s5p64x0_pdma_resource[] = {
37 [0] = {
38 .start = S5P64X0_PA_PDMA,
39 .end = S5P64X0_PA_PDMA + SZ_4K,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = IRQ_DMA0,
44 .end = IRQ_DMA0,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
50 .peri = {
51 [0] = DMACH_UART0_RX,
52 [1] = DMACH_UART0_TX,
53 [2] = DMACH_UART1_RX,
54 [3] = DMACH_UART1_TX,
55 [4] = DMACH_UART2_RX,
56 [5] = DMACH_UART2_TX,
57 [6] = DMACH_UART3_RX,
58 [7] = DMACH_UART3_TX,
59 [8] = DMACH_MAX,
60 [9] = DMACH_MAX,
61 [10] = DMACH_PCM0_TX,
62 [11] = DMACH_PCM0_RX,
63 [12] = DMACH_I2S0_TX,
64 [13] = DMACH_I2S0_RX,
65 [14] = DMACH_SPI0_TX,
66 [15] = DMACH_SPI0_RX,
67 [16] = DMACH_MAX,
68 [17] = DMACH_MAX,
69 [18] = DMACH_MAX,
70 [19] = DMACH_MAX,
71 [20] = DMACH_SPI1_TX,
72 [21] = DMACH_SPI1_RX,
73 [22] = DMACH_MAX,
74 [23] = DMACH_MAX,
75 [24] = DMACH_MAX,
76 [25] = DMACH_MAX,
77 [26] = DMACH_MAX,
78 [27] = DMACH_MAX,
79 [28] = DMACH_MAX,
80 [29] = DMACH_PWM,
81 [30] = DMACH_MAX,
82 [31] = DMACH_MAX,
83 },
84};
85
86static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
87 .peri = {
88 [0] = DMACH_UART0_RX,
89 [1] = DMACH_UART0_TX,
90 [2] = DMACH_UART1_RX,
91 [3] = DMACH_UART1_TX,
92 [4] = DMACH_UART2_RX,
93 [5] = DMACH_UART2_TX,
94 [6] = DMACH_UART3_RX,
95 [7] = DMACH_UART3_TX,
96 [8] = DMACH_UART4_RX,
97 [9] = DMACH_UART4_TX,
98 [10] = DMACH_PCM0_TX,
99 [11] = DMACH_PCM0_RX,
100 [12] = DMACH_I2S0_TX,
101 [13] = DMACH_I2S0_RX,
102 [14] = DMACH_SPI0_TX,
103 [15] = DMACH_SPI0_RX,
104 [16] = DMACH_PCM1_TX,
105 [17] = DMACH_PCM1_RX,
106 [18] = DMACH_PCM2_TX,
107 [19] = DMACH_PCM2_RX,
108 [20] = DMACH_SPI1_TX,
109 [21] = DMACH_SPI1_RX,
110 [22] = DMACH_USI_TX,
111 [23] = DMACH_USI_RX,
112 [24] = DMACH_MAX,
113 [25] = DMACH_I2S1_TX,
114 [26] = DMACH_I2S1_RX,
115 [27] = DMACH_I2S2_TX,
116 [28] = DMACH_I2S2_RX,
117 [29] = DMACH_PWM,
118 [30] = DMACH_UART5_RX,
119 [31] = DMACH_UART5_TX,
120 },
121};
122
123static struct platform_device s5p64x0_device_pdma = {
124 .name = "s3c-pl330",
Seungwhan Youn9d59c172010-10-19 18:42:34 +0900125 .id = -1,
Kukjin Kimf1fee582010-09-08 19:25:44 +0900126 .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
127 .resource = s5p64x0_pdma_resource,
128 .dev = {
129 .dma_mask = &dma_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 },
132};
133
134static int __init s5p64x0_dma_init(void)
135{
136 unsigned int id;
137
138 id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
139
140 if (id == 0x50000)
141 s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata;
142 else
143 s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata;
144
145 platform_device_register(&s5p64x0_device_pdma);
146
147 return 0;
148}
149arch_initcall(s5p64x0_dma_init);