Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 1 | config PPC64 |
| 2 | bool "64-bit kernel" |
| 3 | default n |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 4 | select PPC_HAVE_PMU_SUPPORT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 5 | help |
| 6 | This option selects whether a 32-bit or a 64-bit kernel |
| 7 | will be built. |
| 8 | |
| 9 | menu "Processor support" |
| 10 | choice |
| 11 | prompt "Processor Type" |
| 12 | depends on PPC32 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 13 | help |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 14 | There are five families of 32 bit PowerPC chips supported. |
| 15 | The most common ones are the desktop and server CPUs (601, 603, |
| 16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
| 19 | (85xx) each form a family of their own that is not compatible |
| 20 | with the others. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 21 | |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 23 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 24 | config PPC_BOOK3S_32 |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 26 | select PPC_FPU |
| 27 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 28 | config PPC_85xx |
| 29 | bool "Freescale 85xx" |
| 30 | select E500 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 31 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 32 | config PPC_8xx |
| 33 | bool "Freescale 8xx" |
| 34 | select FSL_SOC |
| 35 | select 8xx |
Sylvain Munaut | 1088a20 | 2007-09-16 20:53:25 +1000 | [diff] [blame] | 36 | select PPC_LIB_RHEAP |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 37 | |
| 38 | config 40x |
| 39 | bool "AMCC 40x" |
| 40 | select PPC_DCR_NATIVE |
Benjamin Herrenschmidt | 9dae8af | 2007-12-21 15:39:26 +1100 | [diff] [blame] | 41 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 42 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 43 | select PPC_PCI_CHOICE |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 44 | |
| 45 | config 44x |
| 46 | bool "AMCC 44x" |
| 47 | select PPC_DCR_NATIVE |
Valentine Barshak | 1d5499b | 2007-10-18 22:55:13 +1000 | [diff] [blame] | 48 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 49 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 50 | select PPC_PCI_CHOICE |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 51 | select PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 52 | |
| 53 | config E200 |
| 54 | bool "Freescale e200" |
| 55 | |
| 56 | endchoice |
| 57 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 58 | choice |
| 59 | prompt "Processor Type" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 60 | depends on PPC64 |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 61 | help |
| 62 | There are two families of 64 bit PowerPC chips supported. |
| 63 | The most common ones are the desktop and server CPUs |
| 64 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) |
| 65 | |
| 66 | The other are the "embedded" processors compliant with the |
| 67 | "Book 3E" variant of the architecture |
| 68 | |
| 69 | config PPC_BOOK3S_64 |
| 70 | bool "Server processors" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 71 | select PPC_FPU |
| 72 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 73 | config PPC_BOOK3E_64 |
| 74 | bool "Embedded processors" |
| 75 | select PPC_FPU # Make it a choice ? |
| 76 | |
| 77 | endchoice |
| 78 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 79 | config PPC_BOOK3S |
| 80 | def_bool y |
| 81 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 82 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 83 | config PPC_BOOK3E |
| 84 | def_bool y |
| 85 | depends on PPC_BOOK3E_64 |
| 86 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 87 | config POWER4_ONLY |
| 88 | bool "Optimize for POWER4" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 89 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 90 | default n |
| 91 | ---help--- |
| 92 | Cause the compiler to optimize for POWER4/POWER5/PPC970 processors. |
| 93 | The resulting binary will not work on POWER3 or RS64 processors |
| 94 | when compiled with binutils 2.15 or later. |
| 95 | |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 96 | config 6xx |
| 97 | def_bool y |
| 98 | depends on PPC32 && PPC_BOOK3S |
Paul Mackerras | 7325927 | 2009-06-17 21:53:51 +1000 | [diff] [blame] | 99 | select PPC_HAVE_PMU_SUPPORT |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 100 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 101 | config POWER3 |
| 102 | bool |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 103 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 104 | default y if !POWER4_ONLY |
| 105 | |
| 106 | config POWER4 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 107 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 108 | def_bool y |
| 109 | |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 110 | config TUNE_CELL |
| 111 | bool "Optimize for Cell Broadband Engine" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 112 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 113 | help |
| 114 | Cause the compiler to optimize for the PPE of the Cell Broadband |
| 115 | Engine. This will make the code run considerably faster on Cell |
| 116 | but somewhat slower on other machines. This option only changes |
| 117 | the scheduling of instructions, not the selection of instructions |
| 118 | itself, so the resulting kernel will keep running on all other |
| 119 | machines. When building a kernel that is supposed to run only |
| 120 | on Cell, you should also select the POWER4_ONLY option. |
| 121 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 122 | # this is temp to handle compat with arch=ppc |
| 123 | config 8xx |
| 124 | bool |
| 125 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 126 | config E500 |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 127 | select FSL_EMB_PERFMON |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 128 | bool |
| 129 | |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 130 | config PPC_E500MC |
| 131 | bool "e500mc Support" |
| 132 | select PPC_FPU |
| 133 | depends on E500 |
| 134 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 135 | config PPC_FPU |
| 136 | bool |
| 137 | default y if PPC64 |
| 138 | |
Kumar Gala | 5753c08 | 2009-10-16 18:31:48 -0500 | [diff] [blame] | 139 | config FSL_EMB_PERFMON |
| 140 | bool "Freescale Embedded Perfmon" |
| 141 | depends on E500 || PPC_83xx |
| 142 | help |
| 143 | This is the Performance Monitor support found on the e500 core |
| 144 | and some e300 cores (c3 and c4). Select this only if your |
| 145 | core supports the Embedded Performance Monitor APU |
| 146 | |
Scott Wood | a111065 | 2010-02-25 18:09:45 -0600 | [diff] [blame] | 147 | config FSL_EMB_PERF_EVENT |
| 148 | bool |
| 149 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS |
| 150 | default y |
| 151 | |
| 152 | config FSL_EMB_PERF_EVENT_E500 |
| 153 | bool |
| 154 | depends on FSL_EMB_PERF_EVENT && E500 |
| 155 | default y |
| 156 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 157 | config 4xx |
| 158 | bool |
| 159 | depends on 40x || 44x |
| 160 | default y |
| 161 | |
| 162 | config BOOKE |
| 163 | bool |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 164 | depends on E200 || E500 || 44x || PPC_BOOK3E |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 165 | default y |
| 166 | |
| 167 | config FSL_BOOKE |
| 168 | bool |
| 169 | depends on E200 || E500 |
| 170 | default y |
| 171 | |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 172 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 173 | config PTE_64BIT |
| 174 | bool |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 175 | depends on 44x || E500 || PPC_86xx |
| 176 | default y if PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 177 | |
| 178 | config PHYS_64BIT |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 179 | bool 'Large physical address support' if E500 || PPC_86xx |
| 180 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 181 | ---help--- |
| 182 | This option enables kernel support for larger than 32-bit physical |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 183 | addresses. This feature may not be available on all cores. |
| 184 | |
| 185 | If you have more than 3.5GB of RAM or so, you also need to enable |
| 186 | SWIOTLB under Kernel Options for this to work. The actual number |
| 187 | is platform-dependent. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 188 | |
| 189 | If in doubt, say N here. |
| 190 | |
| 191 | config ALTIVEC |
| 192 | bool "AltiVec Support" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 193 | depends on 6xx || POWER4 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 194 | ---help--- |
| 195 | This option enables kernel support for the Altivec extensions to the |
| 196 | PowerPC processor. The kernel currently supports saving and restoring |
| 197 | altivec registers, and turning on the 'altivec enable' bit so user |
| 198 | processes can execute altivec instructions. |
| 199 | |
| 200 | This option is only usefully if you have a processor that supports |
| 201 | altivec (G4, otherwise known as 74xx series), but does not have |
| 202 | any affect on a non-altivec cpu (it does, however add code to the |
| 203 | kernel). |
| 204 | |
| 205 | If in doubt, say Y here. |
| 206 | |
Michael Neuling | 96d5b52 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 207 | config VSX |
| 208 | bool "VSX Support" |
| 209 | depends on POWER4 && ALTIVEC && PPC_FPU |
| 210 | ---help--- |
| 211 | |
| 212 | This option enables kernel support for the Vector Scaler extensions |
| 213 | to the PowerPC processor. The kernel currently supports saving and |
| 214 | restoring VSX registers, and turning on the 'VSX enable' bit so user |
| 215 | processes can execute VSX instructions. |
| 216 | |
| 217 | This option is only useful if you have a processor that supports |
| 218 | VSX (P7 and above), but does not have any affect on a non-VSX |
| 219 | CPUs (it does, however add code to the kernel). |
| 220 | |
| 221 | If in doubt, say Y here. |
| 222 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 223 | config SPE |
| 224 | bool "SPE Support" |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 225 | depends on E200 || (E500 && !PPC_E500MC) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 226 | default y |
| 227 | ---help--- |
| 228 | This option enables kernel support for the Signal Processing |
| 229 | Extensions (SPE) to the PowerPC processor. The kernel currently |
| 230 | supports saving and restoring SPE registers, and turning on the |
| 231 | 'spe enable' bit so user processes can execute SPE instructions. |
| 232 | |
| 233 | This option is only useful if you have a processor that supports |
| 234 | SPE (e500, otherwise known as 85xx series), but does not have any |
| 235 | effect on a non-spe cpu (it does, however add code to the kernel). |
| 236 | |
| 237 | If in doubt, say Y here. |
| 238 | |
| 239 | config PPC_STD_MMU |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 240 | def_bool y |
| 241 | depends on PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 242 | |
| 243 | config PPC_STD_MMU_32 |
| 244 | def_bool y |
| 245 | depends on PPC_STD_MMU && PPC32 |
| 246 | |
Benjamin Herrenschmidt | 5e69661 | 2008-12-18 19:13:24 +0000 | [diff] [blame] | 247 | config PPC_STD_MMU_64 |
| 248 | def_bool y |
| 249 | depends on PPC_STD_MMU && PPC64 |
| 250 | |
| 251 | config PPC_MMU_NOHASH |
| 252 | def_bool y |
| 253 | depends on !PPC_STD_MMU |
| 254 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 255 | config PPC_MMU_NOHASH_32 |
| 256 | def_bool y |
| 257 | depends on PPC_MMU_NOHASH && PPC32 |
| 258 | |
| 259 | config PPC_MMU_NOHASH_64 |
| 260 | def_bool y |
| 261 | depends on PPC_MMU_NOHASH && PPC64 |
| 262 | |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 263 | config PPC_BOOK3E_MMU |
| 264 | def_bool y |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 265 | depends on FSL_BOOKE || PPC_BOOK3E |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 266 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 267 | config PPC_MM_SLICES |
| 268 | bool |
Ilya Yanok | ca9153a | 2008-12-11 04:55:41 +0300 | [diff] [blame] | 269 | default y if HUGETLB_PAGE || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 270 | default n |
| 271 | |
| 272 | config VIRT_CPU_ACCOUNTING |
| 273 | bool "Deterministic task and CPU time accounting" |
| 274 | depends on PPC64 |
| 275 | default y |
| 276 | help |
| 277 | Select this option to enable more accurate task and CPU time |
| 278 | accounting. This is done by reading a CPU counter on each |
| 279 | kernel entry and exit and on transitions within the kernel |
| 280 | between system, softirq and hardirq state, so there is a |
| 281 | small performance impact. This also enables accounting of |
| 282 | stolen time on logically-partitioned systems running on |
| 283 | IBM POWER5-based machines. |
| 284 | |
| 285 | If in doubt, say Y here. |
| 286 | |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 287 | config PPC_HAVE_PMU_SUPPORT |
| 288 | bool |
| 289 | |
| 290 | config PPC_PERF_CTRS |
| 291 | def_bool y |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 292 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 293 | help |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 294 | This enables the powerpc-specific perf_event back-end. |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 295 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 296 | config SMP |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 297 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 298 | bool "Symmetric multi-processing support" |
| 299 | ---help--- |
| 300 | This enables support for systems with more than one CPU. If you have |
| 301 | a system with only one CPU, say N. If you have a system with more |
| 302 | than one CPU, say Y. Note that the kernel does not currently |
| 303 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors |
| 304 | since they have inadequate hardware support for multiprocessor |
| 305 | operation. |
| 306 | |
| 307 | If you say N here, the kernel will run on single and multiprocessor |
| 308 | machines, but will use only one CPU of a multiprocessor machine. If |
| 309 | you say Y here, the kernel will run on single-processor machines. |
| 310 | On a single-processor machine, the kernel will run faster if you say |
| 311 | N here. |
| 312 | |
| 313 | If you don't know what to do here, say N. |
| 314 | |
| 315 | config NR_CPUS |
Michael Neuling | 2d8ae63 | 2009-05-17 15:13:16 +0000 | [diff] [blame] | 316 | int "Maximum number of CPUs (2-8192)" |
| 317 | range 2 8192 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 318 | depends on SMP |
| 319 | default "32" if PPC64 |
| 320 | default "4" |
| 321 | |
| 322 | config NOT_COHERENT_CACHE |
| 323 | bool |
Albert Herranz | b91a143 | 2009-12-12 06:31:38 +0000 | [diff] [blame] | 324 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 325 | default y |
| 326 | |
Robert P. J. Day | f8eb77d | 2007-07-18 08:21:29 +1000 | [diff] [blame] | 327 | config CHECK_CACHE_COHERENCY |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 328 | bool |
| 329 | |
| 330 | endmenu |