Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for the r8a7791 SoC |
| 3 | * |
Kazuya Mizuguchi | 118e4e6 | 2015-02-19 10:43:10 -0500 | [diff] [blame] | 4 | * Copyright (C) 2013-2015 Renesas Electronics Corporation |
Sergei Shtylyov | 2e5d55c | 2014-02-20 02:27:04 +0300 | [diff] [blame] | 5 | * Copyright (C) 2013-2014 Renesas Solutions Corp. |
| 6 | * Copyright (C) 2014 Cogent Embedded Inc. |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 7 | * |
| 8 | * This file is licensed under the terms of the GNU General Public License |
| 9 | * version 2. This program is licensed "as is" without any warranty of any |
| 10 | * kind, whether express or implied. |
| 11 | */ |
| 12 | |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 13 | #include <dt-bindings/clock/r8a7791-clock.h> |
Laurent Pinchart | 5f75e73 | 2013-11-19 03:18:25 +0100 | [diff] [blame] | 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 15 | #include <dt-bindings/interrupt-controller/irq.h> |
Geert Uytterhoeven | 8574de8 | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 16 | #include <dt-bindings/power/r8a7791-sysc.h> |
Laurent Pinchart | 5f75e73 | 2013-11-19 03:18:25 +0100 | [diff] [blame] | 17 | |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 18 | / { |
| 19 | compatible = "renesas,r8a7791"; |
| 20 | interrupt-parent = <&gic>; |
| 21 | #address-cells = <2>; |
| 22 | #size-cells = <2>; |
| 23 | |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 24 | aliases { |
| 25 | i2c0 = &i2c0; |
| 26 | i2c1 = &i2c1; |
| 27 | i2c2 = &i2c2; |
| 28 | i2c3 = &i2c3; |
| 29 | i2c4 = &i2c4; |
| 30 | i2c5 = &i2c5; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 31 | i2c6 = &i2c6; |
| 32 | i2c7 = &i2c7; |
| 33 | i2c8 = &i2c8; |
Geert Uytterhoeven | 6f3e4ee | 2014-02-25 11:30:14 +0100 | [diff] [blame] | 34 | spi0 = &qspi; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 35 | spi1 = &msiof0; |
| 36 | spi2 = &msiof1; |
| 37 | spi3 = &msiof2; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 38 | vin0 = &vin0; |
| 39 | vin1 = &vin1; |
| 40 | vin2 = &vin2; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 41 | }; |
| 42 | |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 43 | cpus { |
| 44 | #address-cells = <1>; |
| 45 | #size-cells = <0>; |
| 46 | |
| 47 | cpu0: cpu@0 { |
| 48 | device_type = "cpu"; |
| 49 | compatible = "arm,cortex-a15"; |
| 50 | reg = <0>; |
Magnus Damm | 896b79d | 2014-03-06 12:15:36 +0900 | [diff] [blame] | 51 | clock-frequency = <1500000000>; |
Gaku Inami | a57004ec | 2014-06-03 21:03:10 +0900 | [diff] [blame] | 52 | voltage-tolerance = <1>; /* 1% */ |
| 53 | clocks = <&cpg_clocks R8A7791_CLK_Z>; |
| 54 | clock-latency = <300000>; /* 300 us */ |
Geert Uytterhoeven | 8574de8 | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 55 | power-domains = <&sysc R8A7791_PD_CA15_CPU0>; |
Geert Uytterhoeven | 8ffe93a | 2015-06-02 14:33:46 +0200 | [diff] [blame] | 56 | next-level-cache = <&L2_CA15>; |
Gaku Inami | a57004ec | 2014-06-03 21:03:10 +0900 | [diff] [blame] | 57 | |
| 58 | /* kHz - uV - OPPs unknown yet */ |
| 59 | operating-points = <1500000 1000000>, |
| 60 | <1312500 1000000>, |
| 61 | <1125000 1000000>, |
| 62 | < 937500 1000000>, |
| 63 | < 750000 1000000>, |
| 64 | < 375000 1000000>; |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 65 | }; |
Magnus Damm | 15ab426 | 2013-10-01 17:13:07 +0900 | [diff] [blame] | 66 | |
| 67 | cpu1: cpu@1 { |
| 68 | device_type = "cpu"; |
| 69 | compatible = "arm,cortex-a15"; |
| 70 | reg = <1>; |
Magnus Damm | 896b79d | 2014-03-06 12:15:36 +0900 | [diff] [blame] | 71 | clock-frequency = <1500000000>; |
Geert Uytterhoeven | 8574de8 | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 72 | power-domains = <&sysc R8A7791_PD_CA15_CPU1>; |
Geert Uytterhoeven | 8ffe93a | 2015-06-02 14:33:46 +0200 | [diff] [blame] | 73 | next-level-cache = <&L2_CA15>; |
Magnus Damm | 15ab426 | 2013-10-01 17:13:07 +0900 | [diff] [blame] | 74 | }; |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 75 | }; |
| 76 | |
Kuninori Morimoto | cac68a5 | 2016-01-28 02:46:01 +0000 | [diff] [blame] | 77 | thermal-zones { |
| 78 | cpu_thermal: cpu-thermal { |
| 79 | polling-delay-passive = <0>; |
| 80 | polling-delay = <0>; |
| 81 | |
| 82 | thermal-sensors = <&thermal>; |
| 83 | |
| 84 | trips { |
| 85 | cpu-crit { |
| 86 | temperature = <115000>; |
| 87 | hysteresis = <0>; |
| 88 | type = "critical"; |
| 89 | }; |
| 90 | }; |
| 91 | cooling-maps { |
| 92 | }; |
| 93 | }; |
| 94 | }; |
| 95 | |
Geert Uytterhoeven | 8ffe93a | 2015-06-02 14:33:46 +0200 | [diff] [blame] | 96 | L2_CA15: cache-controller@0 { |
| 97 | compatible = "cache"; |
Geert Uytterhoeven | 8574de8 | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 98 | power-domains = <&sysc R8A7791_PD_CA15_SCU>; |
Geert Uytterhoeven | 8ffe93a | 2015-06-02 14:33:46 +0200 | [diff] [blame] | 99 | cache-unified; |
| 100 | cache-level = <2>; |
| 101 | }; |
| 102 | |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 103 | gic: interrupt-controller@f1001000 { |
Geert Uytterhoeven | d238b5e | 2015-06-17 15:03:34 +0200 | [diff] [blame] | 104 | compatible = "arm,gic-400"; |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 105 | #interrupt-cells = <3>; |
| 106 | #address-cells = <0>; |
| 107 | interrupt-controller; |
| 108 | reg = <0 0xf1001000 0 0x1000>, |
| 109 | <0 0xf1002000 0 0x1000>, |
| 110 | <0 0xf1004000 0 0x2000>, |
| 111 | <0 0xf1006000 0 0x2000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 112 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 113 | }; |
Magnus Damm | d77db73 | 2013-10-01 17:12:29 +0900 | [diff] [blame] | 114 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 115 | gpio0: gpio@e6050000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 116 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 117 | reg = <0 0xe6050000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 118 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 119 | #gpio-cells = <2>; |
| 120 | gpio-controller; |
| 121 | gpio-ranges = <&pfc 0 0 32>; |
| 122 | #interrupt-cells = <2>; |
| 123 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 124 | clocks = <&mstp9_clks R8A7791_CLK_GPIO0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 125 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 126 | }; |
| 127 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 128 | gpio1: gpio@e6051000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 129 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 130 | reg = <0 0xe6051000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 131 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 132 | #gpio-cells = <2>; |
| 133 | gpio-controller; |
Sergei Shtylyov | 1329f6d | 2015-10-22 02:05:19 +0300 | [diff] [blame] | 134 | gpio-ranges = <&pfc 0 32 26>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 135 | #interrupt-cells = <2>; |
| 136 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 137 | clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 138 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 139 | }; |
| 140 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 141 | gpio2: gpio@e6052000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 142 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 143 | reg = <0 0xe6052000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 144 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 145 | #gpio-cells = <2>; |
| 146 | gpio-controller; |
| 147 | gpio-ranges = <&pfc 0 64 32>; |
| 148 | #interrupt-cells = <2>; |
| 149 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 150 | clocks = <&mstp9_clks R8A7791_CLK_GPIO2>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 151 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 152 | }; |
| 153 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 154 | gpio3: gpio@e6053000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 155 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 156 | reg = <0 0xe6053000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 157 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 158 | #gpio-cells = <2>; |
| 159 | gpio-controller; |
| 160 | gpio-ranges = <&pfc 0 96 32>; |
| 161 | #interrupt-cells = <2>; |
| 162 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 163 | clocks = <&mstp9_clks R8A7791_CLK_GPIO3>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 164 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 165 | }; |
| 166 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 167 | gpio4: gpio@e6054000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 168 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 169 | reg = <0 0xe6054000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 170 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 171 | #gpio-cells = <2>; |
| 172 | gpio-controller; |
| 173 | gpio-ranges = <&pfc 0 128 32>; |
| 174 | #interrupt-cells = <2>; |
| 175 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 176 | clocks = <&mstp9_clks R8A7791_CLK_GPIO4>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 177 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 178 | }; |
| 179 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 180 | gpio5: gpio@e6055000 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 181 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 182 | reg = <0 0xe6055000 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 183 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 184 | #gpio-cells = <2>; |
| 185 | gpio-controller; |
| 186 | gpio-ranges = <&pfc 0 160 32>; |
| 187 | #interrupt-cells = <2>; |
| 188 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 189 | clocks = <&mstp9_clks R8A7791_CLK_GPIO5>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 190 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 191 | }; |
| 192 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 193 | gpio6: gpio@e6055400 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 194 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 195 | reg = <0 0xe6055400 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 196 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 197 | #gpio-cells = <2>; |
| 198 | gpio-controller; |
| 199 | gpio-ranges = <&pfc 0 192 32>; |
| 200 | #interrupt-cells = <2>; |
| 201 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 202 | clocks = <&mstp9_clks R8A7791_CLK_GPIO6>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 203 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 204 | }; |
| 205 | |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 206 | gpio7: gpio@e6055800 { |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 207 | compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar"; |
Magnus Damm | 89fbba1 | 2013-11-21 14:22:00 +0900 | [diff] [blame] | 208 | reg = <0 0xe6055800 0 0x50>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 209 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 210 | #gpio-cells = <2>; |
| 211 | gpio-controller; |
| 212 | gpio-ranges = <&pfc 0 224 26>; |
| 213 | #interrupt-cells = <2>; |
| 214 | interrupt-controller; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 215 | clocks = <&mstp9_clks R8A7791_CLK_GPIO7>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 216 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | ab87e3f | 2013-10-08 12:39:30 +0900 | [diff] [blame] | 217 | }; |
| 218 | |
Kuninori Morimoto | cac68a5 | 2016-01-28 02:46:01 +0000 | [diff] [blame] | 219 | thermal: thermal@e61f0000 { |
| 220 | compatible = "renesas,thermal-r8a7791", |
| 221 | "renesas,rcar-gen2-thermal", |
| 222 | "renesas,rcar-thermal"; |
Magnus Damm | d103f4d | 2013-11-20 16:59:48 +0900 | [diff] [blame] | 223 | reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 224 | interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 563bc8e | 2014-01-07 19:57:13 +0100 | [diff] [blame] | 225 | clocks = <&mstp5_clks R8A7791_CLK_THERMAL>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 226 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Kuninori Morimoto | cac68a5 | 2016-01-28 02:46:01 +0000 | [diff] [blame] | 227 | #thermal-sensor-cells = <0>; |
Magnus Damm | d103f4d | 2013-11-20 16:59:48 +0900 | [diff] [blame] | 228 | }; |
| 229 | |
Magnus Damm | 03586ac | 2013-10-01 17:12:38 +0900 | [diff] [blame] | 230 | timer { |
| 231 | compatible = "arm,armv7-timer"; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 232 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| 233 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| 234 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, |
| 235 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; |
Magnus Damm | 03586ac | 2013-10-01 17:12:38 +0900 | [diff] [blame] | 236 | }; |
| 237 | |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 238 | cmt0: timer@ffca0000 { |
Simon Horman | 4217f32 | 2014-09-08 09:27:46 +0900 | [diff] [blame] | 239 | compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 240 | reg = <0 0xffca0000 0 0x1004>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 241 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
| 242 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 243 | clocks = <&mstp1_clks R8A7791_CLK_CMT0>; |
| 244 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 245 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 246 | |
| 247 | renesas,channels-mask = <0x60>; |
| 248 | |
| 249 | status = "disabled"; |
| 250 | }; |
| 251 | |
| 252 | cmt1: timer@e6130000 { |
Simon Horman | 4217f32 | 2014-09-08 09:27:46 +0900 | [diff] [blame] | 253 | compatible = "renesas,cmt-48-r8a7791", "renesas,cmt-48-gen2"; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 254 | reg = <0 0xe6130000 0 0x1004>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 255 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
| 256 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, |
| 257 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
| 258 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
| 259 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
| 260 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, |
| 261 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, |
| 262 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 263 | clocks = <&mstp3_clks R8A7791_CLK_CMT1>; |
| 264 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 265 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | ceaa189 | 2014-07-09 15:12:38 +0200 | [diff] [blame] | 266 | |
| 267 | renesas,channels-mask = <0xff>; |
| 268 | |
| 269 | status = "disabled"; |
| 270 | }; |
| 271 | |
Magnus Damm | d77db73 | 2013-10-01 17:12:29 +0900 | [diff] [blame] | 272 | irqc0: interrupt-controller@e61c0000 { |
Magnus Damm | 26041b0 | 2013-11-20 13:18:05 +0900 | [diff] [blame] | 273 | compatible = "renesas,irqc-r8a7791", "renesas,irqc"; |
Magnus Damm | d77db73 | 2013-10-01 17:12:29 +0900 | [diff] [blame] | 274 | #interrupt-cells = <2>; |
| 275 | interrupt-controller; |
| 276 | reg = <0 0xe61c0000 0 0x200>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 277 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 278 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 279 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 280 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
| 281 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, |
| 282 | <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, |
| 283 | <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, |
| 284 | <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, |
| 285 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, |
| 286 | <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 62d386c | 2015-03-18 19:56:00 +0100 | [diff] [blame] | 287 | clocks = <&mstp4_clks R8A7791_CLK_IRQC>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 288 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | d77db73 | 2013-10-01 17:12:29 +0900 | [diff] [blame] | 289 | }; |
Magnus Damm | 5514692 | 2013-10-08 12:39:01 +0900 | [diff] [blame] | 290 | |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 291 | dmac0: dma-controller@e6700000 { |
Simon Horman | e6d12b4 | 2015-11-13 11:23:49 +0900 | [diff] [blame] | 292 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 293 | reg = <0 0xe6700000 0 0x20000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 294 | interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH |
| 295 | GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH |
| 296 | GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH |
| 297 | GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH |
| 298 | GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH |
| 299 | GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH |
| 300 | GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH |
| 301 | GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH |
| 302 | GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH |
| 303 | GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH |
| 304 | GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH |
| 305 | GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH |
| 306 | GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH |
| 307 | GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH |
| 308 | GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH |
| 309 | GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 310 | interrupt-names = "error", |
| 311 | "ch0", "ch1", "ch2", "ch3", |
| 312 | "ch4", "ch5", "ch6", "ch7", |
| 313 | "ch8", "ch9", "ch10", "ch11", |
| 314 | "ch12", "ch13", "ch14"; |
| 315 | clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC0>; |
| 316 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 317 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 318 | #dma-cells = <1>; |
| 319 | dma-channels = <15>; |
| 320 | }; |
| 321 | |
| 322 | dmac1: dma-controller@e6720000 { |
Simon Horman | e6d12b4 | 2015-11-13 11:23:49 +0900 | [diff] [blame] | 323 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 324 | reg = <0 0xe6720000 0 0x20000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 325 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH |
| 326 | GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH |
| 327 | GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH |
| 328 | GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH |
| 329 | GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH |
| 330 | GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH |
| 331 | GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH |
| 332 | GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH |
| 333 | GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH |
| 334 | GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH |
| 335 | GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH |
| 336 | GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH |
| 337 | GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH |
| 338 | GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH |
| 339 | GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH |
| 340 | GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 341 | interrupt-names = "error", |
| 342 | "ch0", "ch1", "ch2", "ch3", |
| 343 | "ch4", "ch5", "ch6", "ch7", |
| 344 | "ch8", "ch9", "ch10", "ch11", |
| 345 | "ch12", "ch13", "ch14"; |
| 346 | clocks = <&mstp2_clks R8A7791_CLK_SYS_DMAC1>; |
| 347 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 348 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | fde8fee | 2014-07-19 01:50:25 +0200 | [diff] [blame] | 349 | #dma-cells = <1>; |
| 350 | dma-channels = <15>; |
| 351 | }; |
| 352 | |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 353 | audma0: dma-controller@ec700000 { |
Simon Horman | e6d12b4 | 2015-11-13 11:23:49 +0900 | [diff] [blame] | 354 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 355 | reg = <0 0xec700000 0 0x10000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 356 | interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH |
| 357 | GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH |
| 358 | GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH |
| 359 | GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH |
| 360 | GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH |
| 361 | GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH |
| 362 | GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH |
| 363 | GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH |
| 364 | GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH |
| 365 | GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH |
| 366 | GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH |
| 367 | GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH |
| 368 | GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH |
| 369 | GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 370 | interrupt-names = "error", |
| 371 | "ch0", "ch1", "ch2", "ch3", |
| 372 | "ch4", "ch5", "ch6", "ch7", |
| 373 | "ch8", "ch9", "ch10", "ch11", |
| 374 | "ch12"; |
| 375 | clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC0>; |
| 376 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 377 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 378 | #dma-cells = <1>; |
| 379 | dma-channels = <13>; |
| 380 | }; |
| 381 | |
| 382 | audma1: dma-controller@ec720000 { |
Simon Horman | e6d12b4 | 2015-11-13 11:23:49 +0900 | [diff] [blame] | 383 | compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 384 | reg = <0 0xec720000 0 0x10000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 385 | interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH |
| 386 | GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH |
| 387 | GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH |
| 388 | GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH |
| 389 | GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH |
| 390 | GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH |
| 391 | GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH |
| 392 | GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH |
| 393 | GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH |
| 394 | GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH |
| 395 | GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH |
| 396 | GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH |
| 397 | GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH |
| 398 | GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 399 | interrupt-names = "error", |
| 400 | "ch0", "ch1", "ch2", "ch3", |
| 401 | "ch4", "ch5", "ch6", "ch7", |
| 402 | "ch8", "ch9", "ch10", "ch11", |
| 403 | "ch12"; |
| 404 | clocks = <&mstp5_clks R8A7791_CLK_AUDIO_DMAC1>; |
| 405 | clock-names = "fck"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 406 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Kuninori Morimoto | 8994fff | 2014-11-03 17:45:37 -0800 | [diff] [blame] | 407 | #dma-cells = <1>; |
| 408 | dma-channels = <13>; |
| 409 | }; |
| 410 | |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 411 | usb_dmac0: dma-controller@e65a0000 { |
Simon Horman | d01c8be | 2015-12-11 11:59:38 +0900 | [diff] [blame] | 412 | compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 413 | reg = <0 0xe65a0000 0 0x100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 414 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH |
| 415 | GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 416 | interrupt-names = "ch0", "ch1"; |
| 417 | clocks = <&mstp3_clks R8A7791_CLK_USBDMAC0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 418 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 419 | #dma-cells = <1>; |
| 420 | dma-channels = <2>; |
| 421 | }; |
| 422 | |
| 423 | usb_dmac1: dma-controller@e65b0000 { |
Simon Horman | d01c8be | 2015-12-11 11:59:38 +0900 | [diff] [blame] | 424 | compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 425 | reg = <0 0xe65b0000 0 0x100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 426 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH |
| 427 | GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 428 | interrupt-names = "ch0", "ch1"; |
| 429 | clocks = <&mstp3_clks R8A7791_CLK_USBDMAC1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 430 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Yoshihiro Shimoda | e3e25ed | 2015-05-08 16:13:33 +0900 | [diff] [blame] | 431 | #dma-cells = <1>; |
| 432 | dma-channels = <2>; |
| 433 | }; |
| 434 | |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 435 | /* The memory map in the User's Manual maps the cores to bus numbers */ |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 436 | i2c0: i2c@e6508000 { |
| 437 | #address-cells = <1>; |
| 438 | #size-cells = <0>; |
| 439 | compatible = "renesas,i2c-r8a7791"; |
| 440 | reg = <0 0xe6508000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 441 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 442 | clocks = <&mstp9_clks R8A7791_CLK_I2C0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 443 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 444 | i2c-scl-internal-delay-ns = <6>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 445 | status = "disabled"; |
| 446 | }; |
| 447 | |
| 448 | i2c1: i2c@e6518000 { |
| 449 | #address-cells = <1>; |
| 450 | #size-cells = <0>; |
| 451 | compatible = "renesas,i2c-r8a7791"; |
| 452 | reg = <0 0xe6518000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 453 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 454 | clocks = <&mstp9_clks R8A7791_CLK_I2C1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 455 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 456 | i2c-scl-internal-delay-ns = <6>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 457 | status = "disabled"; |
| 458 | }; |
| 459 | |
| 460 | i2c2: i2c@e6530000 { |
| 461 | #address-cells = <1>; |
| 462 | #size-cells = <0>; |
| 463 | compatible = "renesas,i2c-r8a7791"; |
| 464 | reg = <0 0xe6530000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 465 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 466 | clocks = <&mstp9_clks R8A7791_CLK_I2C2>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 467 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 468 | i2c-scl-internal-delay-ns = <6>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 469 | status = "disabled"; |
| 470 | }; |
| 471 | |
| 472 | i2c3: i2c@e6540000 { |
| 473 | #address-cells = <1>; |
| 474 | #size-cells = <0>; |
| 475 | compatible = "renesas,i2c-r8a7791"; |
| 476 | reg = <0 0xe6540000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 477 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 478 | clocks = <&mstp9_clks R8A7791_CLK_I2C3>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 479 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 480 | i2c-scl-internal-delay-ns = <6>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 481 | status = "disabled"; |
| 482 | }; |
| 483 | |
| 484 | i2c4: i2c@e6520000 { |
| 485 | #address-cells = <1>; |
| 486 | #size-cells = <0>; |
| 487 | compatible = "renesas,i2c-r8a7791"; |
| 488 | reg = <0 0xe6520000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 489 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 490 | clocks = <&mstp9_clks R8A7791_CLK_I2C4>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 491 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 492 | i2c-scl-internal-delay-ns = <6>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 493 | status = "disabled"; |
| 494 | }; |
| 495 | |
| 496 | i2c5: i2c@e6528000 { |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 497 | /* doesn't need pinmux */ |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 498 | #address-cells = <1>; |
| 499 | #size-cells = <0>; |
| 500 | compatible = "renesas,i2c-r8a7791"; |
| 501 | reg = <0 0xe6528000 0 0x40>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 502 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 503 | clocks = <&mstp9_clks R8A7791_CLK_I2C5>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 504 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 49160dc | 2015-12-08 10:37:51 +0100 | [diff] [blame] | 505 | i2c-scl-internal-delay-ns = <110>; |
Wolfram Sang | 5bd3de7 | 2014-02-17 11:44:41 +0100 | [diff] [blame] | 506 | status = "disabled"; |
| 507 | }; |
| 508 | |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 509 | i2c6: i2c@e60b0000 { |
| 510 | /* doesn't need pinmux */ |
| 511 | #address-cells = <1>; |
| 512 | #size-cells = <0>; |
| 513 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; |
| 514 | reg = <0 0xe60b0000 0 0x425>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 515 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 516 | clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>; |
Wolfram Sang | 3f58c54 | 2014-11-07 11:11:44 +0100 | [diff] [blame] | 517 | dmas = <&dmac0 0x77>, <&dmac0 0x78>; |
| 518 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 519 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 520 | status = "disabled"; |
| 521 | }; |
| 522 | |
| 523 | i2c7: i2c@e6500000 { |
| 524 | #address-cells = <1>; |
| 525 | #size-cells = <0>; |
| 526 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; |
| 527 | reg = <0 0xe6500000 0 0x425>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 528 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 529 | clocks = <&mstp3_clks R8A7791_CLK_IIC0>; |
Wolfram Sang | 3f58c54 | 2014-11-07 11:11:44 +0100 | [diff] [blame] | 530 | dmas = <&dmac0 0x61>, <&dmac0 0x62>; |
| 531 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 532 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 533 | status = "disabled"; |
| 534 | }; |
| 535 | |
| 536 | i2c8: i2c@e6510000 { |
| 537 | #address-cells = <1>; |
| 538 | #size-cells = <0>; |
| 539 | compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic"; |
| 540 | reg = <0 0xe6510000 0 0x425>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 541 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 542 | clocks = <&mstp3_clks R8A7791_CLK_IIC1>; |
Wolfram Sang | 3f58c54 | 2014-11-07 11:11:44 +0100 | [diff] [blame] | 543 | dmas = <&dmac0 0x65>, <&dmac0 0x66>; |
| 544 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 545 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Wolfram Sang | 36408d9 | 2014-03-10 12:26:58 +0100 | [diff] [blame] | 546 | status = "disabled"; |
| 547 | }; |
| 548 | |
Magnus Damm | 5514692 | 2013-10-08 12:39:01 +0900 | [diff] [blame] | 549 | pfc: pfc@e6060000 { |
| 550 | compatible = "renesas,pfc-r8a7791"; |
| 551 | reg = <0 0xe6060000 0 0x250>; |
Magnus Damm | 5514692 | 2013-10-08 12:39:01 +0900 | [diff] [blame] | 552 | }; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 553 | |
Laurent Pinchart | 8edae49 | 2014-10-26 19:40:12 +0200 | [diff] [blame] | 554 | mmcif0: mmc@ee200000 { |
| 555 | compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif"; |
| 556 | reg = <0 0xee200000 0 0x80>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 557 | interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 8edae49 | 2014-10-26 19:40:12 +0200 | [diff] [blame] | 558 | clocks = <&mstp3_clks R8A7791_CLK_MMCIF0>; |
Laurent Pinchart | 16b355b | 2014-10-26 19:40:14 +0200 | [diff] [blame] | 559 | dmas = <&dmac0 0xd1>, <&dmac0 0xd2>; |
| 560 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 561 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 8edae49 | 2014-10-26 19:40:12 +0200 | [diff] [blame] | 562 | reg-io-width = <4>; |
| 563 | status = "disabled"; |
Kuninori Morimoto | d957ab8 | 2015-05-14 07:23:20 +0000 | [diff] [blame] | 564 | max-frequency = <97500000>; |
Laurent Pinchart | 8edae49 | 2014-10-26 19:40:12 +0200 | [diff] [blame] | 565 | }; |
| 566 | |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 567 | sdhi0: sd@ee100000 { |
| 568 | compatible = "renesas,sdhi-r8a7791"; |
Kuninori Morimoto | e849b06 | 2015-02-24 02:20:52 +0000 | [diff] [blame] | 569 | reg = <0 0xee100000 0 0x328>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 570 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 571 | clocks = <&mstp3_clks R8A7791_CLK_SDHI0>; |
Laurent Pinchart | ae67fa2 | 2015-02-24 02:20:19 +0000 | [diff] [blame] | 572 | dmas = <&dmac1 0xcd>, <&dmac1 0xce>; |
| 573 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 574 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 575 | status = "disabled"; |
| 576 | }; |
| 577 | |
| 578 | sdhi1: sd@ee140000 { |
| 579 | compatible = "renesas,sdhi-r8a7791"; |
| 580 | reg = <0 0xee140000 0 0x100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 581 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 582 | clocks = <&mstp3_clks R8A7791_CLK_SDHI1>; |
Laurent Pinchart | ae67fa2 | 2015-02-24 02:20:19 +0000 | [diff] [blame] | 583 | dmas = <&dmac1 0xc1>, <&dmac1 0xc2>; |
| 584 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 585 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 586 | status = "disabled"; |
| 587 | }; |
| 588 | |
| 589 | sdhi2: sd@ee160000 { |
| 590 | compatible = "renesas,sdhi-r8a7791"; |
| 591 | reg = <0 0xee160000 0 0x100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 592 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 593 | clocks = <&mstp3_clks R8A7791_CLK_SDHI2>; |
Laurent Pinchart | ae67fa2 | 2015-02-24 02:20:19 +0000 | [diff] [blame] | 594 | dmas = <&dmac1 0xd3>, <&dmac1 0xd4>; |
| 595 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 596 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Magnus Damm | b7ed8a0 | 2014-02-12 18:53:55 +0900 | [diff] [blame] | 597 | status = "disabled"; |
| 598 | }; |
| 599 | |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 600 | scifa0: serial@e6c40000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 601 | compatible = "renesas,scifa-r8a7791", |
| 602 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 603 | reg = <0 0xe6c40000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 604 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 605 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 606 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 607 | dmas = <&dmac0 0x21>, <&dmac0 0x22>; |
| 608 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 609 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 610 | status = "disabled"; |
| 611 | }; |
| 612 | |
| 613 | scifa1: serial@e6c50000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 614 | compatible = "renesas,scifa-r8a7791", |
| 615 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 616 | reg = <0 0xe6c50000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 617 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 618 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 619 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 620 | dmas = <&dmac0 0x25>, <&dmac0 0x26>; |
| 621 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 622 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 623 | status = "disabled"; |
| 624 | }; |
| 625 | |
| 626 | scifa2: serial@e6c60000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 627 | compatible = "renesas,scifa-r8a7791", |
| 628 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 629 | reg = <0 0xe6c60000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 630 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 631 | clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 632 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 633 | dmas = <&dmac0 0x27>, <&dmac0 0x28>; |
| 634 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 635 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 636 | status = "disabled"; |
| 637 | }; |
| 638 | |
| 639 | scifa3: serial@e6c70000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 640 | compatible = "renesas,scifa-r8a7791", |
| 641 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 642 | reg = <0 0xe6c70000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 643 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 644 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 645 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 646 | dmas = <&dmac0 0x1b>, <&dmac0 0x1c>; |
| 647 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 648 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 649 | status = "disabled"; |
| 650 | }; |
| 651 | |
| 652 | scifa4: serial@e6c78000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 653 | compatible = "renesas,scifa-r8a7791", |
| 654 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 655 | reg = <0 0xe6c78000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 656 | interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 657 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 658 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 659 | dmas = <&dmac0 0x1f>, <&dmac0 0x20>; |
| 660 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 661 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 662 | status = "disabled"; |
| 663 | }; |
| 664 | |
| 665 | scifa5: serial@e6c80000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 666 | compatible = "renesas,scifa-r8a7791", |
| 667 | "renesas,rcar-gen2-scifa", "renesas,scifa"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 668 | reg = <0 0xe6c80000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 669 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 670 | clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 671 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 672 | dmas = <&dmac0 0x23>, <&dmac0 0x24>; |
| 673 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 674 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 675 | status = "disabled"; |
| 676 | }; |
| 677 | |
| 678 | scifb0: serial@e6c20000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 679 | compatible = "renesas,scifb-r8a7791", |
| 680 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 681 | reg = <0 0xe6c20000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 682 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 683 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 684 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 685 | dmas = <&dmac0 0x3d>, <&dmac0 0x3e>; |
| 686 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 687 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 688 | status = "disabled"; |
| 689 | }; |
| 690 | |
| 691 | scifb1: serial@e6c30000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 692 | compatible = "renesas,scifb-r8a7791", |
| 693 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 694 | reg = <0 0xe6c30000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 695 | interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 696 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 697 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 698 | dmas = <&dmac0 0x19>, <&dmac0 0x1a>; |
| 699 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 700 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 701 | status = "disabled"; |
| 702 | }; |
| 703 | |
| 704 | scifb2: serial@e6ce0000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 705 | compatible = "renesas,scifb-r8a7791", |
| 706 | "renesas,rcar-gen2-scifb", "renesas,scifb"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 707 | reg = <0 0xe6ce0000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 708 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 709 | clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; |
Laurent Pinchart | bb7ca19 | 2016-01-29 10:47:38 +0100 | [diff] [blame] | 710 | clock-names = "fck"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 711 | dmas = <&dmac0 0x1d>, <&dmac0 0x1e>; |
| 712 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 713 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 714 | status = "disabled"; |
| 715 | }; |
| 716 | |
| 717 | scif0: serial@e6e60000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 718 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 719 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 720 | reg = <0 0xe6e60000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 721 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 722 | clocks = <&mstp7_clks R8A7791_CLK_SCIF0>, <&zs_clk>, |
| 723 | <&scif_clk>; |
| 724 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 725 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>; |
| 726 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 727 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 728 | status = "disabled"; |
| 729 | }; |
| 730 | |
| 731 | scif1: serial@e6e68000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 732 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 733 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 734 | reg = <0 0xe6e68000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 735 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 736 | clocks = <&mstp7_clks R8A7791_CLK_SCIF1>, <&zs_clk>, |
| 737 | <&scif_clk>; |
| 738 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 739 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; |
| 740 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 741 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 742 | status = "disabled"; |
| 743 | }; |
| 744 | |
| 745 | scif2: serial@e6e58000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 746 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 747 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 748 | reg = <0 0xe6e58000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 749 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 750 | clocks = <&mstp7_clks R8A7791_CLK_SCIF2>, <&zs_clk>, |
| 751 | <&scif_clk>; |
| 752 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 753 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; |
| 754 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 755 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 756 | status = "disabled"; |
| 757 | }; |
| 758 | |
| 759 | scif3: serial@e6ea8000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 760 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 761 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 762 | reg = <0 0xe6ea8000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 763 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 764 | clocks = <&mstp7_clks R8A7791_CLK_SCIF3>, <&zs_clk>, |
| 765 | <&scif_clk>; |
| 766 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 767 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>; |
| 768 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 769 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 770 | status = "disabled"; |
| 771 | }; |
| 772 | |
| 773 | scif4: serial@e6ee0000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 774 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 775 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 776 | reg = <0 0xe6ee0000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 777 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 778 | clocks = <&mstp7_clks R8A7791_CLK_SCIF4>, <&zs_clk>, |
| 779 | <&scif_clk>; |
| 780 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 781 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; |
| 782 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 783 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 784 | status = "disabled"; |
| 785 | }; |
| 786 | |
| 787 | scif5: serial@e6ee8000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 788 | compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", |
| 789 | "renesas,scif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 790 | reg = <0 0xe6ee8000 0 64>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 791 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 792 | clocks = <&mstp7_clks R8A7791_CLK_SCIF5>, <&zs_clk>, |
| 793 | <&scif_clk>; |
| 794 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 795 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; |
| 796 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 797 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 798 | status = "disabled"; |
| 799 | }; |
| 800 | |
| 801 | hscif0: serial@e62c0000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 802 | compatible = "renesas,hscif-r8a7791", |
| 803 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 804 | reg = <0 0xe62c0000 0 96>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 805 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 806 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>, <&zs_clk>, |
| 807 | <&scif_clk>; |
| 808 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 809 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>; |
| 810 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 811 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 812 | status = "disabled"; |
| 813 | }; |
| 814 | |
| 815 | hscif1: serial@e62c8000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 816 | compatible = "renesas,hscif-r8a7791", |
| 817 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 818 | reg = <0 0xe62c8000 0 96>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 819 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 820 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>, <&zs_clk>, |
| 821 | <&scif_clk>; |
| 822 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 823 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; |
| 824 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 825 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 826 | status = "disabled"; |
| 827 | }; |
| 828 | |
| 829 | hscif2: serial@e62d0000 { |
Geert Uytterhoeven | b5b52dd | 2016-01-29 10:32:05 +0100 | [diff] [blame] | 830 | compatible = "renesas,hscif-r8a7791", |
| 831 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 832 | reg = <0 0xe62d0000 0 96>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 833 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 834 | clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>, <&zs_clk>, |
| 835 | <&scif_clk>; |
| 836 | clock-names = "fck", "brg_int", "scif_clk"; |
Geert Uytterhoeven | 558d656 | 2015-05-20 19:46:26 +0200 | [diff] [blame] | 837 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; |
| 838 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 839 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 9640cf2 | 2013-12-11 14:14:22 +0100 | [diff] [blame] | 840 | status = "disabled"; |
| 841 | }; |
| 842 | |
Sergei Shtylyov | 2e5d55c | 2014-02-20 02:27:04 +0300 | [diff] [blame] | 843 | ether: ethernet@ee700000 { |
| 844 | compatible = "renesas,ether-r8a7791"; |
| 845 | reg = <0 0xee700000 0 0x400>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 846 | interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | 2e5d55c | 2014-02-20 02:27:04 +0300 | [diff] [blame] | 847 | clocks = <&mstp8_clks R8A7791_CLK_ETHER>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 848 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 2e5d55c | 2014-02-20 02:27:04 +0300 | [diff] [blame] | 849 | phy-mode = "rmii"; |
| 850 | #address-cells = <1>; |
| 851 | #size-cells = <0>; |
| 852 | status = "disabled"; |
| 853 | }; |
| 854 | |
Sergei Shtylyov | 46ece34 | 2015-12-03 01:23:03 +0300 | [diff] [blame] | 855 | avb: ethernet@e6800000 { |
| 856 | compatible = "renesas,etheravb-r8a7791", |
| 857 | "renesas,etheravb-rcar-gen2"; |
| 858 | reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 859 | interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | 46ece34 | 2015-12-03 01:23:03 +0300 | [diff] [blame] | 860 | clocks = <&mstp8_clks R8A7791_CLK_ETHERAVB>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 861 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 46ece34 | 2015-12-03 01:23:03 +0300 | [diff] [blame] | 862 | #address-cells = <1>; |
| 863 | #size-cells = <0>; |
| 864 | status = "disabled"; |
| 865 | }; |
| 866 | |
Valentine Barshak | b8532c6 | 2014-01-14 21:05:40 +0400 | [diff] [blame] | 867 | sata0: sata@ee300000 { |
| 868 | compatible = "renesas,sata-r8a7791"; |
| 869 | reg = <0 0xee300000 0 0x2000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 870 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; |
Valentine Barshak | b8532c6 | 2014-01-14 21:05:40 +0400 | [diff] [blame] | 871 | clocks = <&mstp8_clks R8A7791_CLK_SATA0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 872 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Valentine Barshak | b8532c6 | 2014-01-14 21:05:40 +0400 | [diff] [blame] | 873 | status = "disabled"; |
| 874 | }; |
| 875 | |
| 876 | sata1: sata@ee500000 { |
| 877 | compatible = "renesas,sata-r8a7791"; |
| 878 | reg = <0 0xee500000 0 0x2000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 879 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; |
Valentine Barshak | b8532c6 | 2014-01-14 21:05:40 +0400 | [diff] [blame] | 880 | clocks = <&mstp8_clks R8A7791_CLK_SATA1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 881 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Valentine Barshak | b8532c6 | 2014-01-14 21:05:40 +0400 | [diff] [blame] | 882 | status = "disabled"; |
| 883 | }; |
| 884 | |
Yoshihiro Shimoda | 1c1fee7 | 2014-10-24 19:45:06 +0900 | [diff] [blame] | 885 | hsusb: usb@e6590000 { |
Simon Horman | 8cf1d45 | 2016-01-04 08:20:18 +1100 | [diff] [blame] | 886 | compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; |
Yoshihiro Shimoda | 1c1fee7 | 2014-10-24 19:45:06 +0900 | [diff] [blame] | 887 | reg = <0 0xe6590000 0 0x100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 888 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
Yoshihiro Shimoda | 1c1fee7 | 2014-10-24 19:45:06 +0900 | [diff] [blame] | 889 | clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; |
Yoshihiro Shimoda | 7706993 | 2015-05-08 16:13:34 +0900 | [diff] [blame] | 890 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
| 891 | <&usb_dmac1 0>, <&usb_dmac1 1>; |
| 892 | dma-names = "ch0", "ch1", "ch2", "ch3"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 893 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 894 | renesas,buswait = <4>; |
| 895 | phys = <&usb0 1>; |
| 896 | phy-names = "usb"; |
Yoshihiro Shimoda | 1c1fee7 | 2014-10-24 19:45:06 +0900 | [diff] [blame] | 897 | status = "disabled"; |
| 898 | }; |
| 899 | |
Sergei Shtylyov | 3b7e530 | 2014-09-27 01:08:12 +0400 | [diff] [blame] | 900 | usbphy: usb-phy@e6590100 { |
| 901 | compatible = "renesas,usb-phy-r8a7791"; |
| 902 | reg = <0 0xe6590100 0 0x100>; |
| 903 | #address-cells = <1>; |
| 904 | #size-cells = <0>; |
| 905 | clocks = <&mstp7_clks R8A7791_CLK_HSUSB>; |
| 906 | clock-names = "usbhs"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 907 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 3b7e530 | 2014-09-27 01:08:12 +0400 | [diff] [blame] | 908 | status = "disabled"; |
| 909 | |
| 910 | usb0: usb-channel@0 { |
| 911 | reg = <0>; |
| 912 | #phy-cells = <1>; |
| 913 | }; |
| 914 | usb2: usb-channel@2 { |
| 915 | reg = <2>; |
| 916 | #phy-cells = <1>; |
| 917 | }; |
| 918 | }; |
| 919 | |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 920 | vin0: video@e6ef0000 { |
| 921 | compatible = "renesas,vin-r8a7791"; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 922 | reg = <0 0xe6ef0000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 923 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 924 | clocks = <&mstp8_clks R8A7791_CLK_VIN0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 925 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 926 | status = "disabled"; |
| 927 | }; |
| 928 | |
| 929 | vin1: video@e6ef1000 { |
| 930 | compatible = "renesas,vin-r8a7791"; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 931 | reg = <0 0xe6ef1000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 932 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 933 | clocks = <&mstp8_clks R8A7791_CLK_VIN1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 934 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 935 | status = "disabled"; |
| 936 | }; |
| 937 | |
| 938 | vin2: video@e6ef2000 { |
| 939 | compatible = "renesas,vin-r8a7791"; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 940 | reg = <0 0xe6ef2000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 941 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 942 | clocks = <&mstp8_clks R8A7791_CLK_VIN2>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 943 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 0b8d1d5 | 2014-08-02 04:04:21 +0400 | [diff] [blame] | 944 | status = "disabled"; |
| 945 | }; |
| 946 | |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 947 | vsp1@fe928000 { |
| 948 | compatible = "renesas,vsp1"; |
| 949 | reg = <0 0xfe928000 0 0x8000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 950 | interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 951 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_S>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 952 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 953 | |
| 954 | renesas,has-lut; |
| 955 | renesas,has-sru; |
| 956 | renesas,#rpf = <5>; |
| 957 | renesas,#uds = <3>; |
| 958 | renesas,#wpf = <4>; |
| 959 | }; |
| 960 | |
| 961 | vsp1@fe930000 { |
| 962 | compatible = "renesas,vsp1"; |
| 963 | reg = <0 0xfe930000 0 0x8000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 964 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 965 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU0>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 966 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 967 | |
| 968 | renesas,has-lif; |
| 969 | renesas,has-lut; |
| 970 | renesas,#rpf = <4>; |
| 971 | renesas,#uds = <1>; |
| 972 | renesas,#wpf = <4>; |
| 973 | }; |
| 974 | |
| 975 | vsp1@fe938000 { |
| 976 | compatible = "renesas,vsp1"; |
| 977 | reg = <0 0xfe938000 0 0x8000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 978 | interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 979 | clocks = <&mstp1_clks R8A7791_CLK_VSP1_DU1>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 980 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 981 | |
| 982 | renesas,has-lif; |
| 983 | renesas,has-lut; |
| 984 | renesas,#rpf = <4>; |
| 985 | renesas,#uds = <1>; |
| 986 | renesas,#wpf = <4>; |
| 987 | }; |
| 988 | |
| 989 | du: display@feb00000 { |
| 990 | compatible = "renesas,du-r8a7791"; |
| 991 | reg = <0 0xfeb00000 0 0x40000>, |
| 992 | <0 0xfeb90000 0 0x1c>; |
| 993 | reg-names = "du", "lvds.0"; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 994 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
| 995 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | 8eefac2 | 2014-01-21 16:00:46 +0100 | [diff] [blame] | 996 | clocks = <&mstp7_clks R8A7791_CLK_DU0>, |
| 997 | <&mstp7_clks R8A7791_CLK_DU1>, |
| 998 | <&mstp7_clks R8A7791_CLK_LVDS0>; |
| 999 | clock-names = "du.0", "du.1", "lvds.0"; |
| 1000 | status = "disabled"; |
| 1001 | |
| 1002 | ports { |
| 1003 | #address-cells = <1>; |
| 1004 | #size-cells = <0>; |
| 1005 | |
| 1006 | port@0 { |
| 1007 | reg = <0>; |
| 1008 | du_out_rgb: endpoint { |
| 1009 | }; |
| 1010 | }; |
| 1011 | port@1 { |
| 1012 | reg = <1>; |
| 1013 | du_out_lvds0: endpoint { |
| 1014 | }; |
| 1015 | }; |
| 1016 | }; |
| 1017 | }; |
| 1018 | |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1019 | can0: can@e6e80000 { |
Simon Horman | 73ae9cf | 2016-03-14 11:13:58 +0900 | [diff] [blame] | 1020 | compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1021 | reg = <0 0xe6e80000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1022 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1023 | clocks = <&mstp9_clks R8A7791_CLK_RCAN0>, |
| 1024 | <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; |
| 1025 | clock-names = "clkp1", "clkp2", "can_clk"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1026 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1027 | status = "disabled"; |
| 1028 | }; |
| 1029 | |
| 1030 | can1: can@e6e88000 { |
Simon Horman | 73ae9cf | 2016-03-14 11:13:58 +0900 | [diff] [blame] | 1031 | compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1032 | reg = <0 0xe6e88000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1033 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1034 | clocks = <&mstp9_clks R8A7791_CLK_RCAN1>, |
| 1035 | <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>; |
| 1036 | clock-names = "clkp1", "clkp2", "can_clk"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1037 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | 3cf0188 | 2015-01-06 01:25:25 +0300 | [diff] [blame] | 1038 | status = "disabled"; |
| 1039 | }; |
| 1040 | |
Mikhail Ulyanov | 0caa366 | 2015-07-24 16:25:46 +0300 | [diff] [blame] | 1041 | jpu: jpeg-codec@fe980000 { |
Simon Horman | 803f7e0 | 2016-02-24 11:29:06 +0900 | [diff] [blame] | 1042 | compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; |
Mikhail Ulyanov | 0caa366 | 2015-07-24 16:25:46 +0300 | [diff] [blame] | 1043 | reg = <0 0xfe980000 0 0x10300>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1044 | interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; |
Mikhail Ulyanov | 0caa366 | 2015-07-24 16:25:46 +0300 | [diff] [blame] | 1045 | clocks = <&mstp1_clks R8A7791_CLK_JPU>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1046 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Mikhail Ulyanov | 0caa366 | 2015-07-24 16:25:46 +0300 | [diff] [blame] | 1047 | }; |
| 1048 | |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1049 | clocks { |
| 1050 | #address-cells = <2>; |
| 1051 | #size-cells = <2>; |
| 1052 | ranges; |
| 1053 | |
| 1054 | /* External root clock */ |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1055 | extal_clk: extal { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1056 | compatible = "fixed-clock"; |
| 1057 | #clock-cells = <0>; |
| 1058 | /* This value must be overriden by the board. */ |
| 1059 | clock-frequency = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1060 | }; |
| 1061 | |
Kuninori Morimoto | 0d3dbde | 2014-06-11 21:44:04 -0700 | [diff] [blame] | 1062 | /* |
| 1063 | * The external audio clocks are configured as 0 Hz fixed frequency clocks by |
| 1064 | * default. Boards that provide audio clocks should override them. |
| 1065 | */ |
| 1066 | audio_clk_a: audio_clk_a { |
| 1067 | compatible = "fixed-clock"; |
| 1068 | #clock-cells = <0>; |
| 1069 | clock-frequency = <0>; |
Kuninori Morimoto | 0d3dbde | 2014-06-11 21:44:04 -0700 | [diff] [blame] | 1070 | }; |
| 1071 | audio_clk_b: audio_clk_b { |
| 1072 | compatible = "fixed-clock"; |
| 1073 | #clock-cells = <0>; |
| 1074 | clock-frequency = <0>; |
Kuninori Morimoto | 0d3dbde | 2014-06-11 21:44:04 -0700 | [diff] [blame] | 1075 | }; |
| 1076 | audio_clk_c: audio_clk_c { |
| 1077 | compatible = "fixed-clock"; |
| 1078 | #clock-cells = <0>; |
| 1079 | clock-frequency = <0>; |
Kuninori Morimoto | 0d3dbde | 2014-06-11 21:44:04 -0700 | [diff] [blame] | 1080 | }; |
| 1081 | |
Phil Edworthy | 66c405e | 2014-06-13 10:37:19 +0100 | [diff] [blame] | 1082 | /* External PCIe clock - can be overridden by the board */ |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1083 | pcie_bus_clk: pcie_bus { |
Phil Edworthy | 66c405e | 2014-06-13 10:37:19 +0100 | [diff] [blame] | 1084 | compatible = "fixed-clock"; |
| 1085 | #clock-cells = <0>; |
| 1086 | clock-frequency = <100000000>; |
Phil Edworthy | 66c405e | 2014-06-13 10:37:19 +0100 | [diff] [blame] | 1087 | status = "disabled"; |
| 1088 | }; |
| 1089 | |
Geert Uytterhoeven | 394730a | 2016-01-29 11:04:40 +0100 | [diff] [blame] | 1090 | /* External SCIF clock */ |
| 1091 | scif_clk: scif { |
| 1092 | compatible = "fixed-clock"; |
| 1093 | #clock-cells = <0>; |
| 1094 | /* This value must be overridden by the board. */ |
| 1095 | clock-frequency = <0>; |
| 1096 | status = "disabled"; |
| 1097 | }; |
| 1098 | |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1099 | /* External USB clock - can be overridden by the board */ |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1100 | usb_extal_clk: usb_extal { |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1101 | compatible = "fixed-clock"; |
| 1102 | #clock-cells = <0>; |
| 1103 | clock-frequency = <48000000>; |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1104 | }; |
| 1105 | |
| 1106 | /* External CAN clock */ |
| 1107 | can_clk: can_clk { |
| 1108 | compatible = "fixed-clock"; |
| 1109 | #clock-cells = <0>; |
| 1110 | /* This value must be overridden by the board. */ |
| 1111 | clock-frequency = <0>; |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1112 | status = "disabled"; |
| 1113 | }; |
| 1114 | |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1115 | /* Special CPG clocks */ |
| 1116 | cpg_clocks: cpg_clocks@e6150000 { |
| 1117 | compatible = "renesas,r8a7791-cpg-clocks", |
| 1118 | "renesas,rcar-gen2-cpg-clocks"; |
| 1119 | reg = <0 0xe6150000 0 0x1000>; |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1120 | clocks = <&extal_clk &usb_extal_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1121 | #clock-cells = <1>; |
| 1122 | clock-output-names = "main", "pll0", "pll1", "pll3", |
Sergei Shtylyov | b324252 | 2015-01-06 01:24:08 +0300 | [diff] [blame] | 1123 | "lb", "qspi", "sdh", "sd0", "z", |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 1124 | "rcan", "adsp"; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 1125 | #power-domain-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1126 | }; |
| 1127 | |
| 1128 | /* Variable factor clocks */ |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1129 | sd2_clk: sd2@e6150078 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1130 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
| 1131 | reg = <0 0xe6150078 0 4>; |
| 1132 | clocks = <&pll1_div2_clk>; |
| 1133 | #clock-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1134 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1135 | sd3_clk: sd3@e615026c { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1136 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
Shinobu Uehara | c9b2277 | 2014-07-21 22:04:29 -0700 | [diff] [blame] | 1137 | reg = <0 0xe615026c 0 4>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1138 | clocks = <&pll1_div2_clk>; |
| 1139 | #clock-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1140 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1141 | mmc0_clk: mmc0@e6150240 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1142 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
| 1143 | reg = <0 0xe6150240 0 4>; |
| 1144 | clocks = <&pll1_div2_clk>; |
| 1145 | #clock-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1146 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1147 | ssp_clk: ssp@e6150248 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1148 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
| 1149 | reg = <0 0xe6150248 0 4>; |
| 1150 | clocks = <&pll1_div2_clk>; |
| 1151 | #clock-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1152 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1153 | ssprs_clk: ssprs@e615024c { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1154 | compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; |
| 1155 | reg = <0 0xe615024c 0 4>; |
| 1156 | clocks = <&pll1_div2_clk>; |
| 1157 | #clock-cells = <0>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1158 | }; |
| 1159 | |
| 1160 | /* Fixed factor clocks */ |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1161 | pll1_div2_clk: pll1_div2 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1162 | compatible = "fixed-factor-clock"; |
| 1163 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1164 | #clock-cells = <0>; |
| 1165 | clock-div = <2>; |
| 1166 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1167 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1168 | zg_clk: zg { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1169 | compatible = "fixed-factor-clock"; |
| 1170 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1171 | #clock-cells = <0>; |
| 1172 | clock-div = <3>; |
| 1173 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1174 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1175 | zx_clk: zx { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1176 | compatible = "fixed-factor-clock"; |
| 1177 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1178 | #clock-cells = <0>; |
| 1179 | clock-div = <3>; |
| 1180 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1181 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1182 | zs_clk: zs { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1183 | compatible = "fixed-factor-clock"; |
| 1184 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1185 | #clock-cells = <0>; |
| 1186 | clock-div = <6>; |
| 1187 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1188 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1189 | hp_clk: hp { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1190 | compatible = "fixed-factor-clock"; |
| 1191 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1192 | #clock-cells = <0>; |
| 1193 | clock-div = <12>; |
| 1194 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1195 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1196 | i_clk: i { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1197 | compatible = "fixed-factor-clock"; |
| 1198 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1199 | #clock-cells = <0>; |
| 1200 | clock-div = <2>; |
| 1201 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1202 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1203 | b_clk: b { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1204 | compatible = "fixed-factor-clock"; |
| 1205 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1206 | #clock-cells = <0>; |
| 1207 | clock-div = <12>; |
| 1208 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1209 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1210 | p_clk: p { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1211 | compatible = "fixed-factor-clock"; |
| 1212 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1213 | #clock-cells = <0>; |
| 1214 | clock-div = <24>; |
| 1215 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1216 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1217 | cl_clk: cl { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1218 | compatible = "fixed-factor-clock"; |
| 1219 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1220 | #clock-cells = <0>; |
| 1221 | clock-div = <48>; |
| 1222 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1223 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1224 | m2_clk: m2 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1225 | compatible = "fixed-factor-clock"; |
| 1226 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1227 | #clock-cells = <0>; |
| 1228 | clock-div = <8>; |
| 1229 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1230 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1231 | rclk_clk: rclk { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1232 | compatible = "fixed-factor-clock"; |
| 1233 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1234 | #clock-cells = <0>; |
| 1235 | clock-div = <(48 * 1024)>; |
| 1236 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1237 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1238 | oscclk_clk: oscclk { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1239 | compatible = "fixed-factor-clock"; |
| 1240 | clocks = <&cpg_clocks R8A7791_CLK_PLL1>; |
| 1241 | #clock-cells = <0>; |
| 1242 | clock-div = <(12 * 1024)>; |
| 1243 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1244 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1245 | zb3_clk: zb3 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1246 | compatible = "fixed-factor-clock"; |
| 1247 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; |
| 1248 | #clock-cells = <0>; |
| 1249 | clock-div = <4>; |
| 1250 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1251 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1252 | zb3d2_clk: zb3d2 { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1253 | compatible = "fixed-factor-clock"; |
| 1254 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; |
| 1255 | #clock-cells = <0>; |
| 1256 | clock-div = <8>; |
| 1257 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1258 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1259 | ddr_clk: ddr { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1260 | compatible = "fixed-factor-clock"; |
| 1261 | clocks = <&cpg_clocks R8A7791_CLK_PLL3>; |
| 1262 | #clock-cells = <0>; |
| 1263 | clock-div = <8>; |
| 1264 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1265 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1266 | mp_clk: mp { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1267 | compatible = "fixed-factor-clock"; |
| 1268 | clocks = <&pll1_div2_clk>; |
| 1269 | #clock-cells = <0>; |
| 1270 | clock-div = <15>; |
| 1271 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1272 | }; |
Simon Horman | f617604 | 2016-03-18 08:16:23 +0900 | [diff] [blame] | 1273 | cp_clk: cp { |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1274 | compatible = "fixed-factor-clock"; |
| 1275 | clocks = <&extal_clk>; |
| 1276 | #clock-cells = <0>; |
| 1277 | clock-div = <2>; |
| 1278 | clock-mult = <1>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1279 | }; |
| 1280 | |
| 1281 | /* Gate clocks */ |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 1282 | mstp0_clks: mstp0_clks@e6150130 { |
| 1283 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1284 | reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; |
| 1285 | clocks = <&mp_clk>; |
| 1286 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1287 | clock-indices = <R8A7791_CLK_MSIOF0>; |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 1288 | clock-output-names = "msiof0"; |
| 1289 | }; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1290 | mstp1_clks: mstp1_clks@e6150134 { |
| 1291 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1292 | reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; |
Yoshifumi Hosoya | 74d89d2 | 2014-10-14 16:01:43 +0900 | [diff] [blame] | 1293 | clocks = <&zs_clk>, <&zs_clk>, <&m2_clk>, <&zs_clk>, <&p_clk>, |
| 1294 | <&zg_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, |
| 1295 | <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, |
| 1296 | <&zs_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1297 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1298 | clock-indices = < |
Yoshifumi Hosoya | 74d89d2 | 2014-10-14 16:01:43 +0900 | [diff] [blame] | 1299 | R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU |
| 1300 | R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG |
| 1301 | R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0 |
| 1302 | R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 R8A7791_CLK_CMT0 |
| 1303 | R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 R8A7791_CLK_VSP1_DU0 |
| 1304 | R8A7791_CLK_VSP1_S |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1305 | >; |
| 1306 | clock-output-names = |
Yoshifumi Hosoya | 74d89d2 | 2014-10-14 16:01:43 +0900 | [diff] [blame] | 1307 | "vcp0", "vpc0", "jpu", "ssp1", "tmu1", "3dg", |
| 1308 | "2ddmac", "fdp1-1", "fdp1-0", "tmu3", "tmu2", "cmt0", |
| 1309 | "tmu0", "vsp1-du1", "vsp1-du0", "vsp1-sy"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1310 | }; |
| 1311 | mstp2_clks: mstp2_clks@e6150138 { |
| 1312 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1313 | reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; |
| 1314 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, |
Geert Uytterhoeven | 4e074bc | 2014-06-02 15:42:07 +0200 | [diff] [blame] | 1315 | <&mp_clk>, <&mp_clk>, <&mp_clk>, |
| 1316 | <&zs_clk>, <&zs_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1317 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1318 | clock-indices = < |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1319 | R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0 |
Laurent Pinchart | cded80f | 2013-12-19 16:51:02 +0100 | [diff] [blame] | 1320 | R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 |
| 1321 | R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2 |
Geert Uytterhoeven | 4e074bc | 2014-06-02 15:42:07 +0200 | [diff] [blame] | 1322 | R8A7791_CLK_SYS_DMAC1 R8A7791_CLK_SYS_DMAC0 |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1323 | >; |
| 1324 | clock-output-names = |
Geert Uytterhoeven | 0c002ef | 2014-02-20 15:49:29 +0100 | [diff] [blame] | 1325 | "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", |
Geert Uytterhoeven | 4e074bc | 2014-06-02 15:42:07 +0200 | [diff] [blame] | 1326 | "scifb1", "msiof1", "scifb2", |
| 1327 | "sys-dmac1", "sys-dmac0"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1328 | }; |
| 1329 | mstp3_clks: mstp3_clks@e615013c { |
| 1330 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1331 | reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; |
Simon Horman | 2ea0d4e | 2015-01-29 10:41:24 +0900 | [diff] [blame] | 1332 | clocks = <&cp_clk>, <&sd3_clk>, <&sd2_clk>, <&cpg_clocks R8A7791_CLK_SD0>, |
Yoshihiro Shimoda | b9473d9 | 2014-11-17 18:25:25 +0900 | [diff] [blame] | 1333 | <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, |
| 1334 | <&hp_clk>, <&hp_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1335 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1336 | clock-indices = < |
Wolfram Sang | c08691b | 2014-03-10 12:26:57 +0100 | [diff] [blame] | 1337 | R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 |
Phil Edworthy | 4bfb376 | 2014-06-13 10:37:18 +0100 | [diff] [blame] | 1338 | R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1 |
| 1339 | R8A7791_CLK_SSUSB R8A7791_CLK_CMT1 |
Yoshihiro Shimoda | b9473d9 | 2014-11-17 18:25:25 +0900 | [diff] [blame] | 1340 | R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1 |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1341 | >; |
| 1342 | clock-output-names = |
Wolfram Sang | c08691b | 2014-03-10 12:26:57 +0100 | [diff] [blame] | 1343 | "tpu0", "sdhi2", "sdhi1", "sdhi0", |
Yoshihiro Shimoda | b9473d9 | 2014-11-17 18:25:25 +0900 | [diff] [blame] | 1344 | "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1", |
| 1345 | "usbdmac0", "usbdmac1"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1346 | }; |
Geert Uytterhoeven | 62d386c | 2015-03-18 19:56:00 +0100 | [diff] [blame] | 1347 | mstp4_clks: mstp4_clks@e6150140 { |
| 1348 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1349 | reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>; |
| 1350 | clocks = <&cp_clk>; |
| 1351 | #clock-cells = <1>; |
| 1352 | clock-indices = <R8A7791_CLK_IRQC>; |
| 1353 | clock-output-names = "irqc"; |
| 1354 | }; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1355 | mstp5_clks: mstp5_clks@e6150144 { |
| 1356 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1357 | reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 1358 | clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7791_CLK_ADSP>, |
| 1359 | <&extal_clk>, <&p_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1360 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1361 | clock-indices = < |
| 1362 | R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 1363 | R8A7791_CLK_ADSP_MOD R8A7791_CLK_THERMAL |
| 1364 | R8A7791_CLK_PWM |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1365 | >; |
Sergei Shtylyov | ae65a8a | 2014-12-30 23:20:34 +0300 | [diff] [blame] | 1366 | clock-output-names = "audmac0", "audmac1", "adsp_mod", |
| 1367 | "thermal", "pwm"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1368 | }; |
| 1369 | mstp7_clks: mstp7_clks@e615014c { |
| 1370 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1371 | reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; |
Kazuya Mizuguchi | 118e4e6 | 2015-02-19 10:43:10 -0500 | [diff] [blame] | 1372 | clocks = <&mp_clk>, <&hp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1373 | <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, |
| 1374 | <&zx_clk>, <&zx_clk>, <&zx_clk>; |
| 1375 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1376 | clock-indices = < |
Magnus Damm | 6225b99 | 2014-04-07 15:04:21 +0900 | [diff] [blame] | 1377 | R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1378 | R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0 |
| 1379 | R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1 |
| 1380 | R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0 |
| 1381 | R8A7791_CLK_LVDS0 |
| 1382 | >; |
| 1383 | clock-output-names = |
Magnus Damm | 6225b99 | 2014-04-07 15:04:21 +0900 | [diff] [blame] | 1384 | "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1385 | "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0"; |
| 1386 | }; |
| 1387 | mstp8_clks: mstp8_clks@e6150990 { |
| 1388 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1389 | reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; |
Ryo Kataoka | 75a499a | 2015-02-19 22:29:06 +0900 | [diff] [blame] | 1390 | clocks = <&zx_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>, |
Sergei Shtylyov | eaa870b | 2015-12-03 01:21:49 +0300 | [diff] [blame] | 1391 | <&zg_clk>, <&hp_clk>, <&p_clk>, <&zs_clk>, |
| 1392 | <&zs_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1393 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1394 | clock-indices = < |
Andrey Gusakov | 7408d30 | 2014-12-18 23:43:03 +0300 | [diff] [blame] | 1395 | R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB |
Laurent Pinchart | 09c9834 | 2014-01-07 09:22:54 +0100 | [diff] [blame] | 1396 | R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 |
Sergei Shtylyov | eaa870b | 2015-12-03 01:21:49 +0300 | [diff] [blame] | 1397 | R8A7791_CLK_ETHERAVB R8A7791_CLK_ETHER |
| 1398 | R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 |
Laurent Pinchart | 09c9834 | 2014-01-07 09:22:54 +0100 | [diff] [blame] | 1399 | >; |
Laurent Pinchart | 65f05c3 | 2014-01-07 09:22:56 +0100 | [diff] [blame] | 1400 | clock-output-names = |
Sergei Shtylyov | eaa870b | 2015-12-03 01:21:49 +0300 | [diff] [blame] | 1401 | "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", |
| 1402 | "etheravb", "ether", "sata1", "sata0"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1403 | }; |
| 1404 | mstp9_clks: mstp9_clks@e6150994 { |
| 1405 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1406 | reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 1407 | clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, |
| 1408 | <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, |
| 1409 | <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>, |
Laurent Pinchart | 11b48db | 2014-04-01 13:02:18 +0200 | [diff] [blame] | 1410 | <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, |
| 1411 | <&hp_clk>, <&hp_clk>; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1412 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1413 | clock-indices = < |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 1414 | R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4 |
| 1415 | R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0 |
Wolfram Sang | c08691b | 2014-03-10 12:26:57 +0100 | [diff] [blame] | 1416 | R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5 |
| 1417 | R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2 |
| 1418 | R8A7791_CLK_I2C1 R8A7791_CLK_I2C0 |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1419 | >; |
| 1420 | clock-output-names = |
Geert Uytterhoeven | 4faf9c5 | 2014-04-23 10:25:28 +0200 | [diff] [blame] | 1421 | "gpio7", "gpio6", "gpio5", "gpio4", "gpio3", "gpio2", "gpio1", "gpio0", |
| 1422 | "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3", "i2c2", |
| 1423 | "i2c1", "i2c0"; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1424 | }; |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 1425 | mstp10_clks: mstp10_clks@e6150998 { |
| 1426 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1427 | reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>; |
| 1428 | clocks = <&p_clk>, |
| 1429 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, |
| 1430 | <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, |
| 1431 | <&p_clk>, |
| 1432 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
| 1433 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
| 1434 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
| 1435 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
| 1436 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1437 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>, |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 1438 | <&mstp10_clks R8A7791_CLK_SCU_ALL>, <&mstp10_clks R8A7791_CLK_SCU_ALL>; |
| 1439 | |
| 1440 | #clock-cells = <1>; |
| 1441 | clock-indices = < |
| 1442 | R8A7791_CLK_SSI_ALL |
| 1443 | R8A7791_CLK_SSI9 R8A7791_CLK_SSI8 R8A7791_CLK_SSI7 R8A7791_CLK_SSI6 R8A7791_CLK_SSI5 |
| 1444 | R8A7791_CLK_SSI4 R8A7791_CLK_SSI3 R8A7791_CLK_SSI2 R8A7791_CLK_SSI1 R8A7791_CLK_SSI0 |
| 1445 | R8A7791_CLK_SCU_ALL |
| 1446 | R8A7791_CLK_SCU_DVC1 R8A7791_CLK_SCU_DVC0 |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1447 | R8A7791_CLK_SCU_CTU1_MIX1 R8A7791_CLK_SCU_CTU0_MIX0 |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 1448 | R8A7791_CLK_SCU_SRC9 R8A7791_CLK_SCU_SRC8 R8A7791_CLK_SCU_SRC7 R8A7791_CLK_SCU_SRC6 R8A7791_CLK_SCU_SRC5 |
| 1449 | R8A7791_CLK_SCU_SRC4 R8A7791_CLK_SCU_SRC3 R8A7791_CLK_SCU_SRC2 R8A7791_CLK_SCU_SRC1 R8A7791_CLK_SCU_SRC0 |
| 1450 | >; |
| 1451 | clock-output-names = |
| 1452 | "ssi-all", |
| 1453 | "ssi9", "ssi8", "ssi7", "ssi6", "ssi5", |
| 1454 | "ssi4", "ssi3", "ssi2", "ssi1", "ssi0", |
| 1455 | "scu-all", |
| 1456 | "scu-dvc1", "scu-dvc0", |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1457 | "scu-ctu1-mix1", "scu-ctu0-mix0", |
Kuninori Morimoto | ee91415 | 2014-06-11 21:44:16 -0700 | [diff] [blame] | 1458 | "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", |
| 1459 | "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; |
| 1460 | }; |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1461 | mstp11_clks: mstp11_clks@e615099c { |
| 1462 | compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; |
| 1463 | reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; |
| 1464 | clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>; |
| 1465 | #clock-cells = <1>; |
Ben Dooks | cb0bf85 | 2014-11-10 19:49:38 +0100 | [diff] [blame] | 1466 | clock-indices = < |
Laurent Pinchart | 59e7989 | 2013-12-11 15:05:16 +0100 | [diff] [blame] | 1467 | R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5 |
| 1468 | >; |
| 1469 | clock-output-names = "scifa3", "scifa4", "scifa5"; |
| 1470 | }; |
| 1471 | }; |
Geert Uytterhoeven | 4d5b59c | 2014-02-04 16:24:03 +0100 | [diff] [blame] | 1472 | |
Geert Uytterhoeven | 8574de8 | 2015-01-20 14:44:58 +0100 | [diff] [blame] | 1473 | sysc: system-controller@e6180000 { |
| 1474 | compatible = "renesas,r8a7791-sysc"; |
| 1475 | reg = <0 0xe6180000 0 0x0200>; |
| 1476 | #power-domain-cells = <1>; |
| 1477 | }; |
| 1478 | |
Geert Uytterhoeven | 6f3e4ee | 2014-02-25 11:30:14 +0100 | [diff] [blame] | 1479 | qspi: spi@e6b10000 { |
Geert Uytterhoeven | 4d5b59c | 2014-02-04 16:24:03 +0100 | [diff] [blame] | 1480 | compatible = "renesas,qspi-r8a7791", "renesas,qspi"; |
| 1481 | reg = <0 0xe6b10000 0 0x2c>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1482 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 4d5b59c | 2014-02-04 16:24:03 +0100 | [diff] [blame] | 1483 | clocks = <&mstp9_clks R8A7791_CLK_QSPI_MOD>; |
Geert Uytterhoeven | 591f2fa | 2014-08-06 14:59:06 +0200 | [diff] [blame] | 1484 | dmas = <&dmac0 0x17>, <&dmac0 0x18>; |
| 1485 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1486 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Geert Uytterhoeven | 4d5b59c | 2014-02-04 16:24:03 +0100 | [diff] [blame] | 1487 | num-cs = <1>; |
| 1488 | #address-cells = <1>; |
| 1489 | #size-cells = <0>; |
| 1490 | status = "disabled"; |
| 1491 | }; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1492 | |
| 1493 | msiof0: spi@e6e20000 { |
| 1494 | compatible = "renesas,msiof-r8a7791"; |
Ryo Kataoka | cb6d08a | 2015-04-05 01:55:12 +0900 | [diff] [blame] | 1495 | reg = <0 0xe6e20000 0 0x0064>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1496 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1497 | clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; |
Geert Uytterhoeven | a5ce27f | 2014-08-06 14:59:07 +0200 | [diff] [blame] | 1498 | dmas = <&dmac0 0x51>, <&dmac0 0x52>; |
| 1499 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1500 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1501 | #address-cells = <1>; |
| 1502 | #size-cells = <0>; |
| 1503 | status = "disabled"; |
| 1504 | }; |
| 1505 | |
| 1506 | msiof1: spi@e6e10000 { |
| 1507 | compatible = "renesas,msiof-r8a7791"; |
Ryo Kataoka | cb6d08a | 2015-04-05 01:55:12 +0900 | [diff] [blame] | 1508 | reg = <0 0xe6e10000 0 0x0064>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1509 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1510 | clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; |
Geert Uytterhoeven | a5ce27f | 2014-08-06 14:59:07 +0200 | [diff] [blame] | 1511 | dmas = <&dmac0 0x55>, <&dmac0 0x56>; |
| 1512 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1513 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1514 | #address-cells = <1>; |
| 1515 | #size-cells = <0>; |
| 1516 | status = "disabled"; |
| 1517 | }; |
| 1518 | |
| 1519 | msiof2: spi@e6e00000 { |
| 1520 | compatible = "renesas,msiof-r8a7791"; |
Ryo Kataoka | cb6d08a | 2015-04-05 01:55:12 +0900 | [diff] [blame] | 1521 | reg = <0 0xe6e00000 0 0x0064>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1522 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1523 | clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; |
Geert Uytterhoeven | a5ce27f | 2014-08-06 14:59:07 +0200 | [diff] [blame] | 1524 | dmas = <&dmac0 0x41>, <&dmac0 0x42>; |
| 1525 | dma-names = "tx", "rx"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1526 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Geert Uytterhoeven | 7713d3a | 2014-02-25 11:30:16 +0100 | [diff] [blame] | 1527 | #address-cells = <1>; |
| 1528 | #size-cells = <0>; |
| 1529 | status = "disabled"; |
| 1530 | }; |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1531 | |
Yoshihiro Shimoda | c196931 | 2014-10-24 19:43:02 +0900 | [diff] [blame] | 1532 | xhci: usb@ee000000 { |
Simon Horman | 26dba29 | 2016-03-24 11:01:08 +0900 | [diff] [blame] | 1533 | compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; |
Yoshihiro Shimoda | c196931 | 2014-10-24 19:43:02 +0900 | [diff] [blame] | 1534 | reg = <0 0xee000000 0 0xc00>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1535 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; |
Yoshihiro Shimoda | c196931 | 2014-10-24 19:43:02 +0900 | [diff] [blame] | 1536 | clocks = <&mstp3_clks R8A7791_CLK_SSUSB>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1537 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Yoshihiro Shimoda | c196931 | 2014-10-24 19:43:02 +0900 | [diff] [blame] | 1538 | phys = <&usb2 1>; |
| 1539 | phy-names = "usb"; |
| 1540 | status = "disabled"; |
| 1541 | }; |
| 1542 | |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1543 | pci0: pci@ee090000 { |
Simon Horman | d480968 | 2015-12-18 11:42:38 +0900 | [diff] [blame] | 1544 | compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1545 | device_type = "pci"; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1546 | reg = <0 0xee090000 0 0xc00>, |
| 1547 | <0 0xee080000 0 0x1100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1548 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 1549 | clocks = <&mstp7_clks R8A7791_CLK_EHCI>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1550 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1551 | status = "disabled"; |
| 1552 | |
| 1553 | bus-range = <0 0>; |
| 1554 | #address-cells = <3>; |
| 1555 | #size-cells = <2>; |
| 1556 | #interrupt-cells = <1>; |
| 1557 | ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; |
| 1558 | interrupt-map-mask = <0xff00 0 0 0x7>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1559 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| 1560 | 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH |
| 1561 | 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | e1bce12 | 2014-09-29 22:23:11 +0400 | [diff] [blame] | 1562 | |
| 1563 | usb@0,1 { |
| 1564 | reg = <0x800 0 0 0 0>; |
| 1565 | device_type = "pci"; |
| 1566 | phys = <&usb0 0>; |
| 1567 | phy-names = "usb"; |
| 1568 | }; |
| 1569 | |
| 1570 | usb@0,2 { |
| 1571 | reg = <0x1000 0 0 0 0>; |
| 1572 | device_type = "pci"; |
| 1573 | phys = <&usb0 0>; |
| 1574 | phy-names = "usb"; |
| 1575 | }; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1576 | }; |
| 1577 | |
| 1578 | pci1: pci@ee0d0000 { |
Simon Horman | d480968 | 2015-12-18 11:42:38 +0900 | [diff] [blame] | 1579 | compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1580 | device_type = "pci"; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1581 | reg = <0 0xee0d0000 0 0xc00>, |
| 1582 | <0 0xee0c0000 0 0x1100>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1583 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
Geert Uytterhoeven | 797a062 | 2015-08-04 14:28:11 +0200 | [diff] [blame] | 1584 | clocks = <&mstp7_clks R8A7791_CLK_EHCI>; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1585 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1586 | status = "disabled"; |
| 1587 | |
| 1588 | bus-range = <1 1>; |
| 1589 | #address-cells = <3>; |
| 1590 | #size-cells = <2>; |
| 1591 | #interrupt-cells = <1>; |
| 1592 | ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; |
| 1593 | interrupt-map-mask = <0xff00 0 0 0x7>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1594 | interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| 1595 | 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH |
| 1596 | 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; |
Sergei Shtylyov | e1bce12 | 2014-09-29 22:23:11 +0400 | [diff] [blame] | 1597 | |
| 1598 | usb@0,1 { |
| 1599 | reg = <0x800 0 0 0 0>; |
| 1600 | device_type = "pci"; |
| 1601 | phys = <&usb2 0>; |
| 1602 | phy-names = "usb"; |
| 1603 | }; |
| 1604 | |
| 1605 | usb@0,2 { |
| 1606 | reg = <0x1000 0 0 0 0>; |
| 1607 | device_type = "pci"; |
| 1608 | phys = <&usb2 0>; |
| 1609 | phy-names = "usb"; |
| 1610 | }; |
Sergei Shtylyov | aace080 | 2014-06-24 22:10:05 +0400 | [diff] [blame] | 1611 | }; |
| 1612 | |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1613 | pciec: pcie@fe000000 { |
Simon Horman | bbb45f6 | 2015-12-18 11:36:03 +0900 | [diff] [blame] | 1614 | compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1615 | reg = <0 0xfe000000 0 0x80000>; |
| 1616 | #address-cells = <3>; |
| 1617 | #size-cells = <2>; |
| 1618 | bus-range = <0x00 0xff>; |
| 1619 | device_type = "pci"; |
| 1620 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 |
| 1621 | 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 |
| 1622 | 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 |
| 1623 | 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; |
| 1624 | /* Map all possible DDR as inbound ranges */ |
| 1625 | dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000 |
| 1626 | 0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1627 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 1628 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, |
| 1629 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1630 | #interrupt-cells = <1>; |
| 1631 | interrupt-map-mask = <0 0 0 0>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1632 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1633 | clocks = <&mstp3_clks R8A7791_CLK_PCIEC>, <&pcie_bus_clk>; |
| 1634 | clock-names = "pcie", "pcie_bus"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1635 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Phil Edworthy | 811cdfa | 2014-06-13 10:37:20 +0100 | [diff] [blame] | 1636 | status = "disabled"; |
| 1637 | }; |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1638 | |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1639 | ipmmu_sy0: mmu@e6280000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1640 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1641 | reg = <0 0xe6280000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1642 | interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, |
| 1643 | <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1644 | #iommu-cells = <1>; |
| 1645 | status = "disabled"; |
| 1646 | }; |
| 1647 | |
| 1648 | ipmmu_sy1: mmu@e6290000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1649 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1650 | reg = <0 0xe6290000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1651 | interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1652 | #iommu-cells = <1>; |
| 1653 | status = "disabled"; |
| 1654 | }; |
| 1655 | |
| 1656 | ipmmu_ds: mmu@e6740000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1657 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1658 | reg = <0 0xe6740000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1659 | interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, |
| 1660 | <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1661 | #iommu-cells = <1>; |
| 1662 | status = "disabled"; |
| 1663 | }; |
| 1664 | |
| 1665 | ipmmu_mp: mmu@ec680000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1666 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1667 | reg = <0 0xec680000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1668 | interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1669 | #iommu-cells = <1>; |
| 1670 | status = "disabled"; |
| 1671 | }; |
| 1672 | |
| 1673 | ipmmu_mx: mmu@fe951000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1674 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1675 | reg = <0 0xfe951000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1676 | interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, |
| 1677 | <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1678 | #iommu-cells = <1>; |
| 1679 | status = "disabled"; |
| 1680 | }; |
| 1681 | |
| 1682 | ipmmu_rt: mmu@ffc80000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1683 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1684 | reg = <0 0xffc80000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1685 | interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1686 | #iommu-cells = <1>; |
| 1687 | status = "disabled"; |
| 1688 | }; |
| 1689 | |
| 1690 | ipmmu_gp: mmu@e62a0000 { |
Magnus Damm | 3c8ab0c | 2015-11-17 13:31:05 +0900 | [diff] [blame] | 1691 | compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1692 | reg = <0 0xe62a0000 0 0x1000>; |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1693 | interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, |
| 1694 | <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; |
Laurent Pinchart | f195185 | 2015-01-27 11:13:24 +0200 | [diff] [blame] | 1695 | #iommu-cells = <1>; |
| 1696 | status = "disabled"; |
| 1697 | }; |
| 1698 | |
Geert Uytterhoeven | 6c63e07 | 2015-04-27 14:55:29 +0200 | [diff] [blame] | 1699 | rcar_sound: sound@ec500000 { |
Kuninori Morimoto | d2b541c | 2014-12-17 06:12:02 +0000 | [diff] [blame] | 1700 | /* |
| 1701 | * #sound-dai-cells is required |
| 1702 | * |
| 1703 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; |
| 1704 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; |
| 1705 | */ |
Geert Uytterhoeven | f49cd2b | 2015-01-06 21:01:53 +0100 | [diff] [blame] | 1706 | compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2"; |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1707 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
| 1708 | <0 0xec5a0000 0 0x100>, /* ADG */ |
| 1709 | <0 0xec540000 0 0x1000>, /* SSIU */ |
Kuninori Morimoto | 8c3f903 | 2015-08-24 08:28:17 +0000 | [diff] [blame] | 1710 | <0 0xec541000 0 0x280>, /* SSI */ |
Kuninori Morimoto | d73a501 | 2015-03-10 01:39:55 +0000 | [diff] [blame] | 1711 | <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ |
| 1712 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; |
Kuninori Morimoto | d88a6a2 | 2015-03-10 01:39:18 +0000 | [diff] [blame] | 1713 | |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1714 | clocks = <&mstp10_clks R8A7791_CLK_SSI_ALL>, |
| 1715 | <&mstp10_clks R8A7791_CLK_SSI9>, <&mstp10_clks R8A7791_CLK_SSI8>, |
| 1716 | <&mstp10_clks R8A7791_CLK_SSI7>, <&mstp10_clks R8A7791_CLK_SSI6>, |
| 1717 | <&mstp10_clks R8A7791_CLK_SSI5>, <&mstp10_clks R8A7791_CLK_SSI4>, |
| 1718 | <&mstp10_clks R8A7791_CLK_SSI3>, <&mstp10_clks R8A7791_CLK_SSI2>, |
| 1719 | <&mstp10_clks R8A7791_CLK_SSI1>, <&mstp10_clks R8A7791_CLK_SSI0>, |
| 1720 | <&mstp10_clks R8A7791_CLK_SCU_SRC9>, <&mstp10_clks R8A7791_CLK_SCU_SRC8>, |
| 1721 | <&mstp10_clks R8A7791_CLK_SCU_SRC7>, <&mstp10_clks R8A7791_CLK_SCU_SRC6>, |
| 1722 | <&mstp10_clks R8A7791_CLK_SCU_SRC5>, <&mstp10_clks R8A7791_CLK_SCU_SRC4>, |
| 1723 | <&mstp10_clks R8A7791_CLK_SCU_SRC3>, <&mstp10_clks R8A7791_CLK_SCU_SRC2>, |
| 1724 | <&mstp10_clks R8A7791_CLK_SCU_SRC1>, <&mstp10_clks R8A7791_CLK_SCU_SRC0>, |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1725 | <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>, |
Kuninori Morimoto | 7fd6e11 | 2015-07-21 00:27:24 +0000 | [diff] [blame] | 1726 | <&mstp10_clks R8A7791_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7791_CLK_SCU_CTU1_MIX1>, |
Kuninori Morimoto | 150c8ad | 2014-06-25 17:52:33 -0700 | [diff] [blame] | 1727 | <&mstp10_clks R8A7791_CLK_SCU_DVC0>, <&mstp10_clks R8A7791_CLK_SCU_DVC1>, |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1728 | <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; |
| 1729 | clock-names = "ssi-all", |
| 1730 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", |
| 1731 | "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", |
| 1732 | "src.9", "src.8", "src.7", "src.6", "src.5", |
| 1733 | "src.4", "src.3", "src.2", "src.1", "src.0", |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1734 | "ctu.0", "ctu.1", |
Kuninori Morimoto | 7fd6e11 | 2015-07-21 00:27:24 +0000 | [diff] [blame] | 1735 | "mix.0", "mix.1", |
Kuninori Morimoto | 150c8ad | 2014-06-25 17:52:33 -0700 | [diff] [blame] | 1736 | "dvc.0", "dvc.1", |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1737 | "clk_a", "clk_b", "clk_c", "clk_i"; |
Geert Uytterhoeven | 5aa8065 | 2015-01-20 14:44:58 +0100 | [diff] [blame^] | 1738 | power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1739 | |
| 1740 | status = "disabled"; |
| 1741 | |
Kuninori Morimoto | 150c8ad | 2014-06-25 17:52:33 -0700 | [diff] [blame] | 1742 | rcar_sound,dvc { |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1743 | dvc0: dvc@0 { |
| 1744 | dmas = <&audma0 0xbc>; |
| 1745 | dma-names = "tx"; |
| 1746 | }; |
| 1747 | dvc1: dvc@1 { |
| 1748 | dmas = <&audma0 0xbe>; |
| 1749 | dma-names = "tx"; |
| 1750 | }; |
Kuninori Morimoto | 150c8ad | 2014-06-25 17:52:33 -0700 | [diff] [blame] | 1751 | }; |
| 1752 | |
Kuninori Morimoto | 7fd6e11 | 2015-07-21 00:27:24 +0000 | [diff] [blame] | 1753 | rcar_sound,mix { |
| 1754 | mix0: mix@0 { }; |
| 1755 | mix1: mix@1 { }; |
| 1756 | }; |
| 1757 | |
Kuninori Morimoto | 8840170 | 2015-07-21 00:27:03 +0000 | [diff] [blame] | 1758 | rcar_sound,ctu { |
| 1759 | ctu00: ctu@0 { }; |
| 1760 | ctu01: ctu@1 { }; |
| 1761 | ctu02: ctu@2 { }; |
| 1762 | ctu03: ctu@3 { }; |
| 1763 | ctu10: ctu@4 { }; |
| 1764 | ctu11: ctu@5 { }; |
| 1765 | ctu12: ctu@6 { }; |
| 1766 | ctu13: ctu@7 { }; |
| 1767 | }; |
| 1768 | |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1769 | rcar_sound,src { |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1770 | src0: src@0 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1771 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1772 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
| 1773 | dma-names = "rx", "tx"; |
| 1774 | }; |
| 1775 | src1: src@1 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1776 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1777 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
| 1778 | dma-names = "rx", "tx"; |
| 1779 | }; |
| 1780 | src2: src@2 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1781 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1782 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
| 1783 | dma-names = "rx", "tx"; |
| 1784 | }; |
| 1785 | src3: src@3 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1786 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1787 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
| 1788 | dma-names = "rx", "tx"; |
| 1789 | }; |
| 1790 | src4: src@4 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1791 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1792 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
| 1793 | dma-names = "rx", "tx"; |
| 1794 | }; |
| 1795 | src5: src@5 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1796 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1797 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
| 1798 | dma-names = "rx", "tx"; |
| 1799 | }; |
| 1800 | src6: src@6 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1801 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1802 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
| 1803 | dma-names = "rx", "tx"; |
| 1804 | }; |
| 1805 | src7: src@7 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1806 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1807 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
| 1808 | dma-names = "rx", "tx"; |
| 1809 | }; |
| 1810 | src8: src@8 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1811 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1812 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
| 1813 | dma-names = "rx", "tx"; |
| 1814 | }; |
| 1815 | src9: src@9 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1816 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1817 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
| 1818 | dma-names = "rx", "tx"; |
| 1819 | }; |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1820 | }; |
| 1821 | |
| 1822 | rcar_sound,ssi { |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1823 | ssi0: ssi@0 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1824 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1825 | dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; |
| 1826 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1827 | }; |
| 1828 | ssi1: ssi@1 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1829 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1830 | dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; |
| 1831 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1832 | }; |
| 1833 | ssi2: ssi@2 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1834 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1835 | dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; |
| 1836 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1837 | }; |
| 1838 | ssi3: ssi@3 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1839 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1840 | dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; |
| 1841 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1842 | }; |
| 1843 | ssi4: ssi@4 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1844 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1845 | dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; |
| 1846 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1847 | }; |
| 1848 | ssi5: ssi@5 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1849 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1850 | dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; |
| 1851 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1852 | }; |
| 1853 | ssi6: ssi@6 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1854 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1855 | dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; |
| 1856 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1857 | }; |
| 1858 | ssi7: ssi@7 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1859 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1860 | dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; |
| 1861 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1862 | }; |
| 1863 | ssi8: ssi@8 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1864 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1865 | dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; |
| 1866 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1867 | }; |
| 1868 | ssi9: ssi@9 { |
Simon Horman | 386a929 | 2016-01-15 11:44:16 +0900 | [diff] [blame] | 1869 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
Kuninori Morimoto | 6357333 | 2015-03-10 01:40:27 +0000 | [diff] [blame] | 1870 | dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; |
| 1871 | dma-names = "rx", "tx", "rxu", "txu"; |
| 1872 | }; |
Kuninori Morimoto | 09abd1f | 2014-06-11 21:44:26 -0700 | [diff] [blame] | 1873 | }; |
| 1874 | }; |
Hisashi Nakamura | 0d0771ab | 2013-09-04 12:45:57 +0900 | [diff] [blame] | 1875 | }; |