Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 1 | #include <linux/version.h> |
Mike Rapoport | 67088d4 | 2015-09-22 12:01:16 +0300 | [diff] [blame] | 2 | #include <linux/module.h> |
| 3 | #include <linux/kernel.h> |
| 4 | #include <linux/errno.h> |
| 5 | #include <linux/string.h> |
| 6 | #include <linux/mm.h> |
| 7 | #include <linux/slab.h> |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/fb.h> |
| 10 | #include <linux/ioport.h> |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/pci.h> |
| 13 | #include <linux/vmalloc.h> |
| 14 | #include <linux/pagemap.h> |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 15 | #include <linux/console.h> |
| 16 | #ifdef CONFIG_MTRR |
| 17 | #include <asm/mtrr.h> |
| 18 | #endif |
Mike Rapoport | 67088d4 | 2015-09-22 12:01:16 +0300 | [diff] [blame] | 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/screen_info.h> |
Mike Rapoport | 4cf26d8 | 2015-09-22 12:01:17 +0300 | [diff] [blame] | 21 | #include <linux/sizes.h> |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 22 | |
| 23 | #include "sm750.h" |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 24 | #include "ddk750.h" |
| 25 | #include "sm750_accel.h" |
| 26 | |
Mike Rapoport | 700591a | 2015-10-26 09:06:01 +0200 | [diff] [blame] | 27 | int hw_sm750_map(struct sm750_dev *sm750_dev, struct pci_dev *pdev) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 28 | { |
| 29 | int ret; |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 30 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 31 | ret = 0; |
| 32 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 33 | sm750_dev->vidreg_start = pci_resource_start(pdev, 1); |
| 34 | sm750_dev->vidreg_size = SZ_2M; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 35 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 36 | pr_info("mmio phyAddr = %lx\n", sm750_dev->vidreg_start); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 37 | |
| 38 | /* reserve the vidreg space of smi adaptor |
| 39 | * if you do this, u need to add release region code |
| 40 | * in lynxfb_remove, or memory will not be mapped again |
| 41 | * successfully |
| 42 | * */ |
Anatoly Stepanov | 9a52ae2 | 2015-06-29 02:44:02 +0300 | [diff] [blame] | 43 | ret = pci_request_region(pdev, 1, "sm750fb"); |
| 44 | if (ret) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 45 | pr_err("Can not request PCI regions.\n"); |
| 46 | goto exit; |
| 47 | } |
| 48 | |
| 49 | /* now map mmio and vidmem*/ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 50 | sm750_dev->pvReg = ioremap_nocache(sm750_dev->vidreg_start, |
| 51 | sm750_dev->vidreg_size); |
| 52 | if (!sm750_dev->pvReg) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 53 | pr_err("mmio failed\n"); |
| 54 | ret = -EFAULT; |
| 55 | goto exit; |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 56 | } else { |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 57 | pr_info("mmio virtual addr = %p\n", sm750_dev->pvReg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 58 | } |
| 59 | |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 60 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 61 | sm750_dev->accel.dprBase = sm750_dev->pvReg + DE_BASE_ADDR_TYPE1; |
| 62 | sm750_dev->accel.dpPortBase = sm750_dev->pvReg + DE_PORT_ADDR_TYPE1; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 63 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 64 | ddk750_set_mmio(sm750_dev->pvReg, sm750_dev->devid, sm750_dev->revid); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 65 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 66 | sm750_dev->vidmem_start = pci_resource_start(pdev, 0); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 67 | /* don't use pdev_resource[x].end - resource[x].start to |
| 68 | * calculate the resource size,its only the maximum available |
| 69 | * size but not the actual size,use |
Mike Rapoport | 142de76 | 2015-10-26 09:06:00 +0200 | [diff] [blame] | 70 | * @ddk750_getVMSize function can be safe. |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 71 | * */ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 72 | sm750_dev->vidmem_size = ddk750_getVMSize(); |
Sudip Mukherjee | e936351 | 2015-03-10 14:15:35 +0530 | [diff] [blame] | 73 | pr_info("video memory phyAddr = %lx, size = %u bytes\n", |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 74 | sm750_dev->vidmem_start, sm750_dev->vidmem_size); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 75 | |
| 76 | /* reserve the vidmem space of smi adaptor */ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 77 | sm750_dev->pvMem = ioremap_wc(sm750_dev->vidmem_start, |
| 78 | sm750_dev->vidmem_size); |
| 79 | if (!sm750_dev->pvMem) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 80 | pr_err("Map video memory failed\n"); |
| 81 | ret = -EFAULT; |
| 82 | goto exit; |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 83 | } else { |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 84 | pr_info("video memory vaddr = %p\n", sm750_dev->pvMem); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 85 | } |
| 86 | exit: |
| 87 | return ret; |
| 88 | } |
| 89 | |
| 90 | |
| 91 | |
Mike Rapoport | 700591a | 2015-10-26 09:06:01 +0200 | [diff] [blame] | 92 | int hw_sm750_inithw(struct sm750_dev *sm750_dev, struct pci_dev *pdev) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 93 | { |
Greg Donald | eb0f427 | 2015-06-18 15:06:56 -0500 | [diff] [blame] | 94 | struct init_status *parm; |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 95 | |
Mike Rapoport | 1757d10 | 2015-10-26 09:05:57 +0200 | [diff] [blame] | 96 | parm = &sm750_dev->initParm; |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 97 | if (parm->chip_clk == 0) |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 98 | parm->chip_clk = (getChipType() == SM750LE) ? |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 99 | DEFAULT_SM750LE_CHIP_CLOCK : |
| 100 | DEFAULT_SM750_CHIP_CLOCK; |
| 101 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 102 | if (parm->mem_clk == 0) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 103 | parm->mem_clk = parm->chip_clk; |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 104 | if (parm->master_clk == 0) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 105 | parm->master_clk = parm->chip_clk/3; |
| 106 | |
Mike Rapoport | 1757d10 | 2015-10-26 09:05:57 +0200 | [diff] [blame] | 107 | ddk750_initHw((initchip_param_t *)&sm750_dev->initParm); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 108 | /* for sm718,open pci burst */ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 109 | if (sm750_dev->devid == 0x718) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 110 | POKE32(SYSTEM_CTRL, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 111 | FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 112 | } |
| 113 | |
Anatoly Stepanov | 4bcdffe | 2015-06-29 02:43:59 +0300 | [diff] [blame] | 114 | if (getChipType() != SM750LE) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 115 | /* does user need CRT ?*/ |
Mike Rapoport | 1757d10 | 2015-10-26 09:05:57 +0200 | [diff] [blame] | 116 | if (sm750_dev->nocrt) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 117 | POKE32(MISC_CTRL, |
| 118 | FIELD_SET(PEEK32(MISC_CTRL), |
| 119 | MISC_CTRL, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 120 | DAC_POWER, OFF)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 121 | /* shut off dpms */ |
| 122 | POKE32(SYSTEM_CTRL, |
| 123 | FIELD_SET(PEEK32(SYSTEM_CTRL), |
| 124 | SYSTEM_CTRL, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 125 | DPMS, VNHN)); |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 126 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 127 | POKE32(MISC_CTRL, |
| 128 | FIELD_SET(PEEK32(MISC_CTRL), |
| 129 | MISC_CTRL, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 130 | DAC_POWER, ON)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 131 | /* turn on dpms */ |
| 132 | POKE32(SYSTEM_CTRL, |
| 133 | FIELD_SET(PEEK32(SYSTEM_CTRL), |
| 134 | SYSTEM_CTRL, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 135 | DPMS, VPHP)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 136 | } |
| 137 | |
Mike Rapoport | 1757d10 | 2015-10-26 09:05:57 +0200 | [diff] [blame] | 138 | switch (sm750_dev->pnltype) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 139 | case sm750_doubleTFT: |
| 140 | case sm750_24TFT: |
| 141 | case sm750_dualTFT: |
| 142 | POKE32(PANEL_DISPLAY_CTRL, |
| 143 | FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), |
| 144 | PANEL_DISPLAY_CTRL, |
| 145 | TFT_DISP, |
Mike Rapoport | 1757d10 | 2015-10-26 09:05:57 +0200 | [diff] [blame] | 146 | sm750_dev->pnltype)); |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 147 | break; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 148 | } |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 149 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 150 | /* for 750LE ,no DVI chip initilization makes Monitor no signal */ |
| 151 | /* Set up GPIO for software I2C to program DVI chip in the |
| 152 | Xilinx SP605 board, in order to have video signal. |
| 153 | */ |
Mike Rapoport | f2ea773 | 2015-09-12 11:07:38 +0300 | [diff] [blame] | 154 | sm750_sw_i2c_init(0, 1); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 155 | |
| 156 | |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 157 | /* Customer may NOT use CH7301 DVI chip, which has to be |
| 158 | initialized differently. |
| 159 | */ |
Mike Rapoport | 288836b | 2015-09-12 11:07:39 +0300 | [diff] [blame] | 160 | if (sm750_sw_i2c_read_reg(0xec, 0x4a) == 0x95) { |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 161 | /* The following register values for CH7301 are from |
| 162 | Chrontel app note and our experiment. |
| 163 | */ |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 164 | pr_info("yes,CH7301 DVI chip found\n"); |
Mike Rapoport | d33b420 | 2015-09-12 11:07:40 +0300 | [diff] [blame] | 165 | sm750_sw_i2c_write_reg(0xec, 0x1d, 0x16); |
| 166 | sm750_sw_i2c_write_reg(0xec, 0x21, 0x9); |
| 167 | sm750_sw_i2c_write_reg(0xec, 0x49, 0xC0); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 168 | pr_info("okay,CH7301 DVI chip setup done\n"); |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 169 | } |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | /* init 2d engine */ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 173 | if (!sm750_dev->accel_off) |
Mike Rapoport | 700591a | 2015-10-26 09:06:01 +0200 | [diff] [blame] | 174 | hw_sm750_initAccel(sm750_dev); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
Anatoly Stepanov | e188ea3 | 2015-06-29 02:43:58 +0300 | [diff] [blame] | 179 | int hw_sm750_output_setMode(struct lynxfb_output *output, |
| 180 | struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 181 | { |
| 182 | int ret; |
| 183 | disp_output_t dispSet; |
| 184 | int channel; |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 185 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 186 | ret = 0; |
| 187 | dispSet = 0; |
| 188 | channel = *output->channel; |
| 189 | |
| 190 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 191 | if (getChipType() != SM750LE) { |
| 192 | if (channel == sm750_primary) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 193 | pr_info("primary channel\n"); |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 194 | if (output->paths & sm750_panel) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 195 | dispSet |= do_LCD1_PRI; |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 196 | if (output->paths & sm750_crt) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 197 | dispSet |= do_CRT_PRI; |
| 198 | |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 199 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 200 | pr_info("secondary channel\n"); |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 201 | if (output->paths & sm750_panel) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 202 | dispSet |= do_LCD1_SEC; |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 203 | if (output->paths & sm750_crt) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 204 | dispSet |= do_CRT_SEC; |
| 205 | |
| 206 | } |
| 207 | ddk750_setLogicalDispOut(dispSet); |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 208 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 209 | /* just open DISPLAY_CONTROL_750LE register bit 3:0*/ |
| 210 | u32 reg; |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 211 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 212 | reg = PEEK32(DISPLAY_CONTROL_750LE); |
| 213 | reg |= 0xf; |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 214 | POKE32(DISPLAY_CONTROL_750LE, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 215 | } |
| 216 | |
Juston Li | a1fe154 | 2015-07-14 21:14:44 -0700 | [diff] [blame] | 217 | pr_info("ddk setlogicdispout done\n"); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 218 | return ret; |
| 219 | } |
| 220 | |
Anatoly Stepanov | e188ea3 | 2015-06-29 02:43:58 +0300 | [diff] [blame] | 221 | int hw_sm750_crtc_checkMode(struct lynxfb_crtc *crtc, struct fb_var_screeninfo *var) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 222 | { |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 223 | struct sm750_dev *sm750_dev; |
Mike Rapoport | f11fa2a | 2015-10-26 09:05:59 +0200 | [diff] [blame] | 224 | struct lynxfb_par *par = container_of(crtc, struct lynxfb_par, crtc); |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 225 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 226 | sm750_dev = par->dev; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 227 | |
Anatoly Stepanov | e0ded44 | 2015-06-29 02:43:56 +0300 | [diff] [blame] | 228 | switch (var->bits_per_pixel) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 229 | case 8: |
| 230 | case 16: |
| 231 | break; |
| 232 | case 32: |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 233 | if (sm750_dev->revid == SM750LE_REVISION_ID) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 234 | pr_debug("750le do not support 32bpp\n"); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 235 | return -EINVAL; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 236 | } |
| 237 | break; |
| 238 | default: |
| 239 | return -EINVAL; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 240 | |
| 241 | } |
| 242 | |
| 243 | return 0; |
| 244 | } |
| 245 | |
| 246 | |
| 247 | /* |
| 248 | set the controller's mode for @crtc charged with @var and @fix parameters |
| 249 | */ |
Anatoly Stepanov | e188ea3 | 2015-06-29 02:43:58 +0300 | [diff] [blame] | 250 | int hw_sm750_crtc_setMode(struct lynxfb_crtc *crtc, |
| 251 | struct fb_var_screeninfo *var, |
| 252 | struct fb_fix_screeninfo *fix) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 253 | { |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 254 | int ret, fmt; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 255 | u32 reg; |
| 256 | mode_parameter_t modparm; |
| 257 | clock_type_t clock; |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 258 | struct sm750_dev *sm750_dev; |
Greg Donald | eb0f427 | 2015-06-18 15:06:56 -0500 | [diff] [blame] | 259 | struct lynxfb_par *par; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 260 | |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 261 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 262 | ret = 0; |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 263 | par = container_of(crtc, struct lynxfb_par, crtc); |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 264 | sm750_dev = par->dev; |
Mike Rapoport | cfac7d6 | 2015-10-22 09:38:39 +0300 | [diff] [blame] | 265 | |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 266 | if (!sm750_dev->accel_off) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 267 | /* set 2d engine pixel format according to mode bpp */ |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 268 | switch (var->bits_per_pixel) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 269 | case 8: |
| 270 | fmt = 0; |
| 271 | break; |
| 272 | case 16: |
| 273 | fmt = 1; |
| 274 | break; |
| 275 | case 32: |
| 276 | default: |
| 277 | fmt = 2; |
| 278 | break; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 279 | } |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 280 | hw_set2dformat(&sm750_dev->accel, fmt); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 281 | } |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 282 | |
| 283 | /* set timing */ |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 284 | modparm.pixel_clock = ps_to_hz(var->pixclock); |
| 285 | modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG; |
| 286 | modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG; |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 287 | modparm.clock_phase_polarity = (var->sync & FB_SYNC_COMP_HIGH_ACT) ? POS:NEG; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 288 | modparm.horizontal_display_end = var->xres; |
| 289 | modparm.horizontal_sync_width = var->hsync_len; |
| 290 | modparm.horizontal_sync_start = var->xres + var->right_margin; |
| 291 | modparm.horizontal_total = var->xres + var->left_margin + var->right_margin + var->hsync_len; |
| 292 | modparm.vertical_display_end = var->yres; |
| 293 | modparm.vertical_sync_height = var->vsync_len; |
| 294 | modparm.vertical_sync_start = var->yres + var->lower_margin; |
| 295 | modparm.vertical_total = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; |
| 296 | |
| 297 | /* choose pll */ |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 298 | if (crtc->channel != sm750_secondary) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 299 | clock = PRIMARY_PLL; |
| 300 | else |
| 301 | clock = SECONDARY_PLL; |
| 302 | |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 303 | pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock); |
| 304 | ret = ddk750_setModeTiming(&modparm, clock); |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 305 | if (ret) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 306 | pr_err("Set mode timing failed\n"); |
| 307 | goto exit; |
| 308 | } |
| 309 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 310 | if (crtc->channel != sm750_secondary) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 311 | /* set pitch, offset ,width,start address ,etc... */ |
| 312 | POKE32(PANEL_FB_ADDRESS, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 313 | FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)| |
| 314 | FIELD_SET(0, PANEL_FB_ADDRESS, EXT, LOCAL)| |
| 315 | FIELD_VALUE(0, PANEL_FB_ADDRESS, ADDRESS, crtc->oScreen)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 316 | |
| 317 | reg = var->xres * (var->bits_per_pixel >> 3); |
| 318 | /* crtc->channel is not equal to par->index on numeric,be aware of that */ |
Mike Rapoport | e3a3f9f | 2015-10-26 09:05:52 +0200 | [diff] [blame] | 319 | reg = ALIGN(reg, crtc->line_pad); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 320 | |
| 321 | POKE32(PANEL_FB_WIDTH, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 322 | FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)| |
| 323 | FIELD_VALUE(0, PANEL_FB_WIDTH, OFFSET, fix->line_length)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 324 | |
| 325 | POKE32(PANEL_WINDOW_WIDTH, |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 326 | FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres - 1)| |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 327 | FIELD_VALUE(0, PANEL_WINDOW_WIDTH, X, var->xoffset)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 328 | |
| 329 | POKE32(PANEL_WINDOW_HEIGHT, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 330 | FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, HEIGHT, var->yres_virtual - 1)| |
| 331 | FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, Y, var->yoffset)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 332 | |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 333 | POKE32(PANEL_PLANE_TL, 0); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 334 | |
| 335 | POKE32(PANEL_PLANE_BR, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 336 | FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)| |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 337 | FIELD_VALUE(0, PANEL_PLANE_BR, RIGHT, var->xres - 1)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 338 | |
| 339 | /* set pixel format */ |
| 340 | reg = PEEK32(PANEL_DISPLAY_CTRL); |
| 341 | POKE32(PANEL_DISPLAY_CTRL, |
| 342 | FIELD_VALUE(reg, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 343 | PANEL_DISPLAY_CTRL, FORMAT, |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 344 | (var->bits_per_pixel >> 4) |
| 345 | )); |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 346 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 347 | /* not implemented now */ |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 348 | POKE32(CRT_FB_ADDRESS, crtc->oScreen); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 349 | reg = var->xres * (var->bits_per_pixel >> 3); |
| 350 | /* crtc->channel is not equal to par->index on numeric,be aware of that */ |
Mike Rapoport | e3a3f9f | 2015-10-26 09:05:52 +0200 | [diff] [blame] | 351 | reg = ALIGN(reg, crtc->line_pad); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 352 | |
| 353 | POKE32(CRT_FB_WIDTH, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 354 | FIELD_VALUE(0, CRT_FB_WIDTH, WIDTH, reg)| |
| 355 | FIELD_VALUE(0, CRT_FB_WIDTH, OFFSET, fix->line_length)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 356 | |
| 357 | /* SET PIXEL FORMAT */ |
| 358 | reg = PEEK32(CRT_DISPLAY_CTRL); |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 359 | reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4); |
| 360 | POKE32(CRT_DISPLAY_CTRL, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 361 | |
| 362 | } |
| 363 | |
| 364 | |
| 365 | exit: |
| 366 | return ret; |
| 367 | } |
| 368 | |
Anatoly Stepanov | e188ea3 | 2015-06-29 02:43:58 +0300 | [diff] [blame] | 369 | int hw_sm750_setColReg(struct lynxfb_crtc *crtc, ushort index, |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 370 | ushort red, ushort green, ushort blue) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 371 | { |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 372 | static unsigned int add[] = {PANEL_PALETTE_RAM, CRT_PALETTE_RAM}; |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 373 | |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 374 | POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 375 | return 0; |
| 376 | } |
| 377 | |
Anatoly Stepanov | 14a974c | 2015-06-29 02:44:03 +0300 | [diff] [blame] | 378 | int hw_sm750le_setBLANK(struct lynxfb_output *output, int blank) |
| 379 | { |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 380 | int dpms, crtdb; |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 381 | |
Anatoly Stepanov | 4bcdffe | 2015-06-29 02:43:59 +0300 | [diff] [blame] | 382 | switch (blank) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 383 | case FB_BLANK_UNBLANK: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 384 | dpms = CRT_DISPLAY_CTRL_DPMS_0; |
| 385 | crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; |
| 386 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 387 | case FB_BLANK_NORMAL: |
| 388 | dpms = CRT_DISPLAY_CTRL_DPMS_0; |
| 389 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 390 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 391 | case FB_BLANK_VSYNC_SUSPEND: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 392 | dpms = CRT_DISPLAY_CTRL_DPMS_2; |
| 393 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 394 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 395 | case FB_BLANK_HSYNC_SUSPEND: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 396 | dpms = CRT_DISPLAY_CTRL_DPMS_1; |
| 397 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 398 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 399 | case FB_BLANK_POWERDOWN: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 400 | dpms = CRT_DISPLAY_CTRL_DPMS_3; |
| 401 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 402 | break; |
| 403 | default: |
| 404 | return -EINVAL; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 405 | } |
| 406 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 407 | if (output->paths & sm750_crt) { |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 408 | POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms)); |
| 409 | POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 410 | } |
| 411 | return 0; |
| 412 | } |
| 413 | |
Anatoly Stepanov | e188ea3 | 2015-06-29 02:43:58 +0300 | [diff] [blame] | 414 | int hw_sm750_setBLANK(struct lynxfb_output *output, int blank) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 415 | { |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 416 | unsigned int dpms, pps, crtdb; |
Anatoly Stepanov | 29d8733 | 2015-06-29 02:43:55 +0300 | [diff] [blame] | 417 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 418 | dpms = pps = crtdb = 0; |
| 419 | |
Anatoly Stepanov | 4bcdffe | 2015-06-29 02:43:59 +0300 | [diff] [blame] | 420 | switch (blank) { |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 421 | case FB_BLANK_UNBLANK: |
Juston Li | a1fe154 | 2015-07-14 21:14:44 -0700 | [diff] [blame] | 422 | pr_info("flag = FB_BLANK_UNBLANK\n"); |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 423 | dpms = SYSTEM_CTRL_DPMS_VPHP; |
| 424 | pps = PANEL_DISPLAY_CTRL_DATA_ENABLE; |
| 425 | crtdb = CRT_DISPLAY_CTRL_BLANK_OFF; |
| 426 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 427 | case FB_BLANK_NORMAL: |
Juston Li | a1fe154 | 2015-07-14 21:14:44 -0700 | [diff] [blame] | 428 | pr_info("flag = FB_BLANK_NORMAL\n"); |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 429 | dpms = SYSTEM_CTRL_DPMS_VPHP; |
| 430 | pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; |
| 431 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 432 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 433 | case FB_BLANK_VSYNC_SUSPEND: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 434 | dpms = SYSTEM_CTRL_DPMS_VNHP; |
| 435 | pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; |
| 436 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 437 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 438 | case FB_BLANK_HSYNC_SUSPEND: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 439 | dpms = SYSTEM_CTRL_DPMS_VPHN; |
| 440 | pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; |
| 441 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 442 | break; |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 443 | case FB_BLANK_POWERDOWN: |
Anatoly Stepanov | 990e566 | 2015-06-29 02:44:01 +0300 | [diff] [blame] | 444 | dpms = SYSTEM_CTRL_DPMS_VNHN; |
| 445 | pps = PANEL_DISPLAY_CTRL_DATA_DISABLE; |
| 446 | crtdb = CRT_DISPLAY_CTRL_BLANK_ON; |
| 447 | break; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 448 | } |
| 449 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 450 | if (output->paths & sm750_crt) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 451 | |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 452 | POKE32(SYSTEM_CTRL, FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms)); |
| 453 | POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 454 | } |
| 455 | |
Juston Li | 7b05cbe | 2015-07-14 21:14:47 -0700 | [diff] [blame] | 456 | if (output->paths & sm750_panel) |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 457 | POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps)); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 458 | |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | |
Mike Rapoport | 700591a | 2015-10-26 09:06:01 +0200 | [diff] [blame] | 463 | void hw_sm750_initAccel(struct sm750_dev *sm750_dev) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 464 | { |
| 465 | u32 reg; |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 466 | |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 467 | enable2DEngine(1); |
| 468 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 469 | if (getChipType() == SM750LE) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 470 | reg = PEEK32(DE_STATE1); |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 471 | reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, ON); |
| 472 | POKE32(DE_STATE1, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 473 | |
| 474 | reg = PEEK32(DE_STATE1); |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 475 | reg = FIELD_SET(reg, DE_STATE1, DE_ABORT, OFF); |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 476 | POKE32(DE_STATE1, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 477 | |
Anatoly Stepanov | 5e83e28 | 2015-06-29 02:44:00 +0300 | [diff] [blame] | 478 | } else { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 479 | /* engine reset */ |
| 480 | reg = PEEK32(SYSTEM_CTRL); |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 481 | reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, ON); |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 482 | POKE32(SYSTEM_CTRL, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 483 | |
| 484 | reg = PEEK32(SYSTEM_CTRL); |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 485 | reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT, OFF); |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 486 | POKE32(SYSTEM_CTRL, reg); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 487 | } |
| 488 | |
| 489 | /* call 2d init */ |
Mike Rapoport | e359b6a | 2015-10-26 09:06:06 +0200 | [diff] [blame] | 490 | sm750_dev->accel.de_init(&sm750_dev->accel); |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 491 | } |
| 492 | |
Supriya Karanth | 6fa7db8 | 2015-03-12 01:11:00 +0900 | [diff] [blame] | 493 | int hw_sm750le_deWait(void) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 494 | { |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 495 | int i = 0x10000000; |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 496 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 497 | while (i--) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 498 | unsigned int dwVal = PEEK32(DE_STATE2); |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 499 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 500 | if ((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) && |
Somya Anand | d2a6037 | 2015-03-12 21:48:45 +0530 | [diff] [blame] | 501 | (FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) && |
Anatoly Stepanov | 4bcdffe | 2015-06-29 02:43:59 +0300 | [diff] [blame] | 502 | (FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY)) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 503 | return 0; |
| 504 | } |
| 505 | } |
| 506 | /* timeout error */ |
| 507 | return -1; |
| 508 | } |
| 509 | |
| 510 | |
Supriya Karanth | 6fa7db8 | 2015-03-12 01:11:00 +0900 | [diff] [blame] | 511 | int hw_sm750_deWait(void) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 512 | { |
Anatoly Stepanov | d5fca40 | 2015-06-29 02:44:04 +0300 | [diff] [blame] | 513 | int i = 0x10000000; |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 514 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 515 | while (i--) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 516 | unsigned int dwVal = PEEK32(SYSTEM_CTRL); |
Juston Li | 40403c1 | 2015-07-14 21:14:48 -0700 | [diff] [blame] | 517 | |
Anatoly Stepanov | 6d1b3d6 | 2015-06-29 02:43:57 +0300 | [diff] [blame] | 518 | if ((FIELD_GET(dwVal, SYSTEM_CTRL, DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) && |
Isaac Assegai | bdec777 | 2015-06-02 03:14:25 -0700 | [diff] [blame] | 519 | (FIELD_GET(dwVal, SYSTEM_CTRL, DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) && |
Anatoly Stepanov | 4bcdffe | 2015-06-29 02:43:59 +0300 | [diff] [blame] | 520 | (FIELD_GET(dwVal, SYSTEM_CTRL, DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY)) { |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 521 | return 0; |
| 522 | } |
| 523 | } |
| 524 | /* timeout error */ |
| 525 | return -1; |
| 526 | } |
| 527 | |
| 528 | int hw_sm750_pan_display(struct lynxfb_crtc *crtc, |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 529 | const struct fb_var_screeninfo *var, |
| 530 | const struct fb_info *info) |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 531 | { |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 532 | uint32_t total; |
| 533 | /* check params */ |
| 534 | if ((var->xoffset + var->xres > var->xres_virtual) || |
| 535 | (var->yoffset + var->yres > var->yres_virtual)) { |
| 536 | return -EINVAL; |
| 537 | } |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 538 | |
Anatoly Stepanov | 202add2 | 2015-06-29 02:43:54 +0300 | [diff] [blame] | 539 | total = var->yoffset * info->fix.line_length + |
| 540 | ((var->xoffset * var->bits_per_pixel) >> 3); |
| 541 | total += crtc->oScreen; |
| 542 | if (crtc->channel == sm750_primary) { |
| 543 | POKE32(PANEL_FB_ADDRESS, |
| 544 | FIELD_VALUE(PEEK32(PANEL_FB_ADDRESS), |
| 545 | PANEL_FB_ADDRESS, ADDRESS, total)); |
| 546 | } else { |
| 547 | POKE32(CRT_FB_ADDRESS, |
| 548 | FIELD_VALUE(PEEK32(CRT_FB_ADDRESS), |
| 549 | CRT_FB_ADDRESS, ADDRESS, total)); |
| 550 | } |
| 551 | return 0; |
Sudip Mukherjee | 81dee67 | 2015-03-03 16:21:06 +0530 | [diff] [blame] | 552 | } |