| Pratik Patel | 2e1cdfe | 2015-05-13 10:34:09 -0600 | [diff] [blame] | 1 | What: /sys/bus/coresight/devices/<memory_map>.etm/enable_source |
| 2 | Date: April 2015 |
| 3 | KernelVersion: 4.01 |
| 4 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 5 | Description: (RW) Enable/disable tracing on this specific trace entiry. |
| 6 | Enabling a source implies the source has been configured |
| 7 | properly and a sink has been identidifed for it. The path |
| 8 | of coresight components linking the source to the sink is |
| 9 | configured and managed automatically by the coresight framework. |
| 10 | |
| 11 | What: /sys/bus/coresight/devices/<memory_map>.etm/cpu |
| 12 | Date: April 2015 |
| 13 | KernelVersion: 4.01 |
| 14 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 15 | Description: (R) The CPU this tracing entity is associated with. |
| Pratik Patel | c0ddbfe | 2015-05-13 10:34:10 -0600 | [diff] [blame] | 16 | |
| 17 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_pe_cmp |
| 18 | Date: April 2015 |
| 19 | KernelVersion: 4.01 |
| 20 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 21 | Description: (R) Indicates the number of PE comparator inputs that are |
| 22 | available for tracing. |
| 23 | |
| 24 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_addr_cmp |
| 25 | Date: April 2015 |
| 26 | KernelVersion: 4.01 |
| 27 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 28 | Description: (R) Indicates the number of address comparator pairs that are |
| 29 | available for tracing. |
| 30 | |
| 31 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_cntr |
| 32 | Date: April 2015 |
| 33 | KernelVersion: 4.01 |
| 34 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 35 | Description: (R) Indicates the number of counters that are available for |
| 36 | tracing. |
| 37 | |
| 38 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ext_inp |
| 39 | Date: April 2015 |
| 40 | KernelVersion: 4.01 |
| 41 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 42 | Description: (R) Indicates how many external inputs are implemented. |
| 43 | |
| 44 | What: /sys/bus/coresight/devices/<memory_map>.etm/numcidc |
| 45 | Date: April 2015 |
| 46 | KernelVersion: 4.01 |
| 47 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 48 | Description: (R) Indicates the number of Context ID comparators that are |
| 49 | available for tracing. |
| 50 | |
| 51 | What: /sys/bus/coresight/devices/<memory_map>.etm/numvmidc |
| 52 | Date: April 2015 |
| 53 | KernelVersion: 4.01 |
| 54 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 55 | Description: (R) Indicates the number of VMID comparators that are available |
| 56 | for tracing. |
| 57 | |
| 58 | What: /sys/bus/coresight/devices/<memory_map>.etm/nrseqstate |
| 59 | Date: April 2015 |
| 60 | KernelVersion: 4.01 |
| 61 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 62 | Description: (R) Indicates the number of sequencer states that are |
| 63 | implemented. |
| 64 | |
| 65 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_resource |
| 66 | Date: April 2015 |
| 67 | KernelVersion: 4.01 |
| 68 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 69 | Description: (R) Indicates the number of resource selection pairs that are |
| 70 | available for tracing. |
| 71 | |
| 72 | What: /sys/bus/coresight/devices/<memory_map>.etm/nr_ss_cmp |
| 73 | Date: April 2015 |
| 74 | KernelVersion: 4.01 |
| 75 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 76 | Description: (R) Indicates the number of single-shot comparator controls that |
| 77 | are available for tracing. |
| Pratik Patel | d8c6696 | 2015-05-13 10:34:11 -0600 | [diff] [blame] | 78 | |
| 79 | What: /sys/bus/coresight/devices/<memory_map>.etm/reset |
| 80 | Date: April 2015 |
| 81 | KernelVersion: 4.01 |
| 82 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 83 | Description: (W) Cancels all configuration on a trace unit and set it back |
| 84 | to its boot configuration. |
| 85 | |
| 86 | What: /sys/bus/coresight/devices/<memory_map>.etm/mode |
| 87 | Date: April 2015 |
| 88 | KernelVersion: 4.01 |
| 89 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 90 | Description: (RW) Controls various modes supported by this ETM, for example |
| 91 | P0 instruction tracing, branch broadcast, cycle counting and |
| 92 | context ID tracing. |
| 93 | |
| 94 | What: /sys/bus/coresight/devices/<memory_map>.etm/pe |
| 95 | Date: April 2015 |
| 96 | KernelVersion: 4.01 |
| 97 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 98 | Description: (RW) Controls which PE to trace. |
| 99 | |
| 100 | What: /sys/bus/coresight/devices/<memory_map>.etm/event |
| 101 | Date: April 2015 |
| 102 | KernelVersion: 4.01 |
| 103 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 104 | Description: (RW) Controls the tracing of arbitrary events from bank 0 to 3. |
| 105 | |
| 106 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_instren |
| 107 | Date: April 2015 |
| 108 | KernelVersion: 4.01 |
| 109 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 110 | Description: (RW) Controls the behavior of the events in bank 0 to 3. |
| Pratik Patel | b460daf | 2015-05-13 10:34:12 -0600 | [diff] [blame] | 111 | |
| 112 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_ts |
| 113 | Date: April 2015 |
| 114 | KernelVersion: 4.01 |
| 115 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 116 | Description: (RW) Controls the insertion of global timestamps in the trace |
| 117 | streams. |
| 118 | |
| 119 | What: /sys/bus/coresight/devices/<memory_map>.etm/syncfreq |
| 120 | Date: April 2015 |
| 121 | KernelVersion: 4.01 |
| 122 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 123 | Description: (RW) Controls how often trace synchronization requests occur. |
| 124 | |
| 125 | What: /sys/bus/coresight/devices/<memory_map>.etm/cyc_threshold |
| 126 | Date: April 2015 |
| 127 | KernelVersion: 4.01 |
| 128 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 129 | Description: (RW) Sets the threshold value for cycle counting. |
| 130 | |
| 131 | What: /sys/bus/coresight/devices/<memory_map>.etm/bb_ctrl |
| 132 | Date: April 2015 |
| 133 | KernelVersion: 4.01 |
| 134 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 135 | Description: (RW) Controls which regions in the memory map are enabled to |
| 136 | use branch broadcasting. |
| Pratik Patel | 43ba6a7 | 2015-05-13 10:34:13 -0600 | [diff] [blame] | 137 | |
| 138 | What: /sys/bus/coresight/devices/<memory_map>.etm/event_vinst |
| 139 | Date: April 2015 |
| 140 | KernelVersion: 4.01 |
| 141 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 142 | Description: (RW) Controls instruction trace filtering. |
| 143 | |
| 144 | What: /sys/bus/coresight/devices/<memory_map>.etm/s_exlevel_vinst |
| 145 | Date: April 2015 |
| 146 | KernelVersion: 4.01 |
| 147 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 148 | Description: (RW) In Secure state, each bit controls whether instruction |
| 149 | tracing is enabled for the corresponding exception level. |
| 150 | |
| 151 | What: /sys/bus/coresight/devices/<memory_map>.etm/ns_exlevel_vinst |
| 152 | Date: April 2015 |
| 153 | KernelVersion: 4.01 |
| 154 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 155 | Description: (RW) In non-secure state, each bit controls whether instruction |
| 156 | tracing is enabled for the corresponding exception level. |
| Pratik Patel | 35c9b29 | 2015-05-13 10:34:14 -0600 | [diff] [blame] | 157 | |
| 158 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_idx |
| 159 | Date: April 2015 |
| 160 | KernelVersion: 4.01 |
| 161 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 162 | Description: (RW) Select which address comparator or pair (of comparators) to |
| 163 | work with. |
| 164 | |
| 165 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_instdatatype |
| 166 | Date: April 2015 |
| 167 | KernelVersion: 4.01 |
| 168 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 169 | Description: (RW) Controls what type of comparison the trace unit performs. |
| 170 | |
| 171 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_single |
| 172 | Date: April 2015 |
| 173 | KernelVersion: 4.01 |
| 174 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 175 | Description: (RW) Used to setup single address comparator values. |
| 176 | |
| 177 | What: /sys/bus/coresight/devices/<memory_map>.etm/addr_range |
| 178 | Date: April 2015 |
| 179 | KernelVersion: 4.01 |
| 180 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 181 | Description: (RW) Used to setup address range comparator values. |
| Pratik Patel | 5e5ff34 | 2015-05-13 10:34:15 -0600 | [diff] [blame^] | 182 | |
| 183 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_idx |
| 184 | Date: April 2015 |
| 185 | KernelVersion: 4.01 |
| 186 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 187 | Description: (RW) Select which sequensor. |
| 188 | |
| 189 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_state |
| 190 | Date: April 2015 |
| 191 | KernelVersion: 4.01 |
| 192 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 193 | Description: (RW) Use this to set, or read, the sequencer state. |
| 194 | |
| 195 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_event |
| 196 | Date: April 2015 |
| 197 | KernelVersion: 4.01 |
| 198 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 199 | Description: (RW) Moves the sequencer state to a specific state. |
| 200 | |
| 201 | What: /sys/bus/coresight/devices/<memory_map>.etm/seq_reset_event |
| 202 | Date: April 2015 |
| 203 | KernelVersion: 4.01 |
| 204 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 205 | Description: (RW) Moves the sequencer to state 0 when a programmed event |
| 206 | occurs. |