Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel PRO/1000 Linux driver |
Bruce Allan | c7e54b1 | 2009-11-20 23:25:45 +0000 | [diff] [blame] | 4 | Copyright(c) 1999 - 2009 Intel Corporation. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | Linux NICS <linux.nics@intel.com> |
| 24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 26 | |
| 27 | *******************************************************************************/ |
| 28 | |
| 29 | /* |
| 30 | * 82571EB Gigabit Ethernet Controller |
Bruce Allan | 1605927 | 2008-11-21 16:51:06 -0800 | [diff] [blame] | 31 | * 82571EB Gigabit Ethernet Controller (Copper) |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 32 | * 82571EB Gigabit Ethernet Controller (Fiber) |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 33 | * 82571EB Dual Port Gigabit Mezzanine Adapter |
| 34 | * 82571EB Quad Port Gigabit Mezzanine Adapter |
| 35 | * 82571PT Gigabit PT Quad Port Server ExpressModule |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 36 | * 82572EI Gigabit Ethernet Controller (Copper) |
| 37 | * 82572EI Gigabit Ethernet Controller (Fiber) |
| 38 | * 82572EI Gigabit Ethernet Controller |
| 39 | * 82573V Gigabit Ethernet Controller (Copper) |
| 40 | * 82573E Gigabit Ethernet Controller (Copper) |
| 41 | * 82573L Gigabit Ethernet Controller |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 42 | * 82574L Gigabit Network Connection |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 43 | * 82583V Gigabit Network Connection |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 44 | */ |
| 45 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 46 | #include "e1000.h" |
| 47 | |
| 48 | #define ID_LED_RESERVED_F746 0xF746 |
| 49 | #define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \ |
| 50 | (ID_LED_OFF1_ON2 << 8) | \ |
| 51 | (ID_LED_DEF1_DEF2 << 4) | \ |
| 52 | (ID_LED_DEF1_DEF2)) |
| 53 | |
| 54 | #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 |
| 55 | |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 56 | #define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */ |
| 57 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 58 | static s32 e1000_get_phy_id_82571(struct e1000_hw *hw); |
| 59 | static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw); |
| 60 | static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 61 | static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 62 | static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, |
| 63 | u16 words, u16 *data); |
| 64 | static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw); |
| 65 | static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw); |
| 66 | static s32 e1000_setup_link_82571(struct e1000_hw *hw); |
| 67 | static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw); |
Bruce Allan | caaddaf | 2009-12-01 15:46:43 +0000 | [diff] [blame] | 68 | static void e1000_clear_vfta_82571(struct e1000_hw *hw); |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 69 | static bool e1000_check_mng_mode_82574(struct e1000_hw *hw); |
| 70 | static s32 e1000_led_on_82574(struct e1000_hw *hw); |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 71 | static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw); |
Bruce Allan | 17f208d | 2009-12-01 15:47:22 +0000 | [diff] [blame] | 72 | static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 73 | |
| 74 | /** |
| 75 | * e1000_init_phy_params_82571 - Init PHY func ptrs. |
| 76 | * @hw: pointer to the HW structure |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 77 | **/ |
| 78 | static s32 e1000_init_phy_params_82571(struct e1000_hw *hw) |
| 79 | { |
| 80 | struct e1000_phy_info *phy = &hw->phy; |
| 81 | s32 ret_val; |
| 82 | |
Jeff Kirsher | 318a94d | 2008-03-28 09:15:16 -0700 | [diff] [blame] | 83 | if (hw->phy.media_type != e1000_media_type_copper) { |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 84 | phy->type = e1000_phy_none; |
| 85 | return 0; |
| 86 | } |
| 87 | |
| 88 | phy->addr = 1; |
| 89 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
| 90 | phy->reset_delay_us = 100; |
| 91 | |
Bruce Allan | 17f208d | 2009-12-01 15:47:22 +0000 | [diff] [blame] | 92 | phy->ops.power_up = e1000_power_up_phy_copper; |
| 93 | phy->ops.power_down = e1000_power_down_phy_copper_82571; |
| 94 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 95 | switch (hw->mac.type) { |
| 96 | case e1000_82571: |
| 97 | case e1000_82572: |
| 98 | phy->type = e1000_phy_igp_2; |
| 99 | break; |
| 100 | case e1000_82573: |
| 101 | phy->type = e1000_phy_m88; |
| 102 | break; |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 103 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 104 | case e1000_82583: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 105 | phy->type = e1000_phy_bm; |
| 106 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 107 | default: |
| 108 | return -E1000_ERR_PHY; |
| 109 | break; |
| 110 | } |
| 111 | |
| 112 | /* This can only be done after all function pointers are setup. */ |
| 113 | ret_val = e1000_get_phy_id_82571(hw); |
| 114 | |
| 115 | /* Verify phy id */ |
| 116 | switch (hw->mac.type) { |
| 117 | case e1000_82571: |
| 118 | case e1000_82572: |
| 119 | if (phy->id != IGP01E1000_I_PHY_ID) |
| 120 | return -E1000_ERR_PHY; |
| 121 | break; |
| 122 | case e1000_82573: |
| 123 | if (phy->id != M88E1111_I_PHY_ID) |
| 124 | return -E1000_ERR_PHY; |
| 125 | break; |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 126 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 127 | case e1000_82583: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 128 | if (phy->id != BME1000_E_PHY_ID_R2) |
| 129 | return -E1000_ERR_PHY; |
| 130 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 131 | default: |
| 132 | return -E1000_ERR_PHY; |
| 133 | break; |
| 134 | } |
| 135 | |
| 136 | return 0; |
| 137 | } |
| 138 | |
| 139 | /** |
| 140 | * e1000_init_nvm_params_82571 - Init NVM func ptrs. |
| 141 | * @hw: pointer to the HW structure |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 142 | **/ |
| 143 | static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw) |
| 144 | { |
| 145 | struct e1000_nvm_info *nvm = &hw->nvm; |
| 146 | u32 eecd = er32(EECD); |
| 147 | u16 size; |
| 148 | |
| 149 | nvm->opcode_bits = 8; |
| 150 | nvm->delay_usec = 1; |
| 151 | switch (nvm->override) { |
| 152 | case e1000_nvm_override_spi_large: |
| 153 | nvm->page_size = 32; |
| 154 | nvm->address_bits = 16; |
| 155 | break; |
| 156 | case e1000_nvm_override_spi_small: |
| 157 | nvm->page_size = 8; |
| 158 | nvm->address_bits = 8; |
| 159 | break; |
| 160 | default: |
| 161 | nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8; |
| 162 | nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8; |
| 163 | break; |
| 164 | } |
| 165 | |
| 166 | switch (hw->mac.type) { |
| 167 | case e1000_82573: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 168 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 169 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 170 | if (((eecd >> 15) & 0x3) == 0x3) { |
| 171 | nvm->type = e1000_nvm_flash_hw; |
| 172 | nvm->word_size = 2048; |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 173 | /* |
| 174 | * Autonomous Flash update bit must be cleared due |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 175 | * to Flash update issue. |
| 176 | */ |
| 177 | eecd &= ~E1000_EECD_AUPDEN; |
| 178 | ew32(EECD, eecd); |
| 179 | break; |
| 180 | } |
| 181 | /* Fall Through */ |
| 182 | default: |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 183 | nvm->type = e1000_nvm_eeprom_spi; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 184 | size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >> |
| 185 | E1000_EECD_SIZE_EX_SHIFT); |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 186 | /* |
| 187 | * Added to a constant, "size" becomes the left-shift value |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 188 | * for setting word_size. |
| 189 | */ |
| 190 | size += NVM_WORD_SIZE_BASE_SHIFT; |
Jeff Kirsher | 8d7c294 | 2008-04-02 13:48:07 -0700 | [diff] [blame] | 191 | |
| 192 | /* EEPROM access above 16k is unsupported */ |
| 193 | if (size > 14) |
| 194 | size = 14; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 195 | nvm->word_size = 1 << size; |
| 196 | break; |
| 197 | } |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | /** |
| 203 | * e1000_init_mac_params_82571 - Init MAC func ptrs. |
| 204 | * @hw: pointer to the HW structure |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 205 | **/ |
| 206 | static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter) |
| 207 | { |
| 208 | struct e1000_hw *hw = &adapter->hw; |
| 209 | struct e1000_mac_info *mac = &hw->mac; |
| 210 | struct e1000_mac_operations *func = &mac->ops; |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 211 | u32 swsm = 0; |
| 212 | u32 swsm2 = 0; |
| 213 | bool force_clear_smbi = false; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 214 | |
| 215 | /* Set media type */ |
| 216 | switch (adapter->pdev->device) { |
| 217 | case E1000_DEV_ID_82571EB_FIBER: |
| 218 | case E1000_DEV_ID_82572EI_FIBER: |
| 219 | case E1000_DEV_ID_82571EB_QUAD_FIBER: |
Jeff Kirsher | 318a94d | 2008-03-28 09:15:16 -0700 | [diff] [blame] | 220 | hw->phy.media_type = e1000_media_type_fiber; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 221 | break; |
| 222 | case E1000_DEV_ID_82571EB_SERDES: |
| 223 | case E1000_DEV_ID_82572EI_SERDES: |
Auke Kok | 040babf | 2007-10-31 15:22:05 -0700 | [diff] [blame] | 224 | case E1000_DEV_ID_82571EB_SERDES_DUAL: |
| 225 | case E1000_DEV_ID_82571EB_SERDES_QUAD: |
Jeff Kirsher | 318a94d | 2008-03-28 09:15:16 -0700 | [diff] [blame] | 226 | hw->phy.media_type = e1000_media_type_internal_serdes; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 227 | break; |
| 228 | default: |
Jeff Kirsher | 318a94d | 2008-03-28 09:15:16 -0700 | [diff] [blame] | 229 | hw->phy.media_type = e1000_media_type_copper; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 230 | break; |
| 231 | } |
| 232 | |
| 233 | /* Set mta register count */ |
| 234 | mac->mta_reg_count = 128; |
| 235 | /* Set rar entry count */ |
| 236 | mac->rar_entry_count = E1000_RAR_ENTRIES; |
| 237 | /* Set if manageability features are enabled. */ |
Bruce Allan | 564ea9b | 2009-11-20 23:26:44 +0000 | [diff] [blame] | 238 | mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) |
| 239 | ? true : false; |
Bruce Allan | f464ba8 | 2010-01-07 16:31:35 +0000 | [diff] [blame] | 240 | /* Adaptive IFS supported */ |
| 241 | mac->adaptive_ifs = true; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 242 | |
| 243 | /* check for link */ |
Jeff Kirsher | 318a94d | 2008-03-28 09:15:16 -0700 | [diff] [blame] | 244 | switch (hw->phy.media_type) { |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 245 | case e1000_media_type_copper: |
| 246 | func->setup_physical_interface = e1000_setup_copper_link_82571; |
| 247 | func->check_for_link = e1000e_check_for_copper_link; |
| 248 | func->get_link_up_info = e1000e_get_speed_and_duplex_copper; |
| 249 | break; |
| 250 | case e1000_media_type_fiber: |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 251 | func->setup_physical_interface = |
| 252 | e1000_setup_fiber_serdes_link_82571; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 253 | func->check_for_link = e1000e_check_for_fiber_link; |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 254 | func->get_link_up_info = |
| 255 | e1000e_get_speed_and_duplex_fiber_serdes; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 256 | break; |
| 257 | case e1000_media_type_internal_serdes: |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 258 | func->setup_physical_interface = |
| 259 | e1000_setup_fiber_serdes_link_82571; |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 260 | func->check_for_link = e1000_check_for_serdes_link_82571; |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 261 | func->get_link_up_info = |
| 262 | e1000e_get_speed_and_duplex_fiber_serdes; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 263 | break; |
| 264 | default: |
| 265 | return -E1000_ERR_CONFIG; |
| 266 | break; |
| 267 | } |
| 268 | |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 269 | switch (hw->mac.type) { |
| 270 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 271 | case e1000_82583: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 272 | func->check_mng_mode = e1000_check_mng_mode_82574; |
| 273 | func->led_on = e1000_led_on_82574; |
| 274 | break; |
| 275 | default: |
| 276 | func->check_mng_mode = e1000e_check_mng_mode_generic; |
| 277 | func->led_on = e1000e_led_on_generic; |
| 278 | break; |
| 279 | } |
| 280 | |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 281 | /* |
| 282 | * Ensure that the inter-port SWSM.SMBI lock bit is clear before |
| 283 | * first NVM or PHY acess. This should be done for single-port |
| 284 | * devices, and for one port only on dual-port devices so that |
| 285 | * for those devices we can still use the SMBI lock to synchronize |
| 286 | * inter-port accesses to the PHY & NVM. |
| 287 | */ |
| 288 | switch (hw->mac.type) { |
| 289 | case e1000_82571: |
| 290 | case e1000_82572: |
| 291 | swsm2 = er32(SWSM2); |
| 292 | |
| 293 | if (!(swsm2 & E1000_SWSM2_LOCK)) { |
| 294 | /* Only do this for the first interface on this card */ |
| 295 | ew32(SWSM2, |
| 296 | swsm2 | E1000_SWSM2_LOCK); |
| 297 | force_clear_smbi = true; |
| 298 | } else |
| 299 | force_clear_smbi = false; |
| 300 | break; |
| 301 | default: |
| 302 | force_clear_smbi = true; |
| 303 | break; |
| 304 | } |
| 305 | |
| 306 | if (force_clear_smbi) { |
| 307 | /* Make sure SWSM.SMBI is clear */ |
| 308 | swsm = er32(SWSM); |
| 309 | if (swsm & E1000_SWSM_SMBI) { |
| 310 | /* This bit should not be set on a first interface, and |
| 311 | * indicates that the bootagent or EFI code has |
| 312 | * improperly left this bit enabled |
| 313 | */ |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 314 | e_dbg("Please update your 82571 Bootagent\n"); |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 315 | } |
| 316 | ew32(SWSM, swsm & ~E1000_SWSM_SMBI); |
| 317 | } |
| 318 | |
| 319 | /* |
| 320 | * Initialze device specific counter of SMBI acquisition |
| 321 | * timeouts. |
| 322 | */ |
| 323 | hw->dev_spec.e82571.smb_counter = 0; |
| 324 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 325 | return 0; |
| 326 | } |
| 327 | |
Jeff Kirsher | 69e3fd8 | 2008-04-02 13:48:18 -0700 | [diff] [blame] | 328 | static s32 e1000_get_variants_82571(struct e1000_adapter *adapter) |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 329 | { |
| 330 | struct e1000_hw *hw = &adapter->hw; |
| 331 | static int global_quad_port_a; /* global port a indication */ |
| 332 | struct pci_dev *pdev = adapter->pdev; |
| 333 | u16 eeprom_data = 0; |
| 334 | int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1; |
| 335 | s32 rc; |
| 336 | |
| 337 | rc = e1000_init_mac_params_82571(adapter); |
| 338 | if (rc) |
| 339 | return rc; |
| 340 | |
| 341 | rc = e1000_init_nvm_params_82571(hw); |
| 342 | if (rc) |
| 343 | return rc; |
| 344 | |
| 345 | rc = e1000_init_phy_params_82571(hw); |
| 346 | if (rc) |
| 347 | return rc; |
| 348 | |
| 349 | /* tag quad port adapters first, it's used below */ |
| 350 | switch (pdev->device) { |
| 351 | case E1000_DEV_ID_82571EB_QUAD_COPPER: |
| 352 | case E1000_DEV_ID_82571EB_QUAD_FIBER: |
| 353 | case E1000_DEV_ID_82571EB_QUAD_COPPER_LP: |
Auke Kok | 040babf | 2007-10-31 15:22:05 -0700 | [diff] [blame] | 354 | case E1000_DEV_ID_82571PT_QUAD_COPPER: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 355 | adapter->flags |= FLAG_IS_QUAD_PORT; |
| 356 | /* mark the first port */ |
| 357 | if (global_quad_port_a == 0) |
| 358 | adapter->flags |= FLAG_IS_QUAD_PORT_A; |
| 359 | /* Reset for multiple quad port adapters */ |
| 360 | global_quad_port_a++; |
| 361 | if (global_quad_port_a == 4) |
| 362 | global_quad_port_a = 0; |
| 363 | break; |
| 364 | default: |
| 365 | break; |
| 366 | } |
| 367 | |
| 368 | switch (adapter->hw.mac.type) { |
| 369 | case e1000_82571: |
| 370 | /* these dual ports don't have WoL on port B at all */ |
| 371 | if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) || |
| 372 | (pdev->device == E1000_DEV_ID_82571EB_SERDES) || |
| 373 | (pdev->device == E1000_DEV_ID_82571EB_COPPER)) && |
| 374 | (is_port_b)) |
| 375 | adapter->flags &= ~FLAG_HAS_WOL; |
| 376 | /* quad ports only support WoL on port A */ |
| 377 | if (adapter->flags & FLAG_IS_QUAD_PORT && |
Roel Kluin | 6e4ca80 | 2007-10-29 10:50:05 -0700 | [diff] [blame] | 378 | (!(adapter->flags & FLAG_IS_QUAD_PORT_A))) |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 379 | adapter->flags &= ~FLAG_HAS_WOL; |
Auke Kok | 040babf | 2007-10-31 15:22:05 -0700 | [diff] [blame] | 380 | /* Does not support WoL on any port */ |
| 381 | if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD) |
| 382 | adapter->flags &= ~FLAG_HAS_WOL; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 383 | break; |
| 384 | |
| 385 | case e1000_82573: |
| 386 | if (pdev->device == E1000_DEV_ID_82573L) { |
Bruce Allan | e243455 | 2008-11-21 17:02:41 -0800 | [diff] [blame] | 387 | if (e1000_read_nvm(&adapter->hw, NVM_INIT_3GIO_3, 1, |
| 388 | &eeprom_data) < 0) |
| 389 | break; |
Bruce Allan | 2adc55c | 2009-06-02 11:28:58 +0000 | [diff] [blame] | 390 | if (!(eeprom_data & NVM_WORD1A_ASPM_MASK)) { |
| 391 | adapter->flags |= FLAG_HAS_JUMBO_FRAMES; |
| 392 | adapter->max_hw_frame_size = DEFAULT_JUMBO; |
| 393 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 394 | } |
| 395 | break; |
| 396 | default: |
| 397 | break; |
| 398 | } |
| 399 | |
| 400 | return 0; |
| 401 | } |
| 402 | |
| 403 | /** |
| 404 | * e1000_get_phy_id_82571 - Retrieve the PHY ID and revision |
| 405 | * @hw: pointer to the HW structure |
| 406 | * |
| 407 | * Reads the PHY registers and stores the PHY ID and possibly the PHY |
| 408 | * revision in the hardware structure. |
| 409 | **/ |
| 410 | static s32 e1000_get_phy_id_82571(struct e1000_hw *hw) |
| 411 | { |
| 412 | struct e1000_phy_info *phy = &hw->phy; |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 413 | s32 ret_val; |
| 414 | u16 phy_id = 0; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 415 | |
| 416 | switch (hw->mac.type) { |
| 417 | case e1000_82571: |
| 418 | case e1000_82572: |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 419 | /* |
| 420 | * The 82571 firmware may still be configuring the PHY. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 421 | * In this case, we cannot access the PHY until the |
| 422 | * configuration is done. So we explicitly set the |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 423 | * PHY ID. |
| 424 | */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 425 | phy->id = IGP01E1000_I_PHY_ID; |
| 426 | break; |
| 427 | case e1000_82573: |
| 428 | return e1000e_get_phy_id(hw); |
| 429 | break; |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 430 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 431 | case e1000_82583: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 432 | ret_val = e1e_rphy(hw, PHY_ID1, &phy_id); |
| 433 | if (ret_val) |
| 434 | return ret_val; |
| 435 | |
| 436 | phy->id = (u32)(phy_id << 16); |
| 437 | udelay(20); |
| 438 | ret_val = e1e_rphy(hw, PHY_ID2, &phy_id); |
| 439 | if (ret_val) |
| 440 | return ret_val; |
| 441 | |
| 442 | phy->id |= (u32)(phy_id); |
| 443 | phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); |
| 444 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 445 | default: |
| 446 | return -E1000_ERR_PHY; |
| 447 | break; |
| 448 | } |
| 449 | |
| 450 | return 0; |
| 451 | } |
| 452 | |
| 453 | /** |
| 454 | * e1000_get_hw_semaphore_82571 - Acquire hardware semaphore |
| 455 | * @hw: pointer to the HW structure |
| 456 | * |
| 457 | * Acquire the HW semaphore to access the PHY or NVM |
| 458 | **/ |
| 459 | static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw) |
| 460 | { |
| 461 | u32 swsm; |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 462 | s32 sw_timeout = hw->nvm.word_size + 1; |
| 463 | s32 fw_timeout = hw->nvm.word_size + 1; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 464 | s32 i = 0; |
| 465 | |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 466 | /* |
| 467 | * If we have timedout 3 times on trying to acquire |
| 468 | * the inter-port SMBI semaphore, there is old code |
| 469 | * operating on the other port, and it is not |
| 470 | * releasing SMBI. Modify the number of times that |
| 471 | * we try for the semaphore to interwork with this |
| 472 | * older code. |
| 473 | */ |
| 474 | if (hw->dev_spec.e82571.smb_counter > 2) |
| 475 | sw_timeout = 1; |
| 476 | |
| 477 | /* Get the SW semaphore */ |
| 478 | while (i < sw_timeout) { |
| 479 | swsm = er32(SWSM); |
| 480 | if (!(swsm & E1000_SWSM_SMBI)) |
| 481 | break; |
| 482 | |
| 483 | udelay(50); |
| 484 | i++; |
| 485 | } |
| 486 | |
| 487 | if (i == sw_timeout) { |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 488 | e_dbg("Driver can't access device - SMBI bit is set.\n"); |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 489 | hw->dev_spec.e82571.smb_counter++; |
| 490 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 491 | /* Get the FW semaphore. */ |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 492 | for (i = 0; i < fw_timeout; i++) { |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 493 | swsm = er32(SWSM); |
| 494 | ew32(SWSM, swsm | E1000_SWSM_SWESMBI); |
| 495 | |
| 496 | /* Semaphore acquired if bit latched */ |
| 497 | if (er32(SWSM) & E1000_SWSM_SWESMBI) |
| 498 | break; |
| 499 | |
| 500 | udelay(50); |
| 501 | } |
| 502 | |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 503 | if (i == fw_timeout) { |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 504 | /* Release semaphores */ |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 505 | e1000_put_hw_semaphore_82571(hw); |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 506 | e_dbg("Driver can't access the NVM\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 507 | return -E1000_ERR_NVM; |
| 508 | } |
| 509 | |
| 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | /** |
| 514 | * e1000_put_hw_semaphore_82571 - Release hardware semaphore |
| 515 | * @hw: pointer to the HW structure |
| 516 | * |
| 517 | * Release hardware semaphore used to access the PHY or NVM |
| 518 | **/ |
| 519 | static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw) |
| 520 | { |
| 521 | u32 swsm; |
| 522 | |
| 523 | swsm = er32(SWSM); |
Dave Graham | 23a2d1b | 2009-06-08 14:28:17 +0000 | [diff] [blame] | 524 | swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 525 | ew32(SWSM, swsm); |
| 526 | } |
| 527 | |
| 528 | /** |
| 529 | * e1000_acquire_nvm_82571 - Request for access to the EEPROM |
| 530 | * @hw: pointer to the HW structure |
| 531 | * |
| 532 | * To gain access to the EEPROM, first we must obtain a hardware semaphore. |
| 533 | * Then for non-82573 hardware, set the EEPROM access request bit and wait |
| 534 | * for EEPROM access grant bit. If the access grant bit is not set, release |
| 535 | * hardware semaphore. |
| 536 | **/ |
| 537 | static s32 e1000_acquire_nvm_82571(struct e1000_hw *hw) |
| 538 | { |
| 539 | s32 ret_val; |
| 540 | |
| 541 | ret_val = e1000_get_hw_semaphore_82571(hw); |
| 542 | if (ret_val) |
| 543 | return ret_val; |
| 544 | |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 545 | switch (hw->mac.type) { |
| 546 | case e1000_82573: |
| 547 | case e1000_82574: |
| 548 | case e1000_82583: |
| 549 | break; |
| 550 | default: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 551 | ret_val = e1000e_acquire_nvm(hw); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 552 | break; |
| 553 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 554 | |
| 555 | if (ret_val) |
| 556 | e1000_put_hw_semaphore_82571(hw); |
| 557 | |
| 558 | return ret_val; |
| 559 | } |
| 560 | |
| 561 | /** |
| 562 | * e1000_release_nvm_82571 - Release exclusive access to EEPROM |
| 563 | * @hw: pointer to the HW structure |
| 564 | * |
| 565 | * Stop any current commands to the EEPROM and clear the EEPROM request bit. |
| 566 | **/ |
| 567 | static void e1000_release_nvm_82571(struct e1000_hw *hw) |
| 568 | { |
| 569 | e1000e_release_nvm(hw); |
| 570 | e1000_put_hw_semaphore_82571(hw); |
| 571 | } |
| 572 | |
| 573 | /** |
| 574 | * e1000_write_nvm_82571 - Write to EEPROM using appropriate interface |
| 575 | * @hw: pointer to the HW structure |
| 576 | * @offset: offset within the EEPROM to be written to |
| 577 | * @words: number of words to write |
| 578 | * @data: 16 bit word(s) to be written to the EEPROM |
| 579 | * |
| 580 | * For non-82573 silicon, write data to EEPROM at offset using SPI interface. |
| 581 | * |
| 582 | * If e1000e_update_nvm_checksum is not called after this function, the |
Auke Kok | 489815c | 2008-02-21 15:11:07 -0800 | [diff] [blame] | 583 | * EEPROM will most likely contain an invalid checksum. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 584 | **/ |
| 585 | static s32 e1000_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words, |
| 586 | u16 *data) |
| 587 | { |
| 588 | s32 ret_val; |
| 589 | |
| 590 | switch (hw->mac.type) { |
| 591 | case e1000_82573: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 592 | case e1000_82574: |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 593 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 594 | ret_val = e1000_write_nvm_eewr_82571(hw, offset, words, data); |
| 595 | break; |
| 596 | case e1000_82571: |
| 597 | case e1000_82572: |
| 598 | ret_val = e1000e_write_nvm_spi(hw, offset, words, data); |
| 599 | break; |
| 600 | default: |
| 601 | ret_val = -E1000_ERR_NVM; |
| 602 | break; |
| 603 | } |
| 604 | |
| 605 | return ret_val; |
| 606 | } |
| 607 | |
| 608 | /** |
| 609 | * e1000_update_nvm_checksum_82571 - Update EEPROM checksum |
| 610 | * @hw: pointer to the HW structure |
| 611 | * |
| 612 | * Updates the EEPROM checksum by reading/adding each word of the EEPROM |
| 613 | * up to the checksum. Then calculates the EEPROM checksum and writes the |
| 614 | * value to the EEPROM. |
| 615 | **/ |
| 616 | static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw) |
| 617 | { |
| 618 | u32 eecd; |
| 619 | s32 ret_val; |
| 620 | u16 i; |
| 621 | |
| 622 | ret_val = e1000e_update_nvm_checksum_generic(hw); |
| 623 | if (ret_val) |
| 624 | return ret_val; |
| 625 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 626 | /* |
| 627 | * If our nvm is an EEPROM, then we're done |
| 628 | * otherwise, commit the checksum to the flash NVM. |
| 629 | */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 630 | if (hw->nvm.type != e1000_nvm_flash_hw) |
| 631 | return ret_val; |
| 632 | |
| 633 | /* Check for pending operations. */ |
| 634 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { |
| 635 | msleep(1); |
| 636 | if ((er32(EECD) & E1000_EECD_FLUPD) == 0) |
| 637 | break; |
| 638 | } |
| 639 | |
| 640 | if (i == E1000_FLASH_UPDATES) |
| 641 | return -E1000_ERR_NVM; |
| 642 | |
| 643 | /* Reset the firmware if using STM opcode. */ |
| 644 | if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) { |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 645 | /* |
| 646 | * The enabling of and the actual reset must be done |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 647 | * in two write cycles. |
| 648 | */ |
| 649 | ew32(HICR, E1000_HICR_FW_RESET_ENABLE); |
| 650 | e1e_flush(); |
| 651 | ew32(HICR, E1000_HICR_FW_RESET); |
| 652 | } |
| 653 | |
| 654 | /* Commit the write to flash */ |
| 655 | eecd = er32(EECD) | E1000_EECD_FLUPD; |
| 656 | ew32(EECD, eecd); |
| 657 | |
| 658 | for (i = 0; i < E1000_FLASH_UPDATES; i++) { |
| 659 | msleep(1); |
| 660 | if ((er32(EECD) & E1000_EECD_FLUPD) == 0) |
| 661 | break; |
| 662 | } |
| 663 | |
| 664 | if (i == E1000_FLASH_UPDATES) |
| 665 | return -E1000_ERR_NVM; |
| 666 | |
| 667 | return 0; |
| 668 | } |
| 669 | |
| 670 | /** |
| 671 | * e1000_validate_nvm_checksum_82571 - Validate EEPROM checksum |
| 672 | * @hw: pointer to the HW structure |
| 673 | * |
| 674 | * Calculates the EEPROM checksum by reading/adding each word of the EEPROM |
| 675 | * and then verifies that the sum of the EEPROM is equal to 0xBABA. |
| 676 | **/ |
| 677 | static s32 e1000_validate_nvm_checksum_82571(struct e1000_hw *hw) |
| 678 | { |
| 679 | if (hw->nvm.type == e1000_nvm_flash_hw) |
| 680 | e1000_fix_nvm_checksum_82571(hw); |
| 681 | |
| 682 | return e1000e_validate_nvm_checksum_generic(hw); |
| 683 | } |
| 684 | |
| 685 | /** |
| 686 | * e1000_write_nvm_eewr_82571 - Write to EEPROM for 82573 silicon |
| 687 | * @hw: pointer to the HW structure |
| 688 | * @offset: offset within the EEPROM to be written to |
| 689 | * @words: number of words to write |
| 690 | * @data: 16 bit word(s) to be written to the EEPROM |
| 691 | * |
| 692 | * After checking for invalid values, poll the EEPROM to ensure the previous |
| 693 | * command has completed before trying to write the next word. After write |
| 694 | * poll for completion. |
| 695 | * |
| 696 | * If e1000e_update_nvm_checksum is not called after this function, the |
Auke Kok | 489815c | 2008-02-21 15:11:07 -0800 | [diff] [blame] | 697 | * EEPROM will most likely contain an invalid checksum. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 698 | **/ |
| 699 | static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset, |
| 700 | u16 words, u16 *data) |
| 701 | { |
| 702 | struct e1000_nvm_info *nvm = &hw->nvm; |
Bruce Allan | a708dd8 | 2009-11-20 23:28:37 +0000 | [diff] [blame] | 703 | u32 i, eewr = 0; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 704 | s32 ret_val = 0; |
| 705 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 706 | /* |
| 707 | * A check for invalid values: offset too large, too many words, |
| 708 | * and not enough words. |
| 709 | */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 710 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || |
| 711 | (words == 0)) { |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 712 | e_dbg("nvm parameter(s) out of bounds\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 713 | return -E1000_ERR_NVM; |
| 714 | } |
| 715 | |
| 716 | for (i = 0; i < words; i++) { |
| 717 | eewr = (data[i] << E1000_NVM_RW_REG_DATA) | |
| 718 | ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) | |
| 719 | E1000_NVM_RW_REG_START; |
| 720 | |
| 721 | ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE); |
| 722 | if (ret_val) |
| 723 | break; |
| 724 | |
| 725 | ew32(EEWR, eewr); |
| 726 | |
| 727 | ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE); |
| 728 | if (ret_val) |
| 729 | break; |
| 730 | } |
| 731 | |
| 732 | return ret_val; |
| 733 | } |
| 734 | |
| 735 | /** |
| 736 | * e1000_get_cfg_done_82571 - Poll for configuration done |
| 737 | * @hw: pointer to the HW structure |
| 738 | * |
| 739 | * Reads the management control register for the config done bit to be set. |
| 740 | **/ |
| 741 | static s32 e1000_get_cfg_done_82571(struct e1000_hw *hw) |
| 742 | { |
| 743 | s32 timeout = PHY_CFG_TIMEOUT; |
| 744 | |
| 745 | while (timeout) { |
| 746 | if (er32(EEMNGCTL) & |
| 747 | E1000_NVM_CFG_DONE_PORT_0) |
| 748 | break; |
| 749 | msleep(1); |
| 750 | timeout--; |
| 751 | } |
| 752 | if (!timeout) { |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 753 | e_dbg("MNG configuration cycle has not completed.\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 754 | return -E1000_ERR_RESET; |
| 755 | } |
| 756 | |
| 757 | return 0; |
| 758 | } |
| 759 | |
| 760 | /** |
| 761 | * e1000_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state |
| 762 | * @hw: pointer to the HW structure |
Bruce Allan | 564ea9b | 2009-11-20 23:26:44 +0000 | [diff] [blame] | 763 | * @active: true to enable LPLU, false to disable |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 764 | * |
| 765 | * Sets the LPLU D0 state according to the active flag. When activating LPLU |
| 766 | * this function also disables smart speed and vice versa. LPLU will not be |
| 767 | * activated unless the device autonegotiation advertisement meets standards |
| 768 | * of either 10 or 10/100 or 10/100/1000 at all duplexes. This is a function |
| 769 | * pointer entry point only called by PHY setup routines. |
| 770 | **/ |
| 771 | static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active) |
| 772 | { |
| 773 | struct e1000_phy_info *phy = &hw->phy; |
| 774 | s32 ret_val; |
| 775 | u16 data; |
| 776 | |
| 777 | ret_val = e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &data); |
| 778 | if (ret_val) |
| 779 | return ret_val; |
| 780 | |
| 781 | if (active) { |
| 782 | data |= IGP02E1000_PM_D0_LPLU; |
| 783 | ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data); |
| 784 | if (ret_val) |
| 785 | return ret_val; |
| 786 | |
| 787 | /* When LPLU is enabled, we should disable SmartSpeed */ |
| 788 | ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data); |
| 789 | data &= ~IGP01E1000_PSCFR_SMART_SPEED; |
| 790 | ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data); |
| 791 | if (ret_val) |
| 792 | return ret_val; |
| 793 | } else { |
| 794 | data &= ~IGP02E1000_PM_D0_LPLU; |
| 795 | ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data); |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 796 | /* |
| 797 | * LPLU and SmartSpeed are mutually exclusive. LPLU is used |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 798 | * during Dx states where the power conservation is most |
| 799 | * important. During driver activity we should enable |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 800 | * SmartSpeed, so performance is maintained. |
| 801 | */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 802 | if (phy->smart_speed == e1000_smart_speed_on) { |
| 803 | ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 804 | &data); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 805 | if (ret_val) |
| 806 | return ret_val; |
| 807 | |
| 808 | data |= IGP01E1000_PSCFR_SMART_SPEED; |
| 809 | ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 810 | data); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 811 | if (ret_val) |
| 812 | return ret_val; |
| 813 | } else if (phy->smart_speed == e1000_smart_speed_off) { |
| 814 | ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 815 | &data); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 816 | if (ret_val) |
| 817 | return ret_val; |
| 818 | |
| 819 | data &= ~IGP01E1000_PSCFR_SMART_SPEED; |
| 820 | ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 821 | data); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 822 | if (ret_val) |
| 823 | return ret_val; |
| 824 | } |
| 825 | } |
| 826 | |
| 827 | return 0; |
| 828 | } |
| 829 | |
| 830 | /** |
| 831 | * e1000_reset_hw_82571 - Reset hardware |
| 832 | * @hw: pointer to the HW structure |
| 833 | * |
Bruce Allan | fe40167 | 2009-11-20 23:26:05 +0000 | [diff] [blame] | 834 | * This resets the hardware into a known state. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 835 | **/ |
| 836 | static s32 e1000_reset_hw_82571(struct e1000_hw *hw) |
| 837 | { |
Bruce Allan | a708dd8 | 2009-11-20 23:28:37 +0000 | [diff] [blame] | 838 | u32 ctrl, extcnf_ctrl, ctrl_ext, icr; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 839 | s32 ret_val; |
| 840 | u16 i = 0; |
| 841 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 842 | /* |
| 843 | * Prevent the PCI-E bus from sticking if there is no TLP connection |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 844 | * on the last TLP read/write transaction when MAC is reset. |
| 845 | */ |
| 846 | ret_val = e1000e_disable_pcie_master(hw); |
| 847 | if (ret_val) |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 848 | e_dbg("PCI-E Master disable polling has failed.\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 849 | |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 850 | e_dbg("Masking off all interrupts\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 851 | ew32(IMC, 0xffffffff); |
| 852 | |
| 853 | ew32(RCTL, 0); |
| 854 | ew32(TCTL, E1000_TCTL_PSP); |
| 855 | e1e_flush(); |
| 856 | |
| 857 | msleep(10); |
| 858 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 859 | /* |
| 860 | * Must acquire the MDIO ownership before MAC reset. |
| 861 | * Ownership defaults to firmware after a reset. |
| 862 | */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 863 | switch (hw->mac.type) { |
| 864 | case e1000_82573: |
| 865 | case e1000_82574: |
| 866 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 867 | extcnf_ctrl = er32(EXTCNF_CTRL); |
| 868 | extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; |
| 869 | |
| 870 | do { |
| 871 | ew32(EXTCNF_CTRL, extcnf_ctrl); |
| 872 | extcnf_ctrl = er32(EXTCNF_CTRL); |
| 873 | |
| 874 | if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP) |
| 875 | break; |
| 876 | |
| 877 | extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP; |
| 878 | |
| 879 | msleep(2); |
| 880 | i++; |
| 881 | } while (i < MDIO_OWNERSHIP_TIMEOUT); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 882 | break; |
| 883 | default: |
| 884 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 885 | } |
| 886 | |
| 887 | ctrl = er32(CTRL); |
| 888 | |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 889 | e_dbg("Issuing a global reset to MAC\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 890 | ew32(CTRL, ctrl | E1000_CTRL_RST); |
| 891 | |
| 892 | if (hw->nvm.type == e1000_nvm_flash_hw) { |
| 893 | udelay(10); |
| 894 | ctrl_ext = er32(CTRL_EXT); |
| 895 | ctrl_ext |= E1000_CTRL_EXT_EE_RST; |
| 896 | ew32(CTRL_EXT, ctrl_ext); |
| 897 | e1e_flush(); |
| 898 | } |
| 899 | |
| 900 | ret_val = e1000e_get_auto_rd_done(hw); |
| 901 | if (ret_val) |
| 902 | /* We don't want to continue accessing MAC registers. */ |
| 903 | return ret_val; |
| 904 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 905 | /* |
| 906 | * Phy configuration from NVM just starts after EECD_AUTO_RD is set. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 907 | * Need to wait for Phy configuration completion before accessing |
| 908 | * NVM and Phy. |
| 909 | */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 910 | |
| 911 | switch (hw->mac.type) { |
| 912 | case e1000_82573: |
| 913 | case e1000_82574: |
| 914 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 915 | msleep(25); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 916 | break; |
| 917 | default: |
| 918 | break; |
| 919 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 920 | |
| 921 | /* Clear any pending interrupt events. */ |
| 922 | ew32(IMC, 0xffffffff); |
| 923 | icr = er32(ICR); |
| 924 | |
Bruce Allan | 608f8a0 | 2010-01-13 02:04:58 +0000 | [diff] [blame^] | 925 | /* Install any alternate MAC address into RAR0 */ |
| 926 | ret_val = e1000_check_alt_mac_addr_generic(hw); |
| 927 | if (ret_val) |
| 928 | return ret_val; |
| 929 | |
| 930 | e1000e_set_laa_state_82571(hw, true); |
Bill Hayes | 93ca161 | 2007-10-31 15:21:52 -0700 | [diff] [blame] | 931 | |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 932 | /* Reinitialize the 82571 serdes link state machine */ |
| 933 | if (hw->phy.media_type == e1000_media_type_internal_serdes) |
| 934 | hw->mac.serdes_link_state = e1000_serdes_link_down; |
| 935 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 936 | return 0; |
| 937 | } |
| 938 | |
| 939 | /** |
| 940 | * e1000_init_hw_82571 - Initialize hardware |
| 941 | * @hw: pointer to the HW structure |
| 942 | * |
| 943 | * This inits the hardware readying it for operation. |
| 944 | **/ |
| 945 | static s32 e1000_init_hw_82571(struct e1000_hw *hw) |
| 946 | { |
| 947 | struct e1000_mac_info *mac = &hw->mac; |
| 948 | u32 reg_data; |
| 949 | s32 ret_val; |
Bruce Allan | a708dd8 | 2009-11-20 23:28:37 +0000 | [diff] [blame] | 950 | u16 i, rar_count = mac->rar_entry_count; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 951 | |
| 952 | e1000_initialize_hw_bits_82571(hw); |
| 953 | |
| 954 | /* Initialize identification LED */ |
| 955 | ret_val = e1000e_id_led_init(hw); |
Bruce Allan | de39b75 | 2009-11-20 23:27:59 +0000 | [diff] [blame] | 956 | if (ret_val) |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 957 | e_dbg("Error initializing identification LED\n"); |
Bruce Allan | de39b75 | 2009-11-20 23:27:59 +0000 | [diff] [blame] | 958 | /* This is not fatal and we should not stop init due to this */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 959 | |
| 960 | /* Disabling VLAN filtering */ |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 961 | e_dbg("Initializing the IEEE VLAN\n"); |
Bruce Allan | caaddaf | 2009-12-01 15:46:43 +0000 | [diff] [blame] | 962 | mac->ops.clear_vfta(hw); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 963 | |
| 964 | /* Setup the receive address. */ |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 965 | /* |
| 966 | * If, however, a locally administered address was assigned to the |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 967 | * 82571, we must reserve a RAR for it to work around an issue where |
| 968 | * resetting one port will reload the MAC on the other port. |
| 969 | */ |
| 970 | if (e1000e_get_laa_state_82571(hw)) |
| 971 | rar_count--; |
| 972 | e1000e_init_rx_addrs(hw, rar_count); |
| 973 | |
| 974 | /* Zero out the Multicast HASH table */ |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 975 | e_dbg("Zeroing the MTA\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 976 | for (i = 0; i < mac->mta_reg_count; i++) |
| 977 | E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); |
| 978 | |
| 979 | /* Setup link and flow control */ |
| 980 | ret_val = e1000_setup_link_82571(hw); |
| 981 | |
| 982 | /* Set the transmit descriptor write-back policy */ |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 983 | reg_data = er32(TXDCTL(0)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 984 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
| 985 | E1000_TXDCTL_FULL_TX_DESC_WB | |
| 986 | E1000_TXDCTL_COUNT_DESC; |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 987 | ew32(TXDCTL(0), reg_data); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 988 | |
| 989 | /* ...for both queues. */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 990 | switch (mac->type) { |
| 991 | case e1000_82573: |
| 992 | case e1000_82574: |
| 993 | case e1000_82583: |
| 994 | e1000e_enable_tx_pkt_filtering(hw); |
| 995 | reg_data = er32(GCR); |
| 996 | reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; |
| 997 | ew32(GCR, reg_data); |
| 998 | break; |
| 999 | default: |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1000 | reg_data = er32(TXDCTL(1)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1001 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
| 1002 | E1000_TXDCTL_FULL_TX_DESC_WB | |
| 1003 | E1000_TXDCTL_COUNT_DESC; |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1004 | ew32(TXDCTL(1), reg_data); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1005 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1006 | } |
| 1007 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1008 | /* |
| 1009 | * Clear all of the statistics registers (clear on read). It is |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1010 | * important that we do this after we have tried to establish link |
| 1011 | * because the symbol error count will increment wildly if there |
| 1012 | * is no link. |
| 1013 | */ |
| 1014 | e1000_clear_hw_cntrs_82571(hw); |
| 1015 | |
| 1016 | return ret_val; |
| 1017 | } |
| 1018 | |
| 1019 | /** |
| 1020 | * e1000_initialize_hw_bits_82571 - Initialize hardware-dependent bits |
| 1021 | * @hw: pointer to the HW structure |
| 1022 | * |
| 1023 | * Initializes required hardware-dependent bits needed for normal operation. |
| 1024 | **/ |
| 1025 | static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) |
| 1026 | { |
| 1027 | u32 reg; |
| 1028 | |
| 1029 | /* Transmit Descriptor Control 0 */ |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1030 | reg = er32(TXDCTL(0)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1031 | reg |= (1 << 22); |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1032 | ew32(TXDCTL(0), reg); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1033 | |
| 1034 | /* Transmit Descriptor Control 1 */ |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1035 | reg = er32(TXDCTL(1)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1036 | reg |= (1 << 22); |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1037 | ew32(TXDCTL(1), reg); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1038 | |
| 1039 | /* Transmit Arbitration Control 0 */ |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1040 | reg = er32(TARC(0)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1041 | reg &= ~(0xF << 27); /* 30:27 */ |
| 1042 | switch (hw->mac.type) { |
| 1043 | case e1000_82571: |
| 1044 | case e1000_82572: |
| 1045 | reg |= (1 << 23) | (1 << 24) | (1 << 25) | (1 << 26); |
| 1046 | break; |
| 1047 | default: |
| 1048 | break; |
| 1049 | } |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1050 | ew32(TARC(0), reg); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1051 | |
| 1052 | /* Transmit Arbitration Control 1 */ |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1053 | reg = er32(TARC(1)); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1054 | switch (hw->mac.type) { |
| 1055 | case e1000_82571: |
| 1056 | case e1000_82572: |
| 1057 | reg &= ~((1 << 29) | (1 << 30)); |
| 1058 | reg |= (1 << 22) | (1 << 24) | (1 << 25) | (1 << 26); |
| 1059 | if (er32(TCTL) & E1000_TCTL_MULR) |
| 1060 | reg &= ~(1 << 28); |
| 1061 | else |
| 1062 | reg |= (1 << 28); |
Jeff Kirsher | e9ec2c0 | 2008-04-02 13:48:13 -0700 | [diff] [blame] | 1063 | ew32(TARC(1), reg); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1064 | break; |
| 1065 | default: |
| 1066 | break; |
| 1067 | } |
| 1068 | |
| 1069 | /* Device Control */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1070 | switch (hw->mac.type) { |
| 1071 | case e1000_82573: |
| 1072 | case e1000_82574: |
| 1073 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1074 | reg = er32(CTRL); |
| 1075 | reg &= ~(1 << 29); |
| 1076 | ew32(CTRL, reg); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1077 | break; |
| 1078 | default: |
| 1079 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1080 | } |
| 1081 | |
| 1082 | /* Extended Device Control */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1083 | switch (hw->mac.type) { |
| 1084 | case e1000_82573: |
| 1085 | case e1000_82574: |
| 1086 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1087 | reg = er32(CTRL_EXT); |
| 1088 | reg &= ~(1 << 23); |
| 1089 | reg |= (1 << 22); |
| 1090 | ew32(CTRL_EXT, reg); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1091 | break; |
| 1092 | default: |
| 1093 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1094 | } |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1095 | |
Alexander Duyck | 6ea7ae1 | 2008-11-14 06:54:36 +0000 | [diff] [blame] | 1096 | if (hw->mac.type == e1000_82571) { |
| 1097 | reg = er32(PBA_ECC); |
| 1098 | reg |= E1000_PBA_ECC_CORR_EN; |
| 1099 | ew32(PBA_ECC, reg); |
| 1100 | } |
dave graham | 5df3f0e | 2009-02-10 12:51:41 +0000 | [diff] [blame] | 1101 | /* |
| 1102 | * Workaround for hardware errata. |
| 1103 | * Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572 |
| 1104 | */ |
| 1105 | |
| 1106 | if ((hw->mac.type == e1000_82571) || |
| 1107 | (hw->mac.type == e1000_82572)) { |
| 1108 | reg = er32(CTRL_EXT); |
| 1109 | reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN; |
| 1110 | ew32(CTRL_EXT, reg); |
| 1111 | } |
| 1112 | |
Alexander Duyck | 6ea7ae1 | 2008-11-14 06:54:36 +0000 | [diff] [blame] | 1113 | |
Jesse Brandeburg | 78272bb | 2009-01-26 12:16:26 -0800 | [diff] [blame] | 1114 | /* PCI-Ex Control Registers */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1115 | switch (hw->mac.type) { |
| 1116 | case e1000_82574: |
| 1117 | case e1000_82583: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1118 | reg = er32(GCR); |
| 1119 | reg |= (1 << 22); |
| 1120 | ew32(GCR, reg); |
Jesse Brandeburg | 78272bb | 2009-01-26 12:16:26 -0800 | [diff] [blame] | 1121 | |
Bruce Allan | 84efb7b | 2009-11-20 23:26:24 +0000 | [diff] [blame] | 1122 | /* |
| 1123 | * Workaround for hardware errata. |
| 1124 | * apply workaround for hardware errata documented in errata |
| 1125 | * docs Fixes issue where some error prone or unreliable PCIe |
| 1126 | * completions are occurring, particularly with ASPM enabled. |
| 1127 | * Without fix, issue can cause tx timeouts. |
| 1128 | */ |
Jesse Brandeburg | 78272bb | 2009-01-26 12:16:26 -0800 | [diff] [blame] | 1129 | reg = er32(GCR2); |
| 1130 | reg |= 1; |
| 1131 | ew32(GCR2, reg); |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1132 | break; |
| 1133 | default: |
| 1134 | break; |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1135 | } |
| 1136 | |
| 1137 | return; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1138 | } |
| 1139 | |
| 1140 | /** |
Bruce Allan | caaddaf | 2009-12-01 15:46:43 +0000 | [diff] [blame] | 1141 | * e1000_clear_vfta_82571 - Clear VLAN filter table |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1142 | * @hw: pointer to the HW structure |
| 1143 | * |
| 1144 | * Clears the register array which contains the VLAN filter table by |
| 1145 | * setting all the values to 0. |
| 1146 | **/ |
Bruce Allan | caaddaf | 2009-12-01 15:46:43 +0000 | [diff] [blame] | 1147 | static void e1000_clear_vfta_82571(struct e1000_hw *hw) |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1148 | { |
| 1149 | u32 offset; |
| 1150 | u32 vfta_value = 0; |
| 1151 | u32 vfta_offset = 0; |
| 1152 | u32 vfta_bit_in_reg = 0; |
| 1153 | |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1154 | switch (hw->mac.type) { |
| 1155 | case e1000_82573: |
| 1156 | case e1000_82574: |
| 1157 | case e1000_82583: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1158 | if (hw->mng_cookie.vlan_id != 0) { |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1159 | /* |
| 1160 | * The VFTA is a 4096b bit-field, each identifying |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1161 | * a single VLAN ID. The following operations |
| 1162 | * determine which 32b entry (i.e. offset) into the |
| 1163 | * array we want to set the VLAN ID (i.e. bit) of |
| 1164 | * the manageability unit. |
| 1165 | */ |
| 1166 | vfta_offset = (hw->mng_cookie.vlan_id >> |
| 1167 | E1000_VFTA_ENTRY_SHIFT) & |
| 1168 | E1000_VFTA_ENTRY_MASK; |
| 1169 | vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id & |
| 1170 | E1000_VFTA_ENTRY_BIT_SHIFT_MASK); |
| 1171 | } |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1172 | break; |
| 1173 | default: |
| 1174 | break; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1175 | } |
| 1176 | for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) { |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1177 | /* |
| 1178 | * If the offset we want to clear is the same offset of the |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1179 | * manageability VLAN ID, then clear all bits except that of |
| 1180 | * the manageability unit. |
| 1181 | */ |
| 1182 | vfta_value = (offset == vfta_offset) ? vfta_bit_in_reg : 0; |
| 1183 | E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, vfta_value); |
| 1184 | e1e_flush(); |
| 1185 | } |
| 1186 | } |
| 1187 | |
| 1188 | /** |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1189 | * e1000_check_mng_mode_82574 - Check manageability is enabled |
| 1190 | * @hw: pointer to the HW structure |
| 1191 | * |
| 1192 | * Reads the NVM Initialization Control Word 2 and returns true |
| 1193 | * (>0) if any manageability is enabled, else false (0). |
| 1194 | **/ |
| 1195 | static bool e1000_check_mng_mode_82574(struct e1000_hw *hw) |
| 1196 | { |
| 1197 | u16 data; |
| 1198 | |
| 1199 | e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data); |
| 1200 | return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0; |
| 1201 | } |
| 1202 | |
| 1203 | /** |
| 1204 | * e1000_led_on_82574 - Turn LED on |
| 1205 | * @hw: pointer to the HW structure |
| 1206 | * |
| 1207 | * Turn LED on. |
| 1208 | **/ |
| 1209 | static s32 e1000_led_on_82574(struct e1000_hw *hw) |
| 1210 | { |
| 1211 | u32 ctrl; |
| 1212 | u32 i; |
| 1213 | |
| 1214 | ctrl = hw->mac.ledctl_mode2; |
| 1215 | if (!(E1000_STATUS_LU & er32(STATUS))) { |
| 1216 | /* |
| 1217 | * If no link, then turn LED on by setting the invert bit |
| 1218 | * for each LED that's "on" (0x0E) in ledctl_mode2. |
| 1219 | */ |
| 1220 | for (i = 0; i < 4; i++) |
| 1221 | if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) == |
| 1222 | E1000_LEDCTL_MODE_LED_ON) |
| 1223 | ctrl |= (E1000_LEDCTL_LED0_IVRT << (i * 8)); |
| 1224 | } |
| 1225 | ew32(LEDCTL, ctrl); |
| 1226 | |
| 1227 | return 0; |
| 1228 | } |
| 1229 | |
| 1230 | /** |
Jeff Kirsher | e2de3eb | 2008-03-28 09:15:11 -0700 | [diff] [blame] | 1231 | * e1000_update_mc_addr_list_82571 - Update Multicast addresses |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1232 | * @hw: pointer to the HW structure |
| 1233 | * @mc_addr_list: array of multicast addresses to program |
| 1234 | * @mc_addr_count: number of multicast addresses to program |
| 1235 | * @rar_used_count: the first RAR register free to program |
| 1236 | * @rar_count: total number of supported Receive Address Registers |
| 1237 | * |
| 1238 | * Updates the Receive Address Registers and Multicast Table Array. |
| 1239 | * The caller must have a packed mc_addr_list of multicast addresses. |
| 1240 | * The parameter rar_count will usually be hw->mac.rar_entry_count |
| 1241 | * unless there are workarounds that change this. |
| 1242 | **/ |
Jeff Kirsher | e2de3eb | 2008-03-28 09:15:11 -0700 | [diff] [blame] | 1243 | static void e1000_update_mc_addr_list_82571(struct e1000_hw *hw, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1244 | u8 *mc_addr_list, |
| 1245 | u32 mc_addr_count, |
| 1246 | u32 rar_used_count, |
| 1247 | u32 rar_count) |
| 1248 | { |
| 1249 | if (e1000e_get_laa_state_82571(hw)) |
| 1250 | rar_count--; |
| 1251 | |
Jeff Kirsher | e2de3eb | 2008-03-28 09:15:11 -0700 | [diff] [blame] | 1252 | e1000e_update_mc_addr_list_generic(hw, mc_addr_list, mc_addr_count, |
| 1253 | rar_used_count, rar_count); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1254 | } |
| 1255 | |
| 1256 | /** |
| 1257 | * e1000_setup_link_82571 - Setup flow control and link settings |
| 1258 | * @hw: pointer to the HW structure |
| 1259 | * |
| 1260 | * Determines which flow control settings to use, then configures flow |
| 1261 | * control. Calls the appropriate media-specific link configuration |
| 1262 | * function. Assuming the adapter has a valid link partner, a valid link |
| 1263 | * should be established. Assumes the hardware has previously been reset |
| 1264 | * and the transmitter and receiver are not enabled. |
| 1265 | **/ |
| 1266 | static s32 e1000_setup_link_82571(struct e1000_hw *hw) |
| 1267 | { |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1268 | /* |
| 1269 | * 82573 does not have a word in the NVM to determine |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1270 | * the default flow control setting, so we explicitly |
| 1271 | * set it to full. |
| 1272 | */ |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1273 | switch (hw->mac.type) { |
| 1274 | case e1000_82573: |
| 1275 | case e1000_82574: |
| 1276 | case e1000_82583: |
| 1277 | if (hw->fc.requested_mode == e1000_fc_default) |
| 1278 | hw->fc.requested_mode = e1000_fc_full; |
| 1279 | break; |
| 1280 | default: |
| 1281 | break; |
| 1282 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1283 | |
| 1284 | return e1000e_setup_link(hw); |
| 1285 | } |
| 1286 | |
| 1287 | /** |
| 1288 | * e1000_setup_copper_link_82571 - Configure copper link settings |
| 1289 | * @hw: pointer to the HW structure |
| 1290 | * |
| 1291 | * Configures the link for auto-neg or forced speed and duplex. Then we check |
| 1292 | * for link, once link is established calls to configure collision distance |
| 1293 | * and flow control are called. |
| 1294 | **/ |
| 1295 | static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw) |
| 1296 | { |
| 1297 | u32 ctrl; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1298 | s32 ret_val; |
| 1299 | |
| 1300 | ctrl = er32(CTRL); |
| 1301 | ctrl |= E1000_CTRL_SLU; |
| 1302 | ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); |
| 1303 | ew32(CTRL, ctrl); |
| 1304 | |
| 1305 | switch (hw->phy.type) { |
| 1306 | case e1000_phy_m88: |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1307 | case e1000_phy_bm: |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1308 | ret_val = e1000e_copper_link_setup_m88(hw); |
| 1309 | break; |
| 1310 | case e1000_phy_igp_2: |
| 1311 | ret_val = e1000e_copper_link_setup_igp(hw); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1312 | break; |
| 1313 | default: |
| 1314 | return -E1000_ERR_PHY; |
| 1315 | break; |
| 1316 | } |
| 1317 | |
| 1318 | if (ret_val) |
| 1319 | return ret_val; |
| 1320 | |
| 1321 | ret_val = e1000e_setup_copper_link(hw); |
| 1322 | |
| 1323 | return ret_val; |
| 1324 | } |
| 1325 | |
| 1326 | /** |
| 1327 | * e1000_setup_fiber_serdes_link_82571 - Setup link for fiber/serdes |
| 1328 | * @hw: pointer to the HW structure |
| 1329 | * |
| 1330 | * Configures collision distance and flow control for fiber and serdes links. |
| 1331 | * Upon successful setup, poll for link. |
| 1332 | **/ |
| 1333 | static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw) |
| 1334 | { |
| 1335 | switch (hw->mac.type) { |
| 1336 | case e1000_82571: |
| 1337 | case e1000_82572: |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1338 | /* |
| 1339 | * If SerDes loopback mode is entered, there is no form |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1340 | * of reset to take the adapter out of that mode. So we |
| 1341 | * have to explicitly take the adapter out of loopback |
Auke Kok | 489815c | 2008-02-21 15:11:07 -0800 | [diff] [blame] | 1342 | * mode. This prevents drivers from twiddling their thumbs |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1343 | * if another tool failed to take it out of loopback mode. |
| 1344 | */ |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1345 | ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1346 | break; |
| 1347 | default: |
| 1348 | break; |
| 1349 | } |
| 1350 | |
| 1351 | return e1000e_setup_fiber_serdes_link(hw); |
| 1352 | } |
| 1353 | |
| 1354 | /** |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1355 | * e1000_check_for_serdes_link_82571 - Check for link (Serdes) |
| 1356 | * @hw: pointer to the HW structure |
| 1357 | * |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1358 | * Reports the link state as up or down. |
| 1359 | * |
| 1360 | * If autonegotiation is supported by the link partner, the link state is |
| 1361 | * determined by the result of autonegotiation. This is the most likely case. |
| 1362 | * If autonegotiation is not supported by the link partner, and the link |
| 1363 | * has a valid signal, force the link up. |
| 1364 | * |
| 1365 | * The link state is represented internally here by 4 states: |
| 1366 | * |
| 1367 | * 1) down |
| 1368 | * 2) autoneg_progress |
| 1369 | * 3) autoneg_complete (the link sucessfully autonegotiated) |
| 1370 | * 4) forced_up (the link has been forced up, it did not autonegotiate) |
| 1371 | * |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1372 | **/ |
Hannes Eder | f637011 | 2009-02-14 11:32:25 +0000 | [diff] [blame] | 1373 | static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw) |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1374 | { |
| 1375 | struct e1000_mac_info *mac = &hw->mac; |
| 1376 | u32 rxcw; |
| 1377 | u32 ctrl; |
| 1378 | u32 status; |
| 1379 | s32 ret_val = 0; |
| 1380 | |
| 1381 | ctrl = er32(CTRL); |
| 1382 | status = er32(STATUS); |
| 1383 | rxcw = er32(RXCW); |
| 1384 | |
| 1385 | if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) { |
| 1386 | |
| 1387 | /* Receiver is synchronized with no invalid bits. */ |
| 1388 | switch (mac->serdes_link_state) { |
| 1389 | case e1000_serdes_link_autoneg_complete: |
| 1390 | if (!(status & E1000_STATUS_LU)) { |
| 1391 | /* |
| 1392 | * We have lost link, retry autoneg before |
| 1393 | * reporting link failure |
| 1394 | */ |
| 1395 | mac->serdes_link_state = |
| 1396 | e1000_serdes_link_autoneg_progress; |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1397 | mac->serdes_has_link = false; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1398 | e_dbg("AN_UP -> AN_PROG\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1399 | } |
| 1400 | break; |
| 1401 | |
| 1402 | case e1000_serdes_link_forced_up: |
| 1403 | /* |
| 1404 | * If we are receiving /C/ ordered sets, re-enable |
| 1405 | * auto-negotiation in the TXCW register and disable |
| 1406 | * forced link in the Device Control register in an |
| 1407 | * attempt to auto-negotiate with our link partner. |
| 1408 | */ |
| 1409 | if (rxcw & E1000_RXCW_C) { |
| 1410 | /* Enable autoneg, and unforce link up */ |
| 1411 | ew32(TXCW, mac->txcw); |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1412 | ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1413 | mac->serdes_link_state = |
| 1414 | e1000_serdes_link_autoneg_progress; |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1415 | mac->serdes_has_link = false; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1416 | e_dbg("FORCED_UP -> AN_PROG\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1417 | } |
| 1418 | break; |
| 1419 | |
| 1420 | case e1000_serdes_link_autoneg_progress: |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1421 | if (rxcw & E1000_RXCW_C) { |
| 1422 | /* |
| 1423 | * We received /C/ ordered sets, meaning the |
| 1424 | * link partner has autonegotiated, and we can |
| 1425 | * trust the Link Up (LU) status bit. |
| 1426 | */ |
| 1427 | if (status & E1000_STATUS_LU) { |
| 1428 | mac->serdes_link_state = |
| 1429 | e1000_serdes_link_autoneg_complete; |
| 1430 | e_dbg("AN_PROG -> AN_UP\n"); |
| 1431 | mac->serdes_has_link = true; |
| 1432 | } else { |
| 1433 | /* Autoneg completed, but failed. */ |
| 1434 | mac->serdes_link_state = |
| 1435 | e1000_serdes_link_down; |
| 1436 | e_dbg("AN_PROG -> DOWN\n"); |
| 1437 | } |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1438 | } else { |
| 1439 | /* |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1440 | * The link partner did not autoneg. |
| 1441 | * Force link up and full duplex, and change |
| 1442 | * state to forced. |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1443 | */ |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1444 | ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE)); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1445 | ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD); |
| 1446 | ew32(CTRL, ctrl); |
| 1447 | |
| 1448 | /* Configure Flow Control after link up. */ |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1449 | ret_val = e1000e_config_fc_after_link_up(hw); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1450 | if (ret_val) { |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1451 | e_dbg("Error config flow control\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1452 | break; |
| 1453 | } |
| 1454 | mac->serdes_link_state = |
| 1455 | e1000_serdes_link_forced_up; |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1456 | mac->serdes_has_link = true; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1457 | e_dbg("AN_PROG -> FORCED_UP\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1458 | } |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1459 | break; |
| 1460 | |
| 1461 | case e1000_serdes_link_down: |
| 1462 | default: |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1463 | /* |
| 1464 | * The link was down but the receiver has now gained |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1465 | * valid sync, so lets see if we can bring the link |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1466 | * up. |
| 1467 | */ |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1468 | ew32(TXCW, mac->txcw); |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1469 | ew32(CTRL, (ctrl & ~E1000_CTRL_SLU)); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1470 | mac->serdes_link_state = |
| 1471 | e1000_serdes_link_autoneg_progress; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1472 | e_dbg("DOWN -> AN_PROG\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1473 | break; |
| 1474 | } |
| 1475 | } else { |
| 1476 | if (!(rxcw & E1000_RXCW_SYNCH)) { |
| 1477 | mac->serdes_has_link = false; |
| 1478 | mac->serdes_link_state = e1000_serdes_link_down; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1479 | e_dbg("ANYSTATE -> DOWN\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1480 | } else { |
| 1481 | /* |
Bruce Allan | 1a40d5c | 2009-12-01 15:49:51 +0000 | [diff] [blame] | 1482 | * We have sync, and can tolerate one invalid (IV) |
| 1483 | * codeword before declaring link down, so reread |
| 1484 | * to look again. |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1485 | */ |
| 1486 | udelay(10); |
| 1487 | rxcw = er32(RXCW); |
| 1488 | if (rxcw & E1000_RXCW_IV) { |
| 1489 | mac->serdes_link_state = e1000_serdes_link_down; |
| 1490 | mac->serdes_has_link = false; |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1491 | e_dbg("ANYSTATE -> DOWN\n"); |
dave graham | c952337 | 2009-02-10 12:52:28 +0000 | [diff] [blame] | 1492 | } |
| 1493 | } |
| 1494 | } |
| 1495 | |
| 1496 | return ret_val; |
| 1497 | } |
| 1498 | |
| 1499 | /** |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1500 | * e1000_valid_led_default_82571 - Verify a valid default LED config |
| 1501 | * @hw: pointer to the HW structure |
| 1502 | * @data: pointer to the NVM (EEPROM) |
| 1503 | * |
| 1504 | * Read the EEPROM for the current default LED configuration. If the |
| 1505 | * LED configuration is not valid, set to a valid LED configuration. |
| 1506 | **/ |
| 1507 | static s32 e1000_valid_led_default_82571(struct e1000_hw *hw, u16 *data) |
| 1508 | { |
| 1509 | s32 ret_val; |
| 1510 | |
| 1511 | ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data); |
| 1512 | if (ret_val) { |
Bruce Allan | 3bb99fe | 2009-11-20 23:25:07 +0000 | [diff] [blame] | 1513 | e_dbg("NVM Read Error\n"); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1514 | return ret_val; |
| 1515 | } |
| 1516 | |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1517 | switch (hw->mac.type) { |
| 1518 | case e1000_82573: |
| 1519 | case e1000_82574: |
| 1520 | case e1000_82583: |
| 1521 | if (*data == ID_LED_RESERVED_F746) |
| 1522 | *data = ID_LED_DEFAULT_82573; |
| 1523 | break; |
| 1524 | default: |
| 1525 | if (*data == ID_LED_RESERVED_0000 || |
| 1526 | *data == ID_LED_RESERVED_FFFF) |
| 1527 | *data = ID_LED_DEFAULT; |
| 1528 | break; |
| 1529 | } |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1530 | |
| 1531 | return 0; |
| 1532 | } |
| 1533 | |
| 1534 | /** |
| 1535 | * e1000e_get_laa_state_82571 - Get locally administered address state |
| 1536 | * @hw: pointer to the HW structure |
| 1537 | * |
Auke Kok | 489815c | 2008-02-21 15:11:07 -0800 | [diff] [blame] | 1538 | * Retrieve and return the current locally administered address state. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1539 | **/ |
| 1540 | bool e1000e_get_laa_state_82571(struct e1000_hw *hw) |
| 1541 | { |
| 1542 | if (hw->mac.type != e1000_82571) |
Bruce Allan | 564ea9b | 2009-11-20 23:26:44 +0000 | [diff] [blame] | 1543 | return false; |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1544 | |
| 1545 | return hw->dev_spec.e82571.laa_is_present; |
| 1546 | } |
| 1547 | |
| 1548 | /** |
| 1549 | * e1000e_set_laa_state_82571 - Set locally administered address state |
| 1550 | * @hw: pointer to the HW structure |
| 1551 | * @state: enable/disable locally administered address |
| 1552 | * |
Bruce Allan | 5ff5b66 | 2009-12-01 15:51:11 +0000 | [diff] [blame] | 1553 | * Enable/Disable the current locally administered address state. |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1554 | **/ |
| 1555 | void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state) |
| 1556 | { |
| 1557 | if (hw->mac.type != e1000_82571) |
| 1558 | return; |
| 1559 | |
| 1560 | hw->dev_spec.e82571.laa_is_present = state; |
| 1561 | |
| 1562 | /* If workaround is activated... */ |
| 1563 | if (state) |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1564 | /* |
| 1565 | * Hold a copy of the LAA in RAR[14] This is done so that |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1566 | * between the time RAR[0] gets clobbered and the time it |
| 1567 | * gets fixed, the actual LAA is in one of the RARs and no |
| 1568 | * incoming packets directed to this port are dropped. |
| 1569 | * Eventually the LAA will be in RAR[0] and RAR[14]. |
| 1570 | */ |
| 1571 | e1000e_rar_set(hw, hw->mac.addr, hw->mac.rar_entry_count - 1); |
| 1572 | } |
| 1573 | |
| 1574 | /** |
| 1575 | * e1000_fix_nvm_checksum_82571 - Fix EEPROM checksum |
| 1576 | * @hw: pointer to the HW structure |
| 1577 | * |
| 1578 | * Verifies that the EEPROM has completed the update. After updating the |
| 1579 | * EEPROM, we need to check bit 15 in work 0x23 for the checksum fix. If |
| 1580 | * the checksum fix is not implemented, we need to set the bit and update |
| 1581 | * the checksum. Otherwise, if bit 15 is set and the checksum is incorrect, |
| 1582 | * we need to return bad checksum. |
| 1583 | **/ |
| 1584 | static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw) |
| 1585 | { |
| 1586 | struct e1000_nvm_info *nvm = &hw->nvm; |
| 1587 | s32 ret_val; |
| 1588 | u16 data; |
| 1589 | |
| 1590 | if (nvm->type != e1000_nvm_flash_hw) |
| 1591 | return 0; |
| 1592 | |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1593 | /* |
| 1594 | * Check bit 4 of word 10h. If it is 0, firmware is done updating |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1595 | * 10h-12h. Checksum may need to be fixed. |
| 1596 | */ |
| 1597 | ret_val = e1000_read_nvm(hw, 0x10, 1, &data); |
| 1598 | if (ret_val) |
| 1599 | return ret_val; |
| 1600 | |
| 1601 | if (!(data & 0x10)) { |
Bruce Allan | ad68076 | 2008-03-28 09:15:03 -0700 | [diff] [blame] | 1602 | /* |
| 1603 | * Read 0x23 and check bit 15. This bit is a 1 |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1604 | * when the checksum has already been fixed. If |
| 1605 | * the checksum is still wrong and this bit is a |
| 1606 | * 1, we need to return bad checksum. Otherwise, |
| 1607 | * we need to set this bit to a 1 and update the |
| 1608 | * checksum. |
| 1609 | */ |
| 1610 | ret_val = e1000_read_nvm(hw, 0x23, 1, &data); |
| 1611 | if (ret_val) |
| 1612 | return ret_val; |
| 1613 | |
| 1614 | if (!(data & 0x8000)) { |
| 1615 | data |= 0x8000; |
| 1616 | ret_val = e1000_write_nvm(hw, 0x23, 1, &data); |
| 1617 | if (ret_val) |
| 1618 | return ret_val; |
| 1619 | ret_val = e1000e_update_nvm_checksum(hw); |
| 1620 | } |
| 1621 | } |
| 1622 | |
| 1623 | return 0; |
| 1624 | } |
| 1625 | |
| 1626 | /** |
Bruce Allan | 608f8a0 | 2010-01-13 02:04:58 +0000 | [diff] [blame^] | 1627 | * e1000_read_mac_addr_82571 - Read device MAC address |
| 1628 | * @hw: pointer to the HW structure |
| 1629 | **/ |
| 1630 | static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw) |
| 1631 | { |
| 1632 | s32 ret_val = 0; |
| 1633 | |
| 1634 | /* |
| 1635 | * If there's an alternate MAC address place it in RAR0 |
| 1636 | * so that it will override the Si installed default perm |
| 1637 | * address. |
| 1638 | */ |
| 1639 | ret_val = e1000_check_alt_mac_addr_generic(hw); |
| 1640 | if (ret_val) |
| 1641 | goto out; |
| 1642 | |
| 1643 | ret_val = e1000_read_mac_addr_generic(hw); |
| 1644 | |
| 1645 | out: |
| 1646 | return ret_val; |
| 1647 | } |
| 1648 | |
| 1649 | /** |
Bruce Allan | 17f208d | 2009-12-01 15:47:22 +0000 | [diff] [blame] | 1650 | * e1000_power_down_phy_copper_82571 - Remove link during PHY power down |
| 1651 | * @hw: pointer to the HW structure |
| 1652 | * |
| 1653 | * In the case of a PHY power down to save power, or to turn off link during a |
| 1654 | * driver unload, or wake on lan is not enabled, remove the link. |
| 1655 | **/ |
| 1656 | static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw) |
| 1657 | { |
| 1658 | struct e1000_phy_info *phy = &hw->phy; |
| 1659 | struct e1000_mac_info *mac = &hw->mac; |
| 1660 | |
| 1661 | if (!(phy->ops.check_reset_block)) |
| 1662 | return; |
| 1663 | |
| 1664 | /* If the management interface is not enabled, then power down */ |
| 1665 | if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw))) |
| 1666 | e1000_power_down_phy_copper(hw); |
| 1667 | |
| 1668 | return; |
| 1669 | } |
| 1670 | |
| 1671 | /** |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1672 | * e1000_clear_hw_cntrs_82571 - Clear device specific hardware counters |
| 1673 | * @hw: pointer to the HW structure |
| 1674 | * |
| 1675 | * Clears the hardware counters by reading the counter registers. |
| 1676 | **/ |
| 1677 | static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw) |
| 1678 | { |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1679 | e1000e_clear_hw_cntrs_base(hw); |
| 1680 | |
Bruce Allan | 99673d9 | 2009-11-20 23:27:21 +0000 | [diff] [blame] | 1681 | er32(PRC64); |
| 1682 | er32(PRC127); |
| 1683 | er32(PRC255); |
| 1684 | er32(PRC511); |
| 1685 | er32(PRC1023); |
| 1686 | er32(PRC1522); |
| 1687 | er32(PTC64); |
| 1688 | er32(PTC127); |
| 1689 | er32(PTC255); |
| 1690 | er32(PTC511); |
| 1691 | er32(PTC1023); |
| 1692 | er32(PTC1522); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1693 | |
Bruce Allan | 99673d9 | 2009-11-20 23:27:21 +0000 | [diff] [blame] | 1694 | er32(ALGNERRC); |
| 1695 | er32(RXERRC); |
| 1696 | er32(TNCRS); |
| 1697 | er32(CEXTERR); |
| 1698 | er32(TSCTC); |
| 1699 | er32(TSCTFC); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1700 | |
Bruce Allan | 99673d9 | 2009-11-20 23:27:21 +0000 | [diff] [blame] | 1701 | er32(MGTPRC); |
| 1702 | er32(MGTPDC); |
| 1703 | er32(MGTPTC); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1704 | |
Bruce Allan | 99673d9 | 2009-11-20 23:27:21 +0000 | [diff] [blame] | 1705 | er32(IAC); |
| 1706 | er32(ICRXOC); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1707 | |
Bruce Allan | 99673d9 | 2009-11-20 23:27:21 +0000 | [diff] [blame] | 1708 | er32(ICRXPTC); |
| 1709 | er32(ICRXATC); |
| 1710 | er32(ICTXPTC); |
| 1711 | er32(ICTXATC); |
| 1712 | er32(ICTXQEC); |
| 1713 | er32(ICTXQMTC); |
| 1714 | er32(ICRXDMTC); |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1715 | } |
| 1716 | |
| 1717 | static struct e1000_mac_operations e82571_mac_ops = { |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1718 | /* .check_mng_mode: mac type dependent */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1719 | /* .check_for_link: media type dependent */ |
Bruce Allan | a4f58f5 | 2009-06-02 11:29:18 +0000 | [diff] [blame] | 1720 | .id_led_init = e1000e_id_led_init, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1721 | .cleanup_led = e1000e_cleanup_led_generic, |
| 1722 | .clear_hw_cntrs = e1000_clear_hw_cntrs_82571, |
| 1723 | .get_bus_info = e1000e_get_bus_info_pcie, |
| 1724 | /* .get_link_up_info: media type dependent */ |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1725 | /* .led_on: mac type dependent */ |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1726 | .led_off = e1000e_led_off_generic, |
Jeff Kirsher | e2de3eb | 2008-03-28 09:15:11 -0700 | [diff] [blame] | 1727 | .update_mc_addr_list = e1000_update_mc_addr_list_82571, |
Bruce Allan | caaddaf | 2009-12-01 15:46:43 +0000 | [diff] [blame] | 1728 | .write_vfta = e1000_write_vfta_generic, |
| 1729 | .clear_vfta = e1000_clear_vfta_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1730 | .reset_hw = e1000_reset_hw_82571, |
| 1731 | .init_hw = e1000_init_hw_82571, |
| 1732 | .setup_link = e1000_setup_link_82571, |
| 1733 | /* .setup_physical_interface: media type dependent */ |
Bruce Allan | a4f58f5 | 2009-06-02 11:29:18 +0000 | [diff] [blame] | 1734 | .setup_led = e1000e_setup_led_generic, |
Bruce Allan | 608f8a0 | 2010-01-13 02:04:58 +0000 | [diff] [blame^] | 1735 | .read_mac_addr = e1000_read_mac_addr_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1736 | }; |
| 1737 | |
| 1738 | static struct e1000_phy_operations e82_phy_ops_igp = { |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1739 | .acquire = e1000_get_hw_semaphore_82571, |
Bruce Allan | 94e5b65 | 2009-12-02 17:02:14 +0000 | [diff] [blame] | 1740 | .check_polarity = e1000_check_polarity_igp, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1741 | .check_reset_block = e1000e_check_reset_block_generic, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1742 | .commit = NULL, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1743 | .force_speed_duplex = e1000e_phy_force_speed_duplex_igp, |
| 1744 | .get_cfg_done = e1000_get_cfg_done_82571, |
| 1745 | .get_cable_length = e1000e_get_cable_length_igp_2, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1746 | .get_info = e1000e_get_phy_info_igp, |
| 1747 | .read_reg = e1000e_read_phy_reg_igp, |
| 1748 | .release = e1000_put_hw_semaphore_82571, |
| 1749 | .reset = e1000e_phy_hw_reset_generic, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1750 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
| 1751 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1752 | .write_reg = e1000e_write_phy_reg_igp, |
Bruce Allan | 75eb0fa | 2008-11-21 16:53:51 -0800 | [diff] [blame] | 1753 | .cfg_on_link_up = NULL, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1754 | }; |
| 1755 | |
| 1756 | static struct e1000_phy_operations e82_phy_ops_m88 = { |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1757 | .acquire = e1000_get_hw_semaphore_82571, |
Bruce Allan | 94e5b65 | 2009-12-02 17:02:14 +0000 | [diff] [blame] | 1758 | .check_polarity = e1000_check_polarity_m88, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1759 | .check_reset_block = e1000e_check_reset_block_generic, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1760 | .commit = e1000e_phy_sw_reset, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1761 | .force_speed_duplex = e1000e_phy_force_speed_duplex_m88, |
| 1762 | .get_cfg_done = e1000e_get_cfg_done, |
| 1763 | .get_cable_length = e1000e_get_cable_length_m88, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1764 | .get_info = e1000e_get_phy_info_m88, |
| 1765 | .read_reg = e1000e_read_phy_reg_m88, |
| 1766 | .release = e1000_put_hw_semaphore_82571, |
| 1767 | .reset = e1000e_phy_hw_reset_generic, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1768 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
| 1769 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1770 | .write_reg = e1000e_write_phy_reg_m88, |
Bruce Allan | 75eb0fa | 2008-11-21 16:53:51 -0800 | [diff] [blame] | 1771 | .cfg_on_link_up = NULL, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1772 | }; |
| 1773 | |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1774 | static struct e1000_phy_operations e82_phy_ops_bm = { |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1775 | .acquire = e1000_get_hw_semaphore_82571, |
Bruce Allan | 94e5b65 | 2009-12-02 17:02:14 +0000 | [diff] [blame] | 1776 | .check_polarity = e1000_check_polarity_m88, |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1777 | .check_reset_block = e1000e_check_reset_block_generic, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1778 | .commit = e1000e_phy_sw_reset, |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1779 | .force_speed_duplex = e1000e_phy_force_speed_duplex_m88, |
| 1780 | .get_cfg_done = e1000e_get_cfg_done, |
| 1781 | .get_cable_length = e1000e_get_cable_length_m88, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1782 | .get_info = e1000e_get_phy_info_m88, |
| 1783 | .read_reg = e1000e_read_phy_reg_bm2, |
| 1784 | .release = e1000_put_hw_semaphore_82571, |
| 1785 | .reset = e1000e_phy_hw_reset_generic, |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1786 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
| 1787 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1788 | .write_reg = e1000e_write_phy_reg_bm2, |
Bruce Allan | 75eb0fa | 2008-11-21 16:53:51 -0800 | [diff] [blame] | 1789 | .cfg_on_link_up = NULL, |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1790 | }; |
| 1791 | |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1792 | static struct e1000_nvm_operations e82571_nvm_ops = { |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1793 | .acquire = e1000_acquire_nvm_82571, |
| 1794 | .read = e1000e_read_nvm_eerd, |
| 1795 | .release = e1000_release_nvm_82571, |
| 1796 | .update = e1000_update_nvm_checksum_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1797 | .valid_led_default = e1000_valid_led_default_82571, |
Bruce Allan | 94d8186 | 2009-11-20 23:25:26 +0000 | [diff] [blame] | 1798 | .validate = e1000_validate_nvm_checksum_82571, |
| 1799 | .write = e1000_write_nvm_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1800 | }; |
| 1801 | |
| 1802 | struct e1000_info e1000_82571_info = { |
| 1803 | .mac = e1000_82571, |
| 1804 | .flags = FLAG_HAS_HW_VLAN_FILTER |
| 1805 | | FLAG_HAS_JUMBO_FRAMES |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1806 | | FLAG_HAS_WOL |
| 1807 | | FLAG_APME_IN_CTRL3 |
| 1808 | | FLAG_RX_CSUM_ENABLED |
| 1809 | | FLAG_HAS_CTRLEXT_ON_LOAD |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1810 | | FLAG_HAS_SMART_POWER_DOWN |
| 1811 | | FLAG_RESET_OVERWRITES_LAA /* errata */ |
| 1812 | | FLAG_TARC_SPEED_MODE_BIT /* errata */ |
| 1813 | | FLAG_APME_CHECK_PORT_B, |
| 1814 | .pba = 38, |
Bruce Allan | 2adc55c | 2009-06-02 11:28:58 +0000 | [diff] [blame] | 1815 | .max_hw_frame_size = DEFAULT_JUMBO, |
Jeff Kirsher | 69e3fd8 | 2008-04-02 13:48:18 -0700 | [diff] [blame] | 1816 | .get_variants = e1000_get_variants_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1817 | .mac_ops = &e82571_mac_ops, |
| 1818 | .phy_ops = &e82_phy_ops_igp, |
| 1819 | .nvm_ops = &e82571_nvm_ops, |
| 1820 | }; |
| 1821 | |
| 1822 | struct e1000_info e1000_82572_info = { |
| 1823 | .mac = e1000_82572, |
| 1824 | .flags = FLAG_HAS_HW_VLAN_FILTER |
| 1825 | | FLAG_HAS_JUMBO_FRAMES |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1826 | | FLAG_HAS_WOL |
| 1827 | | FLAG_APME_IN_CTRL3 |
| 1828 | | FLAG_RX_CSUM_ENABLED |
| 1829 | | FLAG_HAS_CTRLEXT_ON_LOAD |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1830 | | FLAG_TARC_SPEED_MODE_BIT, /* errata */ |
| 1831 | .pba = 38, |
Bruce Allan | 2adc55c | 2009-06-02 11:28:58 +0000 | [diff] [blame] | 1832 | .max_hw_frame_size = DEFAULT_JUMBO, |
Jeff Kirsher | 69e3fd8 | 2008-04-02 13:48:18 -0700 | [diff] [blame] | 1833 | .get_variants = e1000_get_variants_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1834 | .mac_ops = &e82571_mac_ops, |
| 1835 | .phy_ops = &e82_phy_ops_igp, |
| 1836 | .nvm_ops = &e82571_nvm_ops, |
| 1837 | }; |
| 1838 | |
| 1839 | struct e1000_info e1000_82573_info = { |
| 1840 | .mac = e1000_82573, |
| 1841 | .flags = FLAG_HAS_HW_VLAN_FILTER |
| 1842 | | FLAG_HAS_JUMBO_FRAMES |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1843 | | FLAG_HAS_WOL |
| 1844 | | FLAG_APME_IN_CTRL3 |
| 1845 | | FLAG_RX_CSUM_ENABLED |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1846 | | FLAG_HAS_SMART_POWER_DOWN |
| 1847 | | FLAG_HAS_AMT |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1848 | | FLAG_HAS_ERT |
| 1849 | | FLAG_HAS_SWSM_ON_LOAD, |
| 1850 | .pba = 20, |
Bruce Allan | 2adc55c | 2009-06-02 11:28:58 +0000 | [diff] [blame] | 1851 | .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, |
Jeff Kirsher | 69e3fd8 | 2008-04-02 13:48:18 -0700 | [diff] [blame] | 1852 | .get_variants = e1000_get_variants_82571, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1853 | .mac_ops = &e82571_mac_ops, |
| 1854 | .phy_ops = &e82_phy_ops_m88, |
Auke Kok | 31f8c4f | 2008-02-21 15:10:47 -0800 | [diff] [blame] | 1855 | .nvm_ops = &e82571_nvm_ops, |
Auke Kok | bc7f75f | 2007-09-17 12:30:59 -0700 | [diff] [blame] | 1856 | }; |
| 1857 | |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1858 | struct e1000_info e1000_82574_info = { |
| 1859 | .mac = e1000_82574, |
| 1860 | .flags = FLAG_HAS_HW_VLAN_FILTER |
| 1861 | | FLAG_HAS_MSIX |
| 1862 | | FLAG_HAS_JUMBO_FRAMES |
| 1863 | | FLAG_HAS_WOL |
| 1864 | | FLAG_APME_IN_CTRL3 |
| 1865 | | FLAG_RX_CSUM_ENABLED |
| 1866 | | FLAG_HAS_SMART_POWER_DOWN |
| 1867 | | FLAG_HAS_AMT |
| 1868 | | FLAG_HAS_CTRLEXT_ON_LOAD, |
| 1869 | .pba = 20, |
Alexander Duyck | a825e00 | 2009-10-02 12:30:42 +0000 | [diff] [blame] | 1870 | .max_hw_frame_size = DEFAULT_JUMBO, |
Bruce Allan | 4662e82 | 2008-08-26 18:37:06 -0700 | [diff] [blame] | 1871 | .get_variants = e1000_get_variants_82571, |
| 1872 | .mac_ops = &e82571_mac_ops, |
| 1873 | .phy_ops = &e82_phy_ops_bm, |
| 1874 | .nvm_ops = &e82571_nvm_ops, |
| 1875 | }; |
| 1876 | |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1877 | struct e1000_info e1000_82583_info = { |
| 1878 | .mac = e1000_82583, |
| 1879 | .flags = FLAG_HAS_HW_VLAN_FILTER |
| 1880 | | FLAG_HAS_WOL |
| 1881 | | FLAG_APME_IN_CTRL3 |
| 1882 | | FLAG_RX_CSUM_ENABLED |
| 1883 | | FLAG_HAS_SMART_POWER_DOWN |
| 1884 | | FLAG_HAS_AMT |
| 1885 | | FLAG_HAS_CTRLEXT_ON_LOAD, |
| 1886 | .pba = 20, |
Alexander Duyck | a825e00 | 2009-10-02 12:30:42 +0000 | [diff] [blame] | 1887 | .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, |
Alexander Duyck | 8c81c9c | 2009-03-19 01:12:27 +0000 | [diff] [blame] | 1888 | .get_variants = e1000_get_variants_82571, |
| 1889 | .mac_ops = &e82571_mac_ops, |
| 1890 | .phy_ops = &e82_phy_ops_bm, |
| 1891 | .nvm_ops = &e82571_nvm_ops, |
| 1892 | }; |
| 1893 | |