Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, The Linux foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/bitmap.h> |
| 15 | #include <linux/bitops.h> |
| 16 | #include <linux/debugfs.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/console.h> |
| 19 | #include <linux/io.h> |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 20 | #include <linux/ipc_logging.h> |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 21 | #include <linux/module.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/of_device.h> |
| 24 | #include <linux/platform_device.h> |
Karthikeyan Ramasubramanian | 9d88c72 | 2017-04-06 16:04:39 -0600 | [diff] [blame] | 25 | #include <linux/pm_runtime.h> |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 26 | #include <linux/qcom-geni-se.h> |
| 27 | #include <linux/serial.h> |
| 28 | #include <linux/serial_core.h> |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 29 | #include <linux/slab.h> |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 30 | #include <linux/tty.h> |
| 31 | #include <linux/tty_flip.h> |
| 32 | |
| 33 | /* UART specific GENI registers */ |
| 34 | #define SE_UART_LOOPBACK_CFG (0x22C) |
| 35 | #define SE_UART_TX_TRANS_CFG (0x25C) |
| 36 | #define SE_UART_TX_WORD_LEN (0x268) |
| 37 | #define SE_UART_TX_STOP_BIT_LEN (0x26C) |
| 38 | #define SE_UART_TX_TRANS_LEN (0x270) |
| 39 | #define SE_UART_RX_TRANS_CFG (0x280) |
| 40 | #define SE_UART_RX_WORD_LEN (0x28C) |
| 41 | #define SE_UART_RX_STALE_CNT (0x294) |
| 42 | #define SE_UART_TX_PARITY_CFG (0x2A4) |
| 43 | #define SE_UART_RX_PARITY_CFG (0x2A8) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 44 | #define SE_UART_MANUAL_RFR (0x2AC) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 45 | |
| 46 | /* SE_UART_LOOPBACK_CFG */ |
| 47 | #define NO_LOOPBACK (0) |
| 48 | #define TX_RX_LOOPBACK (0x1) |
| 49 | #define CTS_RFR_LOOPBACK (0x2) |
| 50 | #define CTSRFR_TXRX_LOOPBACK (0x3) |
| 51 | |
| 52 | /* SE_UART_TRANS_CFG */ |
| 53 | #define UART_TX_PAR_EN (BIT(0)) |
| 54 | #define UART_CTS_MASK (BIT(1)) |
| 55 | |
| 56 | /* SE_UART_TX_WORD_LEN */ |
| 57 | #define TX_WORD_LEN_MSK (GENMASK(9, 0)) |
| 58 | |
| 59 | /* SE_UART_TX_STOP_BIT_LEN */ |
| 60 | #define TX_STOP_BIT_LEN_MSK (GENMASK(23, 0)) |
| 61 | #define TX_STOP_BIT_LEN_1 (0) |
| 62 | #define TX_STOP_BIT_LEN_1_5 (1) |
| 63 | #define TX_STOP_BIT_LEN_2 (2) |
| 64 | |
| 65 | /* SE_UART_TX_TRANS_LEN */ |
| 66 | #define TX_TRANS_LEN_MSK (GENMASK(23, 0)) |
| 67 | |
| 68 | /* SE_UART_RX_TRANS_CFG */ |
| 69 | #define UART_RX_INS_STATUS_BIT (BIT(2)) |
| 70 | #define UART_RX_PAR_EN (BIT(3)) |
| 71 | |
| 72 | /* SE_UART_RX_WORD_LEN */ |
| 73 | #define RX_WORD_LEN_MASK (GENMASK(9, 0)) |
| 74 | |
| 75 | /* SE_UART_RX_STALE_CNT */ |
| 76 | #define RX_STALE_CNT (GENMASK(23, 0)) |
| 77 | |
| 78 | /* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */ |
| 79 | #define PAR_CALC_EN (BIT(0)) |
| 80 | #define PAR_MODE_MSK (GENMASK(2, 1)) |
| 81 | #define PAR_MODE_SHFT (1) |
| 82 | #define PAR_EVEN (0x00) |
| 83 | #define PAR_ODD (0x01) |
| 84 | #define PAR_SPACE (0x10) |
| 85 | #define PAR_MARK (0x11) |
| 86 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 87 | /* SE_UART_MANUAL_RFR register fields */ |
| 88 | #define UART_MANUAL_RFR_EN (BIT(31)) |
| 89 | #define UART_RFR_NOT_READY (BIT(1)) |
| 90 | #define UART_RFR_READY (BIT(0)) |
| 91 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 92 | /* UART M_CMD OP codes */ |
| 93 | #define UART_START_TX (0x1) |
| 94 | #define UART_START_BREAK (0x4) |
| 95 | #define UART_STOP_BREAK (0x5) |
| 96 | /* UART S_CMD OP codes */ |
| 97 | #define UART_START_READ (0x1) |
| 98 | #define UART_PARAM (0x1) |
| 99 | |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 100 | /* UART DMA Rx GP_IRQ_BITS */ |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 101 | #define UART_DMA_RX_PARITY_ERR BIT(5) |
| 102 | #define UART_DMA_RX_ERRS (GENMASK(5, 6)) |
| 103 | #define UART_DMA_RX_BREAK (GENMASK(7, 8)) |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 104 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 105 | #define UART_OVERSAMPLING (32) |
| 106 | #define STALE_TIMEOUT (16) |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 107 | #define DEFAULT_BITS_PER_CHAR (10) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 108 | #define GENI_UART_NR_PORTS (15) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 109 | #define GENI_UART_CONS_PORTS (1) |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 110 | #define DEF_FIFO_DEPTH_WORDS (16) |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 111 | #define DEF_TX_WM (2) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 112 | #define DEF_FIFO_WIDTH_BITS (32) |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 113 | #define UART_CORE2X_VOTE (10000) |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 114 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 115 | #define WAKEBYTE_TIMEOUT_MSEC (2000) |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 116 | #define WAIT_XFER_MAX_ITER (50) |
| 117 | #define WAIT_XFER_MAX_TIMEOUT_US (10000) |
| 118 | #define WAIT_XFER_MIN_TIMEOUT_US (9000) |
| 119 | #define IPC_LOG_PWR_PAGES (6) |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 120 | #define IPC_LOG_MISC_PAGES (10) |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 121 | #define IPC_LOG_TX_RX_PAGES (8) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 122 | #define DATA_BYTES_PER_LINE (32) |
| 123 | |
| 124 | #define IPC_LOG_MSG(ctx, x...) do { \ |
| 125 | if (ctx) \ |
| 126 | ipc_log_string(ctx, x); \ |
| 127 | } while (0) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 128 | |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 129 | #define DMA_RX_BUF_SIZE (2048) |
Karthikeyan Ramasubramanian | 55a1c6d | 2017-11-14 13:10:46 -0700 | [diff] [blame] | 130 | #define UART_CONSOLE_RX_WM (2) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 131 | struct msm_geni_serial_port { |
| 132 | struct uart_port uport; |
| 133 | char name[20]; |
| 134 | unsigned int tx_fifo_depth; |
| 135 | unsigned int tx_fifo_width; |
| 136 | unsigned int rx_fifo_depth; |
| 137 | unsigned int tx_wm; |
| 138 | unsigned int rx_wm; |
| 139 | unsigned int rx_rfr; |
| 140 | int xfer_mode; |
| 141 | struct dentry *dbg; |
| 142 | bool port_setup; |
| 143 | unsigned int *rx_fifo; |
| 144 | int (*handle_rx)(struct uart_port *uport, |
| 145 | unsigned int rx_fifo_wc, |
| 146 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 147 | unsigned int rx_last, |
| 148 | bool drop_rx); |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 149 | struct device *wrapper_dev; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 150 | struct se_geni_rsc serial_rsc; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 151 | dma_addr_t tx_dma; |
| 152 | unsigned int xmit_size; |
| 153 | void *rx_buf; |
| 154 | dma_addr_t rx_dma; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 155 | int loopback; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 156 | int wakeup_irq; |
| 157 | unsigned char wakeup_byte; |
| 158 | struct wakeup_source geni_wake; |
| 159 | void *ipc_log_tx; |
| 160 | void *ipc_log_rx; |
| 161 | void *ipc_log_pwr; |
| 162 | void *ipc_log_misc; |
| 163 | unsigned int cur_baud; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 164 | int ioctl_count; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 165 | int edge_count; |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 166 | bool manual_flow; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 167 | }; |
| 168 | |
| 169 | static const struct uart_ops msm_geni_serial_pops; |
| 170 | static struct uart_driver msm_geni_console_driver; |
| 171 | static struct uart_driver msm_geni_serial_hs_driver; |
| 172 | static int handle_rx_console(struct uart_port *uport, |
| 173 | unsigned int rx_fifo_wc, |
| 174 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 175 | unsigned int rx_last, |
| 176 | bool drop_rx); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 177 | static int handle_rx_hs(struct uart_port *uport, |
| 178 | unsigned int rx_fifo_wc, |
| 179 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 180 | unsigned int rx_last, |
| 181 | bool drop_rx); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 182 | static unsigned int msm_geni_serial_tx_empty(struct uart_port *port); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 183 | static int msm_geni_serial_power_on(struct uart_port *uport); |
| 184 | static void msm_geni_serial_power_off(struct uart_port *uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 185 | static int msm_geni_serial_poll_bit(struct uart_port *uport, |
| 186 | int offset, int bit_field, bool set); |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 187 | static void msm_geni_serial_stop_rx(struct uart_port *uport); |
Girish Mahadevan | 5db3df7 | 2017-10-18 11:02:56 -0600 | [diff] [blame] | 188 | static int msm_geni_serial_runtime_resume(struct device *dev); |
| 189 | static int msm_geni_serial_runtime_suspend(struct device *dev); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 190 | |
| 191 | static atomic_t uart_line_id = ATOMIC_INIT(0); |
| 192 | |
| 193 | #define GET_DEV_PORT(uport) \ |
| 194 | container_of(uport, struct msm_geni_serial_port, uport) |
| 195 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 196 | static struct msm_geni_serial_port msm_geni_console_port; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 197 | static struct msm_geni_serial_port msm_geni_serial_ports[GENI_UART_NR_PORTS]; |
| 198 | |
| 199 | static void msm_geni_serial_config_port(struct uart_port *uport, int cfg_flags) |
| 200 | { |
| 201 | if (cfg_flags & UART_CONFIG_TYPE) |
| 202 | uport->type = PORT_MSM; |
| 203 | } |
| 204 | |
| 205 | static ssize_t msm_geni_serial_loopback_show(struct device *dev, |
| 206 | struct device_attribute *attr, char *buf) |
| 207 | { |
| 208 | struct platform_device *pdev = to_platform_device(dev); |
| 209 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 210 | |
| 211 | return snprintf(buf, sizeof(int), "%d\n", port->loopback); |
| 212 | } |
| 213 | |
| 214 | static ssize_t msm_geni_serial_loopback_store(struct device *dev, |
| 215 | struct device_attribute *attr, const char *buf, |
| 216 | size_t size) |
| 217 | { |
| 218 | struct platform_device *pdev = to_platform_device(dev); |
| 219 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 220 | |
| 221 | if (kstrtoint(buf, 0, &port->loopback)) { |
| 222 | dev_err(dev, "Invalid input\n"); |
| 223 | return -EINVAL; |
| 224 | } |
| 225 | return size; |
| 226 | } |
| 227 | |
| 228 | static DEVICE_ATTR(loopback, 0644, msm_geni_serial_loopback_show, |
| 229 | msm_geni_serial_loopback_store); |
| 230 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 231 | static void dump_ipc(void *ipc_ctx, char *prefix, char *string, |
| 232 | u64 addr, int size) |
| 233 | |
| 234 | { |
| 235 | char buf[DATA_BYTES_PER_LINE * 2]; |
| 236 | int len = 0; |
| 237 | |
| 238 | if (!ipc_ctx) |
| 239 | return; |
| 240 | len = min(size, DATA_BYTES_PER_LINE); |
| 241 | hex_dump_to_buffer(string, len, DATA_BYTES_PER_LINE, 1, buf, |
| 242 | sizeof(buf), false); |
| 243 | ipc_log_string(ipc_ctx, "%s[0x%.10x:%d] : %s", prefix, |
| 244 | (unsigned int)addr, size, buf); |
| 245 | } |
| 246 | |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 247 | static bool device_pending_suspend(struct uart_port *uport) |
| 248 | { |
| 249 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
| 250 | |
Girish Mahadevan | 5db3df7 | 2017-10-18 11:02:56 -0600 | [diff] [blame] | 251 | return (pm_runtime_status_suspended(uport->dev) || !usage_count); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 252 | } |
| 253 | |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 254 | static bool check_transfers_inflight(struct uart_port *uport) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 255 | { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 256 | bool xfer_on = false; |
| 257 | bool tx_active = false; |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 258 | bool tx_fifo_status = false; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 259 | bool m_cmd_active = false; |
| 260 | bool rx_active = false; |
| 261 | u32 rx_fifo_status = 0; |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 262 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 263 | u32 geni_status = geni_read_reg_nolog(uport->membase, |
| 264 | SE_GENI_STATUS); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 265 | struct circ_buf *xmit = &uport->state->xmit; |
| 266 | |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 267 | /* Possible stop tx is called multiple times. */ |
| 268 | m_cmd_active = geni_status & M_GENI_CMD_ACTIVE; |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 269 | if (port->xfer_mode == SE_DMA) { |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 270 | tx_fifo_status = port->tx_dma ? 1 : 0; |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 271 | rx_fifo_status = |
| 272 | geni_read_reg_nolog(uport->membase, SE_DMA_RX_LEN_IN); |
| 273 | } else { |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 274 | tx_fifo_status = geni_read_reg_nolog(uport->membase, |
| 275 | SE_GENI_TX_FIFO_STATUS); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 276 | rx_fifo_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 277 | SE_GENI_RX_FIFO_STATUS); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 278 | } |
| 279 | tx_active = m_cmd_active || tx_fifo_status; |
| 280 | rx_active = rx_fifo_status ? true : false; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 281 | |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 282 | if (rx_active || tx_active || !uart_circ_empty(xmit)) |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 283 | xfer_on = true; |
| 284 | |
| 285 | return xfer_on; |
| 286 | } |
| 287 | |
| 288 | static void wait_for_transfers_inflight(struct uart_port *uport) |
| 289 | { |
| 290 | int iter = 0; |
| 291 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 292 | |
| 293 | while (iter < WAIT_XFER_MAX_ITER) { |
| 294 | if (check_transfers_inflight(uport)) { |
| 295 | usleep_range(WAIT_XFER_MIN_TIMEOUT_US, |
| 296 | WAIT_XFER_MAX_TIMEOUT_US); |
| 297 | iter++; |
| 298 | } else { |
| 299 | break; |
| 300 | } |
| 301 | } |
| 302 | if (check_transfers_inflight(uport)) { |
| 303 | u32 geni_status = geni_read_reg_nolog(uport->membase, |
| 304 | SE_GENI_STATUS); |
| 305 | u32 geni_ios = geni_read_reg_nolog(uport->membase, SE_GENI_IOS); |
| 306 | u32 rx_fifo_status = geni_read_reg_nolog(uport->membase, |
| 307 | SE_GENI_RX_FIFO_STATUS); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 308 | u32 rx_dma = |
| 309 | geni_read_reg_nolog(uport->membase, SE_DMA_RX_LEN_IN); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 310 | |
| 311 | IPC_LOG_MSG(port->ipc_log_misc, |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 312 | "%s IOS 0x%x geni status 0x%x rx: fifo 0x%x dma 0x%x\n", |
| 313 | __func__, geni_ios, geni_status, rx_fifo_status, rx_dma); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 314 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 315 | } |
| 316 | |
| 317 | static int vote_clock_on(struct uart_port *uport) |
| 318 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 319 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 320 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 321 | int ret = 0; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 322 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 323 | ret = msm_geni_serial_power_on(uport); |
| 324 | if (ret) { |
| 325 | dev_err(uport->dev, "Failed to vote clock on\n"); |
| 326 | return ret; |
| 327 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 328 | port->ioctl_count++; |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 329 | IPC_LOG_MSG(port->ipc_log_pwr, "%s%s ioctl %d usage_count %d\n", |
| 330 | __func__, current->comm, port->ioctl_count, usage_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | static int vote_clock_off(struct uart_port *uport) |
| 335 | { |
| 336 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 337 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 338 | |
| 339 | if (!pm_runtime_enabled(uport->dev)) { |
| 340 | dev_err(uport->dev, "RPM not available.Can't enable clocks\n"); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 341 | return -EPERM; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 342 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 343 | if (!port->ioctl_count) { |
| 344 | dev_warn(uport->dev, "%s:Imbalanced vote off ioctl %d\n", |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 345 | __func__, port->ioctl_count); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 346 | IPC_LOG_MSG(port->ipc_log_pwr, |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 347 | "%s:Imbalanced vote_off from userspace. %d", |
| 348 | __func__, port->ioctl_count); |
| 349 | return -EPERM; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 350 | } |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 351 | wait_for_transfers_inflight(uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 352 | port->ioctl_count--; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 353 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 354 | IPC_LOG_MSG(port->ipc_log_pwr, "%s%s ioctl %d usage_count %d\n", |
| 355 | __func__, current->comm, port->ioctl_count, usage_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 356 | return 0; |
| 357 | }; |
| 358 | |
| 359 | static int msm_geni_serial_ioctl(struct uart_port *uport, unsigned int cmd, |
| 360 | unsigned long arg) |
| 361 | { |
| 362 | int ret = -ENOIOCTLCMD; |
| 363 | |
| 364 | switch (cmd) { |
| 365 | case TIOCPMGET: { |
| 366 | ret = vote_clock_on(uport); |
| 367 | break; |
| 368 | } |
| 369 | case TIOCPMPUT: { |
| 370 | ret = vote_clock_off(uport); |
| 371 | break; |
| 372 | } |
| 373 | case TIOCPMACT: { |
| 374 | ret = !pm_runtime_status_suspended(uport->dev); |
| 375 | break; |
| 376 | } |
| 377 | default: |
| 378 | break; |
| 379 | } |
| 380 | return ret; |
| 381 | } |
| 382 | |
| 383 | static void msm_geni_serial_break_ctl(struct uart_port *uport, int ctl) |
| 384 | { |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 385 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 386 | |
| 387 | if (!uart_console(uport) && device_pending_suspend(uport)) { |
| 388 | IPC_LOG_MSG(port->ipc_log_misc, |
| 389 | "%s.Device is suspended.\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 390 | return; |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 391 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 392 | |
| 393 | if (ctl) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 394 | wait_for_transfers_inflight(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 395 | geni_setup_m_cmd(uport->membase, UART_START_BREAK, 0); |
| 396 | } else { |
| 397 | geni_setup_m_cmd(uport->membase, UART_STOP_BREAK, 0); |
| 398 | } |
| 399 | /* Ensure break start/stop command is setup before returning.*/ |
| 400 | mb(); |
| 401 | } |
| 402 | |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 403 | static unsigned int msm_geni_cons_get_mctrl(struct uart_port *uport) |
| 404 | { |
| 405 | return TIOCM_DSR | TIOCM_CAR | TIOCM_CTS; |
| 406 | } |
| 407 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 408 | static unsigned int msm_geni_serial_get_mctrl(struct uart_port *uport) |
| 409 | { |
| 410 | u32 geni_ios = 0; |
| 411 | unsigned int mctrl = TIOCM_DSR | TIOCM_CAR; |
| 412 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 413 | if (device_pending_suspend(uport)) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 414 | return TIOCM_DSR | TIOCM_CAR | TIOCM_CTS; |
| 415 | |
| 416 | geni_ios = geni_read_reg_nolog(uport->membase, SE_GENI_IOS); |
| 417 | if (!(geni_ios & IO2_DATA_IN)) |
| 418 | mctrl |= TIOCM_CTS; |
| 419 | |
| 420 | return mctrl; |
| 421 | } |
| 422 | |
| 423 | static void msm_geni_cons_set_mctrl(struct uart_port *uport, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 424 | unsigned int mctrl) |
| 425 | { |
| 426 | } |
| 427 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 428 | static void msm_geni_serial_set_mctrl(struct uart_port *uport, |
| 429 | unsigned int mctrl) |
| 430 | { |
| 431 | u32 uart_manual_rfr = 0; |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 432 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 433 | |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 434 | if (device_pending_suspend(uport)) { |
| 435 | IPC_LOG_MSG(port->ipc_log_misc, |
| 436 | "%s.Device is suspended.\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 437 | return; |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 438 | } |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 439 | if (!(mctrl & TIOCM_RTS)) { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 440 | uart_manual_rfr |= (UART_MANUAL_RFR_EN | UART_RFR_NOT_READY); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 441 | port->manual_flow = true; |
| 442 | } else { |
| 443 | port->manual_flow = false; |
| 444 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 445 | geni_write_reg_nolog(uart_manual_rfr, uport->membase, |
| 446 | SE_UART_MANUAL_RFR); |
| 447 | /* Write to flow control must complete before return to client*/ |
| 448 | mb(); |
| 449 | } |
| 450 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 451 | static const char *msm_geni_serial_get_type(struct uart_port *uport) |
| 452 | { |
| 453 | return "MSM"; |
| 454 | } |
| 455 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 456 | static struct msm_geni_serial_port *get_port_from_line(int line, |
| 457 | bool is_console) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 458 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 459 | struct msm_geni_serial_port *port = NULL; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 460 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 461 | if (is_console) { |
| 462 | if ((line < 0) || (line >= GENI_UART_CONS_PORTS)) |
| 463 | port = ERR_PTR(-ENXIO); |
| 464 | port = &msm_geni_console_port; |
| 465 | } else { |
| 466 | if ((line < 0) || (line >= GENI_UART_NR_PORTS)) |
| 467 | return ERR_PTR(-ENXIO); |
| 468 | port = &msm_geni_serial_ports[line]; |
| 469 | } |
| 470 | |
| 471 | return port; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 472 | } |
| 473 | |
| 474 | static int msm_geni_serial_power_on(struct uart_port *uport) |
| 475 | { |
| 476 | int ret = 0; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 477 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 478 | |
Girish Mahadevan | 5db3df7 | 2017-10-18 11:02:56 -0600 | [diff] [blame] | 479 | if (!pm_runtime_enabled(uport->dev)) { |
| 480 | if (pm_runtime_status_suspended(uport->dev)) { |
| 481 | struct uart_state *state = uport->state; |
| 482 | struct tty_port *tport = &state->port; |
| 483 | int lock = mutex_trylock(&tport->mutex); |
| 484 | |
| 485 | IPC_LOG_MSG(port->ipc_log_pwr, |
| 486 | "%s:Manual resume\n", __func__); |
| 487 | pm_runtime_disable(uport->dev); |
| 488 | ret = msm_geni_serial_runtime_resume(uport->dev); |
| 489 | if (ret) { |
| 490 | IPC_LOG_MSG(port->ipc_log_pwr, |
| 491 | "%s:Manual RPM CB failed %d\n", |
| 492 | __func__, ret); |
| 493 | } else { |
| 494 | pm_runtime_get_noresume(uport->dev); |
| 495 | pm_runtime_set_active(uport->dev); |
| 496 | } |
| 497 | pm_runtime_enable(uport->dev); |
| 498 | if (lock) |
| 499 | mutex_unlock(&tport->mutex); |
| 500 | } |
| 501 | } else { |
| 502 | ret = pm_runtime_get_sync(uport->dev); |
| 503 | if (ret < 0) { |
| 504 | IPC_LOG_MSG(port->ipc_log_pwr, "%s Err\n", __func__); |
| 505 | WARN_ON_ONCE(1); |
| 506 | pm_runtime_put_noidle(uport->dev); |
| 507 | pm_runtime_set_suspended(uport->dev); |
| 508 | return ret; |
| 509 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 510 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 511 | return 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 512 | } |
| 513 | |
| 514 | static void msm_geni_serial_power_off(struct uart_port *uport) |
| 515 | { |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 516 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 517 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
| 518 | |
| 519 | if (!usage_count) { |
| 520 | IPC_LOG_MSG(port->ipc_log_pwr, "%s: Usage Count is already 0\n", |
| 521 | __func__); |
| 522 | return; |
| 523 | } |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 524 | pm_runtime_mark_last_busy(uport->dev); |
| 525 | pm_runtime_put_autosuspend(uport->dev); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 526 | } |
| 527 | |
| 528 | static int msm_geni_serial_poll_bit(struct uart_port *uport, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 529 | int offset, int bit_field, bool set) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 530 | { |
| 531 | int iter = 0; |
| 532 | unsigned int reg; |
| 533 | bool met = false; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 534 | struct msm_geni_serial_port *port = NULL; |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 535 | bool cond = false; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 536 | unsigned int baud = 115200; |
| 537 | unsigned int fifo_bits = DEF_FIFO_DEPTH_WORDS * DEF_FIFO_WIDTH_BITS; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 538 | unsigned long total_iter = 1000; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 539 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 540 | |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 541 | if (uport->private_data && !uart_console(uport)) { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 542 | port = GET_DEV_PORT(uport); |
| 543 | baud = (port->cur_baud ? port->cur_baud : 115200); |
| 544 | fifo_bits = port->tx_fifo_depth * port->tx_fifo_width; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 545 | /* |
| 546 | * Total polling iterations based on FIFO worth of bytes to be |
| 547 | * sent at current baud .Add a little fluff to the wait. |
| 548 | */ |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 549 | total_iter = ((fifo_bits * USEC_PER_SEC) / baud) / 10; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 550 | total_iter += 50; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 551 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 552 | |
| 553 | while (iter < total_iter) { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 554 | reg = geni_read_reg_nolog(uport->membase, offset); |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 555 | cond = reg & bit_field; |
| 556 | if (cond == set) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 557 | met = true; |
| 558 | break; |
| 559 | } |
| 560 | udelay(10); |
| 561 | iter++; |
| 562 | } |
| 563 | return met; |
| 564 | } |
| 565 | |
| 566 | static void msm_geni_serial_setup_tx(struct uart_port *uport, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 567 | unsigned int xmit_size) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 568 | { |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 569 | u32 m_cmd = 0; |
| 570 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 571 | geni_write_reg_nolog(xmit_size, uport->membase, SE_UART_TX_TRANS_LEN); |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 572 | m_cmd |= (UART_START_TX << M_OPCODE_SHFT); |
| 573 | geni_write_reg_nolog(m_cmd, uport->membase, SE_GENI_M_CMD0); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 574 | /* |
| 575 | * Writes to enable the primary sequencer should go through before |
| 576 | * exiting this function. |
| 577 | */ |
| 578 | mb(); |
| 579 | } |
| 580 | |
| 581 | static void msm_geni_serial_poll_cancel_tx(struct uart_port *uport) |
| 582 | { |
| 583 | int done = 0; |
| 584 | unsigned int irq_clear = M_CMD_DONE_EN; |
| 585 | |
| 586 | done = msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 587 | M_CMD_DONE_EN, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 588 | if (!done) { |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 589 | geni_write_reg_nolog(M_GENI_CMD_ABORT, uport->membase, |
| 590 | SE_GENI_M_CMD_CTRL_REG); |
| 591 | irq_clear |= M_CMD_ABORT_EN; |
| 592 | msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 593 | M_CMD_ABORT_EN, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 594 | } |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 595 | geni_write_reg_nolog(irq_clear, uport->membase, SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 596 | } |
| 597 | |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 598 | static void msm_geni_serial_abort_rx(struct uart_port *uport) |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 599 | { |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 600 | unsigned int irq_clear = S_CMD_DONE_EN; |
| 601 | |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 602 | geni_abort_s_cmd(uport->membase); |
| 603 | /* Ensure this goes through before polling. */ |
| 604 | mb(); |
| 605 | irq_clear |= S_CMD_ABORT_EN; |
| 606 | msm_geni_serial_poll_bit(uport, SE_GENI_S_CMD_CTRL_REG, |
| 607 | S_GENI_CMD_ABORT, false); |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 608 | geni_write_reg_nolog(irq_clear, uport->membase, SE_GENI_S_IRQ_CLEAR); |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 609 | geni_write_reg(FORCE_DEFAULT, uport->membase, GENI_FORCE_DEFAULT_REG); |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 610 | } |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 611 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 612 | #ifdef CONFIG_CONSOLE_POLL |
| 613 | static int msm_geni_serial_get_char(struct uart_port *uport) |
| 614 | { |
| 615 | unsigned int rx_fifo; |
| 616 | unsigned int m_irq_status; |
| 617 | unsigned int s_irq_status; |
| 618 | |
| 619 | if (!(msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 620 | M_SEC_IRQ_EN, true))) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 621 | return -ENXIO; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 622 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 623 | m_irq_status = geni_read_reg_nolog(uport->membase, |
| 624 | SE_GENI_M_IRQ_STATUS); |
| 625 | s_irq_status = geni_read_reg_nolog(uport->membase, |
| 626 | SE_GENI_S_IRQ_STATUS); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 627 | geni_write_reg_nolog(m_irq_status, uport->membase, |
| 628 | SE_GENI_M_IRQ_CLEAR); |
| 629 | geni_write_reg_nolog(s_irq_status, uport->membase, |
| 630 | SE_GENI_S_IRQ_CLEAR); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 631 | |
| 632 | if (!(msm_geni_serial_poll_bit(uport, SE_GENI_RX_FIFO_STATUS, |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 633 | RX_FIFO_WC_MSK, true))) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 634 | return -ENXIO; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 635 | |
| 636 | /* |
| 637 | * Read the Rx FIFO only after clearing the interrupt registers and |
| 638 | * getting valid RX fifo status. |
| 639 | */ |
| 640 | mb(); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 641 | rx_fifo = geni_read_reg_nolog(uport->membase, SE_GENI_RX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 642 | rx_fifo &= 0xFF; |
| 643 | return rx_fifo; |
| 644 | } |
| 645 | |
| 646 | static void msm_geni_serial_poll_put_char(struct uart_port *uport, |
| 647 | unsigned char c) |
| 648 | { |
| 649 | int b = (int) c; |
| 650 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 651 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 652 | geni_write_reg_nolog(port->tx_wm, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 653 | SE_GENI_TX_WATERMARK_REG); |
| 654 | msm_geni_serial_setup_tx(uport, 1); |
| 655 | if (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 656 | M_TX_FIFO_WATERMARK_EN, true)) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 657 | WARN_ON(1); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 658 | geni_write_reg_nolog(b, uport->membase, SE_GENI_TX_FIFOn); |
| 659 | geni_write_reg_nolog(M_TX_FIFO_WATERMARK_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 660 | SE_GENI_M_IRQ_CLEAR); |
| 661 | /* |
| 662 | * Ensure FIFO write goes through before polling for status but. |
| 663 | */ |
| 664 | mb(); |
| 665 | msm_geni_serial_poll_cancel_tx(uport); |
| 666 | } |
| 667 | #endif |
| 668 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 669 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 670 | static void msm_geni_serial_wr_char(struct uart_port *uport, int ch) |
| 671 | { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 672 | geni_write_reg_nolog(ch, uport->membase, SE_GENI_TX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 673 | /* |
| 674 | * Ensure FIFO write clear goes through before |
| 675 | * next iteration. |
| 676 | */ |
| 677 | mb(); |
| 678 | |
| 679 | } |
| 680 | |
| 681 | static void |
| 682 | __msm_geni_serial_console_write(struct uart_port *uport, const char *s, |
| 683 | unsigned int count) |
| 684 | { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 685 | int new_line = 0; |
| 686 | int i; |
| 687 | int bytes_to_send = count; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 688 | int fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 689 | int tx_wm = DEF_TX_WM; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 690 | |
| 691 | for (i = 0; i < count; i++) { |
| 692 | if (s[i] == '\n') |
| 693 | new_line++; |
| 694 | } |
| 695 | |
| 696 | bytes_to_send += new_line; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 697 | geni_write_reg_nolog(tx_wm, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 698 | SE_GENI_TX_WATERMARK_REG); |
| 699 | msm_geni_serial_setup_tx(uport, bytes_to_send); |
| 700 | i = 0; |
| 701 | while (i < count) { |
| 702 | u32 chars_to_write = 0; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 703 | u32 avail_fifo_bytes = (fifo_depth - tx_wm); |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 704 | /* |
| 705 | * If the WM bit never set, then the Tx state machine is not |
| 706 | * in a valid state, so break, cancel/abort any existing |
| 707 | * command. Unfortunately the current data being written is |
| 708 | * lost. |
| 709 | */ |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 710 | while (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 711 | M_TX_FIFO_WATERMARK_EN, true)) |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 712 | break; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 713 | chars_to_write = min((unsigned int)(count - i), |
| 714 | avail_fifo_bytes); |
| 715 | if ((chars_to_write << 1) > avail_fifo_bytes) |
| 716 | chars_to_write = (avail_fifo_bytes >> 1); |
| 717 | uart_console_write(uport, (s + i), chars_to_write, |
| 718 | msm_geni_serial_wr_char); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 719 | geni_write_reg_nolog(M_TX_FIFO_WATERMARK_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 720 | SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 721 | /* Ensure this goes through before polling for WM IRQ again.*/ |
| 722 | mb(); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 723 | i += chars_to_write; |
| 724 | } |
| 725 | msm_geni_serial_poll_cancel_tx(uport); |
| 726 | } |
| 727 | |
| 728 | static void msm_geni_serial_console_write(struct console *co, const char *s, |
| 729 | unsigned int count) |
| 730 | { |
| 731 | struct uart_port *uport; |
| 732 | struct msm_geni_serial_port *port; |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 733 | int locked = 1; |
| 734 | unsigned long flags; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 735 | |
| 736 | WARN_ON(co->index < 0 || co->index >= GENI_UART_NR_PORTS); |
| 737 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 738 | port = get_port_from_line(co->index, true); |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 739 | if (IS_ERR_OR_NULL(port)) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 740 | return; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 741 | |
| 742 | uport = &port->uport; |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 743 | if (oops_in_progress) |
| 744 | locked = spin_trylock_irqsave(&uport->lock, flags); |
| 745 | else |
| 746 | spin_lock_irqsave(&uport->lock, flags); |
| 747 | |
| 748 | if (locked) { |
| 749 | __msm_geni_serial_console_write(uport, s, count); |
| 750 | spin_unlock_irqrestore(&uport->lock, flags); |
| 751 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 752 | } |
| 753 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 754 | static int handle_rx_console(struct uart_port *uport, |
| 755 | unsigned int rx_fifo_wc, |
| 756 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 757 | unsigned int rx_last, |
| 758 | bool drop_rx) |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 759 | { |
| 760 | int i, c; |
| 761 | unsigned char *rx_char; |
| 762 | struct tty_port *tport; |
| 763 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 764 | |
| 765 | tport = &uport->state->port; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 766 | for (i = 0; i < rx_fifo_wc; i++) { |
| 767 | int bytes = 4; |
| 768 | |
| 769 | *(msm_port->rx_fifo) = |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 770 | geni_read_reg_nolog(uport->membase, SE_GENI_RX_FIFOn); |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 771 | if (drop_rx) |
| 772 | continue; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 773 | rx_char = (unsigned char *)msm_port->rx_fifo; |
| 774 | |
| 775 | if (i == (rx_fifo_wc - 1)) { |
| 776 | if (rx_last && rx_last_byte_valid) |
| 777 | bytes = rx_last_byte_valid; |
| 778 | } |
| 779 | for (c = 0; c < bytes; c++) { |
| 780 | char flag = TTY_NORMAL; |
| 781 | int sysrq; |
| 782 | |
| 783 | uport->icount.rx++; |
| 784 | sysrq = uart_handle_sysrq_char(uport, rx_char[c]); |
| 785 | if (!sysrq) |
| 786 | tty_insert_flip_char(tport, rx_char[c], flag); |
| 787 | } |
| 788 | } |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 789 | if (!drop_rx) |
| 790 | tty_flip_buffer_push(tport); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 791 | return 0; |
| 792 | } |
| 793 | #else |
| 794 | static int handle_rx_console(struct uart_port *uport, |
| 795 | unsigned int rx_fifo_wc, |
| 796 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 797 | unsigned int rx_last, |
| 798 | bool drop_rx) |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 799 | { |
| 800 | return -EPERM; |
| 801 | } |
| 802 | |
| 803 | #endif /* (CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL)) */ |
| 804 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 805 | static int msm_geni_serial_prep_dma_tx(struct uart_port *uport) |
| 806 | { |
| 807 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 808 | struct circ_buf *xmit = &uport->state->xmit; |
| 809 | unsigned int xmit_size; |
| 810 | int ret = 0; |
| 811 | |
| 812 | xmit_size = uart_circ_chars_pending(xmit); |
| 813 | if (xmit_size < WAKEUP_CHARS) |
| 814 | uart_write_wakeup(uport); |
| 815 | |
| 816 | if (xmit_size > (UART_XMIT_SIZE - xmit->tail)) |
| 817 | xmit_size = UART_XMIT_SIZE - xmit->tail; |
| 818 | |
| 819 | if (!xmit_size) |
| 820 | return ret; |
| 821 | |
| 822 | dump_ipc(msm_port->ipc_log_tx, "DMA Tx", |
| 823 | (char *)&xmit->buf[xmit->tail], 0, xmit_size); |
| 824 | msm_geni_serial_setup_tx(uport, xmit_size); |
| 825 | ret = geni_se_tx_dma_prep(msm_port->wrapper_dev, uport->membase, |
| 826 | &xmit->buf[xmit->tail], xmit_size, &msm_port->tx_dma); |
| 827 | if (!ret) { |
| 828 | msm_port->xmit_size = xmit_size; |
| 829 | } else { |
| 830 | geni_write_reg_nolog(0, uport->membase, |
| 831 | SE_UART_TX_TRANS_LEN); |
| 832 | geni_cancel_m_cmd(uport->membase); |
| 833 | if (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
| 834 | M_CMD_CANCEL_EN, true)) { |
| 835 | geni_abort_m_cmd(uport->membase); |
| 836 | msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
| 837 | M_CMD_ABORT_EN, true); |
| 838 | geni_write_reg_nolog(M_CMD_ABORT_EN, uport->membase, |
| 839 | SE_GENI_M_IRQ_CLEAR); |
| 840 | } |
| 841 | geni_write_reg_nolog(M_CMD_CANCEL_EN, uport->membase, |
| 842 | SE_GENI_M_IRQ_CLEAR); |
| 843 | IPC_LOG_MSG(msm_port->ipc_log_tx, "%s: DMA map failure %d\n", |
| 844 | __func__, ret); |
| 845 | msm_port->tx_dma = (dma_addr_t)NULL; |
| 846 | msm_port->xmit_size = 0; |
| 847 | } |
| 848 | return ret; |
| 849 | } |
| 850 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 851 | static void msm_geni_serial_start_tx(struct uart_port *uport) |
| 852 | { |
| 853 | unsigned int geni_m_irq_en; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 854 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 855 | unsigned int geni_status; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 856 | unsigned int geni_ios; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 857 | |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 858 | if (!uart_console(uport) && !pm_runtime_active(uport->dev)) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 859 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 860 | "%s.Putting in async RPM vote\n", __func__); |
| 861 | pm_runtime_get(uport->dev); |
| 862 | goto exit_start_tx; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 863 | } |
| 864 | |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 865 | if (!uart_console(uport)) { |
| 866 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 867 | "%s.Power on.\n", __func__); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 868 | pm_runtime_get(uport->dev); |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 869 | } |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 870 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 871 | if (msm_port->xfer_mode == FIFO_MODE) { |
| 872 | geni_status = geni_read_reg_nolog(uport->membase, |
| 873 | SE_GENI_STATUS); |
| 874 | if (geni_status & M_GENI_CMD_ACTIVE) |
| 875 | goto check_flow_ctrl; |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 876 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 877 | if (!msm_geni_serial_tx_empty(uport)) |
| 878 | goto check_flow_ctrl; |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 879 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 880 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
| 881 | SE_GENI_M_IRQ_EN); |
| 882 | geni_m_irq_en |= (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 883 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 884 | geni_write_reg_nolog(msm_port->tx_wm, uport->membase, |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 885 | SE_GENI_TX_WATERMARK_REG); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 886 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, |
| 887 | SE_GENI_M_IRQ_EN); |
| 888 | /* Geni command setup should complete before returning.*/ |
| 889 | mb(); |
| 890 | } else if (msm_port->xfer_mode == SE_DMA) { |
| 891 | if (msm_port->tx_dma) |
| 892 | goto check_flow_ctrl; |
| 893 | |
| 894 | msm_geni_serial_prep_dma_tx(uport); |
| 895 | } |
| 896 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s\n", __func__); |
| 897 | return; |
| 898 | check_flow_ctrl: |
| 899 | geni_ios = geni_read_reg_nolog(uport->membase, SE_GENI_IOS); |
| 900 | if (!(geni_ios & IO2_DATA_IN)) |
| 901 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s: ios: 0x%08x\n", |
| 902 | __func__, geni_ios); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 903 | exit_start_tx: |
| 904 | if (!uart_console(uport)) |
| 905 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 906 | } |
| 907 | |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 908 | static void msm_geni_serial_tx_fsm_rst(struct uart_port *uport) |
| 909 | { |
| 910 | unsigned int tx_irq_en; |
| 911 | int done = 0; |
| 912 | int tries = 0; |
| 913 | |
| 914 | tx_irq_en = geni_read_reg_nolog(uport->membase, SE_DMA_TX_IRQ_EN); |
| 915 | geni_write_reg_nolog(0, uport->membase, SE_DMA_TX_IRQ_EN_SET); |
| 916 | geni_write_reg_nolog(1, uport->membase, SE_DMA_TX_FSM_RST); |
| 917 | do { |
| 918 | done = msm_geni_serial_poll_bit(uport, SE_DMA_TX_IRQ_STAT, |
| 919 | TX_RESET_DONE, true); |
| 920 | tries++; |
| 921 | } while (!done && tries < 5); |
| 922 | geni_write_reg_nolog(TX_DMA_DONE | TX_RESET_DONE, uport->membase, |
| 923 | SE_DMA_TX_IRQ_CLR); |
| 924 | geni_write_reg_nolog(tx_irq_en, uport->membase, SE_DMA_TX_IRQ_EN_SET); |
| 925 | } |
| 926 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 927 | static void stop_tx_sequencer(struct uart_port *uport) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 928 | { |
| 929 | unsigned int geni_m_irq_en; |
| 930 | unsigned int geni_status; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 931 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 932 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 933 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 934 | geni_m_irq_en &= ~M_CMD_DONE_EN; |
| 935 | if (port->xfer_mode == FIFO_MODE) { |
| 936 | geni_m_irq_en &= ~M_TX_FIFO_WATERMARK_EN; |
| 937 | geni_write_reg_nolog(0, uport->membase, |
| 938 | SE_GENI_TX_WATERMARK_REG); |
| 939 | } else if (port->xfer_mode == SE_DMA) { |
| 940 | if (port->tx_dma) { |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 941 | msm_geni_serial_tx_fsm_rst(uport); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 942 | geni_se_tx_dma_unprep(port->wrapper_dev, port->tx_dma, |
| 943 | port->xmit_size); |
| 944 | port->tx_dma = (dma_addr_t)NULL; |
| 945 | } |
| 946 | } |
| 947 | port->xmit_size = 0; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 948 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 949 | geni_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 950 | SE_GENI_STATUS); |
| 951 | /* Possible stop tx is called multiple times. */ |
| 952 | if (!(geni_status & M_GENI_CMD_ACTIVE)) |
| 953 | return; |
| 954 | |
| 955 | geni_cancel_m_cmd(uport->membase); |
| 956 | if (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 957 | M_CMD_CANCEL_EN, true)) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 958 | geni_abort_m_cmd(uport->membase); |
| 959 | msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 960 | M_CMD_ABORT_EN, true); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 961 | geni_write_reg_nolog(M_CMD_ABORT_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 962 | SE_GENI_M_IRQ_CLEAR); |
| 963 | } |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 964 | geni_write_reg_nolog(M_CMD_CANCEL_EN, uport, SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 965 | IPC_LOG_MSG(port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 966 | } |
| 967 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 968 | static void msm_geni_serial_stop_tx(struct uart_port *uport) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 969 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 970 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 971 | |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 972 | if (!uart_console(uport) && device_pending_suspend(uport)) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 973 | dev_err(uport->dev, "%s.Device is suspended.\n", __func__); |
| 974 | IPC_LOG_MSG(port->ipc_log_misc, |
| 975 | "%s.Device is suspended.\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 976 | return; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 977 | } |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 978 | stop_tx_sequencer(uport); |
| 979 | } |
| 980 | |
| 981 | static void start_rx_sequencer(struct uart_port *uport) |
| 982 | { |
| 983 | unsigned int geni_s_irq_en; |
| 984 | unsigned int geni_m_irq_en; |
| 985 | unsigned int geni_status; |
| 986 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 987 | int ret; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 988 | |
| 989 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
| 990 | if (geni_status & S_GENI_CMD_ACTIVE) |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 991 | msm_geni_serial_stop_rx(uport); |
| 992 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 993 | geni_setup_s_cmd(uport->membase, UART_START_READ, 0); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 994 | |
| 995 | if (port->xfer_mode == FIFO_MODE) { |
| 996 | geni_s_irq_en = geni_read_reg_nolog(uport->membase, |
| 997 | SE_GENI_S_IRQ_EN); |
| 998 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
| 999 | SE_GENI_M_IRQ_EN); |
| 1000 | |
| 1001 | geni_s_irq_en |= S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN; |
| 1002 | geni_m_irq_en |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; |
| 1003 | |
| 1004 | geni_write_reg_nolog(geni_s_irq_en, uport->membase, |
| 1005 | SE_GENI_S_IRQ_EN); |
| 1006 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, |
| 1007 | SE_GENI_M_IRQ_EN); |
| 1008 | } else if (port->xfer_mode == SE_DMA) { |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1009 | ret = geni_se_rx_dma_prep(port->wrapper_dev, uport->membase, |
| 1010 | port->rx_buf, DMA_RX_BUF_SIZE, &port->rx_dma); |
| 1011 | if (ret) { |
| 1012 | dev_err(uport->dev, "%s: RX Prep dma failed %d\n", |
| 1013 | __func__, ret); |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1014 | msm_geni_serial_stop_rx(uport); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1015 | goto exit_start_rx_sequencer; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1016 | } |
| 1017 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1018 | /* |
| 1019 | * Ensure the writes to the secondary sequencer and interrupt enables |
| 1020 | * go through. |
| 1021 | */ |
| 1022 | mb(); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1023 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1024 | exit_start_rx_sequencer: |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1025 | IPC_LOG_MSG(port->ipc_log_misc, "%s 0x%x\n", __func__, geni_status); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1026 | } |
| 1027 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1028 | static void msm_geni_serial_start_rx(struct uart_port *uport) |
| 1029 | { |
| 1030 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 1031 | |
| 1032 | if (!uart_console(uport) && device_pending_suspend(uport)) { |
| 1033 | dev_err(uport->dev, "%s.Device is suspended.\n", __func__); |
| 1034 | IPC_LOG_MSG(port->ipc_log_misc, |
| 1035 | "%s.Device is suspended.\n", __func__); |
| 1036 | return; |
| 1037 | } |
| 1038 | start_rx_sequencer(&port->uport); |
| 1039 | } |
| 1040 | |
| 1041 | |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 1042 | static void msm_geni_serial_rx_fsm_rst(struct uart_port *uport) |
| 1043 | { |
| 1044 | unsigned int rx_irq_en; |
| 1045 | int done = 0; |
| 1046 | int tries = 0; |
| 1047 | |
| 1048 | rx_irq_en = geni_read_reg_nolog(uport->membase, SE_DMA_RX_IRQ_EN); |
| 1049 | geni_write_reg_nolog(0, uport->membase, SE_DMA_RX_IRQ_EN_SET); |
| 1050 | geni_write_reg_nolog(1, uport->membase, SE_DMA_RX_FSM_RST); |
| 1051 | do { |
| 1052 | done = msm_geni_serial_poll_bit(uport, SE_DMA_RX_IRQ_STAT, |
| 1053 | RX_RESET_DONE, true); |
| 1054 | tries++; |
| 1055 | } while (!done && tries < 5); |
| 1056 | geni_write_reg_nolog(RX_DMA_DONE | RX_RESET_DONE, uport->membase, |
| 1057 | SE_DMA_RX_IRQ_CLR); |
| 1058 | geni_write_reg_nolog(rx_irq_en, uport->membase, SE_DMA_RX_IRQ_EN_SET); |
| 1059 | } |
| 1060 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1061 | static void stop_rx_sequencer(struct uart_port *uport) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1062 | { |
| 1063 | unsigned int geni_s_irq_en; |
| 1064 | unsigned int geni_m_irq_en; |
| 1065 | unsigned int geni_status; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1066 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1067 | u32 irq_clear = S_CMD_DONE_EN; |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1068 | bool done; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1069 | |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1070 | IPC_LOG_MSG(port->ipc_log_misc, "%s\n", __func__); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1071 | if (port->xfer_mode == FIFO_MODE) { |
| 1072 | geni_s_irq_en = geni_read_reg_nolog(uport->membase, |
| 1073 | SE_GENI_S_IRQ_EN); |
| 1074 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
| 1075 | SE_GENI_M_IRQ_EN); |
| 1076 | geni_s_irq_en &= ~(S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN); |
| 1077 | geni_m_irq_en &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1078 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1079 | geni_write_reg_nolog(geni_s_irq_en, uport->membase, |
| 1080 | SE_GENI_S_IRQ_EN); |
| 1081 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, |
| 1082 | SE_GENI_M_IRQ_EN); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1083 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1084 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1085 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1086 | /* Possible stop rx is called multiple times. */ |
| 1087 | if (!(geni_status & S_GENI_CMD_ACTIVE)) |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1088 | goto exit_rx_seq; |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1089 | geni_cancel_s_cmd(uport->membase); |
| 1090 | /* |
| 1091 | * Ensure that the cancel goes through before polling for the |
| 1092 | * cancel control bit. |
| 1093 | */ |
| 1094 | mb(); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1095 | done = msm_geni_serial_poll_bit(uport, SE_GENI_S_CMD_CTRL_REG, |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1096 | S_GENI_CMD_CANCEL, false); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1097 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
| 1098 | if (!done) |
| 1099 | IPC_LOG_MSG(port->ipc_log_misc, "%s Cancel fail 0x%x\n", |
| 1100 | __func__, geni_status); |
| 1101 | |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1102 | geni_write_reg_nolog(irq_clear, uport->membase, SE_GENI_S_IRQ_CLEAR); |
| 1103 | if ((geni_status & S_GENI_CMD_ACTIVE)) |
| 1104 | msm_geni_serial_abort_rx(uport); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1105 | exit_rx_seq: |
| 1106 | if (port->xfer_mode == SE_DMA && port->rx_dma) { |
| 1107 | msm_geni_serial_rx_fsm_rst(uport); |
| 1108 | geni_se_rx_dma_unprep(port->wrapper_dev, port->rx_dma, |
| 1109 | DMA_RX_BUF_SIZE); |
| 1110 | port->rx_dma = (dma_addr_t)NULL; |
| 1111 | } |
| 1112 | } |
| 1113 | |
| 1114 | static void msm_geni_serial_stop_rx(struct uart_port *uport) |
| 1115 | { |
| 1116 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 1117 | |
| 1118 | if (!uart_console(uport) && device_pending_suspend(uport)) { |
| 1119 | IPC_LOG_MSG(port->ipc_log_misc, |
| 1120 | "%s.Device is suspended.\n", __func__); |
| 1121 | return; |
| 1122 | } |
| 1123 | stop_rx_sequencer(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1124 | } |
| 1125 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1126 | static int handle_rx_hs(struct uart_port *uport, |
| 1127 | unsigned int rx_fifo_wc, |
| 1128 | unsigned int rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1129 | unsigned int rx_last, |
| 1130 | bool drop_rx) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1131 | { |
| 1132 | unsigned char *rx_char; |
| 1133 | struct tty_port *tport; |
| 1134 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1135 | int ret; |
| 1136 | int rx_bytes = 0; |
| 1137 | |
| 1138 | rx_bytes = (msm_port->tx_fifo_width * (rx_fifo_wc - 1)) >> 3; |
| 1139 | rx_bytes += ((rx_last && rx_last_byte_valid) ? |
| 1140 | rx_last_byte_valid : msm_port->tx_fifo_width >> 3); |
| 1141 | |
| 1142 | tport = &uport->state->port; |
| 1143 | ioread32_rep((uport->membase + SE_GENI_RX_FIFOn), msm_port->rx_fifo, |
| 1144 | rx_fifo_wc); |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1145 | if (drop_rx) |
| 1146 | return 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1147 | |
| 1148 | rx_char = (unsigned char *)msm_port->rx_fifo; |
| 1149 | ret = tty_insert_flip_string(tport, rx_char, rx_bytes); |
| 1150 | if (ret != rx_bytes) { |
| 1151 | dev_err(uport->dev, "%s: ret %d rx_bytes %d\n", __func__, |
| 1152 | ret, rx_bytes); |
| 1153 | WARN_ON(1); |
| 1154 | } |
| 1155 | uport->icount.rx += ret; |
| 1156 | tty_flip_buffer_push(tport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1157 | dump_ipc(msm_port->ipc_log_rx, "Rx", (char *)msm_port->rx_fifo, 0, |
| 1158 | rx_bytes); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1159 | return ret; |
| 1160 | } |
| 1161 | |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1162 | static int msm_geni_serial_handle_rx(struct uart_port *uport, bool drop_rx) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1163 | { |
| 1164 | int ret = 0; |
| 1165 | unsigned int rx_fifo_status; |
| 1166 | unsigned int rx_fifo_wc = 0; |
| 1167 | unsigned int rx_last_byte_valid = 0; |
| 1168 | unsigned int rx_last = 0; |
| 1169 | struct tty_port *tport; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1170 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1171 | |
| 1172 | tport = &uport->state->port; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1173 | rx_fifo_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1174 | SE_GENI_RX_FIFO_STATUS); |
| 1175 | rx_fifo_wc = rx_fifo_status & RX_FIFO_WC_MSK; |
| 1176 | rx_last_byte_valid = ((rx_fifo_status & RX_LAST_BYTE_VALID_MSK) >> |
| 1177 | RX_LAST_BYTE_VALID_SHFT); |
| 1178 | rx_last = rx_fifo_status & RX_LAST; |
| 1179 | if (rx_fifo_wc) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1180 | port->handle_rx(uport, rx_fifo_wc, rx_last_byte_valid, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1181 | rx_last, drop_rx); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1182 | return ret; |
| 1183 | } |
| 1184 | |
| 1185 | static int msm_geni_serial_handle_tx(struct uart_port *uport) |
| 1186 | { |
| 1187 | int ret = 0; |
| 1188 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1189 | struct circ_buf *xmit = &uport->state->xmit; |
| 1190 | unsigned int avail_fifo_bytes = 0; |
| 1191 | unsigned int bytes_remaining = 0; |
| 1192 | int i = 0; |
| 1193 | unsigned int tx_fifo_status; |
| 1194 | unsigned int xmit_size; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1195 | unsigned int fifo_width_bytes = |
| 1196 | (uart_console(uport) ? 1 : (msm_port->tx_fifo_width >> 3)); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1197 | unsigned int geni_m_irq_en; |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1198 | int temp_tail = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1199 | |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1200 | xmit_size = uart_circ_chars_pending(xmit); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1201 | tx_fifo_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1202 | SE_GENI_TX_FIFO_STATUS); |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1203 | /* Both FIFO and framework buffer are drained */ |
| 1204 | if ((xmit_size == msm_port->xmit_size) && !tx_fifo_status) { |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 1205 | /* |
| 1206 | * This will balance out the power vote put in during start_tx |
| 1207 | * allowing the device to suspend. |
| 1208 | */ |
| 1209 | if (!uart_console(uport)) { |
| 1210 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1211 | "%s.Power Off.\n", __func__); |
| 1212 | msm_geni_serial_power_off(uport); |
| 1213 | } |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1214 | msm_port->xmit_size = 0; |
| 1215 | uart_circ_clear(xmit); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1216 | msm_geni_serial_stop_tx(uport); |
| 1217 | goto exit_handle_tx; |
| 1218 | } |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1219 | xmit_size -= msm_port->xmit_size; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1220 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1221 | if (!uart_console(uport)) { |
| 1222 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
| 1223 | SE_GENI_M_IRQ_EN); |
| 1224 | geni_m_irq_en &= ~(M_TX_FIFO_WATERMARK_EN); |
| 1225 | geni_write_reg_nolog(0, uport->membase, |
| 1226 | SE_GENI_TX_WATERMARK_REG); |
| 1227 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, |
| 1228 | SE_GENI_M_IRQ_EN); |
| 1229 | } |
| 1230 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1231 | avail_fifo_bytes = (msm_port->tx_fifo_depth - msm_port->tx_wm) * |
| 1232 | fifo_width_bytes; |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1233 | temp_tail = (xmit->tail + msm_port->xmit_size) & (UART_XMIT_SIZE - 1); |
| 1234 | if (xmit_size > (UART_XMIT_SIZE - temp_tail)) |
| 1235 | xmit_size = (UART_XMIT_SIZE - temp_tail); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1236 | if (xmit_size > avail_fifo_bytes) |
| 1237 | xmit_size = avail_fifo_bytes; |
| 1238 | |
| 1239 | if (!xmit_size) |
| 1240 | goto exit_handle_tx; |
| 1241 | |
| 1242 | msm_geni_serial_setup_tx(uport, xmit_size); |
| 1243 | |
| 1244 | bytes_remaining = xmit_size; |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1245 | dump_ipc(msm_port->ipc_log_tx, "Tx", (char *)&xmit->buf[temp_tail], 0, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1246 | xmit_size); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1247 | while (i < xmit_size) { |
| 1248 | unsigned int tx_bytes; |
| 1249 | unsigned int buf = 0; |
| 1250 | int c; |
| 1251 | |
| 1252 | tx_bytes = ((bytes_remaining < fifo_width_bytes) ? |
| 1253 | bytes_remaining : fifo_width_bytes); |
| 1254 | |
| 1255 | for (c = 0; c < tx_bytes ; c++) |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1256 | buf |= (xmit->buf[temp_tail + c] << (c * 8)); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1257 | geni_write_reg_nolog(buf, uport->membase, SE_GENI_TX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1258 | i += tx_bytes; |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1259 | temp_tail = (temp_tail + tx_bytes) & (UART_XMIT_SIZE - 1); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1260 | uport->icount.tx += tx_bytes; |
| 1261 | bytes_remaining -= tx_bytes; |
| 1262 | /* Ensure FIFO write goes through */ |
| 1263 | wmb(); |
| 1264 | } |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1265 | if (uart_console(uport)) |
Karthikeyan Ramasubramanian | 40cdf08 | 2017-08-28 13:18:00 -0600 | [diff] [blame] | 1266 | msm_geni_serial_poll_cancel_tx(uport); |
Karthikeyan Ramasubramanian | 967b6fb | 2017-10-25 13:59:28 -0600 | [diff] [blame] | 1267 | msm_port->xmit_size += xmit_size; |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1268 | exit_handle_tx: |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 1269 | uart_write_wakeup(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1270 | return ret; |
| 1271 | } |
| 1272 | |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1273 | static int msm_geni_serial_handle_dma_rx(struct uart_port *uport, bool drop_rx) |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1274 | { |
| 1275 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1276 | unsigned int rx_bytes = 0; |
| 1277 | struct tty_port *tport; |
| 1278 | int ret; |
Karthikeyan Ramasubramanian | 83eb13d | 2017-08-14 12:40:44 -0600 | [diff] [blame] | 1279 | unsigned int geni_status; |
| 1280 | |
| 1281 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
| 1282 | /* Possible stop rx is called */ |
| 1283 | if (!(geni_status & S_GENI_CMD_ACTIVE)) |
| 1284 | return 0; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1285 | |
| 1286 | geni_se_rx_dma_unprep(msm_port->wrapper_dev, msm_port->rx_dma, |
| 1287 | DMA_RX_BUF_SIZE); |
| 1288 | rx_bytes = geni_read_reg_nolog(uport->membase, SE_DMA_RX_LEN_IN); |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 1289 | if (unlikely(!msm_port->rx_buf)) { |
| 1290 | IPC_LOG_MSG(msm_port->ipc_log_rx, "%s: NULL Rx_buf\n", |
| 1291 | __func__); |
Karthikeyan Ramasubramanian | 83eb13d | 2017-08-14 12:40:44 -0600 | [diff] [blame] | 1292 | return 0; |
| 1293 | } |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 1294 | if (unlikely(!rx_bytes)) { |
| 1295 | IPC_LOG_MSG(msm_port->ipc_log_rx, "%s: Size %d\n", |
| 1296 | __func__, rx_bytes); |
| 1297 | goto exit_handle_dma_rx; |
| 1298 | } |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1299 | if (drop_rx) |
| 1300 | goto exit_handle_dma_rx; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1301 | |
| 1302 | tport = &uport->state->port; |
| 1303 | ret = tty_insert_flip_string(tport, (unsigned char *)(msm_port->rx_buf), |
| 1304 | rx_bytes); |
| 1305 | if (ret != rx_bytes) { |
| 1306 | dev_err(uport->dev, "%s: ret %d rx_bytes %d\n", __func__, |
| 1307 | ret, rx_bytes); |
| 1308 | WARN_ON(1); |
| 1309 | } |
| 1310 | uport->icount.rx += ret; |
| 1311 | tty_flip_buffer_push(tport); |
| 1312 | dump_ipc(msm_port->ipc_log_rx, "DMA Rx", (char *)msm_port->rx_buf, 0, |
| 1313 | rx_bytes); |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 1314 | exit_handle_dma_rx: |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1315 | ret = geni_se_rx_dma_prep(msm_port->wrapper_dev, uport->membase, |
| 1316 | msm_port->rx_buf, DMA_RX_BUF_SIZE, &msm_port->rx_dma); |
| 1317 | if (ret) |
| 1318 | IPC_LOG_MSG(msm_port->ipc_log_rx, "%s: %d\n", __func__, ret); |
| 1319 | return ret; |
| 1320 | } |
| 1321 | |
| 1322 | static int msm_geni_serial_handle_dma_tx(struct uart_port *uport) |
| 1323 | { |
| 1324 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1325 | struct circ_buf *xmit = &uport->state->xmit; |
| 1326 | |
| 1327 | xmit->tail = (xmit->tail + msm_port->xmit_size) & (UART_XMIT_SIZE - 1); |
| 1328 | geni_se_tx_dma_unprep(msm_port->wrapper_dev, msm_port->tx_dma, |
| 1329 | msm_port->xmit_size); |
| 1330 | uport->icount.tx += msm_port->xmit_size; |
| 1331 | msm_port->tx_dma = (dma_addr_t)NULL; |
| 1332 | msm_port->xmit_size = 0; |
| 1333 | |
| 1334 | if (!uart_circ_empty(xmit)) |
| 1335 | msm_geni_serial_prep_dma_tx(uport); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 1336 | else { |
| 1337 | /* |
| 1338 | * This will balance out the power vote put in during start_tx |
| 1339 | * allowing the device to suspend. |
| 1340 | */ |
| 1341 | if (!uart_console(uport)) { |
| 1342 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1343 | "%s.Power Off.\n", __func__); |
| 1344 | msm_geni_serial_power_off(uport); |
| 1345 | } |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1346 | uart_write_wakeup(uport); |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 1347 | } |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1348 | return 0; |
| 1349 | } |
| 1350 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1351 | static irqreturn_t msm_geni_serial_isr(int isr, void *dev) |
| 1352 | { |
| 1353 | unsigned int m_irq_status; |
| 1354 | unsigned int s_irq_status; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1355 | unsigned int dma; |
| 1356 | unsigned int dma_tx_status; |
| 1357 | unsigned int dma_rx_status; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1358 | struct uart_port *uport = dev; |
| 1359 | unsigned long flags; |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1360 | unsigned int m_irq_en; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1361 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Karthikeyan Ramasubramanian | 55a1c6d | 2017-11-14 13:10:46 -0700 | [diff] [blame] | 1362 | struct tty_port *tport = &uport->state->port; |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1363 | bool drop_rx = false; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1364 | |
| 1365 | spin_lock_irqsave(&uport->lock, flags); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1366 | if (uart_console(uport) && uport->suspended) |
| 1367 | goto exit_geni_serial_isr; |
Girish Mahadevan | 5db3df7 | 2017-10-18 11:02:56 -0600 | [diff] [blame] | 1368 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1369 | dev_err(uport->dev, "%s.Device is suspended.\n", __func__); |
| 1370 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1371 | "%s.Device is suspended.\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1372 | goto exit_geni_serial_isr; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1373 | } |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1374 | m_irq_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1375 | SE_GENI_M_IRQ_STATUS); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1376 | s_irq_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1377 | SE_GENI_S_IRQ_STATUS); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1378 | m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1379 | dma = geni_read_reg_nolog(uport->membase, SE_GENI_DMA_MODE_EN); |
| 1380 | dma_tx_status = geni_read_reg_nolog(uport->membase, SE_DMA_TX_IRQ_STAT); |
| 1381 | dma_rx_status = geni_read_reg_nolog(uport->membase, SE_DMA_RX_IRQ_STAT); |
| 1382 | |
| 1383 | geni_write_reg_nolog(m_irq_status, uport->membase, SE_GENI_M_IRQ_CLEAR); |
| 1384 | geni_write_reg_nolog(s_irq_status, uport->membase, SE_GENI_S_IRQ_CLEAR); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1385 | |
| 1386 | if ((m_irq_status & M_ILLEGAL_CMD_EN)) { |
| 1387 | WARN_ON(1); |
| 1388 | goto exit_geni_serial_isr; |
| 1389 | } |
| 1390 | |
Karthikeyan Ramasubramanian | 20cf4fa | 2017-09-18 17:07:58 -0600 | [diff] [blame] | 1391 | if (s_irq_status & S_RX_FIFO_WR_ERR_EN) { |
Karthikeyan Ramasubramanian | 55a1c6d | 2017-11-14 13:10:46 -0700 | [diff] [blame] | 1392 | uport->icount.overrun++; |
| 1393 | tty_insert_flip_char(tport, 0, TTY_OVERRUN); |
Karthikeyan Ramasubramanian | 20cf4fa | 2017-09-18 17:07:58 -0600 | [diff] [blame] | 1394 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1395 | "%s.sirq 0x%x buf_overrun:%d\n", |
| 1396 | __func__, s_irq_status, uport->icount.buf_overrun); |
| 1397 | } |
| 1398 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1399 | if (!dma) { |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1400 | if ((m_irq_status & m_irq_en) & |
| 1401 | (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN)) |
| 1402 | msm_geni_serial_handle_tx(uport); |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1403 | |
| 1404 | if ((s_irq_status & S_GP_IRQ_0_EN) || |
| 1405 | (s_irq_status & S_GP_IRQ_1_EN)) { |
| 1406 | if (s_irq_status & S_GP_IRQ_0_EN) |
| 1407 | uport->icount.parity++; |
| 1408 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1409 | "%s.sirq 0x%x parity:%d\n", |
| 1410 | __func__, s_irq_status, uport->icount.parity); |
| 1411 | drop_rx = true; |
| 1412 | } else if ((s_irq_status & S_GP_IRQ_2_EN) || |
| 1413 | (s_irq_status & S_GP_IRQ_3_EN)) { |
| 1414 | uport->icount.brk++; |
| 1415 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1416 | "%s.sirq 0x%x break:%d\n", |
| 1417 | __func__, s_irq_status, uport->icount.brk); |
| 1418 | } |
| 1419 | |
| 1420 | if ((s_irq_status & S_RX_FIFO_WATERMARK_EN) || |
| 1421 | (s_irq_status & S_RX_FIFO_LAST_EN)) |
| 1422 | msm_geni_serial_handle_rx(uport, drop_rx); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1423 | } else { |
| 1424 | if (dma_tx_status) { |
| 1425 | geni_write_reg_nolog(dma_tx_status, uport->membase, |
| 1426 | SE_DMA_TX_IRQ_CLR); |
| 1427 | if (dma_tx_status & TX_DMA_DONE) |
| 1428 | msm_geni_serial_handle_dma_tx(uport); |
| 1429 | } |
| 1430 | |
| 1431 | if (dma_rx_status) { |
| 1432 | geni_write_reg_nolog(dma_rx_status, uport->membase, |
| 1433 | SE_DMA_RX_IRQ_CLR); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1434 | if (dma_rx_status & RX_RESET_DONE) { |
| 1435 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1436 | "%s.Reset done. 0x%x.\n", |
| 1437 | __func__, dma_rx_status); |
| 1438 | goto exit_geni_serial_isr; |
| 1439 | } |
| 1440 | if (dma_rx_status & UART_DMA_RX_ERRS) { |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1441 | if (dma_rx_status & UART_DMA_RX_PARITY_ERR) |
| 1442 | uport->icount.parity++; |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1443 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1444 | "%s.Rx Errors. 0x%x parity:%d\n", |
| 1445 | __func__, dma_rx_status, |
| 1446 | uport->icount.parity); |
| 1447 | drop_rx = true; |
| 1448 | } else if (dma_rx_status & UART_DMA_RX_BREAK) { |
| 1449 | uport->icount.brk++; |
| 1450 | IPC_LOG_MSG(msm_port->ipc_log_misc, |
| 1451 | "%s.Rx Errors. 0x%x break:%d\n", |
| 1452 | __func__, dma_rx_status, |
| 1453 | uport->icount.brk); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1454 | } |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1455 | if (dma_rx_status & RX_DMA_DONE) |
Karthikeyan Ramasubramanian | e67fd2e | 2017-08-30 17:16:58 -0600 | [diff] [blame] | 1456 | msm_geni_serial_handle_dma_rx(uport, drop_rx); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1457 | } |
| 1458 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1459 | |
| 1460 | exit_geni_serial_isr: |
| 1461 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1462 | return IRQ_HANDLED; |
| 1463 | } |
| 1464 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1465 | static irqreturn_t msm_geni_wakeup_isr(int isr, void *dev) |
| 1466 | { |
| 1467 | struct uart_port *uport = dev; |
| 1468 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 1469 | struct tty_struct *tty; |
| 1470 | unsigned long flags; |
| 1471 | |
| 1472 | spin_lock_irqsave(&uport->lock, flags); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1473 | IPC_LOG_MSG(port->ipc_log_rx, "%s: Edge-Count %d\n", __func__, |
| 1474 | port->edge_count); |
| 1475 | if (port->wakeup_byte && (port->edge_count == 2)) { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1476 | tty = uport->state->port.tty; |
| 1477 | tty_insert_flip_char(tty->port, port->wakeup_byte, TTY_NORMAL); |
| 1478 | IPC_LOG_MSG(port->ipc_log_rx, "%s: Inject 0x%x\n", |
| 1479 | __func__, port->wakeup_byte); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1480 | port->edge_count = 0; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1481 | tty_flip_buffer_push(tty->port); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1482 | __pm_wakeup_event(&port->geni_wake, WAKEBYTE_TIMEOUT_MSEC); |
| 1483 | } else if (port->edge_count < 2) { |
| 1484 | port->edge_count++; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1485 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1486 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1487 | return IRQ_HANDLED; |
| 1488 | } |
| 1489 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1490 | static int get_tx_fifo_size(struct msm_geni_serial_port *port) |
| 1491 | { |
| 1492 | struct uart_port *uport; |
| 1493 | |
| 1494 | if (!port) |
| 1495 | return -ENODEV; |
| 1496 | |
| 1497 | uport = &port->uport; |
| 1498 | port->tx_fifo_depth = get_tx_fifo_depth(uport->membase); |
| 1499 | if (!port->tx_fifo_depth) { |
| 1500 | dev_err(uport->dev, "%s:Invalid TX FIFO depth read\n", |
| 1501 | __func__); |
| 1502 | return -ENXIO; |
| 1503 | } |
| 1504 | |
| 1505 | port->tx_fifo_width = get_tx_fifo_width(uport->membase); |
| 1506 | if (!port->tx_fifo_width) { |
| 1507 | dev_err(uport->dev, "%s:Invalid TX FIFO width read\n", |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 1508 | __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1509 | return -ENXIO; |
| 1510 | } |
| 1511 | |
| 1512 | port->rx_fifo_depth = get_rx_fifo_depth(uport->membase); |
| 1513 | if (!port->rx_fifo_depth) { |
| 1514 | dev_err(uport->dev, "%s:Invalid RX FIFO depth read\n", |
| 1515 | __func__); |
| 1516 | return -ENXIO; |
| 1517 | } |
| 1518 | |
| 1519 | uport->fifosize = |
| 1520 | ((port->tx_fifo_depth * port->tx_fifo_width) >> 3); |
| 1521 | return 0; |
| 1522 | } |
| 1523 | |
| 1524 | static void set_rfr_wm(struct msm_geni_serial_port *port) |
| 1525 | { |
| 1526 | /* |
| 1527 | * Set RFR (Flow off) to FIFO_DEPTH - 2. |
| 1528 | * RX WM level at 50% RX_FIFO_DEPTH. |
| 1529 | * TX WM level at 10% TX_FIFO_DEPTH. |
| 1530 | */ |
| 1531 | port->rx_rfr = port->rx_fifo_depth - 2; |
Karthikeyan Ramasubramanian | 55a1c6d | 2017-11-14 13:10:46 -0700 | [diff] [blame] | 1532 | if (!uart_console(&port->uport)) |
| 1533 | port->rx_wm = port->rx_fifo_depth >> 1; |
| 1534 | else |
| 1535 | port->rx_wm = UART_CONSOLE_RX_WM; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1536 | port->tx_wm = 2; |
| 1537 | } |
| 1538 | |
| 1539 | static void msm_geni_serial_shutdown(struct uart_port *uport) |
| 1540 | { |
| 1541 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1542 | unsigned long flags; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1543 | |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1544 | /* Stop the console before stopping the current tx */ |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1545 | if (uart_console(uport)) { |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1546 | console_stop(uport->cons); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1547 | } else { |
| 1548 | msm_geni_serial_power_on(uport); |
| 1549 | wait_for_transfers_inflight(uport); |
| 1550 | } |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1551 | |
Karthikeyan Ramasubramanian | 83eb13d | 2017-08-14 12:40:44 -0600 | [diff] [blame] | 1552 | disable_irq(uport->irq); |
Karthikeyan Ramasubramanian | 53157c5 | 2017-08-11 17:06:24 -0600 | [diff] [blame] | 1553 | free_irq(uport->irq, uport); |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1554 | spin_lock_irqsave(&uport->lock, flags); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1555 | msm_geni_serial_stop_tx(uport); |
| 1556 | msm_geni_serial_stop_rx(uport); |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1557 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1558 | |
Karthikeyan Ramasubramanian | 22bdbaf | 2017-09-22 11:38:37 -0600 | [diff] [blame] | 1559 | if (!uart_console(uport)) { |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 1560 | if (msm_port->ioctl_count) { |
| 1561 | int i; |
| 1562 | |
| 1563 | for (i = 0; i < msm_port->ioctl_count; i++) { |
| 1564 | IPC_LOG_MSG(msm_port->ipc_log_pwr, |
| 1565 | "%s IOCTL vote present. Forcing off\n", |
| 1566 | __func__); |
| 1567 | msm_geni_serial_power_off(uport); |
| 1568 | } |
| 1569 | msm_port->ioctl_count = 0; |
| 1570 | } |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1571 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1572 | if (msm_port->wakeup_irq > 0) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1573 | irq_set_irq_wake(msm_port->wakeup_irq, 0); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1574 | disable_irq(msm_port->wakeup_irq); |
Karthikeyan Ramasubramanian | 53157c5 | 2017-08-11 17:06:24 -0600 | [diff] [blame] | 1575 | free_irq(msm_port->wakeup_irq, uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1576 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1577 | } |
| 1578 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1579 | } |
| 1580 | |
| 1581 | static int msm_geni_serial_port_setup(struct uart_port *uport) |
| 1582 | { |
| 1583 | int ret = 0; |
| 1584 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1585 | unsigned long cfg0, cfg1; |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1586 | unsigned int rxstale = DEFAULT_BITS_PER_CHAR * STALE_TIMEOUT; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1587 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1588 | set_rfr_wm(msm_port); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1589 | geni_write_reg_nolog(rxstale, uport->membase, SE_UART_RX_STALE_CNT); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1590 | if (!uart_console(uport)) { |
| 1591 | /* For now only assume FIFO mode. */ |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1592 | msm_port->xfer_mode = SE_DMA; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1593 | se_get_packing_config(8, 4, false, &cfg0, &cfg1); |
| 1594 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1595 | SE_GENI_TX_PACKING_CFG0); |
| 1596 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1597 | SE_GENI_TX_PACKING_CFG1); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1598 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1599 | SE_GENI_RX_PACKING_CFG0); |
| 1600 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1601 | SE_GENI_RX_PACKING_CFG1); |
Karthikeyan Ramasubramanian | c8b095c | 2017-05-24 00:09:01 -0600 | [diff] [blame] | 1602 | msm_port->handle_rx = handle_rx_hs; |
| 1603 | msm_port->rx_fifo = devm_kzalloc(uport->dev, |
| 1604 | sizeof(msm_port->rx_fifo_depth * sizeof(u32)), |
| 1605 | GFP_KERNEL); |
| 1606 | if (!msm_port->rx_fifo) { |
| 1607 | ret = -ENOMEM; |
| 1608 | goto exit_portsetup; |
| 1609 | } |
Karthikeyan Ramasubramanian | b6be8c2 | 2017-08-23 16:34:00 -0600 | [diff] [blame] | 1610 | |
| 1611 | msm_port->rx_buf = devm_kzalloc(uport->dev, DMA_RX_BUF_SIZE, |
| 1612 | GFP_KERNEL); |
| 1613 | if (!msm_port->rx_buf) { |
| 1614 | kfree(msm_port->rx_fifo); |
| 1615 | msm_port->rx_fifo = NULL; |
| 1616 | ret = -ENOMEM; |
| 1617 | goto exit_portsetup; |
| 1618 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1619 | } else { |
| 1620 | /* |
| 1621 | * Make an unconditional cancel on the main sequencer to reset |
| 1622 | * it else we could end up in data loss scenarios. |
| 1623 | */ |
| 1624 | msm_port->xfer_mode = FIFO_MODE; |
| 1625 | msm_geni_serial_poll_cancel_tx(uport); |
| 1626 | se_get_packing_config(8, 1, false, &cfg0, &cfg1); |
| 1627 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1628 | SE_GENI_TX_PACKING_CFG0); |
| 1629 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1630 | SE_GENI_TX_PACKING_CFG1); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 1631 | se_get_packing_config(8, 4, false, &cfg0, &cfg1); |
| 1632 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1633 | SE_GENI_RX_PACKING_CFG0); |
| 1634 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1635 | SE_GENI_RX_PACKING_CFG1); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1636 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1637 | ret = geni_se_init(uport->membase, msm_port->rx_wm, msm_port->rx_rfr); |
| 1638 | if (ret) { |
| 1639 | dev_err(uport->dev, "%s: Fail\n", __func__); |
| 1640 | goto exit_portsetup; |
| 1641 | } |
| 1642 | |
| 1643 | ret = geni_se_select_mode(uport->membase, msm_port->xfer_mode); |
| 1644 | if (ret) |
| 1645 | goto exit_portsetup; |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 1646 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1647 | msm_port->port_setup = true; |
| 1648 | /* |
| 1649 | * Ensure Port setup related IO completes before returning to |
| 1650 | * framework. |
| 1651 | */ |
| 1652 | mb(); |
| 1653 | exit_portsetup: |
| 1654 | return ret; |
| 1655 | } |
| 1656 | |
| 1657 | static int msm_geni_serial_startup(struct uart_port *uport) |
| 1658 | { |
| 1659 | int ret = 0; |
| 1660 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1661 | |
| 1662 | scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", |
| 1663 | uport->line); |
| 1664 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1665 | if (likely(!uart_console(uport))) { |
| 1666 | ret = msm_geni_serial_power_on(&msm_port->uport); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1667 | if (ret) { |
| 1668 | dev_err(uport->dev, "%s:Failed to power on %d\n", |
| 1669 | __func__, ret); |
| 1670 | return ret; |
| 1671 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1672 | } |
| 1673 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1674 | if (unlikely(get_se_proto(uport->membase) != UART)) { |
| 1675 | dev_err(uport->dev, "%s: Invalid FW %d loaded.\n", |
| 1676 | __func__, get_se_proto(uport->membase)); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1677 | ret = -ENXIO; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1678 | goto exit_startup; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1679 | } |
| 1680 | |
Karthikeyan Ramasubramanian | c8b095c | 2017-05-24 00:09:01 -0600 | [diff] [blame] | 1681 | get_tx_fifo_size(msm_port); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1682 | if (!msm_port->port_setup) { |
| 1683 | if (msm_geni_serial_port_setup(uport)) |
| 1684 | goto exit_startup; |
| 1685 | } |
| 1686 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1687 | /* |
| 1688 | * Ensure that all the port configuration writes complete |
| 1689 | * before returning to the framework. |
| 1690 | */ |
| 1691 | mb(); |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1692 | ret = request_irq(uport->irq, msm_geni_serial_isr, IRQF_TRIGGER_HIGH, |
Karthikeyan Ramasubramanian | 53157c5 | 2017-08-11 17:06:24 -0600 | [diff] [blame] | 1693 | msm_port->name, uport); |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1694 | if (unlikely(ret)) { |
| 1695 | dev_err(uport->dev, "%s: Failed to get IRQ ret %d\n", |
| 1696 | __func__, ret); |
| 1697 | goto exit_startup; |
| 1698 | } |
| 1699 | |
| 1700 | if (msm_port->wakeup_irq > 0) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1701 | ret = request_irq(msm_port->wakeup_irq, msm_geni_wakeup_isr, |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1702 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
| 1703 | "hs_uart_wakeup", uport); |
| 1704 | if (unlikely(ret)) { |
| 1705 | dev_err(uport->dev, "%s:Failed to get WakeIRQ ret%d\n", |
| 1706 | __func__, ret); |
| 1707 | goto exit_startup; |
| 1708 | } |
| 1709 | disable_irq(msm_port->wakeup_irq); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1710 | ret = irq_set_irq_wake(msm_port->wakeup_irq, 1); |
| 1711 | if (unlikely(ret)) { |
| 1712 | dev_err(uport->dev, "%s:Failed to set IRQ wake:%d\n", |
| 1713 | __func__, ret); |
| 1714 | goto exit_startup; |
| 1715 | } |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1716 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1717 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1718 | exit_startup: |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1719 | if (likely(!uart_console(uport))) |
| 1720 | msm_geni_serial_power_off(&msm_port->uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1721 | return ret; |
| 1722 | } |
| 1723 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1724 | static int get_clk_cfg(unsigned long clk_freq, unsigned long *ser_clk) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1725 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1726 | unsigned long root_freq[] = {7372800, 14745600, 19200000, 29491200, |
| 1727 | 32000000, 48000000, 64000000, 80000000, 96000000, 100000000}; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1728 | int i; |
| 1729 | int match = -1; |
| 1730 | |
| 1731 | for (i = 0; i < ARRAY_SIZE(root_freq); i++) { |
| 1732 | if (clk_freq > root_freq[i]) |
| 1733 | continue; |
| 1734 | |
| 1735 | if (!(root_freq[i] % clk_freq)) { |
| 1736 | match = i; |
| 1737 | break; |
| 1738 | } |
| 1739 | } |
| 1740 | if (match != -1) |
| 1741 | *ser_clk = root_freq[match]; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1742 | else |
| 1743 | pr_err("clk_freq %ld\n", clk_freq); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1744 | return match; |
| 1745 | } |
| 1746 | |
| 1747 | static void geni_serial_write_term_regs(struct uart_port *uport, u32 loopback, |
| 1748 | u32 tx_trans_cfg, u32 tx_parity_cfg, u32 rx_trans_cfg, |
| 1749 | u32 rx_parity_cfg, u32 bits_per_char, u32 stop_bit_len, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1750 | u32 s_clk_cfg) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1751 | { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1752 | geni_write_reg_nolog(loopback, uport->membase, SE_UART_LOOPBACK_CFG); |
| 1753 | geni_write_reg_nolog(tx_trans_cfg, uport->membase, |
| 1754 | SE_UART_TX_TRANS_CFG); |
| 1755 | geni_write_reg_nolog(tx_parity_cfg, uport->membase, |
| 1756 | SE_UART_TX_PARITY_CFG); |
| 1757 | geni_write_reg_nolog(rx_trans_cfg, uport->membase, |
| 1758 | SE_UART_RX_TRANS_CFG); |
| 1759 | geni_write_reg_nolog(rx_parity_cfg, uport->membase, |
| 1760 | SE_UART_RX_PARITY_CFG); |
| 1761 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1762 | SE_UART_TX_WORD_LEN); |
| 1763 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1764 | SE_UART_RX_WORD_LEN); |
| 1765 | geni_write_reg_nolog(stop_bit_len, uport->membase, |
| 1766 | SE_UART_TX_STOP_BIT_LEN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1767 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_M_CLK_CFG); |
| 1768 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_S_CLK_CFG); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1769 | } |
| 1770 | |
| 1771 | static int get_clk_div_rate(unsigned int baud, unsigned long *desired_clk_rate) |
| 1772 | { |
| 1773 | unsigned long ser_clk; |
| 1774 | int dfs_index; |
| 1775 | int clk_div = 0; |
| 1776 | |
| 1777 | *desired_clk_rate = baud * UART_OVERSAMPLING; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1778 | dfs_index = get_clk_cfg(*desired_clk_rate, &ser_clk); |
| 1779 | if (dfs_index < 0) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1780 | pr_err("%s: Can't find matching DFS entry for baud %d\n", |
| 1781 | __func__, baud); |
| 1782 | clk_div = -EINVAL; |
| 1783 | goto exit_get_clk_div_rate; |
| 1784 | } |
| 1785 | |
| 1786 | clk_div = ser_clk / *desired_clk_rate; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1787 | *desired_clk_rate = ser_clk; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1788 | exit_get_clk_div_rate: |
| 1789 | return clk_div; |
| 1790 | } |
| 1791 | |
| 1792 | static void msm_geni_serial_set_termios(struct uart_port *uport, |
| 1793 | struct ktermios *termios, struct ktermios *old) |
| 1794 | { |
| 1795 | unsigned int baud; |
| 1796 | unsigned int bits_per_char = 0; |
| 1797 | unsigned int tx_trans_cfg; |
| 1798 | unsigned int tx_parity_cfg; |
| 1799 | unsigned int rx_trans_cfg; |
| 1800 | unsigned int rx_parity_cfg; |
| 1801 | unsigned int stop_bit_len; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1802 | unsigned int clk_div; |
Girish Mahadevan | 18a9fb0 | 2017-03-29 11:26:06 -0600 | [diff] [blame] | 1803 | unsigned long ser_clk_cfg = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1804 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 1805 | unsigned long clk_rate; |
| 1806 | |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1807 | if (!uart_console(uport)) { |
| 1808 | int ret = msm_geni_serial_power_on(uport); |
| 1809 | |
| 1810 | if (ret) { |
| 1811 | IPC_LOG_MSG(port->ipc_log_misc, |
| 1812 | "%s: Failed to vote clock on:%d\n", |
| 1813 | __func__, ret); |
| 1814 | return; |
| 1815 | } |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1816 | } |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1817 | msm_geni_serial_stop_rx(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1818 | /* baud rate */ |
| 1819 | baud = uart_get_baud_rate(uport, termios, old, 300, 4000000); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1820 | port->cur_baud = baud; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1821 | clk_div = get_clk_div_rate(baud, &clk_rate); |
| 1822 | if (clk_div <= 0) |
| 1823 | goto exit_set_termios; |
| 1824 | |
| 1825 | uport->uartclk = clk_rate; |
| 1826 | clk_set_rate(port->serial_rsc.se_clk, clk_rate); |
| 1827 | ser_clk_cfg |= SER_CLK_EN; |
| 1828 | ser_clk_cfg |= (clk_div << CLK_DIV_SHFT); |
| 1829 | |
| 1830 | /* parity */ |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1831 | tx_trans_cfg = geni_read_reg_nolog(uport->membase, |
| 1832 | SE_UART_TX_TRANS_CFG); |
| 1833 | tx_parity_cfg = geni_read_reg_nolog(uport->membase, |
| 1834 | SE_UART_TX_PARITY_CFG); |
| 1835 | rx_trans_cfg = geni_read_reg_nolog(uport->membase, |
| 1836 | SE_UART_RX_TRANS_CFG); |
| 1837 | rx_parity_cfg = geni_read_reg_nolog(uport->membase, |
| 1838 | SE_UART_RX_PARITY_CFG); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1839 | if (termios->c_cflag & PARENB) { |
| 1840 | tx_trans_cfg |= UART_TX_PAR_EN; |
| 1841 | rx_trans_cfg |= UART_RX_PAR_EN; |
| 1842 | tx_parity_cfg |= PAR_CALC_EN; |
| 1843 | rx_parity_cfg |= PAR_CALC_EN; |
| 1844 | if (termios->c_cflag & PARODD) { |
| 1845 | tx_parity_cfg |= PAR_ODD; |
| 1846 | rx_parity_cfg |= PAR_ODD; |
| 1847 | } else if (termios->c_cflag & CMSPAR) { |
| 1848 | tx_parity_cfg |= PAR_SPACE; |
| 1849 | rx_parity_cfg |= PAR_SPACE; |
| 1850 | } else { |
| 1851 | tx_parity_cfg |= PAR_EVEN; |
| 1852 | rx_parity_cfg |= PAR_EVEN; |
| 1853 | } |
| 1854 | } else { |
| 1855 | tx_trans_cfg &= ~UART_TX_PAR_EN; |
| 1856 | rx_trans_cfg &= ~UART_RX_PAR_EN; |
| 1857 | tx_parity_cfg &= ~PAR_CALC_EN; |
| 1858 | rx_parity_cfg &= ~PAR_CALC_EN; |
| 1859 | } |
| 1860 | |
| 1861 | /* bits per char */ |
| 1862 | switch (termios->c_cflag & CSIZE) { |
| 1863 | case CS5: |
| 1864 | bits_per_char = 5; |
| 1865 | break; |
| 1866 | case CS6: |
| 1867 | bits_per_char = 6; |
| 1868 | break; |
| 1869 | case CS7: |
| 1870 | bits_per_char = 7; |
| 1871 | break; |
| 1872 | case CS8: |
| 1873 | default: |
| 1874 | bits_per_char = 8; |
| 1875 | break; |
| 1876 | } |
| 1877 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1878 | |
| 1879 | /* stop bits */ |
| 1880 | if (termios->c_cflag & CSTOPB) |
| 1881 | stop_bit_len = TX_STOP_BIT_LEN_2; |
| 1882 | else |
| 1883 | stop_bit_len = TX_STOP_BIT_LEN_1; |
| 1884 | |
| 1885 | /* flow control, clear the CTS_MASK bit if using flow control. */ |
| 1886 | if (termios->c_cflag & CRTSCTS) |
| 1887 | tx_trans_cfg &= ~UART_CTS_MASK; |
| 1888 | else |
| 1889 | tx_trans_cfg |= UART_CTS_MASK; |
| 1890 | /* status bits to ignore */ |
| 1891 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1892 | if (likely(baud)) |
| 1893 | uart_update_timeout(uport, termios->c_cflag, baud); |
| 1894 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1895 | geni_serial_write_term_regs(uport, port->loopback, tx_trans_cfg, |
| 1896 | tx_parity_cfg, rx_trans_cfg, rx_parity_cfg, bits_per_char, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1897 | stop_bit_len, ser_clk_cfg); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1898 | IPC_LOG_MSG(port->ipc_log_misc, "%s: baud %d\n", __func__, baud); |
| 1899 | IPC_LOG_MSG(port->ipc_log_misc, "Tx: trans_cfg%d parity %d\n", |
| 1900 | tx_trans_cfg, tx_parity_cfg); |
| 1901 | IPC_LOG_MSG(port->ipc_log_misc, "Rx: trans_cfg%d parity %d", |
| 1902 | rx_trans_cfg, rx_parity_cfg); |
| 1903 | IPC_LOG_MSG(port->ipc_log_misc, "BitsChar%d stop bit%d\n", |
| 1904 | bits_per_char, stop_bit_len); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1905 | exit_set_termios: |
Girish Mahadevan | eecdd97 | 2017-08-22 17:58:08 -0600 | [diff] [blame] | 1906 | msm_geni_serial_start_rx(uport); |
| 1907 | if (!uart_console(uport)) |
| 1908 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1909 | return; |
| 1910 | |
| 1911 | } |
| 1912 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1913 | static unsigned int msm_geni_serial_tx_empty(struct uart_port *uport) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1914 | { |
| 1915 | unsigned int tx_fifo_status; |
| 1916 | unsigned int is_tx_empty = 1; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 1917 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1918 | |
Girish Mahadevan | aa1bb7b | 2017-10-20 14:35:32 -0600 | [diff] [blame] | 1919 | if (!uart_console(uport) && device_pending_suspend(uport)) |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 1920 | return 1; |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1921 | |
| 1922 | if (port->xfer_mode == SE_DMA) |
| 1923 | tx_fifo_status = port->tx_dma ? 1 : 0; |
| 1924 | else |
| 1925 | tx_fifo_status = geni_read_reg_nolog(uport->membase, |
| 1926 | SE_GENI_TX_FIFO_STATUS); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1927 | if (tx_fifo_status) |
| 1928 | is_tx_empty = 0; |
| 1929 | |
| 1930 | return is_tx_empty; |
| 1931 | } |
| 1932 | |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 1933 | static ssize_t msm_geni_serial_xfer_mode_show(struct device *dev, |
| 1934 | struct device_attribute *attr, char *buf) |
| 1935 | { |
| 1936 | struct platform_device *pdev = to_platform_device(dev); |
| 1937 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 1938 | ssize_t ret = 0; |
| 1939 | |
| 1940 | if (port->xfer_mode == FIFO_MODE) |
| 1941 | ret = snprintf(buf, sizeof("FIFO\n"), "FIFO\n"); |
| 1942 | else if (port->xfer_mode == SE_DMA) |
| 1943 | ret = snprintf(buf, sizeof("SE_DMA\n"), "SE_DMA\n"); |
| 1944 | |
| 1945 | return ret; |
| 1946 | } |
| 1947 | |
| 1948 | static ssize_t msm_geni_serial_xfer_mode_store(struct device *dev, |
| 1949 | struct device_attribute *attr, const char *buf, |
| 1950 | size_t size) |
| 1951 | { |
| 1952 | struct platform_device *pdev = to_platform_device(dev); |
| 1953 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 1954 | struct uart_port *uport = &port->uport; |
| 1955 | int xfer_mode = port->xfer_mode; |
| 1956 | unsigned long flags; |
| 1957 | |
| 1958 | if (uart_console(uport)) |
| 1959 | return -EOPNOTSUPP; |
| 1960 | |
| 1961 | if (strnstr(buf, "FIFO", strlen("FIFO"))) { |
| 1962 | xfer_mode = FIFO_MODE; |
| 1963 | } else if (strnstr(buf, "SE_DMA", strlen("SE_DMA"))) { |
| 1964 | xfer_mode = SE_DMA; |
| 1965 | } else { |
| 1966 | dev_err(dev, "%s: Invalid input %s\n", __func__, buf); |
| 1967 | return -EINVAL; |
| 1968 | } |
| 1969 | |
| 1970 | if (xfer_mode == port->xfer_mode) |
| 1971 | return size; |
| 1972 | |
| 1973 | msm_geni_serial_power_on(uport); |
| 1974 | spin_lock_irqsave(&uport->lock, flags); |
| 1975 | msm_geni_serial_stop_tx(uport); |
| 1976 | msm_geni_serial_stop_rx(uport); |
| 1977 | port->xfer_mode = xfer_mode; |
| 1978 | geni_se_select_mode(uport->membase, port->xfer_mode); |
| 1979 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1980 | msm_geni_serial_start_rx(uport); |
| 1981 | msm_geni_serial_power_off(uport); |
| 1982 | |
| 1983 | return size; |
| 1984 | } |
| 1985 | |
| 1986 | static DEVICE_ATTR(xfer_mode, 0644, msm_geni_serial_xfer_mode_show, |
| 1987 | msm_geni_serial_xfer_mode_store); |
| 1988 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1989 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1990 | static int __init msm_geni_console_setup(struct console *co, char *options) |
| 1991 | { |
| 1992 | struct uart_port *uport; |
| 1993 | struct msm_geni_serial_port *dev_port; |
| 1994 | int baud = 115200; |
| 1995 | int bits = 8; |
| 1996 | int parity = 'n'; |
| 1997 | int flow = 'n'; |
| 1998 | int ret = 0; |
| 1999 | |
| 2000 | if (unlikely(co->index >= GENI_UART_NR_PORTS || co->index < 0)) |
| 2001 | return -ENXIO; |
| 2002 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2003 | dev_port = get_port_from_line(co->index, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2004 | if (IS_ERR_OR_NULL(dev_port)) { |
| 2005 | ret = PTR_ERR(dev_port); |
| 2006 | pr_err("Invalid line %d(%d)\n", co->index, ret); |
| 2007 | return ret; |
| 2008 | } |
| 2009 | |
| 2010 | uport = &dev_port->uport; |
| 2011 | |
| 2012 | if (unlikely(!uport->membase)) |
| 2013 | return -ENXIO; |
| 2014 | |
| 2015 | if (se_geni_resources_on(&dev_port->serial_rsc)) |
| 2016 | WARN_ON(1); |
| 2017 | |
| 2018 | if (unlikely(get_se_proto(uport->membase) != UART)) { |
| 2019 | se_geni_resources_off(&dev_port->serial_rsc); |
| 2020 | return -ENXIO; |
| 2021 | } |
| 2022 | |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 2023 | if (!dev_port->port_setup) { |
| 2024 | msm_geni_serial_stop_rx(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2025 | msm_geni_serial_port_setup(uport); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 2026 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2027 | |
| 2028 | if (options) |
| 2029 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 2030 | |
| 2031 | return uart_set_options(uport, co, baud, parity, bits, flow); |
| 2032 | } |
| 2033 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2034 | static void |
| 2035 | msm_geni_serial_early_console_write(struct console *con, const char *s, |
| 2036 | unsigned int n) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2037 | { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2038 | struct earlycon_device *dev = con->data; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2039 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2040 | __msm_geni_serial_console_write(&dev->port, s, n); |
| 2041 | } |
| 2042 | |
| 2043 | static int __init |
| 2044 | msm_geni_serial_earlycon_setup(struct earlycon_device *dev, |
| 2045 | const char *opt) |
| 2046 | { |
| 2047 | struct uart_port *uport = &dev->port; |
| 2048 | int ret = 0; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2049 | u32 tx_trans_cfg = 0; |
| 2050 | u32 tx_parity_cfg = 0; |
| 2051 | u32 rx_trans_cfg = 0; |
| 2052 | u32 rx_parity_cfg = 0; |
| 2053 | u32 stop_bit = 0; |
| 2054 | u32 rx_stale = 0; |
| 2055 | u32 bits_per_char = 0; |
| 2056 | u32 s_clk_cfg = 0; |
| 2057 | u32 baud = 115200; |
| 2058 | u32 clk_div; |
| 2059 | unsigned long clk_rate; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 2060 | unsigned long cfg0, cfg1; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2061 | |
| 2062 | if (!uport->membase) { |
| 2063 | ret = -ENOMEM; |
| 2064 | goto exit_geni_serial_earlyconsetup; |
| 2065 | } |
| 2066 | |
| 2067 | if (get_se_proto(uport->membase) != UART) { |
| 2068 | ret = -ENXIO; |
| 2069 | goto exit_geni_serial_earlyconsetup; |
| 2070 | } |
| 2071 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2072 | /* |
| 2073 | * Ignore Flow control. |
| 2074 | * Disable Tx Parity. |
| 2075 | * Don't check Parity during Rx. |
| 2076 | * Disable Rx Parity. |
| 2077 | * n = 8. |
| 2078 | * Stop bit = 0. |
| 2079 | * Stale timeout in bit-time (3 chars worth). |
| 2080 | */ |
| 2081 | tx_trans_cfg |= UART_CTS_MASK; |
| 2082 | tx_parity_cfg = 0; |
| 2083 | rx_trans_cfg = 0; |
| 2084 | rx_parity_cfg = 0; |
| 2085 | bits_per_char = 0x8; |
| 2086 | stop_bit = 0; |
| 2087 | rx_stale = 0x18; |
| 2088 | clk_div = get_clk_div_rate(baud, &clk_rate); |
| 2089 | if (clk_div <= 0) { |
| 2090 | ret = -EINVAL; |
| 2091 | goto exit_geni_serial_earlyconsetup; |
| 2092 | } |
| 2093 | |
| 2094 | s_clk_cfg |= SER_CLK_EN; |
| 2095 | s_clk_cfg |= (clk_div << CLK_DIV_SHFT); |
| 2096 | |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 2097 | /* |
| 2098 | * Make an unconditional cancel on the main sequencer to reset |
| 2099 | * it else we could end up in data loss scenarios. |
| 2100 | */ |
| 2101 | msm_geni_serial_poll_cancel_tx(uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 2102 | msm_geni_serial_abort_rx(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2103 | se_get_packing_config(8, 1, false, &cfg0, &cfg1); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 2104 | geni_se_init(uport->membase, (DEF_FIFO_DEPTH_WORDS >> 1), |
| 2105 | (DEF_FIFO_DEPTH_WORDS - 2)); |
| 2106 | geni_se_select_mode(uport->membase, FIFO_MODE); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2107 | geni_write_reg_nolog(cfg0, uport->membase, SE_GENI_TX_PACKING_CFG0); |
| 2108 | geni_write_reg_nolog(cfg1, uport->membase, SE_GENI_TX_PACKING_CFG1); |
| 2109 | geni_write_reg_nolog(tx_trans_cfg, uport->membase, |
| 2110 | SE_UART_TX_TRANS_CFG); |
| 2111 | geni_write_reg_nolog(tx_parity_cfg, uport->membase, |
| 2112 | SE_UART_TX_PARITY_CFG); |
| 2113 | geni_write_reg_nolog(rx_trans_cfg, uport->membase, |
| 2114 | SE_UART_RX_TRANS_CFG); |
| 2115 | geni_write_reg_nolog(rx_parity_cfg, uport->membase, |
| 2116 | SE_UART_RX_PARITY_CFG); |
| 2117 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 2118 | SE_UART_TX_WORD_LEN); |
| 2119 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 2120 | SE_UART_RX_WORD_LEN); |
| 2121 | geni_write_reg_nolog(stop_bit, uport->membase, SE_UART_TX_STOP_BIT_LEN); |
| 2122 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_M_CLK_CFG); |
| 2123 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_S_CLK_CFG); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2124 | |
| 2125 | dev->con->write = msm_geni_serial_early_console_write; |
| 2126 | dev->con->setup = NULL; |
| 2127 | /* |
| 2128 | * Ensure that the early console setup completes before |
| 2129 | * returning. |
| 2130 | */ |
| 2131 | mb(); |
| 2132 | exit_geni_serial_earlyconsetup: |
| 2133 | return ret; |
| 2134 | } |
| 2135 | OF_EARLYCON_DECLARE(msm_geni_serial, "qcom,msm-geni-uart", |
| 2136 | msm_geni_serial_earlycon_setup); |
| 2137 | |
| 2138 | static int console_register(struct uart_driver *drv) |
| 2139 | { |
| 2140 | return uart_register_driver(drv); |
| 2141 | } |
| 2142 | static void console_unregister(struct uart_driver *drv) |
| 2143 | { |
| 2144 | uart_unregister_driver(drv); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2145 | } |
| 2146 | |
| 2147 | static struct console cons_ops = { |
| 2148 | .name = "ttyMSM", |
| 2149 | .write = msm_geni_serial_console_write, |
| 2150 | .device = uart_console_device, |
| 2151 | .setup = msm_geni_console_setup, |
| 2152 | .flags = CON_PRINTBUFFER, |
| 2153 | .index = -1, |
| 2154 | .data = &msm_geni_console_driver, |
| 2155 | }; |
| 2156 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2157 | static struct uart_driver msm_geni_console_driver = { |
| 2158 | .owner = THIS_MODULE, |
| 2159 | .driver_name = "msm_geni_console", |
| 2160 | .dev_name = "ttyMSM", |
| 2161 | .nr = GENI_UART_NR_PORTS, |
| 2162 | .cons = &cons_ops, |
| 2163 | }; |
| 2164 | #else |
| 2165 | static int console_register(struct uart_driver *drv) |
| 2166 | { |
| 2167 | return 0; |
| 2168 | } |
| 2169 | |
| 2170 | static void console_unregister(struct uart_driver *drv) |
| 2171 | { |
| 2172 | } |
| 2173 | #endif /* defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) */ |
| 2174 | |
Girish Mahadevan | efb8f6e | 2017-10-11 11:15:02 -0600 | [diff] [blame] | 2175 | static void msm_geni_serial_debug_init(struct uart_port *uport, bool console) |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2176 | { |
| 2177 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 2178 | |
| 2179 | msm_port->dbg = debugfs_create_dir(dev_name(uport->dev), NULL); |
| 2180 | if (IS_ERR_OR_NULL(msm_port->dbg)) |
| 2181 | dev_err(uport->dev, "Failed to create dbg dir\n"); |
Girish Mahadevan | efb8f6e | 2017-10-11 11:15:02 -0600 | [diff] [blame] | 2182 | |
| 2183 | if (!console) { |
| 2184 | char name[30]; |
| 2185 | |
| 2186 | memset(name, 0, sizeof(name)); |
| 2187 | if (!msm_port->ipc_log_rx) { |
| 2188 | scnprintf(name, sizeof(name), "%s%s", |
| 2189 | dev_name(uport->dev), "_rx"); |
| 2190 | msm_port->ipc_log_rx = ipc_log_context_create( |
| 2191 | IPC_LOG_TX_RX_PAGES, name, 0); |
| 2192 | if (!msm_port->ipc_log_rx) |
| 2193 | dev_info(uport->dev, "Err in Rx IPC Log\n"); |
| 2194 | } |
| 2195 | memset(name, 0, sizeof(name)); |
| 2196 | if (!msm_port->ipc_log_tx) { |
| 2197 | scnprintf(name, sizeof(name), "%s%s", |
| 2198 | dev_name(uport->dev), "_tx"); |
| 2199 | msm_port->ipc_log_tx = ipc_log_context_create( |
| 2200 | IPC_LOG_TX_RX_PAGES, name, 0); |
| 2201 | if (!msm_port->ipc_log_tx) |
| 2202 | dev_info(uport->dev, "Err in Tx IPC Log\n"); |
| 2203 | } |
| 2204 | memset(name, 0, sizeof(name)); |
| 2205 | if (!msm_port->ipc_log_pwr) { |
| 2206 | scnprintf(name, sizeof(name), "%s%s", |
| 2207 | dev_name(uport->dev), "_pwr"); |
| 2208 | msm_port->ipc_log_pwr = ipc_log_context_create( |
| 2209 | IPC_LOG_PWR_PAGES, name, 0); |
| 2210 | if (!msm_port->ipc_log_pwr) |
| 2211 | dev_info(uport->dev, "Err in Pwr IPC Log\n"); |
| 2212 | } |
| 2213 | memset(name, 0, sizeof(name)); |
| 2214 | if (!msm_port->ipc_log_misc) { |
| 2215 | scnprintf(name, sizeof(name), "%s%s", |
| 2216 | dev_name(uport->dev), "_misc"); |
| 2217 | msm_port->ipc_log_misc = ipc_log_context_create( |
| 2218 | IPC_LOG_MISC_PAGES, name, 0); |
| 2219 | if (!msm_port->ipc_log_misc) |
| 2220 | dev_info(uport->dev, "Err in Misc IPC Log\n"); |
| 2221 | } |
Girish Mahadevan | efb8f6e | 2017-10-11 11:15:02 -0600 | [diff] [blame] | 2222 | } |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2223 | } |
| 2224 | |
Karthikeyan Ramasubramanian | 22bdbaf | 2017-09-22 11:38:37 -0600 | [diff] [blame] | 2225 | static void msm_geni_serial_cons_pm(struct uart_port *uport, |
| 2226 | unsigned int new_state, unsigned int old_state) |
| 2227 | { |
| 2228 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 2229 | |
| 2230 | if (unlikely(!uart_console(uport))) |
| 2231 | return; |
| 2232 | |
| 2233 | if (new_state == UART_PM_STATE_ON && old_state == UART_PM_STATE_OFF) |
| 2234 | se_geni_resources_on(&msm_port->serial_rsc); |
| 2235 | else if (new_state == UART_PM_STATE_OFF && |
| 2236 | old_state == UART_PM_STATE_ON) |
| 2237 | se_geni_resources_off(&msm_port->serial_rsc); |
| 2238 | } |
| 2239 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2240 | static const struct uart_ops msm_geni_console_pops = { |
| 2241 | .tx_empty = msm_geni_serial_tx_empty, |
| 2242 | .stop_tx = msm_geni_serial_stop_tx, |
| 2243 | .start_tx = msm_geni_serial_start_tx, |
| 2244 | .stop_rx = msm_geni_serial_stop_rx, |
| 2245 | .set_termios = msm_geni_serial_set_termios, |
| 2246 | .startup = msm_geni_serial_startup, |
| 2247 | .config_port = msm_geni_serial_config_port, |
| 2248 | .shutdown = msm_geni_serial_shutdown, |
| 2249 | .type = msm_geni_serial_get_type, |
| 2250 | .set_mctrl = msm_geni_cons_set_mctrl, |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 2251 | .get_mctrl = msm_geni_cons_get_mctrl, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2252 | #ifdef CONFIG_CONSOLE_POLL |
| 2253 | .poll_get_char = msm_geni_serial_get_char, |
| 2254 | .poll_put_char = msm_geni_serial_poll_put_char, |
| 2255 | #endif |
Karthikeyan Ramasubramanian | 22bdbaf | 2017-09-22 11:38:37 -0600 | [diff] [blame] | 2256 | .pm = msm_geni_serial_cons_pm, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2257 | }; |
| 2258 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2259 | static const struct uart_ops msm_geni_serial_pops = { |
| 2260 | .tx_empty = msm_geni_serial_tx_empty, |
| 2261 | .stop_tx = msm_geni_serial_stop_tx, |
| 2262 | .start_tx = msm_geni_serial_start_tx, |
| 2263 | .stop_rx = msm_geni_serial_stop_rx, |
| 2264 | .set_termios = msm_geni_serial_set_termios, |
| 2265 | .startup = msm_geni_serial_startup, |
| 2266 | .config_port = msm_geni_serial_config_port, |
| 2267 | .shutdown = msm_geni_serial_shutdown, |
| 2268 | .type = msm_geni_serial_get_type, |
| 2269 | .set_mctrl = msm_geni_serial_set_mctrl, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2270 | .get_mctrl = msm_geni_serial_get_mctrl, |
| 2271 | .break_ctl = msm_geni_serial_break_ctl, |
| 2272 | .flush_buffer = NULL, |
| 2273 | .ioctl = msm_geni_serial_ioctl, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2274 | }; |
| 2275 | |
| 2276 | static const struct of_device_id msm_geni_device_tbl[] = { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2277 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2278 | { .compatible = "qcom,msm-geni-console", |
| 2279 | .data = (void *)&msm_geni_console_driver}, |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2280 | #endif |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2281 | { .compatible = "qcom,msm-geni-serial-hs", |
| 2282 | .data = (void *)&msm_geni_serial_hs_driver}, |
| 2283 | {}, |
| 2284 | }; |
| 2285 | |
| 2286 | static int msm_geni_serial_probe(struct platform_device *pdev) |
| 2287 | { |
| 2288 | int ret = 0; |
| 2289 | int line; |
| 2290 | struct msm_geni_serial_port *dev_port; |
| 2291 | struct uart_port *uport; |
| 2292 | struct resource *res; |
| 2293 | struct uart_driver *drv; |
| 2294 | const struct of_device_id *id; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2295 | bool is_console = false; |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 2296 | struct platform_device *wrapper_pdev; |
| 2297 | struct device_node *wrapper_ph_node; |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2298 | u32 wake_char = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2299 | |
| 2300 | id = of_match_device(msm_geni_device_tbl, &pdev->dev); |
| 2301 | if (id) { |
| 2302 | dev_dbg(&pdev->dev, "%s: %s\n", __func__, id->compatible); |
| 2303 | drv = (struct uart_driver *)id->data; |
| 2304 | } else { |
| 2305 | dev_err(&pdev->dev, "%s: No matching device found", __func__); |
| 2306 | return -ENODEV; |
| 2307 | } |
| 2308 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2309 | if (pdev->dev.of_node) { |
| 2310 | if (drv->cons) |
| 2311 | line = of_alias_get_id(pdev->dev.of_node, "serial"); |
| 2312 | else |
| 2313 | line = of_alias_get_id(pdev->dev.of_node, "hsuart"); |
| 2314 | } else { |
| 2315 | line = pdev->id; |
| 2316 | } |
| 2317 | |
| 2318 | if (line < 0) |
| 2319 | line = atomic_inc_return(&uart_line_id) - 1; |
| 2320 | |
| 2321 | if ((line < 0) || (line >= GENI_UART_NR_PORTS)) |
| 2322 | return -ENXIO; |
| 2323 | is_console = (drv->cons ? true : false); |
| 2324 | dev_port = get_port_from_line(line, is_console); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2325 | if (IS_ERR_OR_NULL(dev_port)) { |
| 2326 | ret = PTR_ERR(dev_port); |
| 2327 | dev_err(&pdev->dev, "Invalid line %d(%d)\n", |
| 2328 | line, ret); |
| 2329 | goto exit_geni_serial_probe; |
| 2330 | } |
| 2331 | |
| 2332 | uport = &dev_port->uport; |
| 2333 | |
| 2334 | /* Don't allow 2 drivers to access the same port */ |
| 2335 | if (uport->private_data) { |
| 2336 | ret = -ENODEV; |
| 2337 | goto exit_geni_serial_probe; |
| 2338 | } |
| 2339 | |
| 2340 | uport->dev = &pdev->dev; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 2341 | |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 2342 | wrapper_ph_node = of_parse_phandle(pdev->dev.of_node, |
| 2343 | "qcom,wrapper-core", 0); |
| 2344 | if (IS_ERR_OR_NULL(wrapper_ph_node)) { |
| 2345 | ret = PTR_ERR(wrapper_ph_node); |
| 2346 | goto exit_geni_serial_probe; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 2347 | } |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 2348 | wrapper_pdev = of_find_device_by_node(wrapper_ph_node); |
| 2349 | of_node_put(wrapper_ph_node); |
| 2350 | if (IS_ERR_OR_NULL(wrapper_pdev)) { |
| 2351 | ret = PTR_ERR(wrapper_pdev); |
| 2352 | goto exit_geni_serial_probe; |
| 2353 | } |
| 2354 | dev_port->wrapper_dev = &wrapper_pdev->dev; |
| 2355 | dev_port->serial_rsc.wrapper_dev = &wrapper_pdev->dev; |
| 2356 | ret = geni_se_resources_init(&dev_port->serial_rsc, UART_CORE2X_VOTE, |
| 2357 | (DEFAULT_SE_CLK * DEFAULT_BUS_WIDTH)); |
| 2358 | if (ret) |
| 2359 | goto exit_geni_serial_probe; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 2360 | |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2361 | if (of_property_read_u32(pdev->dev.of_node, "qcom,wakeup-byte", |
| 2362 | &wake_char)) { |
| 2363 | dev_dbg(&pdev->dev, "No Wakeup byte specified\n"); |
| 2364 | } else { |
| 2365 | dev_port->wakeup_byte = (u8)wake_char; |
| 2366 | dev_info(&pdev->dev, "Wakeup byte 0x%x\n", |
| 2367 | dev_port->wakeup_byte); |
| 2368 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2369 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2370 | dev_port->serial_rsc.se_clk = devm_clk_get(&pdev->dev, "se-clk"); |
| 2371 | if (IS_ERR(dev_port->serial_rsc.se_clk)) { |
| 2372 | ret = PTR_ERR(dev_port->serial_rsc.se_clk); |
| 2373 | dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); |
| 2374 | goto exit_geni_serial_probe; |
| 2375 | } |
| 2376 | |
| 2377 | dev_port->serial_rsc.m_ahb_clk = devm_clk_get(&pdev->dev, "m-ahb"); |
| 2378 | if (IS_ERR(dev_port->serial_rsc.m_ahb_clk)) { |
| 2379 | ret = PTR_ERR(dev_port->serial_rsc.m_ahb_clk); |
| 2380 | dev_err(&pdev->dev, "Err getting M AHB clk %d\n", ret); |
| 2381 | goto exit_geni_serial_probe; |
| 2382 | } |
| 2383 | |
| 2384 | dev_port->serial_rsc.s_ahb_clk = devm_clk_get(&pdev->dev, "s-ahb"); |
| 2385 | if (IS_ERR(dev_port->serial_rsc.s_ahb_clk)) { |
| 2386 | ret = PTR_ERR(dev_port->serial_rsc.s_ahb_clk); |
| 2387 | dev_err(&pdev->dev, "Err getting S AHB clk %d\n", ret); |
| 2388 | goto exit_geni_serial_probe; |
| 2389 | } |
| 2390 | |
| 2391 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "se_phys"); |
| 2392 | if (!res) { |
| 2393 | ret = -ENXIO; |
| 2394 | dev_err(&pdev->dev, "Err getting IO region\n"); |
| 2395 | goto exit_geni_serial_probe; |
| 2396 | } |
| 2397 | |
| 2398 | uport->mapbase = res->start; |
| 2399 | uport->membase = devm_ioremap(&pdev->dev, res->start, |
| 2400 | resource_size(res)); |
| 2401 | if (!uport->membase) { |
| 2402 | ret = -ENOMEM; |
| 2403 | dev_err(&pdev->dev, "Err IO mapping serial iomem"); |
| 2404 | goto exit_geni_serial_probe; |
| 2405 | } |
| 2406 | |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2407 | /* Optional to use the Rx pin as wakeup irq */ |
| 2408 | dev_port->wakeup_irq = platform_get_irq(pdev, 1); |
| 2409 | if ((dev_port->wakeup_irq < 0 && !is_console)) |
| 2410 | dev_info(&pdev->dev, "No wakeup IRQ configured\n"); |
| 2411 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2412 | dev_port->serial_rsc.geni_pinctrl = devm_pinctrl_get(&pdev->dev); |
| 2413 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_pinctrl)) { |
| 2414 | dev_err(&pdev->dev, "No pinctrl config specified!\n"); |
| 2415 | ret = PTR_ERR(dev_port->serial_rsc.geni_pinctrl); |
| 2416 | goto exit_geni_serial_probe; |
| 2417 | } |
| 2418 | dev_port->serial_rsc.geni_gpio_active = |
| 2419 | pinctrl_lookup_state(dev_port->serial_rsc.geni_pinctrl, |
| 2420 | PINCTRL_DEFAULT); |
| 2421 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_gpio_active)) { |
| 2422 | dev_err(&pdev->dev, "No default config specified!\n"); |
| 2423 | ret = PTR_ERR(dev_port->serial_rsc.geni_gpio_active); |
| 2424 | goto exit_geni_serial_probe; |
| 2425 | } |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2426 | |
| 2427 | /* |
| 2428 | * For clients who setup an Inband wakeup, leave the GPIO pins |
| 2429 | * always connected to the core, else move the pins to their |
| 2430 | * defined "sleep" state. |
| 2431 | */ |
| 2432 | if (dev_port->wakeup_irq > 0) { |
| 2433 | dev_port->serial_rsc.geni_gpio_sleep = |
| 2434 | dev_port->serial_rsc.geni_gpio_active; |
| 2435 | } else { |
| 2436 | dev_port->serial_rsc.geni_gpio_sleep = |
| 2437 | pinctrl_lookup_state(dev_port->serial_rsc.geni_pinctrl, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2438 | PINCTRL_SLEEP); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2439 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_gpio_sleep)) { |
| 2440 | dev_err(&pdev->dev, "No sleep config specified!\n"); |
| 2441 | ret = PTR_ERR(dev_port->serial_rsc.geni_gpio_sleep); |
| 2442 | goto exit_geni_serial_probe; |
| 2443 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2444 | } |
| 2445 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2446 | wakeup_source_init(&dev_port->geni_wake, dev_name(&pdev->dev)); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2447 | dev_port->tx_fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 2448 | dev_port->rx_fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 2449 | dev_port->tx_fifo_width = DEF_FIFO_WIDTH_BITS; |
| 2450 | uport->fifosize = |
| 2451 | ((dev_port->tx_fifo_depth * dev_port->tx_fifo_width) >> 3); |
| 2452 | |
| 2453 | uport->irq = platform_get_irq(pdev, 0); |
| 2454 | if (uport->irq < 0) { |
| 2455 | ret = uport->irq; |
| 2456 | dev_err(&pdev->dev, "Failed to get IRQ %d\n", ret); |
| 2457 | goto exit_geni_serial_probe; |
| 2458 | } |
| 2459 | |
| 2460 | uport->private_data = (void *)drv; |
| 2461 | platform_set_drvdata(pdev, dev_port); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2462 | if (is_console) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2463 | dev_port->handle_rx = handle_rx_console; |
| 2464 | dev_port->rx_fifo = devm_kzalloc(uport->dev, sizeof(u32), |
| 2465 | GFP_KERNEL); |
| 2466 | } else { |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 2467 | pm_runtime_set_suspended(&pdev->dev); |
Girish Mahadevan | c2b9252 | 2017-08-17 22:41:32 -0600 | [diff] [blame] | 2468 | pm_runtime_set_autosuspend_delay(&pdev->dev, 150); |
| 2469 | pm_runtime_use_autosuspend(&pdev->dev); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2470 | pm_runtime_enable(&pdev->dev); |
| 2471 | } |
| 2472 | |
| 2473 | dev_info(&pdev->dev, "Serial port%d added.FifoSize %d is_console%d\n", |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2474 | line, uport->fifosize, is_console); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2475 | device_create_file(uport->dev, &dev_attr_loopback); |
Karthikeyan Ramasubramanian | 8ec770cf | 2017-04-20 15:29:09 -0600 | [diff] [blame] | 2476 | device_create_file(uport->dev, &dev_attr_xfer_mode); |
Girish Mahadevan | efb8f6e | 2017-10-11 11:15:02 -0600 | [diff] [blame] | 2477 | msm_geni_serial_debug_init(uport, is_console); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2478 | dev_port->port_setup = false; |
| 2479 | return uart_add_one_port(drv, uport); |
| 2480 | |
| 2481 | exit_geni_serial_probe: |
| 2482 | return ret; |
| 2483 | } |
| 2484 | |
| 2485 | static int msm_geni_serial_remove(struct platform_device *pdev) |
| 2486 | { |
| 2487 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 2488 | struct uart_driver *drv = |
| 2489 | (struct uart_driver *)port->uport.private_data; |
| 2490 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2491 | wakeup_source_trash(&port->geni_wake); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2492 | uart_remove_one_port(drv, &port->uport); |
| 2493 | return 0; |
| 2494 | } |
| 2495 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2496 | |
| 2497 | #ifdef CONFIG_PM |
| 2498 | static int msm_geni_serial_runtime_suspend(struct device *dev) |
| 2499 | { |
| 2500 | struct platform_device *pdev = to_platform_device(dev); |
| 2501 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2502 | int ret = 0; |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2503 | u32 uart_manual_rfr = 0; |
| 2504 | u32 geni_status = geni_read_reg_nolog(port->uport.membase, |
| 2505 | SE_GENI_STATUS); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2506 | |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2507 | wait_for_transfers_inflight(&port->uport); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2508 | /* |
| 2509 | * Disable Interrupt |
| 2510 | * Manual RFR On. |
| 2511 | * Stop Rx. |
| 2512 | * Resources off |
| 2513 | */ |
Girish Mahadevan | 51fc9d4 | 2017-10-12 18:37:52 -0600 | [diff] [blame] | 2514 | disable_irq(port->uport.irq); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2515 | /* |
| 2516 | * If the clients haven't done a manual flow on/off then go ahead and |
| 2517 | * set this to manual flow on. |
| 2518 | */ |
| 2519 | if (!port->manual_flow) { |
| 2520 | uart_manual_rfr |= (UART_MANUAL_RFR_EN | UART_RFR_READY); |
| 2521 | geni_write_reg_nolog(uart_manual_rfr, port->uport.membase, |
| 2522 | SE_UART_MANUAL_RFR); |
| 2523 | /* |
| 2524 | * Ensure that the manual flow on writes go through before |
| 2525 | * doing a stop_rx else we could end up flowing off the peer. |
| 2526 | */ |
| 2527 | mb(); |
| 2528 | } |
| 2529 | stop_rx_sequencer(&port->uport); |
| 2530 | if ((geni_status & M_GENI_CMD_ACTIVE)) |
| 2531 | stop_tx_sequencer(&port->uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2532 | ret = se_geni_resources_off(&port->serial_rsc); |
| 2533 | if (ret) { |
| 2534 | dev_err(dev, "%s: Error ret %d\n", __func__, ret); |
| 2535 | goto exit_runtime_suspend; |
| 2536 | } |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2537 | if (port->wakeup_irq > 0) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2538 | port->edge_count = 0; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2539 | enable_irq(port->wakeup_irq); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2540 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 2541 | IPC_LOG_MSG(port->ipc_log_pwr, "%s:\n", __func__); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2542 | __pm_relax(&port->geni_wake); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2543 | exit_runtime_suspend: |
| 2544 | return ret; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2545 | } |
| 2546 | |
| 2547 | static int msm_geni_serial_runtime_resume(struct device *dev) |
| 2548 | { |
| 2549 | struct platform_device *pdev = to_platform_device(dev); |
| 2550 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2551 | int ret = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2552 | |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2553 | /* |
| 2554 | * Do an unconditional relax followed by a stay awake in case the |
| 2555 | * wake source is activated by the wakeup isr. |
| 2556 | */ |
| 2557 | __pm_relax(&port->geni_wake); |
| 2558 | __pm_stay_awake(&port->geni_wake); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2559 | if (port->wakeup_irq > 0) |
| 2560 | disable_irq(port->wakeup_irq); |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2561 | /* |
| 2562 | * Resources On. |
| 2563 | * Start Rx. |
| 2564 | * Auto RFR. |
| 2565 | * Enable IRQ. |
| 2566 | */ |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2567 | ret = se_geni_resources_on(&port->serial_rsc); |
| 2568 | if (ret) { |
| 2569 | dev_err(dev, "%s: Error ret %d\n", __func__, ret); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2570 | __pm_relax(&port->geni_wake); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2571 | goto exit_runtime_resume; |
| 2572 | } |
Girish Mahadevan | 6d97cbc | 2017-11-07 15:28:27 -0700 | [diff] [blame] | 2573 | start_rx_sequencer(&port->uport); |
| 2574 | if (!port->manual_flow) |
| 2575 | geni_write_reg_nolog(0, port->uport.membase, |
| 2576 | SE_UART_MANUAL_RFR); |
| 2577 | /* Ensure that the Rx is running before enabling interrupts */ |
| 2578 | mb(); |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2579 | enable_irq(port->uport.irq); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 2580 | IPC_LOG_MSG(port->ipc_log_pwr, "%s:\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2581 | exit_runtime_resume: |
| 2582 | return ret; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2583 | } |
| 2584 | |
| 2585 | static int msm_geni_serial_sys_suspend_noirq(struct device *dev) |
| 2586 | { |
| 2587 | struct platform_device *pdev = to_platform_device(dev); |
| 2588 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 2589 | struct uart_port *uport = &port->uport; |
| 2590 | |
| 2591 | if (uart_console(uport)) { |
| 2592 | uart_suspend_port((struct uart_driver *)uport->private_data, |
| 2593 | uport); |
| 2594 | } else { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2595 | struct uart_state *state = uport->state; |
| 2596 | struct tty_port *tty_port = &state->port; |
| 2597 | |
| 2598 | mutex_lock(&tty_port->mutex); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2599 | if (!pm_runtime_status_suspended(dev)) { |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2600 | dev_err(dev, "%s:Active userspace vote; ioctl_cnt %d\n", |
| 2601 | __func__, port->ioctl_count); |
| 2602 | IPC_LOG_MSG(port->ipc_log_pwr, |
| 2603 | "%s:Active userspace vote; ioctl_cnt %d\n", |
| 2604 | __func__, port->ioctl_count); |
| 2605 | mutex_unlock(&tty_port->mutex); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2606 | return -EBUSY; |
| 2607 | } |
Girish Mahadevan | 736892d | 2017-07-14 15:20:58 -0600 | [diff] [blame] | 2608 | mutex_unlock(&tty_port->mutex); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2609 | } |
| 2610 | return 0; |
| 2611 | } |
| 2612 | |
| 2613 | static int msm_geni_serial_sys_resume_noirq(struct device *dev) |
| 2614 | { |
| 2615 | struct platform_device *pdev = to_platform_device(dev); |
| 2616 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 2617 | struct uart_port *uport = &port->uport; |
| 2618 | |
Karthikeyan Ramasubramanian | 29d76c2 | 2017-07-19 10:55:49 -0600 | [diff] [blame] | 2619 | if (uart_console(uport) && |
| 2620 | console_suspend_enabled && uport->suspended) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2621 | uart_resume_port((struct uart_driver *)uport->private_data, |
| 2622 | uport); |
Karthikeyan Ramasubramanian | 53157c5 | 2017-08-11 17:06:24 -0600 | [diff] [blame] | 2623 | disable_irq(uport->irq); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 2624 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2625 | return 0; |
| 2626 | } |
| 2627 | #else |
| 2628 | static int msm_geni_serial_runtime_suspend(struct device *dev) |
| 2629 | { |
| 2630 | return 0; |
| 2631 | } |
| 2632 | |
| 2633 | static int msm_geni_serial_runtime_resume(struct device *dev) |
| 2634 | { |
| 2635 | return 0; |
| 2636 | } |
| 2637 | |
| 2638 | static int msm_geni_serial_sys_suspend_noirq(struct device *dev) |
| 2639 | { |
| 2640 | return 0; |
| 2641 | } |
| 2642 | |
| 2643 | static int msm_geni_serial_sys_resume_noirq(struct device *dev) |
| 2644 | { |
| 2645 | return 0; |
| 2646 | } |
| 2647 | #endif |
| 2648 | |
| 2649 | static const struct dev_pm_ops msm_geni_serial_pm_ops = { |
| 2650 | .runtime_suspend = msm_geni_serial_runtime_suspend, |
| 2651 | .runtime_resume = msm_geni_serial_runtime_resume, |
| 2652 | .suspend_noirq = msm_geni_serial_sys_suspend_noirq, |
| 2653 | .resume_noirq = msm_geni_serial_sys_resume_noirq, |
| 2654 | }; |
| 2655 | |
| 2656 | static const struct of_device_id msm_geni_serial_match_table[] = { |
| 2657 | { .compatible = "qcom,msm-geni-uart"}, |
| 2658 | {}, |
| 2659 | }; |
| 2660 | |
| 2661 | static struct platform_driver msm_geni_serial_platform_driver = { |
| 2662 | .remove = msm_geni_serial_remove, |
| 2663 | .probe = msm_geni_serial_probe, |
| 2664 | .driver = { |
| 2665 | .name = "msm_geni_serial", |
| 2666 | .of_match_table = msm_geni_serial_match_table, |
| 2667 | .pm = &msm_geni_serial_pm_ops, |
| 2668 | }, |
| 2669 | }; |
| 2670 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2671 | |
| 2672 | static struct uart_driver msm_geni_serial_hs_driver = { |
| 2673 | .owner = THIS_MODULE, |
| 2674 | .driver_name = "msm_geni_serial_hs", |
| 2675 | .dev_name = "ttyHS", |
| 2676 | .nr = GENI_UART_NR_PORTS, |
| 2677 | }; |
| 2678 | |
| 2679 | static int __init msm_geni_serial_init(void) |
| 2680 | { |
| 2681 | int ret = 0; |
| 2682 | int i; |
| 2683 | |
| 2684 | for (i = 0; i < GENI_UART_NR_PORTS; i++) { |
| 2685 | msm_geni_serial_ports[i].uport.iotype = UPIO_MEM; |
| 2686 | msm_geni_serial_ports[i].uport.ops = &msm_geni_serial_pops; |
| 2687 | msm_geni_serial_ports[i].uport.flags = UPF_BOOT_AUTOCONF; |
| 2688 | msm_geni_serial_ports[i].uport.line = i; |
| 2689 | } |
| 2690 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 2691 | for (i = 0; i < GENI_UART_CONS_PORTS; i++) { |
| 2692 | msm_geni_console_port.uport.iotype = UPIO_MEM; |
| 2693 | msm_geni_console_port.uport.ops = &msm_geni_console_pops; |
| 2694 | msm_geni_console_port.uport.flags = UPF_BOOT_AUTOCONF; |
| 2695 | msm_geni_console_port.uport.line = i; |
| 2696 | } |
| 2697 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2698 | ret = console_register(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2699 | if (ret) |
| 2700 | return ret; |
| 2701 | |
| 2702 | ret = uart_register_driver(&msm_geni_serial_hs_driver); |
| 2703 | if (ret) { |
| 2704 | uart_unregister_driver(&msm_geni_console_driver); |
| 2705 | return ret; |
| 2706 | } |
| 2707 | |
| 2708 | ret = platform_driver_register(&msm_geni_serial_platform_driver); |
| 2709 | if (ret) { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2710 | console_unregister(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2711 | uart_unregister_driver(&msm_geni_serial_hs_driver); |
| 2712 | return ret; |
| 2713 | } |
| 2714 | |
| 2715 | pr_info("%s: Driver initialized", __func__); |
| 2716 | return ret; |
| 2717 | } |
| 2718 | module_init(msm_geni_serial_init); |
| 2719 | |
| 2720 | static void __exit msm_geni_serial_exit(void) |
| 2721 | { |
| 2722 | platform_driver_unregister(&msm_geni_serial_platform_driver); |
| 2723 | uart_unregister_driver(&msm_geni_serial_hs_driver); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2724 | console_unregister(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2725 | } |
| 2726 | module_exit(msm_geni_serial_exit); |
| 2727 | |
| 2728 | MODULE_DESCRIPTION("Serial driver for GENI based QTI serial cores"); |
| 2729 | MODULE_LICENSE("GPL v2"); |
| 2730 | MODULE_ALIAS("tty:msm_geni_geni_serial"); |