blob: be39e5456d7e2b55085d68a857c9c8b6e307e9ae [file] [log] [blame]
Deepak Katragadda7b16dba2016-08-05 18:06:30 -07001/*
2 * Copyright (c) 2016, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14&soc {
15 /* GDSCs in Global CC */
16 pcie_0_gdsc: qcom,gdsc@0x16b004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070017 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070018 regulator-name = "pcie_0_gdsc";
19 reg = <0x16b004 0x4>;
20 status = "disabled";
21 };
22
23 pcie_1_gdsc: qcom,gdsc@0x18d004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070024 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070025 regulator-name = "pcie_1_gdsc";
26 reg = <0x18d004 0x4>;
27 status = "disabled";
28 };
29
30 ufs_card_gdsc: qcom,gdsc@0x175004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070031 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070032 regulator-name = "ufs_card_gdsc";
33 reg = <0x175004 0x4>;
34 status = "disabled";
35 };
36
37 ufs_phy_gdsc: qcom,gdsc@0x177004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070038 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070039 regulator-name = "ufs_phy_gdsc";
40 reg = <0x177004 0x4>;
41 status = "disabled";
42 };
43
44 usb30_prim_gdsc: qcom,gdsc@0x10f004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070045 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070046 regulator-name = "usb30_prim_gdsc";
47 reg = <0x10f004 0x4>;
48 status = "disabled";
49 };
50
51 usb30_sec_gdsc: qcom,gdsc@0x110004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070052 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070053 regulator-name = "usb30_sec_gdsc";
54 reg = <0x110004 0x4>;
55 status = "disabled";
56 };
57
58 hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc: qcom,gdsc@0x17d030 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070059 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070060 regulator-name = "hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc";
61 reg = <0x17d030 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070062 qcom,no-status-check-on-disable;
63 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070064 status = "disabled";
65 };
66
67 hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc: qcom,gdsc@0x17d03c {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070068 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070069 regulator-name = "hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc";
70 reg = <0x17d03c 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070071 qcom,no-status-check-on-disable;
72 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070073 status = "disabled";
74 };
75
76 hlos1_vote_aggre_noc_mmu_tbu1_gdsc: qcom,gdsc@0x17d034 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070077 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070078 regulator-name = "hlos1_vote_aggre_noc_mmu_tbu1_gdsc";
79 reg = <0x17d034 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070080 qcom,no-status-check-on-disable;
81 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070082 status = "disabled";
83 };
84
85 hlos1_vote_aggre_noc_mmu_tbu2_gdsc: qcom,gdsc@0x17d038 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070086 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070087 regulator-name = "hlos1_vote_aggre_noc_mmu_tbu2_gdsc";
88 reg = <0x17d038 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070089 qcom,no-status-check-on-disable;
90 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070091 status = "disabled";
92 };
93
94 hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc: qcom,gdsc@0x17d040 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070095 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -070096 regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc";
97 reg = <0x17d040 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -070098 qcom,no-status-check-on-disable;
99 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700100 status = "disabled";
101 };
102
103 hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc: qcom,gdsc@0x17d048 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700104 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700105 regulator-name = "hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc";
106 reg = <0x17d048 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700107 qcom,no-status-check-on-disable;
108 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700109 status = "disabled";
110 };
111
112 hlos1_vote_mmnoc_mmu_tbu_sf_gdsc: qcom,gdsc@0x17d044 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700113 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700114 regulator-name = "hlos1_vote_mmnoc_mmu_tbu_sf_gdsc";
115 reg = <0x17d044 0x4>;
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700116 qcom,no-status-check-on-disable;
117 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700118 status = "disabled";
119 };
120
121 /* GDSCs in Camera CC */
122 bps_gdsc: qcom,gdsc@0xad06004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700123 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700124 regulator-name = "bps_gdsc";
125 reg = <0xad06004 0x4>;
126 status = "disabled";
127 };
128
129 ife_0_gdsc: qcom,gdsc@0xad09004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700130 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700131 regulator-name = "ife_0_gdsc";
132 reg = <0xad09004 0x4>;
133 status = "disabled";
134 };
135
136 ife_1_gdsc: qcom,gdsc@0xad0a004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700137 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700138 regulator-name = "ife_1_gdsc";
139 reg = <0xad0a004 0x4>;
140 status = "disabled";
141 };
142
143 ipe_0_gdsc: qcom,gdsc@0xad07004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700144 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700145 regulator-name = "ipe_0_gdsc";
146 reg = <0xad07004 0x4>;
147 status = "disabled";
148 };
149
150 ipe_1_gdsc: qcom,gdsc@0xad08004 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700151 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700152 regulator-name = "ipe_1_gdsc";
153 reg = <0xad08004 0x4>;
154 status = "disabled";
155 };
156
157 titan_top_gdsc: qcom,gdsc@0xad0b134 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700158 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700159 regulator-name = "titan_top_gdsc";
160 reg = <0xad0b134 0x4>;
161 status = "disabled";
162 };
163
164 /* GDSCs in Display CC */
165 mdss_core_gdsc: qcom,gdsc@0xaf03000 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700166 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700167 regulator-name = "mdss_core_gdsc";
168 reg = <0xaf03000 0x4>;
169 status = "disabled";
170 };
171
172 /* GDSCs in Graphics CC */
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700173 gpu_cx_hw_ctrl: syscon@0x5091540 {
174 compatible = "syscon";
175 reg = <0x5091540 0x4>;
176 };
177
178 gpu_cx_gdsc: qcom,gdsc@0x509106c {
179 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700180 regulator-name = "gpu_cx_gdsc";
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700181 reg = <0x509106c 0x4>;
182 hw-ctrl-addr = <&gpu_cx_hw_ctrl>;
183 qcom,no-status-check-on-disable;
184 qcom,gds-timeout = <500>;
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700185 status = "disabled";
186 };
187
188 /* GDSCs in Video CC */
189 vcodec0_gdsc: qcom,gdsc@0xab00874 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700190 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700191 regulator-name = "vcodec0_gdsc";
192 reg = <0xab00874 0x4>;
193 status = "disabled";
194 };
195
196 vcodec1_gdsc: qcom,gdsc@0xab008b4 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700197 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700198 regulator-name = "vcodec1_gdsc";
199 reg = <0xab008b4 0x4>;
200 status = "disabled";
201 };
202
203 venus_gdsc: qcom,gdsc@0xab00814 {
Deepak Katragadda61d6ed82016-10-05 15:49:03 -0700204 compatible = "qcom,gdsc";
Deepak Katragadda7b16dba2016-08-05 18:06:30 -0700205 regulator-name = "venus_gdsc";
206 reg = <0xab00814 0x4>;
207 status = "disabled";
208 };
209};