Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
| 3 | * Copyright (c) 2007-2008 Intel Corporation |
| 4 | * Jesse Barnes <jesse.barnes@intel.com> |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 5 | * Copyright 2010 Red Hat, Inc. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 6 | * |
| 7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
| 8 | * FB layer. |
| 9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> |
| 10 | * |
| 11 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 12 | * copy of this software and associated documentation files (the "Software"), |
| 13 | * to deal in the Software without restriction, including without limitation |
| 14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
| 15 | * and/or sell copies of the Software, and to permit persons to whom the |
| 16 | * Software is furnished to do so, subject to the following conditions: |
| 17 | * |
| 18 | * The above copyright notice and this permission notice (including the |
| 19 | * next paragraph) shall be included in all copies or substantial portions |
| 20 | * of the Software. |
| 21 | * |
| 22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 28 | * DEALINGS IN THE SOFTWARE. |
| 29 | */ |
| 30 | #include <linux/kernel.h> |
| 31 | #include <linux/i2c.h> |
| 32 | #include <linux/i2c-algo-bit.h> |
| 33 | #include "drmP.h" |
| 34 | #include "drm_edid.h" |
| 35 | |
| 36 | /* |
| 37 | * TODO: |
| 38 | * - support EDID 1.4 (incl. CE blocks) |
| 39 | */ |
| 40 | |
| 41 | /* |
| 42 | * EDID blocks out in the wild have a variety of bugs, try to collect |
| 43 | * them here (note that userspace may work around broken monitors first, |
| 44 | * but fixes should make their way here so that the kernel "just works" |
| 45 | * on as many displays as possible). |
| 46 | */ |
| 47 | |
| 48 | /* First detailed mode wrong, use largest 60Hz mode */ |
| 49 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
| 50 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
| 51 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
| 52 | /* Prefer the largest mode at 75 Hz */ |
| 53 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
| 54 | /* Detail timing is in cm not mm */ |
| 55 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
| 56 | /* Detailed timing descriptors have bogus size values, so just take the |
| 57 | * maximum size and use that. |
| 58 | */ |
| 59 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
| 60 | /* Monitor forgot to set the first detailed is preferred bit. */ |
| 61 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
| 62 | /* use +hsync +vsync for detailed mode */ |
| 63 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 64 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 65 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 66 | #define LEVEL_DMT 0 |
| 67 | #define LEVEL_GTF 1 |
| 68 | #define LEVEL_CVT 2 |
| 69 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 70 | static struct edid_quirk { |
| 71 | char *vendor; |
| 72 | int product_id; |
| 73 | u32 quirks; |
| 74 | } edid_quirk_list[] = { |
| 75 | /* Acer AL1706 */ |
| 76 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
| 77 | /* Acer F51 */ |
| 78 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
| 79 | /* Unknown Acer */ |
| 80 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 81 | |
| 82 | /* Belinea 10 15 55 */ |
| 83 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
| 84 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
| 85 | |
| 86 | /* Envision Peripherals, Inc. EN-7100e */ |
| 87 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
| 88 | |
| 89 | /* Funai Electronics PM36B */ |
| 90 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
| 91 | EDID_QUIRK_DETAILED_IN_CM }, |
| 92 | |
| 93 | /* LG Philips LCD LP154W01-A5 */ |
| 94 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
| 95 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
| 96 | |
| 97 | /* Philips 107p5 CRT */ |
| 98 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 99 | |
| 100 | /* Proview AY765C */ |
| 101 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 102 | |
| 103 | /* Samsung SyncMaster 205BW. Note: irony */ |
| 104 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
| 105 | /* Samsung SyncMaster 22[5-6]BW */ |
| 106 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
| 107 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
| 108 | }; |
| 109 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 110 | /*** DDC fetch and block validation ***/ |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 111 | |
Adam Jackson | 083ae05 | 2009-09-23 17:30:45 -0400 | [diff] [blame] | 112 | static const u8 edid_header[] = { |
| 113 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
| 114 | }; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 115 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 116 | /* |
| 117 | * Sanity check the EDID block (base or extension). Return 0 if the block |
| 118 | * doesn't check out, or 1 if it's valid. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 119 | */ |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 120 | static bool |
| 121 | drm_edid_block_valid(u8 *raw_edid) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 122 | { |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 123 | int i; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 124 | u8 csum = 0; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 125 | struct edid *edid = (struct edid *)raw_edid; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 126 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 127 | if (raw_edid[0] == 0x00) { |
| 128 | int score = 0; |
Adam Jackson | 862b89c | 2009-11-23 14:23:06 -0500 | [diff] [blame] | 129 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 130 | for (i = 0; i < sizeof(edid_header); i++) |
| 131 | if (raw_edid[i] == edid_header[i]) |
| 132 | score++; |
| 133 | |
| 134 | if (score == 8) ; |
| 135 | else if (score >= 6) { |
| 136 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
| 137 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
| 138 | } else { |
| 139 | goto bad; |
| 140 | } |
| 141 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 142 | |
| 143 | for (i = 0; i < EDID_LENGTH; i++) |
| 144 | csum += raw_edid[i]; |
| 145 | if (csum) { |
| 146 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
| 147 | goto bad; |
| 148 | } |
| 149 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 150 | /* per-block-type checks */ |
| 151 | switch (raw_edid[0]) { |
| 152 | case 0: /* base */ |
| 153 | if (edid->version != 1) { |
| 154 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
| 155 | goto bad; |
| 156 | } |
Adam Jackson | 862b89c | 2009-11-23 14:23:06 -0500 | [diff] [blame] | 157 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 158 | if (edid->revision > 4) |
| 159 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
| 160 | break; |
| 161 | |
| 162 | default: |
| 163 | break; |
| 164 | } |
Adam Jackson | 47ee4cc | 2009-11-23 14:23:05 -0500 | [diff] [blame] | 165 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 166 | return 1; |
| 167 | |
| 168 | bad: |
| 169 | if (raw_edid) { |
| 170 | DRM_ERROR("Raw EDID:\n"); |
| 171 | print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); |
| 172 | printk("\n"); |
| 173 | } |
| 174 | return 0; |
| 175 | } |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 176 | |
| 177 | /** |
| 178 | * drm_edid_is_valid - sanity check EDID data |
| 179 | * @edid: EDID data |
| 180 | * |
| 181 | * Sanity-check an entire EDID record (including extensions) |
| 182 | */ |
| 183 | bool drm_edid_is_valid(struct edid *edid) |
| 184 | { |
| 185 | int i; |
| 186 | u8 *raw = (u8 *)edid; |
| 187 | |
| 188 | if (!edid) |
| 189 | return false; |
| 190 | |
| 191 | for (i = 0; i <= edid->extensions; i++) |
| 192 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) |
| 193 | return false; |
| 194 | |
| 195 | return true; |
| 196 | } |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 197 | EXPORT_SYMBOL(drm_edid_is_valid); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 198 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame^] | 199 | #define DDC_ADDR 0x50 |
| 200 | #define DDC_SEGMENT_ADDR 0x30 |
| 201 | /** |
| 202 | * Get EDID information via I2C. |
| 203 | * |
| 204 | * \param adapter : i2c device adaptor |
| 205 | * \param buf : EDID data buffer to be filled |
| 206 | * \param len : EDID data buffer length |
| 207 | * \return 0 on success or -1 on failure. |
| 208 | * |
| 209 | * Try to fetch EDID information by calling i2c driver function. |
| 210 | */ |
| 211 | static int |
| 212 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
| 213 | int block, int len) |
| 214 | { |
| 215 | unsigned char start = block * EDID_LENGTH; |
| 216 | struct i2c_msg msgs[] = { |
| 217 | { |
| 218 | .addr = DDC_ADDR, |
| 219 | .flags = 0, |
| 220 | .len = 1, |
| 221 | .buf = &start, |
| 222 | }, { |
| 223 | .addr = DDC_ADDR, |
| 224 | .flags = I2C_M_RD, |
| 225 | .len = len, |
| 226 | .buf = buf + start, |
| 227 | } |
| 228 | }; |
| 229 | |
| 230 | if (i2c_transfer(adapter, msgs, 2) == 2) |
| 231 | return 0; |
| 232 | |
| 233 | return -1; |
| 234 | } |
| 235 | |
| 236 | static u8 * |
| 237 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
| 238 | { |
| 239 | int i, j = 0; |
| 240 | u8 *block, *new; |
| 241 | |
| 242 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
| 243 | return NULL; |
| 244 | |
| 245 | /* base block fetch */ |
| 246 | for (i = 0; i < 4; i++) { |
| 247 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
| 248 | goto out; |
| 249 | if (drm_edid_block_valid(block)) |
| 250 | break; |
| 251 | } |
| 252 | if (i == 4) |
| 253 | goto carp; |
| 254 | |
| 255 | /* if there's no extensions, we're done */ |
| 256 | if (block[0x7e] == 0) |
| 257 | return block; |
| 258 | |
| 259 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
| 260 | if (!new) |
| 261 | goto out; |
| 262 | block = new; |
| 263 | |
| 264 | for (j = 1; j <= block[0x7e]; j++) { |
| 265 | for (i = 0; i < 4; i++) { |
| 266 | if (drm_do_probe_ddc_edid(adapter, block, j, |
| 267 | EDID_LENGTH)) |
| 268 | goto out; |
| 269 | if (drm_edid_block_valid(block + j * EDID_LENGTH)) |
| 270 | break; |
| 271 | } |
| 272 | if (i == 4) |
| 273 | goto carp; |
| 274 | } |
| 275 | |
| 276 | return block; |
| 277 | |
| 278 | carp: |
| 279 | dev_warn(&connector->dev->pdev->dev, "%s: EDID block %d invalid.\n", |
| 280 | drm_get_connector_name(connector), j); |
| 281 | |
| 282 | out: |
| 283 | kfree(block); |
| 284 | return NULL; |
| 285 | } |
| 286 | |
| 287 | /** |
| 288 | * Probe DDC presence. |
| 289 | * |
| 290 | * \param adapter : i2c device adaptor |
| 291 | * \return 1 on success |
| 292 | */ |
| 293 | static bool |
| 294 | drm_probe_ddc(struct i2c_adapter *adapter) |
| 295 | { |
| 296 | unsigned char out; |
| 297 | |
| 298 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
| 299 | } |
| 300 | |
| 301 | /** |
| 302 | * drm_get_edid - get EDID data, if available |
| 303 | * @connector: connector we're probing |
| 304 | * @adapter: i2c adapter to use for DDC |
| 305 | * |
| 306 | * Poke the given i2c channel to grab EDID data if possible. If found, |
| 307 | * attach it to the connector. |
| 308 | * |
| 309 | * Return edid data or NULL if we couldn't find any. |
| 310 | */ |
| 311 | struct edid *drm_get_edid(struct drm_connector *connector, |
| 312 | struct i2c_adapter *adapter) |
| 313 | { |
| 314 | struct edid *edid = NULL; |
| 315 | |
| 316 | if (drm_probe_ddc(adapter)) |
| 317 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
| 318 | |
| 319 | connector->display_info.raw_edid = (char *)edid; |
| 320 | |
| 321 | return edid; |
| 322 | |
| 323 | } |
| 324 | EXPORT_SYMBOL(drm_get_edid); |
| 325 | |
| 326 | /*** EDID parsing ***/ |
| 327 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 328 | /** |
| 329 | * edid_vendor - match a string against EDID's obfuscated vendor field |
| 330 | * @edid: EDID to match |
| 331 | * @vendor: vendor string |
| 332 | * |
| 333 | * Returns true if @vendor is in @edid, false otherwise |
| 334 | */ |
| 335 | static bool edid_vendor(struct edid *edid, char *vendor) |
| 336 | { |
| 337 | char edid_vendor[3]; |
| 338 | |
| 339 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
| 340 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
| 341 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
Dave Airlie | 16456c8 | 2009-04-03 09:10:33 +1000 | [diff] [blame] | 342 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 343 | |
| 344 | return !strncmp(edid_vendor, vendor, 3); |
| 345 | } |
| 346 | |
| 347 | /** |
| 348 | * edid_get_quirks - return quirk flags for a given EDID |
| 349 | * @edid: EDID to process |
| 350 | * |
| 351 | * This tells subsequent routines what fixes they need to apply. |
| 352 | */ |
| 353 | static u32 edid_get_quirks(struct edid *edid) |
| 354 | { |
| 355 | struct edid_quirk *quirk; |
| 356 | int i; |
| 357 | |
| 358 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
| 359 | quirk = &edid_quirk_list[i]; |
| 360 | |
| 361 | if (edid_vendor(edid, quirk->vendor) && |
| 362 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
| 363 | return quirk->quirks; |
| 364 | } |
| 365 | |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
| 370 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) |
| 371 | |
| 372 | |
| 373 | /** |
| 374 | * edid_fixup_preferred - set preferred modes based on quirk list |
| 375 | * @connector: has mode list to fix up |
| 376 | * @quirks: quirks list |
| 377 | * |
| 378 | * Walk the mode list for @connector, clearing the preferred status |
| 379 | * on existing modes and setting it anew for the right mode ala @quirks. |
| 380 | */ |
| 381 | static void edid_fixup_preferred(struct drm_connector *connector, |
| 382 | u32 quirks) |
| 383 | { |
| 384 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
Dave Airlie | f890607 | 2008-12-18 16:59:02 +1000 | [diff] [blame] | 385 | int target_refresh = 0; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 386 | |
| 387 | if (list_empty(&connector->probed_modes)) |
| 388 | return; |
| 389 | |
| 390 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
| 391 | target_refresh = 60; |
| 392 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
| 393 | target_refresh = 75; |
| 394 | |
| 395 | preferred_mode = list_first_entry(&connector->probed_modes, |
| 396 | struct drm_display_mode, head); |
| 397 | |
| 398 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
| 399 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
| 400 | |
| 401 | if (cur_mode == preferred_mode) |
| 402 | continue; |
| 403 | |
| 404 | /* Largest mode is preferred */ |
| 405 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
| 406 | preferred_mode = cur_mode; |
| 407 | |
| 408 | /* At a given size, try to get closest to target refresh */ |
| 409 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
| 410 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < |
| 411 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { |
| 412 | preferred_mode = cur_mode; |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 417 | } |
| 418 | |
Zhao Yakui | aa9eaa1 | 2009-09-03 09:33:46 +0800 | [diff] [blame] | 419 | /* |
| 420 | * Add the Autogenerated from the DMT spec. |
| 421 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
| 422 | * But the mode with Reduced blank feature is deleted. |
| 423 | */ |
| 424 | static struct drm_display_mode drm_dmt_modes[] = { |
| 425 | /* 640x350@85Hz */ |
| 426 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
| 427 | 736, 832, 0, 350, 382, 385, 445, 0, |
| 428 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 429 | /* 640x400@85Hz */ |
| 430 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
| 431 | 736, 832, 0, 400, 401, 404, 445, 0, |
| 432 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 433 | /* 720x400@85Hz */ |
| 434 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
| 435 | 828, 936, 0, 400, 401, 404, 446, 0, |
| 436 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 437 | /* 640x480@60Hz */ |
| 438 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
| 439 | 752, 800, 0, 480, 489, 492, 525, 0, |
| 440 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 441 | /* 640x480@72Hz */ |
| 442 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
| 443 | 704, 832, 0, 480, 489, 492, 520, 0, |
| 444 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 445 | /* 640x480@75Hz */ |
| 446 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
| 447 | 720, 840, 0, 480, 481, 484, 500, 0, |
| 448 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 449 | /* 640x480@85Hz */ |
| 450 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
| 451 | 752, 832, 0, 480, 481, 484, 509, 0, |
| 452 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 453 | /* 800x600@56Hz */ |
| 454 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
| 455 | 896, 1024, 0, 600, 601, 603, 625, 0, |
| 456 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 457 | /* 800x600@60Hz */ |
| 458 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
| 459 | 968, 1056, 0, 600, 601, 605, 628, 0, |
| 460 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 461 | /* 800x600@72Hz */ |
| 462 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
| 463 | 976, 1040, 0, 600, 637, 643, 666, 0, |
| 464 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 465 | /* 800x600@75Hz */ |
| 466 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
| 467 | 896, 1056, 0, 600, 601, 604, 625, 0, |
| 468 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 469 | /* 800x600@85Hz */ |
| 470 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
| 471 | 896, 1048, 0, 600, 601, 604, 631, 0, |
| 472 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 473 | /* 848x480@60Hz */ |
| 474 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
| 475 | 976, 1088, 0, 480, 486, 494, 517, 0, |
| 476 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 477 | /* 1024x768@43Hz, interlace */ |
| 478 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
| 479 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
| 480 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
| 481 | DRM_MODE_FLAG_INTERLACE) }, |
| 482 | /* 1024x768@60Hz */ |
| 483 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
| 484 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
| 485 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 486 | /* 1024x768@70Hz */ |
| 487 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
| 488 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
| 489 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 490 | /* 1024x768@75Hz */ |
| 491 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
| 492 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
| 493 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 494 | /* 1024x768@85Hz */ |
| 495 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
| 496 | 1072, 1376, 0, 768, 769, 772, 808, 0, |
| 497 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 498 | /* 1152x864@75Hz */ |
| 499 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
| 500 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
| 501 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 502 | /* 1280x768@60Hz */ |
| 503 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
| 504 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
| 505 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 506 | /* 1280x768@75Hz */ |
| 507 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
| 508 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
| 509 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 510 | /* 1280x768@85Hz */ |
| 511 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
| 512 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
| 513 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 514 | /* 1280x800@60Hz */ |
| 515 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
| 516 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
| 517 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 518 | /* 1280x800@75Hz */ |
| 519 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
| 520 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
| 521 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 522 | /* 1280x800@85Hz */ |
| 523 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
| 524 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
| 525 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 526 | /* 1280x960@60Hz */ |
| 527 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
| 528 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
| 529 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 530 | /* 1280x960@85Hz */ |
| 531 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
| 532 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
| 533 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 534 | /* 1280x1024@60Hz */ |
| 535 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
| 536 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 537 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 538 | /* 1280x1024@75Hz */ |
| 539 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
| 540 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 541 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 542 | /* 1280x1024@85Hz */ |
| 543 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
| 544 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
| 545 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 546 | /* 1360x768@60Hz */ |
| 547 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
| 548 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
| 549 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 550 | /* 1440x1050@60Hz */ |
| 551 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
| 552 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
| 553 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 554 | /* 1440x1050@75Hz */ |
| 555 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
| 556 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
| 557 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 558 | /* 1440x1050@85Hz */ |
| 559 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
| 560 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
| 561 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 562 | /* 1440x900@60Hz */ |
| 563 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
| 564 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
| 565 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 566 | /* 1440x900@75Hz */ |
| 567 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
| 568 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
| 569 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 570 | /* 1440x900@85Hz */ |
| 571 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
| 572 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
| 573 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 574 | /* 1600x1200@60Hz */ |
| 575 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
| 576 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 577 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 578 | /* 1600x1200@65Hz */ |
| 579 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
| 580 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 581 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 582 | /* 1600x1200@70Hz */ |
| 583 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
| 584 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 585 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 586 | /* 1600x1200@75Hz */ |
| 587 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664, |
| 588 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 589 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 590 | /* 1600x1200@85Hz */ |
| 591 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
| 592 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 593 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 594 | /* 1680x1050@60Hz */ |
| 595 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
| 596 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
| 597 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 598 | /* 1680x1050@75Hz */ |
| 599 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
| 600 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
| 601 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 602 | /* 1680x1050@85Hz */ |
| 603 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
| 604 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
| 605 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 606 | /* 1792x1344@60Hz */ |
| 607 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
| 608 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
| 609 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 610 | /* 1729x1344@75Hz */ |
| 611 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
| 612 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
| 613 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 614 | /* 1853x1392@60Hz */ |
| 615 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
| 616 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
| 617 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 618 | /* 1856x1392@75Hz */ |
| 619 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
| 620 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
| 621 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 622 | /* 1920x1200@60Hz */ |
| 623 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
| 624 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
| 625 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 626 | /* 1920x1200@75Hz */ |
| 627 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
| 628 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
| 629 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 630 | /* 1920x1200@85Hz */ |
| 631 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
| 632 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
| 633 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 634 | /* 1920x1440@60Hz */ |
| 635 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
| 636 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
| 637 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 638 | /* 1920x1440@75Hz */ |
| 639 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
| 640 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
| 641 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 642 | /* 2560x1600@60Hz */ |
| 643 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
| 644 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
| 645 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 646 | /* 2560x1600@75HZ */ |
| 647 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
| 648 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
| 649 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 650 | /* 2560x1600@85HZ */ |
| 651 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
| 652 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
| 653 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 654 | }; |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 655 | static const int drm_num_dmt_modes = |
| 656 | sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
Zhao Yakui | aa9eaa1 | 2009-09-03 09:33:46 +0800 | [diff] [blame] | 657 | |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 658 | static struct drm_display_mode *drm_find_dmt(struct drm_device *dev, |
| 659 | int hsize, int vsize, int fresh) |
| 660 | { |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 661 | int i; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 662 | struct drm_display_mode *ptr, *mode; |
| 663 | |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 664 | mode = NULL; |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 665 | for (i = 0; i < drm_num_dmt_modes; i++) { |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 666 | ptr = &drm_dmt_modes[i]; |
| 667 | if (hsize == ptr->hdisplay && |
| 668 | vsize == ptr->vdisplay && |
| 669 | fresh == drm_mode_vrefresh(ptr)) { |
| 670 | /* get the expected default mode */ |
| 671 | mode = drm_mode_duplicate(dev, ptr); |
| 672 | break; |
| 673 | } |
| 674 | } |
| 675 | return mode; |
| 676 | } |
Adam Jackson | 23425ca | 2009-09-23 17:30:58 -0400 | [diff] [blame] | 677 | |
| 678 | /* |
| 679 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
| 680 | * monitors fill with ascii space (0x20) instead. |
| 681 | */ |
| 682 | static int |
| 683 | bad_std_timing(u8 a, u8 b) |
| 684 | { |
| 685 | return (a == 0x00 && b == 0x00) || |
| 686 | (a == 0x01 && b == 0x01) || |
| 687 | (a == 0x20 && b == 0x20); |
| 688 | } |
| 689 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 690 | /** |
| 691 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
| 692 | * @t: standard timing params |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 693 | * @timing_level: standard timing level |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 694 | * |
| 695 | * Take the standard timing params (in this case width, aspect, and refresh) |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 696 | * and convert them into a real mode using CVT/GTF/DMT. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 697 | * |
| 698 | * Punts for now, but should eventually use the FB layer's CVT based mode |
| 699 | * generation code. |
| 700 | */ |
| 701 | struct drm_display_mode *drm_mode_std(struct drm_device *dev, |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 702 | struct std_timing *t, |
Adam Jackson | f066a17 | 2009-09-23 17:31:21 -0400 | [diff] [blame] | 703 | int revision, |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 704 | int timing_level) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 705 | { |
| 706 | struct drm_display_mode *mode; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 707 | int hsize, vsize; |
| 708 | int vrefresh_rate; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 709 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
| 710 | >> EDID_TIMING_ASPECT_SHIFT; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 711 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
| 712 | >> EDID_TIMING_VFREQ_SHIFT; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 713 | |
Adam Jackson | 23425ca | 2009-09-23 17:30:58 -0400 | [diff] [blame] | 714 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
| 715 | return NULL; |
| 716 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 717 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
| 718 | hsize = t->hsize * 8 + 248; |
| 719 | /* vrefresh_rate = vfreq + 60 */ |
| 720 | vrefresh_rate = vfreq + 60; |
| 721 | /* the vdisplay is calculated based on the aspect ratio */ |
Adam Jackson | f066a17 | 2009-09-23 17:31:21 -0400 | [diff] [blame] | 722 | if (aspect_ratio == 0) { |
| 723 | if (revision < 3) |
| 724 | vsize = hsize; |
| 725 | else |
| 726 | vsize = (hsize * 10) / 16; |
| 727 | } else if (aspect_ratio == 1) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 728 | vsize = (hsize * 3) / 4; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 729 | else if (aspect_ratio == 2) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 730 | vsize = (hsize * 4) / 5; |
| 731 | else |
| 732 | vsize = (hsize * 9) / 16; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 733 | /* HDTV hack */ |
| 734 | if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) { |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 735 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
| 736 | false); |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 737 | mode->hdisplay = 1366; |
| 738 | mode->vsync_start = mode->vsync_start - 1; |
| 739 | mode->vsync_end = mode->vsync_end - 1; |
| 740 | return mode; |
| 741 | } |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 742 | mode = NULL; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 743 | /* check whether it can be found in default mode table */ |
| 744 | mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate); |
| 745 | if (mode) |
| 746 | return mode; |
| 747 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 748 | switch (timing_level) { |
| 749 | case LEVEL_DMT: |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 750 | break; |
| 751 | case LEVEL_GTF: |
| 752 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
| 753 | break; |
| 754 | case LEVEL_CVT: |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 755 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
| 756 | false); |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 757 | break; |
| 758 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 759 | return mode; |
| 760 | } |
| 761 | |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 762 | /* |
| 763 | * EDID is delightfully ambiguous about how interlaced modes are to be |
| 764 | * encoded. Our internal representation is of frame height, but some |
| 765 | * HDTV detailed timings are encoded as field height. |
| 766 | * |
| 767 | * The format list here is from CEA, in frame size. Technically we |
| 768 | * should be checking refresh rate too. Whatever. |
| 769 | */ |
| 770 | static void |
| 771 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
| 772 | struct detailed_pixel_timing *pt) |
| 773 | { |
| 774 | int i; |
| 775 | static const struct { |
| 776 | int w, h; |
| 777 | } cea_interlaced[] = { |
| 778 | { 1920, 1080 }, |
| 779 | { 720, 480 }, |
| 780 | { 1440, 480 }, |
| 781 | { 2880, 480 }, |
| 782 | { 720, 576 }, |
| 783 | { 1440, 576 }, |
| 784 | { 2880, 576 }, |
| 785 | }; |
| 786 | static const int n_sizes = |
| 787 | sizeof(cea_interlaced)/sizeof(cea_interlaced[0]); |
| 788 | |
| 789 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
| 790 | return; |
| 791 | |
| 792 | for (i = 0; i < n_sizes; i++) { |
| 793 | if ((mode->hdisplay == cea_interlaced[i].w) && |
| 794 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
| 795 | mode->vdisplay *= 2; |
| 796 | mode->vsync_start *= 2; |
| 797 | mode->vsync_end *= 2; |
| 798 | mode->vtotal *= 2; |
| 799 | mode->vtotal |= 1; |
| 800 | } |
| 801 | } |
| 802 | |
| 803 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
| 804 | } |
| 805 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 806 | /** |
| 807 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
| 808 | * @dev: DRM device (needed to create new mode) |
| 809 | * @edid: EDID block |
| 810 | * @timing: EDID detailed timing info |
| 811 | * @quirks: quirks to apply |
| 812 | * |
| 813 | * An EDID detailed timing block contains enough info for us to create and |
| 814 | * return a new struct drm_display_mode. |
| 815 | */ |
| 816 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
| 817 | struct edid *edid, |
| 818 | struct detailed_timing *timing, |
| 819 | u32 quirks) |
| 820 | { |
| 821 | struct drm_display_mode *mode; |
| 822 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 823 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
| 824 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
| 825 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
| 826 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
Michel Dänzer | e14cbee | 2009-06-23 12:36:32 +0200 | [diff] [blame] | 827 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
| 828 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
| 829 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; |
| 830 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 831 | |
Adam Jackson | fc43896 | 2009-06-04 10:20:34 +1000 | [diff] [blame] | 832 | /* ignore tiny modes */ |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 833 | if (hactive < 64 || vactive < 64) |
Adam Jackson | fc43896 | 2009-06-04 10:20:34 +1000 | [diff] [blame] | 834 | return NULL; |
| 835 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 836 | if (pt->misc & DRM_EDID_PT_STEREO) { |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 837 | printk(KERN_WARNING "stereo mode not supported\n"); |
| 838 | return NULL; |
| 839 | } |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 840 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
Jerome Glisse | 79b7dcb | 2010-01-14 19:02:20 +0100 | [diff] [blame] | 841 | printk(KERN_WARNING "composite sync not supported\n"); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 842 | } |
| 843 | |
Zhao Yakui | fcb4561 | 2009-10-14 09:11:25 +0800 | [diff] [blame] | 844 | /* it is incorrect if hsync/vsync width is zero */ |
| 845 | if (!hsync_pulse_width || !vsync_pulse_width) { |
| 846 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
| 847 | "Wrong Hsync/Vsync pulse width\n"); |
| 848 | return NULL; |
| 849 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 850 | mode = drm_mode_create(dev); |
| 851 | if (!mode) |
| 852 | return NULL; |
| 853 | |
| 854 | mode->type = DRM_MODE_TYPE_DRIVER; |
| 855 | |
| 856 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 857 | timing->pixel_clock = cpu_to_le16(1088); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 858 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 859 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 860 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 861 | mode->hdisplay = hactive; |
| 862 | mode->hsync_start = mode->hdisplay + hsync_offset; |
| 863 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
| 864 | mode->htotal = mode->hdisplay + hblank; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 865 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 866 | mode->vdisplay = vactive; |
| 867 | mode->vsync_start = mode->vdisplay + vsync_offset; |
| 868 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
| 869 | mode->vtotal = mode->vdisplay + vblank; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 870 | |
Jesse Barnes | 7064fef | 2009-11-05 10:12:54 -0800 | [diff] [blame] | 871 | /* Some EDIDs have bogus h/vtotal values */ |
| 872 | if (mode->hsync_end > mode->htotal) |
| 873 | mode->htotal = mode->hsync_end + 1; |
| 874 | if (mode->vsync_end > mode->vtotal) |
| 875 | mode->vtotal = mode->vsync_end + 1; |
| 876 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 877 | drm_mode_set_name(mode); |
| 878 | |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 879 | drm_mode_do_interlace_quirk(mode, pt); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 880 | |
| 881 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 882 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 883 | } |
| 884 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 885 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
| 886 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
| 887 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
| 888 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 889 | |
Michel Dänzer | e14cbee | 2009-06-23 12:36:32 +0200 | [diff] [blame] | 890 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
| 891 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 892 | |
| 893 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
| 894 | mode->width_mm *= 10; |
| 895 | mode->height_mm *= 10; |
| 896 | } |
| 897 | |
| 898 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
| 899 | mode->width_mm = edid->width_cm * 10; |
| 900 | mode->height_mm = edid->height_cm * 10; |
| 901 | } |
| 902 | |
| 903 | return mode; |
| 904 | } |
| 905 | |
| 906 | /* |
| 907 | * Detailed mode info for the EDID "established modes" data to use. |
| 908 | */ |
| 909 | static struct drm_display_mode edid_est_modes[] = { |
| 910 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
| 911 | 968, 1056, 0, 600, 601, 605, 628, 0, |
| 912 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
| 913 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
| 914 | 896, 1024, 0, 600, 601, 603, 625, 0, |
| 915 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
| 916 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
| 917 | 720, 840, 0, 480, 481, 484, 500, 0, |
| 918 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
| 919 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
| 920 | 704, 832, 0, 480, 489, 491, 520, 0, |
| 921 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
| 922 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
| 923 | 768, 864, 0, 480, 483, 486, 525, 0, |
| 924 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
| 925 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
| 926 | 752, 800, 0, 480, 490, 492, 525, 0, |
| 927 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
| 928 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
| 929 | 846, 900, 0, 400, 421, 423, 449, 0, |
| 930 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
| 931 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
| 932 | 846, 900, 0, 400, 412, 414, 449, 0, |
| 933 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
| 934 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
| 935 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 936 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
| 937 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
| 938 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
| 939 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
| 940 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
| 941 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
| 942 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
| 943 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
| 944 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
| 945 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
| 946 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
| 947 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
| 948 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
| 949 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
| 950 | 928, 1152, 0, 624, 625, 628, 667, 0, |
| 951 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
| 952 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
| 953 | 896, 1056, 0, 600, 601, 604, 625, 0, |
| 954 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
| 955 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
| 956 | 976, 1040, 0, 600, 637, 643, 666, 0, |
| 957 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
| 958 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
| 959 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
| 960 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
| 961 | }; |
| 962 | |
| 963 | #define EDID_EST_TIMINGS 16 |
| 964 | #define EDID_STD_TIMINGS 8 |
| 965 | #define EDID_DETAILED_TIMINGS 4 |
| 966 | |
| 967 | /** |
| 968 | * add_established_modes - get est. modes from EDID and add them |
| 969 | * @edid: EDID block to scan |
| 970 | * |
| 971 | * Each EDID block contains a bitmap of the supported "established modes" list |
| 972 | * (defined above). Tease them out and add them to the global modes list. |
| 973 | */ |
| 974 | static int add_established_modes(struct drm_connector *connector, struct edid *edid) |
| 975 | { |
| 976 | struct drm_device *dev = connector->dev; |
| 977 | unsigned long est_bits = edid->established_timings.t1 | |
| 978 | (edid->established_timings.t2 << 8) | |
| 979 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
| 980 | int i, modes = 0; |
| 981 | |
| 982 | for (i = 0; i <= EDID_EST_TIMINGS; i++) |
| 983 | if (est_bits & (1<<i)) { |
| 984 | struct drm_display_mode *newmode; |
| 985 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
| 986 | if (newmode) { |
| 987 | drm_mode_probed_add(connector, newmode); |
| 988 | modes++; |
| 989 | } |
| 990 | } |
| 991 | |
| 992 | return modes; |
| 993 | } |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 994 | /** |
| 995 | * stanard_timing_level - get std. timing level(CVT/GTF/DMT) |
| 996 | * @edid: EDID block to scan |
| 997 | */ |
| 998 | static int standard_timing_level(struct edid *edid) |
| 999 | { |
| 1000 | if (edid->revision >= 2) { |
| 1001 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
| 1002 | return LEVEL_CVT; |
| 1003 | return LEVEL_GTF; |
| 1004 | } |
| 1005 | return LEVEL_DMT; |
| 1006 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1007 | |
| 1008 | /** |
| 1009 | * add_standard_modes - get std. modes from EDID and add them |
| 1010 | * @edid: EDID block to scan |
| 1011 | * |
| 1012 | * Standard modes can be calculated using the CVT standard. Grab them from |
| 1013 | * @edid, calculate them, and add them to the list. |
| 1014 | */ |
| 1015 | static int add_standard_modes(struct drm_connector *connector, struct edid *edid) |
| 1016 | { |
| 1017 | struct drm_device *dev = connector->dev; |
| 1018 | int i, modes = 0; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1019 | int timing_level; |
| 1020 | |
| 1021 | timing_level = standard_timing_level(edid); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1022 | |
| 1023 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
| 1024 | struct std_timing *t = &edid->standard_timings[i]; |
| 1025 | struct drm_display_mode *newmode; |
| 1026 | |
| 1027 | /* If std timings bytes are 1, 1 it's empty */ |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1028 | if (t->hsize == 1 && t->vfreq_aspect == 1) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1029 | continue; |
| 1030 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1031 | newmode = drm_mode_std(dev, &edid->standard_timings[i], |
Adam Jackson | f066a17 | 2009-09-23 17:31:21 -0400 | [diff] [blame] | 1032 | edid->revision, timing_level); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1033 | if (newmode) { |
| 1034 | drm_mode_probed_add(connector, newmode); |
| 1035 | modes++; |
| 1036 | } |
| 1037 | } |
| 1038 | |
| 1039 | return modes; |
| 1040 | } |
| 1041 | |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1042 | /* |
| 1043 | * XXX fix this for: |
| 1044 | * - GTF secondary curve formula |
| 1045 | * - EDID 1.4 range offsets |
| 1046 | * - CVT extended bits |
| 1047 | */ |
| 1048 | static bool |
| 1049 | mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing) |
| 1050 | { |
| 1051 | struct detailed_data_monitor_range *range; |
| 1052 | int hsync, vrefresh; |
| 1053 | |
| 1054 | range = &timing->data.other_data.data.range; |
| 1055 | |
| 1056 | hsync = drm_mode_hsync(mode); |
| 1057 | vrefresh = drm_mode_vrefresh(mode); |
| 1058 | |
| 1059 | if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz) |
| 1060 | return false; |
| 1061 | |
| 1062 | if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq) |
| 1063 | return false; |
| 1064 | |
| 1065 | if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) { |
| 1066 | /* be forgiving since it's in units of 10MHz */ |
| 1067 | int max_clock = range->pixel_clock_mhz * 10 + 9; |
| 1068 | max_clock *= 1000; |
| 1069 | if (mode->clock > max_clock) |
| 1070 | return false; |
| 1071 | } |
| 1072 | |
| 1073 | return true; |
| 1074 | } |
| 1075 | |
| 1076 | /* |
| 1077 | * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will |
| 1078 | * need to account for them. |
| 1079 | */ |
| 1080 | static int drm_gtf_modes_for_range(struct drm_connector *connector, |
| 1081 | struct detailed_timing *timing) |
| 1082 | { |
| 1083 | int i, modes = 0; |
| 1084 | struct drm_display_mode *newmode; |
| 1085 | struct drm_device *dev = connector->dev; |
| 1086 | |
| 1087 | for (i = 0; i < drm_num_dmt_modes; i++) { |
| 1088 | if (mode_in_range(drm_dmt_modes + i, timing)) { |
| 1089 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
| 1090 | if (newmode) { |
| 1091 | drm_mode_probed_add(connector, newmode); |
| 1092 | modes++; |
| 1093 | } |
| 1094 | } |
| 1095 | } |
| 1096 | |
| 1097 | return modes; |
| 1098 | } |
| 1099 | |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1100 | static int drm_cvt_modes(struct drm_connector *connector, |
| 1101 | struct detailed_timing *timing) |
| 1102 | { |
| 1103 | int i, j, modes = 0; |
| 1104 | struct drm_display_mode *newmode; |
| 1105 | struct drm_device *dev = connector->dev; |
| 1106 | struct cvt_timing *cvt; |
| 1107 | const int rates[] = { 60, 85, 75, 60, 50 }; |
Adam Jackson | 69da301 | 2010-01-04 17:53:06 -0500 | [diff] [blame] | 1108 | const u8 empty[3] = { 0, 0, 0 }; |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1109 | |
| 1110 | for (i = 0; i < 4; i++) { |
Marin Mitov | 29ebdf9 | 2009-12-20 09:03:27 +0200 | [diff] [blame] | 1111 | int uninitialized_var(width), height; |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1112 | cvt = &(timing->data.other_data.data.cvt[i]); |
| 1113 | |
Adam Jackson | 69da301 | 2010-01-04 17:53:06 -0500 | [diff] [blame] | 1114 | if (!memcmp(cvt->code, empty, 3)) |
| 1115 | continue; |
| 1116 | |
Adam Jackson | 8e10ee9 | 2010-01-04 17:53:07 -0500 | [diff] [blame] | 1117 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
| 1118 | switch (cvt->code[1] & 0x0c) { |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1119 | case 0x00: |
| 1120 | width = height * 4 / 3; |
| 1121 | break; |
Adam Jackson | 8e10ee9 | 2010-01-04 17:53:07 -0500 | [diff] [blame] | 1122 | case 0x04: |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1123 | width = height * 16 / 9; |
| 1124 | break; |
Adam Jackson | 8e10ee9 | 2010-01-04 17:53:07 -0500 | [diff] [blame] | 1125 | case 0x08: |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1126 | width = height * 16 / 10; |
| 1127 | break; |
Adam Jackson | 8e10ee9 | 2010-01-04 17:53:07 -0500 | [diff] [blame] | 1128 | case 0x0c: |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1129 | width = height * 15 / 9; |
| 1130 | break; |
| 1131 | } |
| 1132 | |
| 1133 | for (j = 1; j < 5; j++) { |
| 1134 | if (cvt->code[2] & (1 << j)) { |
| 1135 | newmode = drm_cvt_mode(dev, width, height, |
| 1136 | rates[j], j == 0, |
| 1137 | false, false); |
| 1138 | if (newmode) { |
| 1139 | drm_mode_probed_add(connector, newmode); |
| 1140 | modes++; |
| 1141 | } |
| 1142 | } |
| 1143 | } |
| 1144 | } |
| 1145 | |
| 1146 | return modes; |
| 1147 | } |
| 1148 | |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1149 | static int add_detailed_modes(struct drm_connector *connector, |
| 1150 | struct detailed_timing *timing, |
| 1151 | struct edid *edid, u32 quirks, int preferred) |
| 1152 | { |
| 1153 | int i, modes = 0; |
| 1154 | struct detailed_non_pixel *data = &timing->data.other_data; |
| 1155 | int timing_level = standard_timing_level(edid); |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1156 | int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1157 | struct drm_display_mode *newmode; |
| 1158 | struct drm_device *dev = connector->dev; |
| 1159 | |
| 1160 | if (timing->pixel_clock) { |
| 1161 | newmode = drm_mode_detailed(dev, edid, timing, quirks); |
| 1162 | if (!newmode) |
| 1163 | return 0; |
| 1164 | |
| 1165 | if (preferred) |
| 1166 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
| 1167 | |
| 1168 | drm_mode_probed_add(connector, newmode); |
| 1169 | return 1; |
| 1170 | } |
| 1171 | |
| 1172 | /* other timing types */ |
| 1173 | switch (data->type) { |
| 1174 | case EDID_DETAIL_MONITOR_RANGE: |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1175 | if (gtf) |
| 1176 | modes += drm_gtf_modes_for_range(connector, timing); |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1177 | break; |
| 1178 | case EDID_DETAIL_STD_MODES: |
| 1179 | /* Six modes per detailed section */ |
| 1180 | for (i = 0; i < 6; i++) { |
| 1181 | struct std_timing *std; |
| 1182 | struct drm_display_mode *newmode; |
| 1183 | |
| 1184 | std = &data->data.timings[i]; |
| 1185 | newmode = drm_mode_std(dev, std, edid->revision, |
| 1186 | timing_level); |
| 1187 | if (newmode) { |
| 1188 | drm_mode_probed_add(connector, newmode); |
| 1189 | modes++; |
| 1190 | } |
| 1191 | } |
| 1192 | break; |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1193 | case EDID_DETAIL_CVT_3BYTE: |
| 1194 | modes += drm_cvt_modes(connector, timing); |
| 1195 | break; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1196 | default: |
| 1197 | break; |
| 1198 | } |
| 1199 | |
| 1200 | return modes; |
| 1201 | } |
| 1202 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1203 | /** |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1204 | * add_detailed_info - get detailed mode info from EDID data |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1205 | * @connector: attached connector |
| 1206 | * @edid: EDID block to scan |
| 1207 | * @quirks: quirks to apply |
| 1208 | * |
| 1209 | * Some of the detailed timing sections may contain mode information. Grab |
| 1210 | * it and add it to the list. |
| 1211 | */ |
| 1212 | static int add_detailed_info(struct drm_connector *connector, |
| 1213 | struct edid *edid, u32 quirks) |
| 1214 | { |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1215 | int i, modes = 0; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1216 | |
| 1217 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { |
| 1218 | struct detailed_timing *timing = &edid->detailed_timings[i]; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1219 | int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1220 | |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1221 | /* In 1.0, only timings are allowed */ |
| 1222 | if (!timing->pixel_clock && edid->version == 1 && |
| 1223 | edid->revision == 0) |
| 1224 | continue; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1225 | |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1226 | modes += add_detailed_modes(connector, timing, edid, quirks, |
| 1227 | preferred); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1228 | } |
| 1229 | |
| 1230 | return modes; |
| 1231 | } |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1232 | |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1233 | /** |
| 1234 | * add_detailed_mode_eedid - get detailed mode info from addtional timing |
| 1235 | * EDID block |
| 1236 | * @connector: attached connector |
| 1237 | * @edid: EDID block to scan(It is only to get addtional timing EDID block) |
| 1238 | * @quirks: quirks to apply |
| 1239 | * |
| 1240 | * Some of the detailed timing sections may contain mode information. Grab |
| 1241 | * it and add it to the list. |
| 1242 | */ |
| 1243 | static int add_detailed_info_eedid(struct drm_connector *connector, |
| 1244 | struct edid *edid, u32 quirks) |
| 1245 | { |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1246 | int i, modes = 0; |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1247 | char *edid_ext = NULL; |
| 1248 | struct detailed_timing *timing; |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1249 | int edid_ext_num; |
| 1250 | int start_offset, end_offset; |
| 1251 | int timing_level; |
| 1252 | |
| 1253 | if (edid->version == 1 && edid->revision < 3) { |
| 1254 | /* If the EDID version is less than 1.3, there is no |
| 1255 | * extension EDID. |
| 1256 | */ |
| 1257 | return 0; |
| 1258 | } |
| 1259 | if (!edid->extensions) { |
| 1260 | /* if there is no extension EDID, it is unnecessary to |
| 1261 | * parse the E-EDID to get detailed info |
| 1262 | */ |
| 1263 | return 0; |
| 1264 | } |
| 1265 | |
| 1266 | /* Chose real EDID extension number */ |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 1267 | edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? |
| 1268 | DRM_MAX_EDID_EXT_NUM : edid->extensions; |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1269 | |
| 1270 | /* Find CEA extension */ |
| 1271 | for (i = 0; i < edid_ext_num; i++) { |
| 1272 | edid_ext = (char *)edid + EDID_LENGTH * (i + 1); |
| 1273 | /* This block is CEA extension */ |
| 1274 | if (edid_ext[0] == 0x02) |
| 1275 | break; |
| 1276 | } |
| 1277 | |
| 1278 | if (i == edid_ext_num) { |
| 1279 | /* if there is no additional timing EDID block, return */ |
| 1280 | return 0; |
| 1281 | } |
| 1282 | |
| 1283 | /* Get the start offset of detailed timing block */ |
| 1284 | start_offset = edid_ext[2]; |
| 1285 | if (start_offset == 0) { |
| 1286 | /* If the start_offset is zero, it means that neither detailed |
| 1287 | * info nor data block exist. In such case it is also |
| 1288 | * unnecessary to parse the detailed timing info. |
| 1289 | */ |
| 1290 | return 0; |
| 1291 | } |
| 1292 | |
| 1293 | timing_level = standard_timing_level(edid); |
| 1294 | end_offset = EDID_LENGTH; |
| 1295 | end_offset -= sizeof(struct detailed_timing); |
| 1296 | for (i = start_offset; i < end_offset; |
| 1297 | i += sizeof(struct detailed_timing)) { |
| 1298 | timing = (struct detailed_timing *)(edid_ext + i); |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 1299 | modes += add_detailed_modes(connector, timing, edid, quirks, 0); |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1300 | } |
| 1301 | |
| 1302 | return modes; |
| 1303 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1304 | |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 1305 | #define HDMI_IDENTIFIER 0x000C03 |
| 1306 | #define VENDOR_BLOCK 0x03 |
| 1307 | /** |
| 1308 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. |
| 1309 | * @edid: monitor EDID information |
| 1310 | * |
| 1311 | * Parse the CEA extension according to CEA-861-B. |
| 1312 | * Return true if HDMI, false if not or unknown. |
| 1313 | */ |
| 1314 | bool drm_detect_hdmi_monitor(struct edid *edid) |
| 1315 | { |
| 1316 | char *edid_ext = NULL; |
| 1317 | int i, hdmi_id, edid_ext_num; |
| 1318 | int start_offset, end_offset; |
| 1319 | bool is_hdmi = false; |
| 1320 | |
| 1321 | /* No EDID or EDID extensions */ |
| 1322 | if (edid == NULL || edid->extensions == 0) |
| 1323 | goto end; |
| 1324 | |
| 1325 | /* Chose real EDID extension number */ |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 1326 | edid_ext_num = edid->extensions > DRM_MAX_EDID_EXT_NUM ? |
| 1327 | DRM_MAX_EDID_EXT_NUM : edid->extensions; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 1328 | |
| 1329 | /* Find CEA extension */ |
| 1330 | for (i = 0; i < edid_ext_num; i++) { |
| 1331 | edid_ext = (char *)edid + EDID_LENGTH * (i + 1); |
| 1332 | /* This block is CEA extension */ |
| 1333 | if (edid_ext[0] == 0x02) |
| 1334 | break; |
| 1335 | } |
| 1336 | |
| 1337 | if (i == edid_ext_num) |
| 1338 | goto end; |
| 1339 | |
| 1340 | /* Data block offset in CEA extension block */ |
| 1341 | start_offset = 4; |
| 1342 | end_offset = edid_ext[2]; |
| 1343 | |
| 1344 | /* |
| 1345 | * Because HDMI identifier is in Vendor Specific Block, |
| 1346 | * search it from all data blocks of CEA extension. |
| 1347 | */ |
| 1348 | for (i = start_offset; i < end_offset; |
| 1349 | /* Increased by data block len */ |
| 1350 | i += ((edid_ext[i] & 0x1f) + 1)) { |
| 1351 | /* Find vendor specific block */ |
| 1352 | if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { |
| 1353 | hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | |
| 1354 | edid_ext[i + 3] << 16; |
| 1355 | /* Find HDMI identifier */ |
| 1356 | if (hdmi_id == HDMI_IDENTIFIER) |
| 1357 | is_hdmi = true; |
| 1358 | break; |
| 1359 | } |
| 1360 | } |
| 1361 | |
| 1362 | end: |
| 1363 | return is_hdmi; |
| 1364 | } |
| 1365 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
| 1366 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1367 | /** |
| 1368 | * drm_add_edid_modes - add modes from EDID data, if available |
| 1369 | * @connector: connector we're probing |
| 1370 | * @edid: edid data |
| 1371 | * |
| 1372 | * Add the specified modes to the connector's mode list. |
| 1373 | * |
| 1374 | * Return number of modes added or 0 if we couldn't find any. |
| 1375 | */ |
| 1376 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
| 1377 | { |
| 1378 | int num_modes = 0; |
| 1379 | u32 quirks; |
| 1380 | |
| 1381 | if (edid == NULL) { |
| 1382 | return 0; |
| 1383 | } |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 1384 | if (!drm_edid_is_valid(edid)) { |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1385 | dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", |
| 1386 | drm_get_connector_name(connector)); |
| 1387 | return 0; |
| 1388 | } |
| 1389 | |
| 1390 | quirks = edid_get_quirks(edid); |
| 1391 | |
| 1392 | num_modes += add_established_modes(connector, edid); |
| 1393 | num_modes += add_standard_modes(connector, edid); |
| 1394 | num_modes += add_detailed_info(connector, edid, quirks); |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 1395 | num_modes += add_detailed_info_eedid(connector, edid, quirks); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1396 | |
| 1397 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
| 1398 | edid_fixup_preferred(connector, quirks); |
| 1399 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1400 | connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; |
| 1401 | connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; |
| 1402 | connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; |
| 1403 | connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; |
| 1404 | connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; |
| 1405 | connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; |
| 1406 | connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1407 | connector->display_info.width_mm = edid->width_cm * 10; |
| 1408 | connector->display_info.height_mm = edid->height_cm * 10; |
| 1409 | connector->display_info.gamma = edid->gamma; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1410 | connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; |
| 1411 | connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; |
| 1412 | connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; |
| 1413 | connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; |
| 1414 | connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; |
| 1415 | connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1416 | connector->display_info.gamma = edid->gamma; |
| 1417 | |
| 1418 | return num_modes; |
| 1419 | } |
| 1420 | EXPORT_SYMBOL(drm_add_edid_modes); |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 1421 | |
| 1422 | /** |
| 1423 | * drm_add_modes_noedid - add modes for the connectors without EDID |
| 1424 | * @connector: connector we're probing |
| 1425 | * @hdisplay: the horizontal display limit |
| 1426 | * @vdisplay: the vertical display limit |
| 1427 | * |
| 1428 | * Add the specified modes to the connector's mode list. Only when the |
| 1429 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
| 1430 | * |
| 1431 | * Return number of modes added or 0 if we couldn't find any. |
| 1432 | */ |
| 1433 | int drm_add_modes_noedid(struct drm_connector *connector, |
| 1434 | int hdisplay, int vdisplay) |
| 1435 | { |
| 1436 | int i, count, num_modes = 0; |
| 1437 | struct drm_display_mode *mode, *ptr; |
| 1438 | struct drm_device *dev = connector->dev; |
| 1439 | |
| 1440 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
| 1441 | if (hdisplay < 0) |
| 1442 | hdisplay = 0; |
| 1443 | if (vdisplay < 0) |
| 1444 | vdisplay = 0; |
| 1445 | |
| 1446 | for (i = 0; i < count; i++) { |
| 1447 | ptr = &drm_dmt_modes[i]; |
| 1448 | if (hdisplay && vdisplay) { |
| 1449 | /* |
| 1450 | * Only when two are valid, they will be used to check |
| 1451 | * whether the mode should be added to the mode list of |
| 1452 | * the connector. |
| 1453 | */ |
| 1454 | if (ptr->hdisplay > hdisplay || |
| 1455 | ptr->vdisplay > vdisplay) |
| 1456 | continue; |
| 1457 | } |
Adam Jackson | f985ded | 2009-11-23 14:23:04 -0500 | [diff] [blame] | 1458 | if (drm_mode_vrefresh(ptr) > 61) |
| 1459 | continue; |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 1460 | mode = drm_mode_duplicate(dev, ptr); |
| 1461 | if (mode) { |
| 1462 | drm_mode_probed_add(connector, mode); |
| 1463 | num_modes++; |
| 1464 | } |
| 1465 | } |
| 1466 | return num_modes; |
| 1467 | } |
| 1468 | EXPORT_SYMBOL(drm_add_modes_noedid); |