Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sata_sx4.c - Promise SATA |
| 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
| 5 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 6 | * on emails. |
| 7 | * |
| 8 | * Copyright 2003-2004 Red Hat, Inc. |
| 9 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; see the file COPYING. If not, write to |
| 23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 24 | * |
| 25 | * |
| 26 | * libata documentation is available via 'make {ps|pdf}docs', |
| 27 | * as Documentation/DocBook/libata.* |
| 28 | * |
| 29 | * Hardware documentation available under NDA. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | * |
| 31 | */ |
| 32 | |
Jeff Garzik | a09060f | 2007-05-28 08:17:06 -0400 | [diff] [blame] | 33 | /* |
| 34 | Theory of operation |
| 35 | ------------------- |
| 36 | |
| 37 | The SX4 (PDC20621) chip features a single Host DMA (HDMA) copy |
| 38 | engine, DIMM memory, and four ATA engines (one per SATA port). |
| 39 | Data is copied to/from DIMM memory by the HDMA engine, before |
| 40 | handing off to one (or more) of the ATA engines. The ATA |
| 41 | engines operate solely on DIMM memory. |
| 42 | |
| 43 | The SX4 behaves like a PATA chip, with no SATA controls or |
| 44 | knowledge whatsoever, leading to the presumption that |
| 45 | PATA<->SATA bridges exist on SX4 boards, external to the |
| 46 | PDC20621 chip itself. |
| 47 | |
| 48 | The chip is quite capable, supporting an XOR engine and linked |
| 49 | hardware commands (permits a string to transactions to be |
| 50 | submitted and waited-on as a single unit), and an optional |
| 51 | microprocessor. |
| 52 | |
| 53 | The limiting factor is largely software. This Linux driver was |
| 54 | written to multiplex the single HDMA engine to copy disk |
| 55 | transactions into a fixed DIMM memory space, from where an ATA |
| 56 | engine takes over. As a result, each WRITE looks like this: |
| 57 | |
| 58 | submit HDMA packet to hardware |
| 59 | hardware copies data from system memory to DIMM |
| 60 | hardware raises interrupt |
| 61 | |
| 62 | submit ATA packet to hardware |
| 63 | hardware executes ATA WRITE command, w/ data in DIMM |
| 64 | hardware raises interrupt |
Jeff Garzik | 2dcb407 | 2007-10-19 06:42:56 -0400 | [diff] [blame] | 65 | |
Jeff Garzik | a09060f | 2007-05-28 08:17:06 -0400 | [diff] [blame] | 66 | and each READ looks like this: |
| 67 | |
| 68 | submit ATA packet to hardware |
| 69 | hardware executes ATA READ command, w/ data in DIMM |
| 70 | hardware raises interrupt |
Jeff Garzik | 2dcb407 | 2007-10-19 06:42:56 -0400 | [diff] [blame] | 71 | |
Jeff Garzik | a09060f | 2007-05-28 08:17:06 -0400 | [diff] [blame] | 72 | submit HDMA packet to hardware |
| 73 | hardware copies data from DIMM to system memory |
| 74 | hardware raises interrupt |
| 75 | |
| 76 | This is a very slow, lock-step way of doing things that can |
| 77 | certainly be improved by motivated kernel hackers. |
| 78 | |
| 79 | */ |
| 80 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | #include <linux/kernel.h> |
| 82 | #include <linux/module.h> |
| 83 | #include <linux/pci.h> |
| 84 | #include <linux/init.h> |
| 85 | #include <linux/blkdev.h> |
| 86 | #include <linux/delay.h> |
| 87 | #include <linux/interrupt.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 88 | #include <linux/device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | #include <scsi/scsi_host.h> |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 90 | #include <scsi/scsi_cmnd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | #include <linux/libata.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | #include "sata_promise.h" |
| 93 | |
| 94 | #define DRV_NAME "sata_sx4" |
Jeff Garzik | 2a3103c | 2007-08-31 04:54:06 -0400 | [diff] [blame] | 95 | #define DRV_VERSION "0.12" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | |
| 97 | |
| 98 | enum { |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 99 | PDC_MMIO_BAR = 3, |
| 100 | PDC_DIMM_BAR = 4, |
| 101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | PDC_PRD_TBL = 0x44, /* Direct command DMA table addr */ |
| 103 | |
| 104 | PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ |
| 105 | PDC_HDMA_PKT_SUBMIT = 0x100, /* Host DMA packet pointer addr */ |
| 106 | PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ |
| 107 | PDC_HDMA_CTLSTAT = 0x12C, /* Host DMA control / status */ |
| 108 | |
Jeff Garzik | a09060f | 2007-05-28 08:17:06 -0400 | [diff] [blame] | 109 | PDC_CTLSTAT = 0x60, /* IDEn control / status */ |
| 110 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | PDC_20621_SEQCTL = 0x400, |
| 112 | PDC_20621_SEQMASK = 0x480, |
| 113 | PDC_20621_GENERAL_CTL = 0x484, |
| 114 | PDC_20621_PAGE_SIZE = (32 * 1024), |
| 115 | |
| 116 | /* chosen, not constant, values; we design our own DIMM mem map */ |
| 117 | PDC_20621_DIMM_WINDOW = 0x0C, /* page# for 32K DIMM window */ |
| 118 | PDC_20621_DIMM_BASE = 0x00200000, |
| 119 | PDC_20621_DIMM_DATA = (64 * 1024), |
| 120 | PDC_DIMM_DATA_STEP = (256 * 1024), |
| 121 | PDC_DIMM_WINDOW_STEP = (8 * 1024), |
| 122 | PDC_DIMM_HOST_PRD = (6 * 1024), |
| 123 | PDC_DIMM_HOST_PKT = (128 * 0), |
| 124 | PDC_DIMM_HPKT_PRD = (128 * 1), |
| 125 | PDC_DIMM_ATA_PKT = (128 * 2), |
| 126 | PDC_DIMM_APKT_PRD = (128 * 3), |
| 127 | PDC_DIMM_HEADER_SZ = PDC_DIMM_APKT_PRD + 128, |
| 128 | PDC_PAGE_WINDOW = 0x40, |
| 129 | PDC_PAGE_DATA = PDC_PAGE_WINDOW + |
| 130 | (PDC_20621_DIMM_DATA / PDC_20621_PAGE_SIZE), |
| 131 | PDC_PAGE_SET = PDC_DIMM_DATA_STEP / PDC_20621_PAGE_SIZE, |
| 132 | |
| 133 | PDC_CHIP0_OFS = 0xC0000, /* offset of chip #0 */ |
| 134 | |
| 135 | PDC_20621_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) | |
| 136 | (1<<23), |
| 137 | |
| 138 | board_20621 = 0, /* FastTrak S150 SX4 */ |
| 139 | |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 140 | PDC_MASK_INT = (1 << 10), /* HDMA/ATA mask int */ |
| 141 | PDC_RESET = (1 << 11), /* HDMA/ATA reset */ |
Jeff Garzik | a09060f | 2007-05-28 08:17:06 -0400 | [diff] [blame] | 142 | PDC_DMA_ENABLE = (1 << 7), /* DMA start/stop */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | |
| 144 | PDC_MAX_HDMA = 32, |
| 145 | PDC_HDMA_Q_MASK = (PDC_MAX_HDMA - 1), |
| 146 | |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 147 | PDC_DIMM0_SPD_DEV_ADDRESS = 0x50, |
| 148 | PDC_DIMM1_SPD_DEV_ADDRESS = 0x51, |
| 149 | PDC_I2C_CONTROL = 0x48, |
| 150 | PDC_I2C_ADDR_DATA = 0x4C, |
| 151 | PDC_DIMM0_CONTROL = 0x80, |
| 152 | PDC_DIMM1_CONTROL = 0x84, |
| 153 | PDC_SDRAM_CONTROL = 0x88, |
| 154 | PDC_I2C_WRITE = 0, /* master -> slave */ |
| 155 | PDC_I2C_READ = (1 << 6), /* master <- slave */ |
| 156 | PDC_I2C_START = (1 << 7), /* start I2C proto */ |
| 157 | PDC_I2C_MASK_INT = (1 << 5), /* mask I2C interrupt */ |
| 158 | PDC_I2C_COMPLETE = (1 << 16), /* I2C normal compl. */ |
| 159 | PDC_I2C_NO_ACK = (1 << 20), /* slave no-ack addr */ |
| 160 | PDC_DIMM_SPD_SUBADDRESS_START = 0x00, |
| 161 | PDC_DIMM_SPD_SUBADDRESS_END = 0x7F, |
| 162 | PDC_DIMM_SPD_ROW_NUM = 3, |
| 163 | PDC_DIMM_SPD_COLUMN_NUM = 4, |
| 164 | PDC_DIMM_SPD_MODULE_ROW = 5, |
| 165 | PDC_DIMM_SPD_TYPE = 11, |
| 166 | PDC_DIMM_SPD_FRESH_RATE = 12, |
| 167 | PDC_DIMM_SPD_BANK_NUM = 17, |
| 168 | PDC_DIMM_SPD_CAS_LATENCY = 18, |
| 169 | PDC_DIMM_SPD_ATTRIBUTE = 21, |
| 170 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, |
| 171 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, |
| 172 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, |
| 173 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, |
| 174 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, |
| 175 | PDC_CTL_STATUS = 0x08, |
| 176 | PDC_DIMM_WINDOW_CTLR = 0x0C, |
| 177 | PDC_TIME_CONTROL = 0x3C, |
| 178 | PDC_TIME_PERIOD = 0x40, |
| 179 | PDC_TIME_COUNTER = 0x44, |
| 180 | PDC_GENERAL_CTLR = 0x484, |
| 181 | PCI_PLL_INIT = 0x8A531824, |
| 182 | PCI_X_TCOUNT = 0xEE1E5CFF, |
| 183 | |
| 184 | /* PDC_TIME_CONTROL bits */ |
| 185 | PDC_TIMER_BUZZER = (1 << 10), |
| 186 | PDC_TIMER_MODE_PERIODIC = 0, /* bits 9:8 == 00 */ |
| 187 | PDC_TIMER_MODE_ONCE = (1 << 8), /* bits 9:8 == 01 */ |
| 188 | PDC_TIMER_ENABLE = (1 << 7), |
| 189 | PDC_TIMER_MASK_INT = (1 << 5), |
| 190 | PDC_TIMER_SEQ_MASK = 0x1f, /* SEQ ID for timer */ |
| 191 | PDC_TIMER_DEFAULT = PDC_TIMER_MODE_ONCE | |
| 192 | PDC_TIMER_ENABLE | |
| 193 | PDC_TIMER_MASK_INT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | }; |
| 195 | |
| 196 | |
| 197 | struct pdc_port_priv { |
| 198 | u8 dimm_buf[(ATA_PRD_SZ * ATA_MAX_PRD) + 512]; |
| 199 | u8 *pkt; |
| 200 | dma_addr_t pkt_dma; |
| 201 | }; |
| 202 | |
| 203 | struct pdc_host_priv { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | unsigned int doing_hdma; |
| 205 | unsigned int hdma_prod; |
| 206 | unsigned int hdma_cons; |
| 207 | struct { |
| 208 | struct ata_queued_cmd *qc; |
| 209 | unsigned int seq; |
| 210 | unsigned long pkt_ofs; |
| 211 | } hdma[32]; |
| 212 | }; |
| 213 | |
| 214 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 215 | static int pdc_sata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | static void pdc_eng_timeout(struct ata_port *ap); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 217 | static void pdc_20621_phy_reset(struct ata_port *ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | static int pdc_port_start(struct ata_port *ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc); |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 220 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
| 221 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 222 | static unsigned int pdc20621_dimm_init(struct ata_host *host); |
| 223 | static int pdc20621_detect_dimm(struct ata_host *host); |
| 224 | static unsigned int pdc20621_i2c_read(struct ata_host *host, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | u32 device, u32 subaddr, u32 *pdata); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 226 | static int pdc20621_prog_dimm0(struct ata_host *host); |
| 227 | static unsigned int pdc20621_prog_dimm_global(struct ata_host *host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | #ifdef ATA_VERBOSE_DEBUG |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 229 | static void pdc20621_get_from_dimm(struct ata_host *host, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | void *psource, u32 offset, u32 size); |
| 231 | #endif |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 232 | static void pdc20621_put_to_dimm(struct ata_host *host, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | void *psource, u32 offset, u32 size); |
| 234 | static void pdc20621_irq_clear(struct ata_port *ap); |
Tejun Heo | 9a3d9eb | 2006-01-23 13:09:36 +0900 | [diff] [blame] | 235 | static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | |
| 237 | |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 238 | static struct scsi_host_template pdc_sata_sht = { |
Tejun Heo | 68d1d07 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 239 | ATA_BASE_SHT(DRV_NAME), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | .sg_tablesize = LIBATA_MAX_PRD, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 241 | .dma_boundary = ATA_DMA_BOUNDARY, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | }; |
| 243 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 244 | /* TODO: inherit from base port_ops after converting to new EH */ |
| 245 | static struct ata_port_operations pdc_20621_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | .tf_load = pdc_tf_load_mmio, |
| 247 | .tf_read = ata_tf_read, |
| 248 | .check_status = ata_check_status, |
| 249 | .exec_command = pdc_exec_command_mmio, |
| 250 | .dev_select = ata_std_dev_select, |
| 251 | .phy_reset = pdc_20621_phy_reset, |
| 252 | .qc_prep = pdc20621_qc_prep, |
| 253 | .qc_issue = pdc20621_qc_issue_prot, |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 254 | .data_xfer = ata_data_xfer, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | .eng_timeout = pdc_eng_timeout, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | .irq_clear = pdc20621_irq_clear, |
Akira Iguchi | 246ce3b | 2007-01-26 16:27:58 +0900 | [diff] [blame] | 257 | .irq_on = ata_irq_on, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | .port_start = pdc_port_start, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | }; |
| 260 | |
Arjan van de Ven | 98ac62d | 2005-11-28 10:06:23 +0100 | [diff] [blame] | 261 | static const struct ata_port_info pdc_port_info[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | /* board_20621 */ |
| 263 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 264 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
Jeff Garzik | 5063019 | 2005-12-13 02:29:45 -0500 | [diff] [blame] | 265 | ATA_FLAG_SRST | ATA_FLAG_MMIO | |
Albert Lee | 1f3461a | 2006-05-23 18:12:30 +0800 | [diff] [blame] | 266 | ATA_FLAG_NO_ATAPI | ATA_FLAG_PIO_POLLING, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | .pio_mask = 0x1f, /* pio0-4 */ |
| 268 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 269 | .udma_mask = ATA_UDMA6, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | .port_ops = &pdc_20621_ops, |
| 271 | }, |
| 272 | |
| 273 | }; |
| 274 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 275 | static const struct pci_device_id pdc_sata_pci_tbl[] = { |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 276 | { PCI_VDEVICE(PROMISE, 0x6622), board_20621 }, |
| 277 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | { } /* terminate list */ |
| 279 | }; |
| 280 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | static struct pci_driver pdc_sata_pci_driver = { |
| 282 | .name = DRV_NAME, |
| 283 | .id_table = pdc_sata_pci_tbl, |
| 284 | .probe = pdc_sata_init_one, |
| 285 | .remove = ata_pci_remove_one, |
| 286 | }; |
| 287 | |
| 288 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | static int pdc_port_start(struct ata_port *ap) |
| 290 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 291 | struct device *dev = ap->host->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | struct pdc_port_priv *pp; |
| 293 | int rc; |
| 294 | |
| 295 | rc = ata_port_start(ap); |
| 296 | if (rc) |
| 297 | return rc; |
| 298 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 299 | pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); |
| 300 | if (!pp) |
| 301 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 303 | pp->pkt = dmam_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL); |
| 304 | if (!pp->pkt) |
| 305 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | |
| 307 | ap->private_data = pp; |
| 308 | |
| 309 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | } |
| 311 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 312 | static void pdc_20621_phy_reset(struct ata_port *ap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | { |
| 314 | VPRINTK("ENTER\n"); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 315 | ap->cbl = ATA_CBL_SATA; |
| 316 | ata_port_probe(ap); |
| 317 | ata_bus_reset(ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | static inline void pdc20621_ata_sg(struct ata_taskfile *tf, u8 *buf, |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 321 | unsigned int portno, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | unsigned int total_len) |
| 323 | { |
| 324 | u32 addr; |
| 325 | unsigned int dw = PDC_DIMM_APKT_PRD >> 2; |
Al Viro | 4ca4e43 | 2007-12-30 09:32:22 +0000 | [diff] [blame] | 326 | __le32 *buf32 = (__le32 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | |
| 328 | /* output ATA packet S/G table */ |
| 329 | addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA + |
| 330 | (PDC_DIMM_DATA_STEP * portno); |
| 331 | VPRINTK("ATA sg addr 0x%x, %d\n", addr, addr); |
| 332 | buf32[dw] = cpu_to_le32(addr); |
| 333 | buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); |
| 334 | |
| 335 | VPRINTK("ATA PSG @ %x == (0x%x, 0x%x)\n", |
| 336 | PDC_20621_DIMM_BASE + |
| 337 | (PDC_DIMM_WINDOW_STEP * portno) + |
| 338 | PDC_DIMM_APKT_PRD, |
| 339 | buf32[dw], buf32[dw + 1]); |
| 340 | } |
| 341 | |
| 342 | static inline void pdc20621_host_sg(struct ata_taskfile *tf, u8 *buf, |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 343 | unsigned int portno, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | unsigned int total_len) |
| 345 | { |
| 346 | u32 addr; |
| 347 | unsigned int dw = PDC_DIMM_HPKT_PRD >> 2; |
Al Viro | 4ca4e43 | 2007-12-30 09:32:22 +0000 | [diff] [blame] | 348 | __le32 *buf32 = (__le32 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | |
| 350 | /* output Host DMA packet S/G table */ |
| 351 | addr = PDC_20621_DIMM_BASE + PDC_20621_DIMM_DATA + |
| 352 | (PDC_DIMM_DATA_STEP * portno); |
| 353 | |
| 354 | buf32[dw] = cpu_to_le32(addr); |
| 355 | buf32[dw + 1] = cpu_to_le32(total_len | ATA_PRD_EOT); |
| 356 | |
| 357 | VPRINTK("HOST PSG @ %x == (0x%x, 0x%x)\n", |
| 358 | PDC_20621_DIMM_BASE + |
| 359 | (PDC_DIMM_WINDOW_STEP * portno) + |
| 360 | PDC_DIMM_HPKT_PRD, |
| 361 | buf32[dw], buf32[dw + 1]); |
| 362 | } |
| 363 | |
| 364 | static inline unsigned int pdc20621_ata_pkt(struct ata_taskfile *tf, |
| 365 | unsigned int devno, u8 *buf, |
| 366 | unsigned int portno) |
| 367 | { |
| 368 | unsigned int i, dw; |
Al Viro | 4ca4e43 | 2007-12-30 09:32:22 +0000 | [diff] [blame] | 369 | __le32 *buf32 = (__le32 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | u8 dev_reg; |
| 371 | |
| 372 | unsigned int dimm_sg = PDC_20621_DIMM_BASE + |
| 373 | (PDC_DIMM_WINDOW_STEP * portno) + |
| 374 | PDC_DIMM_APKT_PRD; |
| 375 | VPRINTK("ENTER, dimm_sg == 0x%x, %d\n", dimm_sg, dimm_sg); |
| 376 | |
| 377 | i = PDC_DIMM_ATA_PKT; |
| 378 | |
| 379 | /* |
| 380 | * Set up ATA packet |
| 381 | */ |
| 382 | if ((tf->protocol == ATA_PROT_DMA) && (!(tf->flags & ATA_TFLAG_WRITE))) |
| 383 | buf[i++] = PDC_PKT_READ; |
| 384 | else if (tf->protocol == ATA_PROT_NODATA) |
| 385 | buf[i++] = PDC_PKT_NODATA; |
| 386 | else |
| 387 | buf[i++] = 0; |
| 388 | buf[i++] = 0; /* reserved */ |
| 389 | buf[i++] = portno + 1; /* seq. id */ |
| 390 | buf[i++] = 0xff; /* delay seq. id */ |
| 391 | |
| 392 | /* dimm dma S/G, and next-pkt */ |
| 393 | dw = i >> 2; |
| 394 | if (tf->protocol == ATA_PROT_NODATA) |
| 395 | buf32[dw] = 0; |
| 396 | else |
| 397 | buf32[dw] = cpu_to_le32(dimm_sg); |
| 398 | buf32[dw + 1] = 0; |
| 399 | i += 8; |
| 400 | |
| 401 | if (devno == 0) |
| 402 | dev_reg = ATA_DEVICE_OBS; |
| 403 | else |
| 404 | dev_reg = ATA_DEVICE_OBS | ATA_DEV1; |
| 405 | |
| 406 | /* select device */ |
| 407 | buf[i++] = (1 << 5) | PDC_PKT_CLEAR_BSY | ATA_REG_DEVICE; |
| 408 | buf[i++] = dev_reg; |
| 409 | |
| 410 | /* device control register */ |
| 411 | buf[i++] = (1 << 5) | PDC_REG_DEVCTL; |
| 412 | buf[i++] = tf->ctl; |
| 413 | |
| 414 | return i; |
| 415 | } |
| 416 | |
| 417 | static inline void pdc20621_host_pkt(struct ata_taskfile *tf, u8 *buf, |
| 418 | unsigned int portno) |
| 419 | { |
| 420 | unsigned int dw; |
Al Viro | 4ca4e43 | 2007-12-30 09:32:22 +0000 | [diff] [blame] | 421 | u32 tmp; |
| 422 | __le32 *buf32 = (__le32 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | |
| 424 | unsigned int host_sg = PDC_20621_DIMM_BASE + |
| 425 | (PDC_DIMM_WINDOW_STEP * portno) + |
| 426 | PDC_DIMM_HOST_PRD; |
| 427 | unsigned int dimm_sg = PDC_20621_DIMM_BASE + |
| 428 | (PDC_DIMM_WINDOW_STEP * portno) + |
| 429 | PDC_DIMM_HPKT_PRD; |
| 430 | VPRINTK("ENTER, dimm_sg == 0x%x, %d\n", dimm_sg, dimm_sg); |
| 431 | VPRINTK("host_sg == 0x%x, %d\n", host_sg, host_sg); |
| 432 | |
| 433 | dw = PDC_DIMM_HOST_PKT >> 2; |
| 434 | |
| 435 | /* |
| 436 | * Set up Host DMA packet |
| 437 | */ |
| 438 | if ((tf->protocol == ATA_PROT_DMA) && (!(tf->flags & ATA_TFLAG_WRITE))) |
| 439 | tmp = PDC_PKT_READ; |
| 440 | else |
| 441 | tmp = 0; |
| 442 | tmp |= ((portno + 1 + 4) << 16); /* seq. id */ |
| 443 | tmp |= (0xff << 24); /* delay seq. id */ |
| 444 | buf32[dw + 0] = cpu_to_le32(tmp); |
| 445 | buf32[dw + 1] = cpu_to_le32(host_sg); |
| 446 | buf32[dw + 2] = cpu_to_le32(dimm_sg); |
| 447 | buf32[dw + 3] = 0; |
| 448 | |
| 449 | VPRINTK("HOST PKT @ %x == (0x%x 0x%x 0x%x 0x%x)\n", |
| 450 | PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * portno) + |
| 451 | PDC_DIMM_HOST_PKT, |
| 452 | buf32[dw + 0], |
| 453 | buf32[dw + 1], |
| 454 | buf32[dw + 2], |
| 455 | buf32[dw + 3]); |
| 456 | } |
| 457 | |
| 458 | static void pdc20621_dma_prep(struct ata_queued_cmd *qc) |
| 459 | { |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 460 | struct scatterlist *sg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | struct ata_port *ap = qc->ap; |
| 462 | struct pdc_port_priv *pp = ap->private_data; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 463 | void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR]; |
| 464 | void __iomem *dimm_mmio = ap->host->iomap[PDC_DIMM_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | unsigned int portno = ap->port_no; |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 466 | unsigned int i, si, idx, total_len = 0, sgt_len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | u32 *buf = (u32 *) &pp->dimm_buf[PDC_DIMM_HEADER_SZ]; |
| 468 | |
Tejun Heo | beec7db | 2006-02-11 19:11:13 +0900 | [diff] [blame] | 469 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 471 | VPRINTK("ata%u: ENTER\n", ap->print_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 472 | |
| 473 | /* hard-code chip #0 */ |
| 474 | mmio += PDC_CHIP0_OFS; |
| 475 | |
| 476 | /* |
| 477 | * Build S/G table |
| 478 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | idx = 0; |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 480 | for_each_sg(qc->sg, sg, qc->n_elem, si) { |
Jeff Garzik | cedc9a4 | 2005-10-05 07:13:30 -0400 | [diff] [blame] | 481 | buf[idx++] = cpu_to_le32(sg_dma_address(sg)); |
| 482 | buf[idx++] = cpu_to_le32(sg_dma_len(sg)); |
| 483 | total_len += sg_dma_len(sg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | } |
| 485 | buf[idx - 1] |= cpu_to_le32(ATA_PRD_EOT); |
| 486 | sgt_len = idx * 4; |
| 487 | |
| 488 | /* |
| 489 | * Build ATA, host DMA packets |
| 490 | */ |
| 491 | pdc20621_host_sg(&qc->tf, &pp->dimm_buf[0], portno, total_len); |
| 492 | pdc20621_host_pkt(&qc->tf, &pp->dimm_buf[0], portno); |
| 493 | |
| 494 | pdc20621_ata_sg(&qc->tf, &pp->dimm_buf[0], portno, total_len); |
| 495 | i = pdc20621_ata_pkt(&qc->tf, qc->dev->devno, &pp->dimm_buf[0], portno); |
| 496 | |
| 497 | if (qc->tf.flags & ATA_TFLAG_LBA48) |
| 498 | i = pdc_prep_lba48(&qc->tf, &pp->dimm_buf[0], i); |
| 499 | else |
| 500 | i = pdc_prep_lba28(&qc->tf, &pp->dimm_buf[0], i); |
| 501 | |
| 502 | pdc_pkt_footer(&qc->tf, &pp->dimm_buf[0], i); |
| 503 | |
| 504 | /* copy three S/G tables and two packets to DIMM MMIO window */ |
| 505 | memcpy_toio(dimm_mmio + (portno * PDC_DIMM_WINDOW_STEP), |
| 506 | &pp->dimm_buf, PDC_DIMM_HEADER_SZ); |
| 507 | memcpy_toio(dimm_mmio + (portno * PDC_DIMM_WINDOW_STEP) + |
| 508 | PDC_DIMM_HOST_PRD, |
| 509 | &pp->dimm_buf[PDC_DIMM_HEADER_SZ], sgt_len); |
| 510 | |
| 511 | /* force host FIFO dump */ |
| 512 | writel(0x00000001, mmio + PDC_20621_GENERAL_CTL); |
| 513 | |
| 514 | readl(dimm_mmio); /* MMIO PCI posting flush */ |
| 515 | |
| 516 | VPRINTK("ata pkt buf ofs %u, prd size %u, mmio copied\n", i, sgt_len); |
| 517 | } |
| 518 | |
| 519 | static void pdc20621_nodata_prep(struct ata_queued_cmd *qc) |
| 520 | { |
| 521 | struct ata_port *ap = qc->ap; |
| 522 | struct pdc_port_priv *pp = ap->private_data; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 523 | void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR]; |
| 524 | void __iomem *dimm_mmio = ap->host->iomap[PDC_DIMM_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | unsigned int portno = ap->port_no; |
| 526 | unsigned int i; |
| 527 | |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 528 | VPRINTK("ata%u: ENTER\n", ap->print_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | |
| 530 | /* hard-code chip #0 */ |
| 531 | mmio += PDC_CHIP0_OFS; |
| 532 | |
| 533 | i = pdc20621_ata_pkt(&qc->tf, qc->dev->devno, &pp->dimm_buf[0], portno); |
| 534 | |
| 535 | if (qc->tf.flags & ATA_TFLAG_LBA48) |
| 536 | i = pdc_prep_lba48(&qc->tf, &pp->dimm_buf[0], i); |
| 537 | else |
| 538 | i = pdc_prep_lba28(&qc->tf, &pp->dimm_buf[0], i); |
| 539 | |
| 540 | pdc_pkt_footer(&qc->tf, &pp->dimm_buf[0], i); |
| 541 | |
| 542 | /* copy three S/G tables and two packets to DIMM MMIO window */ |
| 543 | memcpy_toio(dimm_mmio + (portno * PDC_DIMM_WINDOW_STEP), |
| 544 | &pp->dimm_buf, PDC_DIMM_HEADER_SZ); |
| 545 | |
| 546 | /* force host FIFO dump */ |
| 547 | writel(0x00000001, mmio + PDC_20621_GENERAL_CTL); |
| 548 | |
| 549 | readl(dimm_mmio); /* MMIO PCI posting flush */ |
| 550 | |
| 551 | VPRINTK("ata pkt buf ofs %u, mmio copied\n", i); |
| 552 | } |
| 553 | |
| 554 | static void pdc20621_qc_prep(struct ata_queued_cmd *qc) |
| 555 | { |
| 556 | switch (qc->tf.protocol) { |
| 557 | case ATA_PROT_DMA: |
| 558 | pdc20621_dma_prep(qc); |
| 559 | break; |
| 560 | case ATA_PROT_NODATA: |
| 561 | pdc20621_nodata_prep(qc); |
| 562 | break; |
| 563 | default: |
| 564 | break; |
| 565 | } |
| 566 | } |
| 567 | |
| 568 | static void __pdc20621_push_hdma(struct ata_queued_cmd *qc, |
| 569 | unsigned int seq, |
| 570 | u32 pkt_ofs) |
| 571 | { |
| 572 | struct ata_port *ap = qc->ap; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 573 | struct ata_host *host = ap->host; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 574 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | |
| 576 | /* hard-code chip #0 */ |
| 577 | mmio += PDC_CHIP0_OFS; |
| 578 | |
| 579 | writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4)); |
| 580 | readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ |
| 581 | |
| 582 | writel(pkt_ofs, mmio + PDC_HDMA_PKT_SUBMIT); |
| 583 | readl(mmio + PDC_HDMA_PKT_SUBMIT); /* flush */ |
| 584 | } |
| 585 | |
| 586 | static void pdc20621_push_hdma(struct ata_queued_cmd *qc, |
| 587 | unsigned int seq, |
| 588 | u32 pkt_ofs) |
| 589 | { |
| 590 | struct ata_port *ap = qc->ap; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 591 | struct pdc_host_priv *pp = ap->host->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | unsigned int idx = pp->hdma_prod & PDC_HDMA_Q_MASK; |
| 593 | |
| 594 | if (!pp->doing_hdma) { |
| 595 | __pdc20621_push_hdma(qc, seq, pkt_ofs); |
| 596 | pp->doing_hdma = 1; |
| 597 | return; |
| 598 | } |
| 599 | |
| 600 | pp->hdma[idx].qc = qc; |
| 601 | pp->hdma[idx].seq = seq; |
| 602 | pp->hdma[idx].pkt_ofs = pkt_ofs; |
| 603 | pp->hdma_prod++; |
| 604 | } |
| 605 | |
| 606 | static void pdc20621_pop_hdma(struct ata_queued_cmd *qc) |
| 607 | { |
| 608 | struct ata_port *ap = qc->ap; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 609 | struct pdc_host_priv *pp = ap->host->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | unsigned int idx = pp->hdma_cons & PDC_HDMA_Q_MASK; |
| 611 | |
| 612 | /* if nothing on queue, we're done */ |
| 613 | if (pp->hdma_prod == pp->hdma_cons) { |
| 614 | pp->doing_hdma = 0; |
| 615 | return; |
| 616 | } |
| 617 | |
| 618 | __pdc20621_push_hdma(pp->hdma[idx].qc, pp->hdma[idx].seq, |
| 619 | pp->hdma[idx].pkt_ofs); |
| 620 | pp->hdma_cons++; |
| 621 | } |
| 622 | |
| 623 | #ifdef ATA_VERBOSE_DEBUG |
| 624 | static void pdc20621_dump_hdma(struct ata_queued_cmd *qc) |
| 625 | { |
| 626 | struct ata_port *ap = qc->ap; |
| 627 | unsigned int port_no = ap->port_no; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 628 | void __iomem *dimm_mmio = ap->host->iomap[PDC_DIMM_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | |
| 630 | dimm_mmio += (port_no * PDC_DIMM_WINDOW_STEP); |
| 631 | dimm_mmio += PDC_DIMM_HOST_PKT; |
| 632 | |
| 633 | printk(KERN_ERR "HDMA[0] == 0x%08X\n", readl(dimm_mmio)); |
| 634 | printk(KERN_ERR "HDMA[1] == 0x%08X\n", readl(dimm_mmio + 4)); |
| 635 | printk(KERN_ERR "HDMA[2] == 0x%08X\n", readl(dimm_mmio + 8)); |
| 636 | printk(KERN_ERR "HDMA[3] == 0x%08X\n", readl(dimm_mmio + 12)); |
| 637 | } |
| 638 | #else |
| 639 | static inline void pdc20621_dump_hdma(struct ata_queued_cmd *qc) { } |
| 640 | #endif /* ATA_VERBOSE_DEBUG */ |
| 641 | |
| 642 | static void pdc20621_packet_start(struct ata_queued_cmd *qc) |
| 643 | { |
| 644 | struct ata_port *ap = qc->ap; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 645 | struct ata_host *host = ap->host; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | unsigned int port_no = ap->port_no; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 647 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE); |
| 649 | u8 seq = (u8) (port_no + 1); |
| 650 | unsigned int port_ofs; |
| 651 | |
| 652 | /* hard-code chip #0 */ |
| 653 | mmio += PDC_CHIP0_OFS; |
| 654 | |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 655 | VPRINTK("ata%u: ENTER\n", ap->print_id); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | |
| 657 | wmb(); /* flush PRD, pkt writes */ |
| 658 | |
| 659 | port_ofs = PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * port_no); |
| 660 | |
| 661 | /* if writing, we (1) DMA to DIMM, then (2) do ATA command */ |
| 662 | if (rw && qc->tf.protocol == ATA_PROT_DMA) { |
| 663 | seq += 4; |
| 664 | |
| 665 | pdc20621_dump_hdma(qc); |
| 666 | pdc20621_push_hdma(qc, seq, port_ofs + PDC_DIMM_HOST_PKT); |
| 667 | VPRINTK("queued ofs 0x%x (%u), seq %u\n", |
| 668 | port_ofs + PDC_DIMM_HOST_PKT, |
| 669 | port_ofs + PDC_DIMM_HOST_PKT, |
| 670 | seq); |
| 671 | } else { |
| 672 | writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4)); |
| 673 | readl(mmio + PDC_20621_SEQCTL + (seq * 4)); /* flush */ |
| 674 | |
| 675 | writel(port_ofs + PDC_DIMM_ATA_PKT, |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 676 | ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); |
| 677 | readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | VPRINTK("submitted ofs 0x%x (%u), seq %u\n", |
| 679 | port_ofs + PDC_DIMM_ATA_PKT, |
| 680 | port_ofs + PDC_DIMM_ATA_PKT, |
| 681 | seq); |
| 682 | } |
| 683 | } |
| 684 | |
Tejun Heo | 9a3d9eb | 2006-01-23 13:09:36 +0900 | [diff] [blame] | 685 | static unsigned int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 686 | { |
| 687 | switch (qc->tf.protocol) { |
| 688 | case ATA_PROT_DMA: |
| 689 | case ATA_PROT_NODATA: |
| 690 | pdc20621_packet_start(qc); |
| 691 | return 0; |
| 692 | |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 693 | case ATAPI_PROT_DMA: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | BUG(); |
| 695 | break; |
| 696 | |
| 697 | default: |
| 698 | break; |
| 699 | } |
| 700 | |
| 701 | return ata_qc_issue_prot(qc); |
| 702 | } |
| 703 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 704 | static inline unsigned int pdc20621_host_intr(struct ata_port *ap, |
| 705 | struct ata_queued_cmd *qc, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 706 | unsigned int doing_hdma, |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 707 | void __iomem *mmio) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | { |
| 709 | unsigned int port_no = ap->port_no; |
| 710 | unsigned int port_ofs = |
| 711 | PDC_20621_DIMM_BASE + (PDC_DIMM_WINDOW_STEP * port_no); |
| 712 | u8 status; |
| 713 | unsigned int handled = 0; |
| 714 | |
| 715 | VPRINTK("ENTER\n"); |
| 716 | |
| 717 | if ((qc->tf.protocol == ATA_PROT_DMA) && /* read */ |
| 718 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { |
| 719 | |
| 720 | /* step two - DMA from DIMM to host */ |
| 721 | if (doing_hdma) { |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 722 | VPRINTK("ata%u: read hdma, 0x%x 0x%x\n", ap->print_id, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); |
| 724 | /* get drive status; clear intr; complete txn */ |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 725 | qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); |
| 726 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | pdc20621_pop_hdma(qc); |
| 728 | } |
| 729 | |
| 730 | /* step one - exec ATA command */ |
| 731 | else { |
| 732 | u8 seq = (u8) (port_no + 1 + 4); |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 733 | VPRINTK("ata%u: read ata, 0x%x 0x%x\n", ap->print_id, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); |
| 735 | |
| 736 | /* submit hdma pkt */ |
| 737 | pdc20621_dump_hdma(qc); |
| 738 | pdc20621_push_hdma(qc, seq, |
| 739 | port_ofs + PDC_DIMM_HOST_PKT); |
| 740 | } |
| 741 | handled = 1; |
| 742 | |
| 743 | } else if (qc->tf.protocol == ATA_PROT_DMA) { /* write */ |
| 744 | |
| 745 | /* step one - DMA from host to DIMM */ |
| 746 | if (doing_hdma) { |
| 747 | u8 seq = (u8) (port_no + 1); |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 748 | VPRINTK("ata%u: write hdma, 0x%x 0x%x\n", ap->print_id, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); |
| 750 | |
| 751 | /* submit ata pkt */ |
| 752 | writel(0x00000001, mmio + PDC_20621_SEQCTL + (seq * 4)); |
| 753 | readl(mmio + PDC_20621_SEQCTL + (seq * 4)); |
| 754 | writel(port_ofs + PDC_DIMM_ATA_PKT, |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 755 | ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); |
| 756 | readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | } |
| 758 | |
| 759 | /* step two - execute ATA command */ |
| 760 | else { |
Tejun Heo | 44877b4 | 2007-02-21 01:06:51 +0900 | [diff] [blame] | 761 | VPRINTK("ata%u: write ata, 0x%x 0x%x\n", ap->print_id, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | readl(mmio + 0x104), readl(mmio + PDC_HDMA_CTLSTAT)); |
| 763 | /* get drive status; clear intr; complete txn */ |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 764 | qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); |
| 765 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | pdc20621_pop_hdma(qc); |
| 767 | } |
| 768 | handled = 1; |
| 769 | |
| 770 | /* command completion, but no data xfer */ |
| 771 | } else if (qc->tf.protocol == ATA_PROT_NODATA) { |
| 772 | |
| 773 | status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); |
| 774 | DPRINTK("BUS_NODATA (drv_stat 0x%X)\n", status); |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 775 | qc->err_mask |= ac_err_mask(status); |
| 776 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | handled = 1; |
| 778 | |
| 779 | } else { |
| 780 | ap->stats.idle_irq++; |
| 781 | } |
| 782 | |
| 783 | return handled; |
| 784 | } |
| 785 | |
| 786 | static void pdc20621_irq_clear(struct ata_port *ap) |
| 787 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 788 | struct ata_host *host = ap->host; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 789 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 790 | |
| 791 | mmio += PDC_CHIP0_OFS; |
| 792 | |
| 793 | readl(mmio + PDC_20621_SEQMASK); |
| 794 | } |
| 795 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 796 | static irqreturn_t pdc20621_interrupt(int irq, void *dev_instance) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 797 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 798 | struct ata_host *host = dev_instance; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | struct ata_port *ap; |
| 800 | u32 mask = 0; |
| 801 | unsigned int i, tmp, port_no; |
| 802 | unsigned int handled = 0; |
Jeff Garzik | ea6ba10 | 2005-08-30 05:18:18 -0400 | [diff] [blame] | 803 | void __iomem *mmio_base; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | |
| 805 | VPRINTK("ENTER\n"); |
| 806 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 807 | if (!host || !host->iomap[PDC_MMIO_BAR]) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | VPRINTK("QUICK EXIT\n"); |
| 809 | return IRQ_NONE; |
| 810 | } |
| 811 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 812 | mmio_base = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | |
| 814 | /* reading should also clear interrupts */ |
| 815 | mmio_base += PDC_CHIP0_OFS; |
| 816 | mask = readl(mmio_base + PDC_20621_SEQMASK); |
| 817 | VPRINTK("mask == 0x%x\n", mask); |
| 818 | |
| 819 | if (mask == 0xffffffff) { |
| 820 | VPRINTK("QUICK EXIT 2\n"); |
| 821 | return IRQ_NONE; |
| 822 | } |
| 823 | mask &= 0xffff; /* only 16 tags possible */ |
| 824 | if (!mask) { |
| 825 | VPRINTK("QUICK EXIT 3\n"); |
| 826 | return IRQ_NONE; |
| 827 | } |
| 828 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 829 | spin_lock(&host->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 831 | for (i = 1; i < 9; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | port_no = i - 1; |
| 833 | if (port_no > 3) |
| 834 | port_no -= 4; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 835 | if (port_no >= host->n_ports) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | ap = NULL; |
| 837 | else |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 838 | ap = host->ports[port_no]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | tmp = mask & (1 << i); |
| 840 | VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); |
Tejun Heo | c138950 | 2005-08-22 14:59:24 +0900 | [diff] [blame] | 841 | if (tmp && ap && |
Jeff Garzik | 029f546 | 2006-04-02 10:30:40 -0400 | [diff] [blame] | 842 | !(ap->flags & ATA_FLAG_DISABLED)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 843 | struct ata_queued_cmd *qc; |
| 844 | |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 845 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
Albert Lee | e50362e | 2005-09-27 17:39:50 +0800 | [diff] [blame] | 846 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | handled += pdc20621_host_intr(ap, qc, (i > 4), |
| 848 | mmio_base); |
| 849 | } |
| 850 | } |
| 851 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 852 | spin_unlock(&host->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 853 | |
| 854 | VPRINTK("mask == 0x%x\n", mask); |
| 855 | |
| 856 | VPRINTK("EXIT\n"); |
| 857 | |
| 858 | return IRQ_RETVAL(handled); |
| 859 | } |
| 860 | |
| 861 | static void pdc_eng_timeout(struct ata_port *ap) |
| 862 | { |
| 863 | u8 drv_stat; |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 864 | struct ata_host *host = ap->host; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | struct ata_queued_cmd *qc; |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 866 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | |
| 868 | DPRINTK("ENTER\n"); |
| 869 | |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 870 | spin_lock_irqsave(&host->lock, flags); |
Jeff Garzik | b8f6153 | 2005-08-25 22:01:20 -0400 | [diff] [blame] | 871 | |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 872 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 874 | switch (qc->tf.protocol) { |
| 875 | case ATA_PROT_DMA: |
| 876 | case ATA_PROT_NODATA: |
Tejun Heo | f15a1da | 2006-05-15 20:57:56 +0900 | [diff] [blame] | 877 | ata_port_printk(ap, KERN_ERR, "command timeout\n"); |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 878 | qc->err_mask |= __ac_err_mask(ata_wait_idle(ap)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 879 | break; |
| 880 | |
| 881 | default: |
| 882 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); |
| 883 | |
Tejun Heo | f15a1da | 2006-05-15 20:57:56 +0900 | [diff] [blame] | 884 | ata_port_printk(ap, KERN_ERR, |
| 885 | "unknown timeout, cmd 0x%x stat 0x%x\n", |
| 886 | qc->tf.command, drv_stat); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 888 | qc->err_mask |= ac_err_mask(drv_stat); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | break; |
| 890 | } |
| 891 | |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 892 | spin_unlock_irqrestore(&host->lock, flags); |
Tejun Heo | f637902 | 2006-02-10 15:10:48 +0900 | [diff] [blame] | 893 | ata_eh_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | DPRINTK("EXIT\n"); |
| 895 | } |
| 896 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 897 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 898 | { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 899 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
| 900 | tf->protocol == ATA_PROT_NODATA); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | ata_tf_load(ap, tf); |
| 902 | } |
| 903 | |
| 904 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 905 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 906 | { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 907 | WARN_ON(tf->protocol == ATA_PROT_DMA || |
| 908 | tf->protocol == ATA_PROT_NODATA); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 909 | ata_exec_command(ap, tf); |
| 910 | } |
| 911 | |
| 912 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 913 | static void pdc_sata_setup_port(struct ata_ioports *port, void __iomem *base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 914 | { |
| 915 | port->cmd_addr = base; |
| 916 | port->data_addr = base; |
| 917 | port->feature_addr = |
| 918 | port->error_addr = base + 0x4; |
| 919 | port->nsect_addr = base + 0x8; |
| 920 | port->lbal_addr = base + 0xc; |
| 921 | port->lbam_addr = base + 0x10; |
| 922 | port->lbah_addr = base + 0x14; |
| 923 | port->device_addr = base + 0x18; |
| 924 | port->command_addr = |
| 925 | port->status_addr = base + 0x1c; |
| 926 | port->altstatus_addr = |
| 927 | port->ctl_addr = base + 0x38; |
| 928 | } |
| 929 | |
| 930 | |
| 931 | #ifdef ATA_VERBOSE_DEBUG |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 932 | static void pdc20621_get_from_dimm(struct ata_host *host, void *psource, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 933 | u32 offset, u32 size) |
| 934 | { |
| 935 | u32 window_size; |
| 936 | u16 idx; |
| 937 | u8 page_mask; |
| 938 | long dist; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 939 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
| 940 | void __iomem *dimm_mmio = host->iomap[PDC_DIMM_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 941 | |
| 942 | /* hard-code chip #0 */ |
| 943 | mmio += PDC_CHIP0_OFS; |
| 944 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 945 | page_mask = 0x00; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 946 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 947 | idx = (u16) (offset / window_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 948 | |
| 949 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 950 | readl(mmio + PDC_GENERAL_CTLR); |
| 951 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 952 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
| 953 | |
| 954 | offset -= (idx * window_size); |
| 955 | idx++; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 956 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | (long) (window_size - offset); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 958 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 959 | dist); |
| 960 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 961 | psource += dist; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | size -= dist; |
| 963 | for (; (long) size >= (long) window_size ;) { |
| 964 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 965 | readl(mmio + PDC_GENERAL_CTLR); |
| 966 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 967 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 968 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 969 | window_size / 4); |
| 970 | psource += window_size; |
| 971 | size -= window_size; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 972 | idx++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | } |
| 974 | |
| 975 | if (size) { |
| 976 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 977 | readl(mmio + PDC_GENERAL_CTLR); |
| 978 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 979 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 980 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 981 | size / 4); |
| 982 | } |
| 983 | } |
| 984 | #endif |
| 985 | |
| 986 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 987 | static void pdc20621_put_to_dimm(struct ata_host *host, void *psource, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 988 | u32 offset, u32 size) |
| 989 | { |
| 990 | u32 window_size; |
| 991 | u16 idx; |
| 992 | u8 page_mask; |
| 993 | long dist; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 994 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
| 995 | void __iomem *dimm_mmio = host->iomap[PDC_DIMM_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 996 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 997 | /* hard-code chip #0 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | mmio += PDC_CHIP0_OFS; |
| 999 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1000 | page_mask = 0x00; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1001 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1002 | idx = (u16) (offset / window_size); |
| 1003 | |
| 1004 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1005 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1006 | offset -= (idx * window_size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | idx++; |
| 1008 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : |
| 1009 | (long) (window_size - offset); |
Al Viro | a9afd7c | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 1010 | memcpy_toio(dimm_mmio + offset / 4, psource, dist); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1011 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 1012 | readl(mmio + PDC_GENERAL_CTLR); |
| 1013 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1014 | psource += dist; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1015 | size -= dist; |
| 1016 | for (; (long) size >= (long) window_size ;) { |
| 1017 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1018 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
Al Viro | a9afd7c | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 1019 | memcpy_toio(dimm_mmio, psource, window_size / 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 1021 | readl(mmio + PDC_GENERAL_CTLR); |
| 1022 | psource += window_size; |
| 1023 | size -= window_size; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1024 | idx++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1025 | } |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1026 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1027 | if (size) { |
| 1028 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
| 1029 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
Al Viro | a9afd7c | 2005-10-21 06:46:02 +0100 | [diff] [blame] | 1030 | memcpy_toio(dimm_mmio, psource, size / 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1031 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
| 1032 | readl(mmio + PDC_GENERAL_CTLR); |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1037 | static unsigned int pdc20621_i2c_read(struct ata_host *host, u32 device, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | u32 subaddr, u32 *pdata) |
| 1039 | { |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1040 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1041 | u32 i2creg = 0; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1042 | u32 status; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1043 | u32 count = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1044 | |
| 1045 | /* hard-code chip #0 */ |
| 1046 | mmio += PDC_CHIP0_OFS; |
| 1047 | |
| 1048 | i2creg |= device << 24; |
| 1049 | i2creg |= subaddr << 16; |
| 1050 | |
| 1051 | /* Set the device and subaddress */ |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1052 | writel(i2creg, mmio + PDC_I2C_ADDR_DATA); |
| 1053 | readl(mmio + PDC_I2C_ADDR_DATA); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1054 | |
| 1055 | /* Write Control to perform read operation, mask int */ |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1056 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1057 | mmio + PDC_I2C_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1058 | |
| 1059 | for (count = 0; count <= 1000; count ++) { |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1060 | status = readl(mmio + PDC_I2C_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1061 | if (status & PDC_I2C_COMPLETE) { |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1062 | status = readl(mmio + PDC_I2C_ADDR_DATA); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1063 | break; |
| 1064 | } else if (count == 1000) |
| 1065 | return 0; |
| 1066 | } |
| 1067 | |
| 1068 | *pdata = (status >> 8) & 0x000000ff; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1069 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1070 | } |
| 1071 | |
| 1072 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1073 | static int pdc20621_detect_dimm(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1074 | { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1075 | u32 data = 0; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1076 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1077 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1078 | if (data == 100) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1079 | return 100; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1080 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1081 | return 0; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1082 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1083 | if (pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { |
Jeff Garzik | b447916 | 2007-10-25 20:47:30 -0400 | [diff] [blame] | 1084 | if (data <= 0x75) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1085 | return 133; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1086 | } else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | return 0; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1088 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1089 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | } |
| 1091 | |
| 1092 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1093 | static int pdc20621_prog_dimm0(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | { |
| 1095 | u32 spd0[50]; |
| 1096 | u32 data = 0; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1097 | int size, i; |
| 1098 | u8 bdimmsize; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1099 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1100 | static const struct { |
| 1101 | unsigned int reg; |
| 1102 | unsigned int ofs; |
| 1103 | } pdc_i2c_read_data [] = { |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1104 | { PDC_DIMM_SPD_TYPE, 11 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1106 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, |
| 1108 | { PDC_DIMM_SPD_ROW_NUM, 3 }, |
| 1109 | { PDC_DIMM_SPD_BANK_NUM, 17 }, |
| 1110 | { PDC_DIMM_SPD_MODULE_ROW, 5 }, |
| 1111 | { PDC_DIMM_SPD_ROW_PRE_CHARGE, 27 }, |
| 1112 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, |
| 1113 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, |
| 1114 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1115 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1116 | }; |
| 1117 | |
| 1118 | /* hard-code chip #0 */ |
| 1119 | mmio += PDC_CHIP0_OFS; |
| 1120 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1121 | for (i = 0; i < ARRAY_SIZE(pdc_i2c_read_data); i++) |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1122 | pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1123 | pdc_i2c_read_data[i].reg, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1124 | &spd0[pdc_i2c_read_data[i].ofs]); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1125 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1126 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); |
| 1127 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | ((((spd0[27] + 9) / 10) - 1) << 8) ; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1129 | data |= (((((spd0[29] > spd0[28]) |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1130 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1131 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1132 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1133 | if (spd0[18] & 0x08) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1134 | data |= ((0x03) << 14); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1135 | else if (spd0[18] & 0x04) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | data |= ((0x02) << 14); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1137 | else if (spd0[18] & 0x01) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | data |= ((0x01) << 14); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1139 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | data |= (0 << 14); |
| 1141 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1142 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1143 | Calculate the size of bDIMMSize (power of 2) and |
| 1144 | merge the DIMM size by program start/end address. |
| 1145 | */ |
| 1146 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1147 | bdimmsize = spd0[4] + (spd0[5] / 2) + spd0[3] + (spd0[17] / 2) + 3; |
| 1148 | size = (1 << bdimmsize) >> 20; /* size = xxx(MB) */ |
| 1149 | data |= (((size / 16) - 1) << 16); |
| 1150 | data |= (0 << 23); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1151 | data |= 8; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1152 | writel(data, mmio + PDC_DIMM0_CONTROL); |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1153 | readl(mmio + PDC_DIMM0_CONTROL); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1154 | return size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1155 | } |
| 1156 | |
| 1157 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1158 | static unsigned int pdc20621_prog_dimm_global(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1159 | { |
| 1160 | u32 data, spd0; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1161 | int error, i; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1162 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1163 | |
| 1164 | /* hard-code chip #0 */ |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1165 | mmio += PDC_CHIP0_OFS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1166 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1167 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | Set To Default : DIMM Module Global Control Register (0x022259F1) |
| 1169 | DIMM Arbitration Disable (bit 20) |
| 1170 | DIMM Data/Control Output Driving Selection (bit12 - bit15) |
| 1171 | Refresh Enable (bit 17) |
| 1172 | */ |
| 1173 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1174 | data = 0x022259F1; |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1175 | writel(data, mmio + PDC_SDRAM_CONTROL); |
| 1176 | readl(mmio + PDC_SDRAM_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | |
| 1178 | /* Turn on for ECC */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1179 | pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1180 | PDC_DIMM_SPD_TYPE, &spd0); |
| 1181 | if (spd0 == 0x02) { |
| 1182 | data |= (0x01 << 16); |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1183 | writel(data, mmio + PDC_SDRAM_CONTROL); |
| 1184 | readl(mmio + PDC_SDRAM_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1185 | printk(KERN_ERR "Local DIMM ECC Enabled\n"); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1186 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1187 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1188 | /* DIMM Initialization Select/Enable (bit 18/19) */ |
| 1189 | data &= (~(1<<18)); |
| 1190 | data |= (1<<19); |
| 1191 | writel(data, mmio + PDC_SDRAM_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1192 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1193 | error = 1; |
| 1194 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1195 | data = readl(mmio + PDC_SDRAM_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1196 | if (!(data & (1<<19))) { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1197 | error = 0; |
| 1198 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1199 | } |
| 1200 | msleep(i*100); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1201 | } |
| 1202 | return error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1203 | } |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1204 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1205 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1206 | static unsigned int pdc20621_dimm_init(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | { |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1208 | int speed, size, length; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1209 | u32 addr, spd0, pci_status; |
| 1210 | u32 tmp = 0; |
| 1211 | u32 time_period = 0; |
| 1212 | u32 tcount = 0; |
| 1213 | u32 ticks = 0; |
| 1214 | u32 clock = 0; |
| 1215 | u32 fparam = 0; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1216 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1217 | |
| 1218 | /* hard-code chip #0 */ |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1219 | mmio += PDC_CHIP0_OFS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1220 | |
| 1221 | /* Initialize PLL based upon PCI Bus Frequency */ |
| 1222 | |
| 1223 | /* Initialize Time Period Register */ |
| 1224 | writel(0xffffffff, mmio + PDC_TIME_PERIOD); |
| 1225 | time_period = readl(mmio + PDC_TIME_PERIOD); |
| 1226 | VPRINTK("Time Period Register (0x40): 0x%x\n", time_period); |
| 1227 | |
| 1228 | /* Enable timer */ |
Jeff Garzik | b2d46b6 | 2007-05-27 22:58:54 -0400 | [diff] [blame] | 1229 | writel(PDC_TIMER_DEFAULT, mmio + PDC_TIME_CONTROL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | readl(mmio + PDC_TIME_CONTROL); |
| 1231 | |
| 1232 | /* Wait 3 seconds */ |
| 1233 | msleep(3000); |
| 1234 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1235 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1236 | When timer is enabled, counter is decreased every internal |
| 1237 | clock cycle. |
| 1238 | */ |
| 1239 | |
| 1240 | tcount = readl(mmio + PDC_TIME_COUNTER); |
| 1241 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); |
| 1242 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1243 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1244 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter |
| 1245 | register should be >= (0xffffffff - 3x10^8). |
| 1246 | */ |
Jeff Garzik | b447916 | 2007-10-25 20:47:30 -0400 | [diff] [blame] | 1247 | if (tcount >= PCI_X_TCOUNT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1248 | ticks = (time_period - tcount); |
| 1249 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1250 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1251 | clock = (ticks / 300000); |
| 1252 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1254 | clock = (clock * 33); |
| 1255 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); |
| 1256 | |
| 1257 | /* PLL F Param (bit 22:16) */ |
| 1258 | fparam = (1400000 / clock) - 2; |
| 1259 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1260 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1261 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ |
| 1262 | pci_status = (0x8a001824 | (fparam << 16)); |
| 1263 | } else |
| 1264 | pci_status = PCI_PLL_INIT; |
| 1265 | |
| 1266 | /* Initialize PLL. */ |
| 1267 | VPRINTK("pci_status: 0x%x\n", pci_status); |
| 1268 | writel(pci_status, mmio + PDC_CTL_STATUS); |
| 1269 | readl(mmio + PDC_CTL_STATUS); |
| 1270 | |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1271 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1272 | Read SPD of DIMM by I2C interface, |
| 1273 | and program the DIMM Module Controller. |
| 1274 | */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1275 | if (!(speed = pdc20621_detect_dimm(host))) { |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1276 | printk(KERN_ERR "Detect Local DIMM Fail\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1277 | return 1; /* DIMM error */ |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1278 | } |
| 1279 | VPRINTK("Local DIMM Speed = %d\n", speed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1280 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1281 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1282 | size = pdc20621_prog_dimm0(host); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1283 | VPRINTK("Local DIMM Size = %dMB\n", size); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1284 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1285 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1286 | if (pdc20621_prog_dimm_global(host)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1287 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); |
| 1288 | return 1; |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1289 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1290 | |
| 1291 | #ifdef ATA_VERBOSE_DEBUG |
| 1292 | { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1293 | u8 test_parttern1[40] = |
| 1294 | {0x55,0xAA,'P','r','o','m','i','s','e',' ', |
| 1295 | 'N','o','t',' ','Y','e','t',' ', |
| 1296 | 'D','e','f','i','n','e','d',' ', |
| 1297 | '1','.','1','0', |
| 1298 | '9','8','0','3','1','6','1','2',0,0}; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | u8 test_parttern2[40] = {0}; |
| 1300 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1301 | pdc20621_put_to_dimm(host, test_parttern2, 0x10040, 40); |
| 1302 | pdc20621_put_to_dimm(host, test_parttern2, 0x40, 40); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1303 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1304 | pdc20621_put_to_dimm(host, test_parttern1, 0x10040, 40); |
| 1305 | pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1306 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1307 | test_parttern2[1], &(test_parttern2[2])); |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1308 | pdc20621_get_from_dimm(host, test_parttern2, 0x10040, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1309 | 40); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1310 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1311 | test_parttern2[1], &(test_parttern2[2])); |
| 1312 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1313 | pdc20621_put_to_dimm(host, test_parttern1, 0x40, 40); |
| 1314 | pdc20621_get_from_dimm(host, test_parttern2, 0x40, 40); |
Jeff Garzik | 8a60a07 | 2005-07-31 13:13:24 -0400 | [diff] [blame] | 1315 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1316 | test_parttern2[1], &(test_parttern2[2])); |
| 1317 | } |
| 1318 | #endif |
| 1319 | |
| 1320 | /* ECC initiliazation. */ |
| 1321 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1322 | pdc20621_i2c_read(host, PDC_DIMM0_SPD_DEV_ADDRESS, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | PDC_DIMM_SPD_TYPE, &spd0); |
| 1324 | if (spd0 == 0x02) { |
| 1325 | VPRINTK("Start ECC initialization\n"); |
| 1326 | addr = 0; |
| 1327 | length = size * 1024 * 1024; |
| 1328 | while (addr < length) { |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1329 | pdc20621_put_to_dimm(host, (void *) &tmp, addr, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1330 | sizeof(u32)); |
| 1331 | addr += sizeof(u32); |
| 1332 | } |
| 1333 | VPRINTK("Finish ECC initialization\n"); |
| 1334 | } |
| 1335 | return 0; |
| 1336 | } |
| 1337 | |
| 1338 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1339 | static void pdc_20621_init(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | { |
| 1341 | u32 tmp; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1342 | void __iomem *mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1343 | |
| 1344 | /* hard-code chip #0 */ |
| 1345 | mmio += PDC_CHIP0_OFS; |
| 1346 | |
| 1347 | /* |
| 1348 | * Select page 0x40 for our 32k DIMM window |
| 1349 | */ |
| 1350 | tmp = readl(mmio + PDC_20621_DIMM_WINDOW) & 0xffff0000; |
| 1351 | tmp |= PDC_PAGE_WINDOW; /* page 40h; arbitrarily selected */ |
| 1352 | writel(tmp, mmio + PDC_20621_DIMM_WINDOW); |
| 1353 | |
| 1354 | /* |
| 1355 | * Reset Host DMA |
| 1356 | */ |
| 1357 | tmp = readl(mmio + PDC_HDMA_CTLSTAT); |
| 1358 | tmp |= PDC_RESET; |
| 1359 | writel(tmp, mmio + PDC_HDMA_CTLSTAT); |
| 1360 | readl(mmio + PDC_HDMA_CTLSTAT); /* flush */ |
| 1361 | |
| 1362 | udelay(10); |
| 1363 | |
| 1364 | tmp = readl(mmio + PDC_HDMA_CTLSTAT); |
| 1365 | tmp &= ~PDC_RESET; |
| 1366 | writel(tmp, mmio + PDC_HDMA_CTLSTAT); |
| 1367 | readl(mmio + PDC_HDMA_CTLSTAT); /* flush */ |
| 1368 | } |
| 1369 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1370 | static int pdc_sata_init_one(struct pci_dev *pdev, |
| 1371 | const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1372 | { |
| 1373 | static int printed_version; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1374 | const struct ata_port_info *ppi[] = |
| 1375 | { &pdc_port_info[ent->driver_data], NULL }; |
| 1376 | struct ata_host *host; |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1377 | struct pdc_host_priv *hpriv; |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1378 | int i, rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1379 | |
| 1380 | if (!printed_version++) |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 1381 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1382 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1383 | /* allocate host */ |
| 1384 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, 4); |
| 1385 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); |
| 1386 | if (!host || !hpriv) |
| 1387 | return -ENOMEM; |
| 1388 | |
| 1389 | host->private_data = hpriv; |
| 1390 | |
| 1391 | /* acquire resources and fill host */ |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1392 | rc = pcim_enable_device(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1393 | if (rc) |
| 1394 | return rc; |
| 1395 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1396 | rc = pcim_iomap_regions(pdev, (1 << PDC_MMIO_BAR) | (1 << PDC_DIMM_BAR), |
| 1397 | DRV_NAME); |
| 1398 | if (rc == -EBUSY) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1399 | pcim_pin_device(pdev); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1400 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1401 | return rc; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1402 | host->iomap = pcim_iomap_table(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1403 | |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1404 | for (i = 0; i < 4; i++) { |
| 1405 | struct ata_port *ap = host->ports[i]; |
| 1406 | void __iomem *base = host->iomap[PDC_MMIO_BAR] + PDC_CHIP0_OFS; |
| 1407 | unsigned int offset = 0x200 + i * 0x80; |
| 1408 | |
| 1409 | pdc_sata_setup_port(&ap->ioaddr, base + offset); |
| 1410 | |
| 1411 | ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio"); |
| 1412 | ata_port_pbar_desc(ap, PDC_DIMM_BAR, -1, "dimm"); |
| 1413 | ata_port_pbar_desc(ap, PDC_MMIO_BAR, offset, "port"); |
| 1414 | } |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1415 | |
| 1416 | /* configure and activate */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1417 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 1418 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1419 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1420 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 1421 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1422 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1423 | |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1424 | if (pdc20621_dimm_init(host)) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1425 | return -ENOMEM; |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1426 | pdc_20621_init(host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1427 | |
| 1428 | pci_set_master(pdev); |
Tejun Heo | 4447d35 | 2007-04-17 23:44:08 +0900 | [diff] [blame] | 1429 | return ata_host_activate(host, pdev->irq, pdc20621_interrupt, |
| 1430 | IRQF_SHARED, &pdc_sata_sht); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1431 | } |
| 1432 | |
| 1433 | |
| 1434 | static int __init pdc_sata_init(void) |
| 1435 | { |
Pavel Roskin | b788719 | 2006-08-10 18:13:18 +0900 | [diff] [blame] | 1436 | return pci_register_driver(&pdc_sata_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1437 | } |
| 1438 | |
| 1439 | |
| 1440 | static void __exit pdc_sata_exit(void) |
| 1441 | { |
| 1442 | pci_unregister_driver(&pdc_sata_pci_driver); |
| 1443 | } |
| 1444 | |
| 1445 | |
| 1446 | MODULE_AUTHOR("Jeff Garzik"); |
| 1447 | MODULE_DESCRIPTION("Promise SATA low-level driver"); |
| 1448 | MODULE_LICENSE("GPL"); |
| 1449 | MODULE_DEVICE_TABLE(pci, pdc_sata_pci_tbl); |
| 1450 | MODULE_VERSION(DRV_VERSION); |
| 1451 | |
| 1452 | module_init(pdc_sata_init); |
| 1453 | module_exit(pdc_sata_exit); |