David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1 | # |
| 2 | # SPI driver configuration |
| 3 | # |
| 4 | # NOTE: the reason this doesn't show SPI slave support is mostly that |
| 5 | # nobody's needed a slave side API yet. The master-role API is not |
| 6 | # fully appropriate there, so it'd need some thought to do well. |
| 7 | # |
| 8 | menu "SPI support" |
| 9 | |
| 10 | config SPI |
| 11 | bool "SPI support" |
| 12 | help |
| 13 | The "Serial Peripheral Interface" is a low level synchronous |
| 14 | protocol. Chips that support SPI can have data transfer rates |
| 15 | up to several tens of Mbit/sec. Chips are addressed with a |
| 16 | controller and a chipselect. Most SPI slaves don't support |
| 17 | dynamic device discovery; some are even write-only or read-only. |
| 18 | |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 19 | SPI is widely used by microcontrollers to talk with sensors, |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 20 | eeprom and flash memory, codecs and various other controller |
| 21 | chips, analog to digital (and d-to-a) converters, and more. |
| 22 | MMC and SD cards can be accessed using SPI protocol; and for |
| 23 | DataFlash cards used in MMC sockets, SPI must always be used. |
| 24 | |
| 25 | SPI is one of a family of similar protocols using a four wire |
| 26 | interface (select, clock, data in, data out) including Microwire |
| 27 | (half duplex), SSP, SSI, and PSP. This driver framework should |
| 28 | work with most such devices and controllers. |
| 29 | |
| 30 | config SPI_DEBUG |
| 31 | boolean "Debug support for SPI drivers" |
| 32 | depends on SPI && DEBUG_KERNEL |
| 33 | help |
| 34 | Say "yes" to enable debug messaging (like dev_dbg and pr_debug), |
| 35 | sysfs, and debugfs support in SPI controller and protocol drivers. |
| 36 | |
| 37 | # |
| 38 | # MASTER side ... talking to discrete SPI slave chips including microcontrollers |
| 39 | # |
| 40 | |
| 41 | config SPI_MASTER |
| 42 | # boolean "SPI Master Support" |
| 43 | boolean |
| 44 | default SPI |
| 45 | help |
| 46 | If your system has an master-capable SPI controller (which |
| 47 | provides the clock and chipselect), you can enable that |
| 48 | controller and the protocol drivers for the SPI slave chips |
| 49 | that are connected. |
| 50 | |
| 51 | comment "SPI Master Controller Drivers" |
| 52 | depends on SPI_MASTER |
| 53 | |
Haavard Skinnemoen | 754ce4f | 2007-02-14 00:33:09 -0800 | [diff] [blame] | 54 | config SPI_ATMEL |
| 55 | tristate "Atmel SPI Controller" |
| 56 | depends on (ARCH_AT91 || AVR32) && SPI_MASTER |
| 57 | help |
| 58 | This selects a driver for the Atmel SPI Controller, present on |
| 59 | many AT32 (AVR32) and AT91 (ARM) chips. |
| 60 | |
Wu, Bryan | a5f6abd | 2007-05-06 14:50:34 -0700 | [diff] [blame] | 61 | config SPI_BFIN |
| 62 | tristate "SPI controller driver for ADI Blackfin5xx" |
| 63 | depends on SPI_MASTER && BFIN |
| 64 | help |
| 65 | This is the SPI controller master driver for Blackfin 5xx processor. |
| 66 | |
Jan Nikitenko | 63bd235 | 2007-05-08 00:32:25 -0700 | [diff] [blame^] | 67 | config SPI_AU1550 |
| 68 | tristate "Au1550/Au12x0 SPI Controller" |
| 69 | depends on SPI_MASTER && (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL |
| 70 | select SPI_BITBANG |
| 71 | help |
| 72 | If you say yes to this option, support will be included for the |
| 73 | Au1550 SPI controller (may also work with Au1200,Au1210,Au1250). |
| 74 | |
| 75 | This driver can also be built as a module. If so, the module |
| 76 | will be called au1550_spi. |
| 77 | |
David Brownell | 9904f22 | 2006-01-08 13:34:26 -0800 | [diff] [blame] | 78 | config SPI_BITBANG |
| 79 | tristate "Bitbanging SPI master" |
| 80 | depends on SPI_MASTER && EXPERIMENTAL |
| 81 | help |
| 82 | With a few GPIO pins, your system can bitbang the SPI protocol. |
| 83 | Select this to get SPI support through I/O pins (GPIO, parallel |
| 84 | port, etc). Or, some systems' SPI master controller drivers use |
| 85 | this code to manage the per-word or per-transfer accesses to the |
| 86 | hardware shift registers. |
| 87 | |
| 88 | This is library code, and is automatically selected by drivers that |
| 89 | need it. You only need to select this explicitly to support driver |
| 90 | modules that aren't part of this kernel tree. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 91 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 92 | config SPI_BUTTERFLY |
| 93 | tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" |
| 94 | depends on SPI_MASTER && PARPORT && EXPERIMENTAL |
| 95 | select SPI_BITBANG |
| 96 | help |
| 97 | This uses a custom parallel port cable to connect to an AVR |
| 98 | Butterfly <http://www.atmel.com/products/avr/butterfly>, an |
| 99 | inexpensive battery powered microcontroller evaluation board. |
| 100 | This same cable can be used to flash new firmware. |
| 101 | |
Andrea Paterniani | 69c202a | 2007-02-12 00:52:39 -0800 | [diff] [blame] | 102 | config SPI_IMX |
| 103 | tristate "Freescale iMX SPI controller" |
| 104 | depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL |
| 105 | help |
| 106 | This enables using the Freescale iMX SPI controller in master |
| 107 | mode. |
| 108 | |
Kumar Gala | ccf0699 | 2006-05-20 15:00:15 -0700 | [diff] [blame] | 109 | config SPI_MPC83xx |
| 110 | tristate "Freescale MPC83xx SPI controller" |
| 111 | depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL |
| 112 | select SPI_BITBANG |
| 113 | help |
| 114 | This enables using the Freescale MPC83xx SPI controller in master |
| 115 | mode. |
| 116 | |
| 117 | Note, this driver uniquely supports the SPI controller on the MPC83xx |
| 118 | family of PowerPC processors. The MPC83xx uses a simple set of shift |
| 119 | registers for data (opposed to the CPM based descriptor model). |
| 120 | |
David Brownell | fdb3c18 | 2007-02-12 00:52:37 -0800 | [diff] [blame] | 121 | config SPI_OMAP_UWIRE |
| 122 | tristate "OMAP1 MicroWire" |
| 123 | depends on SPI_MASTER && ARCH_OMAP1 |
| 124 | select SPI_BITBANG |
| 125 | help |
| 126 | This hooks up to the MicroWire controller on OMAP1 chips. |
| 127 | |
Andrea Paterniani | 69c202a | 2007-02-12 00:52:39 -0800 | [diff] [blame] | 128 | |
Stephen Street | e0c9905 | 2006-03-07 23:53:24 -0800 | [diff] [blame] | 129 | config SPI_PXA2XX |
| 130 | tristate "PXA2xx SSP SPI master" |
| 131 | depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL |
| 132 | help |
| 133 | This enables using a PXA2xx SSP port as a SPI master controller. |
| 134 | The driver can be configured to use any SSP port and additional |
| 135 | documentation can be found a Documentation/spi/pxa2xx. |
| 136 | |
David Brownell | 85abfaa | 2007-02-12 00:52:36 -0800 | [diff] [blame] | 137 | config SPI_S3C24XX |
| 138 | tristate "Samsung S3C24XX series SPI" |
| 139 | depends on SPI_MASTER && ARCH_S3C2410 && EXPERIMENTAL |
| 140 | help |
| 141 | SPI driver for Samsung S3C24XX series ARM SoCs |
| 142 | |
Ben Dooks | 1fc7547 | 2006-05-20 15:00:17 -0700 | [diff] [blame] | 143 | config SPI_S3C24XX_GPIO |
| 144 | tristate "Samsung S3C24XX series SPI by GPIO" |
| 145 | depends on SPI_MASTER && ARCH_S3C2410 && SPI_BITBANG && EXPERIMENTAL |
| 146 | help |
| 147 | SPI driver for Samsung S3C24XX series ARM SoCs using |
| 148 | GPIO lines to provide the SPI bus. This can be used where |
| 149 | the inbuilt hardware cannot provide the transfer mode, or |
| 150 | where the board is using non hardware connected pins. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 151 | # |
| 152 | # Add new SPI master controllers in alphabetical order above this line |
| 153 | # |
| 154 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 155 | # |
| 156 | # There are lots of SPI device types, with sensors and memory |
| 157 | # being probably the most widely used ones. |
| 158 | # |
| 159 | comment "SPI Protocol Masters" |
| 160 | depends on SPI_MASTER |
| 161 | |
David Brownell | b587b13 | 2007-02-12 00:52:48 -0800 | [diff] [blame] | 162 | config SPI_AT25 |
| 163 | tristate "SPI EEPROMs from most vendors" |
| 164 | depends on SPI_MASTER && SYSFS |
| 165 | help |
| 166 | Enable this driver to get read/write support to most SPI EEPROMs, |
| 167 | after you configure the board init code to know about each eeprom |
| 168 | on your target board. |
| 169 | |
| 170 | This driver can also be built as a module. If so, the module |
| 171 | will be called at25. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 172 | |
Andrea Paterniani | 814a8d5 | 2007-05-08 00:32:15 -0700 | [diff] [blame] | 173 | config SPI_SPIDEV |
| 174 | tristate "User mode SPI device driver support" |
| 175 | depends on SPI_MASTER && EXPERIMENTAL |
| 176 | help |
| 177 | This supports user mode SPI protocol drivers. |
| 178 | |
| 179 | Note that this application programming interface is EXPERIMENTAL |
| 180 | and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. |
| 181 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 182 | # |
| 183 | # Add new SPI protocol masters in alphabetical order above this line |
| 184 | # |
| 185 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 186 | # (slave support would go here) |
| 187 | |
| 188 | endmenu # "SPI support" |
| 189 | |