Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 1 | Qualcomm Technologies, Inc. OSM Bindings |
| 2 | |
| 3 | Operating State Manager (OSM) is a hardware engine used by some Qualcomm |
| 4 | Technologies, Inc. (QTI) SoCs to manage frequency and voltage scaling |
| 5 | in hardware. OSM is capable of controlling frequency and voltage requests |
| 6 | for multiple clusters via the existence of multiple OSM domains. |
| 7 | |
| 8 | Properties: |
| 9 | - compatible |
| 10 | Usage: required |
| 11 | Value type: <string> |
Odelu Kukatla | 3799c7c | 2017-08-20 20:48:45 +0530 | [diff] [blame] | 12 | Definition: must be "qcom,clk-cpu-osm", "qcom,clk-cpu-osm-v2" or |
| 13 | "qcom,clk-cpu-osm-sdm670". |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 14 | |
| 15 | - reg |
| 16 | Usage: required |
| 17 | Value type: <prop-encoded-array> |
Deepak Katragadda | cc3e947 | 2017-07-07 10:30:15 -0700 | [diff] [blame] | 18 | Definition: Addresses and sizes for the memory of the OSM controller. |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 19 | |
| 20 | - reg-names |
| 21 | Usage: required |
| 22 | Value type: <stringlist> |
| 23 | Definition: Address names. Must be "osm_l3_base", "osm_pwrcl_base", |
Deepak Katragadda | cc3e947 | 2017-07-07 10:30:15 -0700 | [diff] [blame] | 24 | "osm_perfcl_base". |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 25 | Must be specified in the same order as the corresponding |
| 26 | addresses are specified in the reg property. |
Deepak Katragadda | eda782e | 2017-10-12 11:06:28 -0700 | [diff] [blame] | 27 | |
| 28 | - l3-devs |
| 29 | Usage: optional |
| 30 | Value type: <phandle> |
| 31 | Definition: List of phandles to devices that the OPP tables with the L3 |
| 32 | frequency and voltage mappings are loaded for. |
| 33 | |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 34 | - clock-names |
| 35 | Usage: required |
| 36 | Value type: <string> |
| 37 | Definition: Must be "aux_clk". |
| 38 | |
| 39 | - clocks |
| 40 | Usage: required |
| 41 | Value type: <phandle> |
| 42 | Definition: Phandle to the aux clock device. |
| 43 | |
| 44 | Example: |
| 45 | clock_cpucc: qcom,cpucc@0x17d41000 { |
| 46 | compatible = "qcom,clk-cpu-osm"; |
| 47 | reg = <0x17d41000 0x1400>, |
| 48 | <0x17d43000 0x1400>, |
Deepak Katragadda | cc3e947 | 2017-07-07 10:30:15 -0700 | [diff] [blame] | 49 | <0x17d45800 0x1400>; |
| 50 | reg-names = "osm_l3_base", "osm_pwrcl_base", "osm_perfcl_base"; |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 51 | |
Deepak Katragadda | eda782e | 2017-10-12 11:06:28 -0700 | [diff] [blame] | 52 | l3-devs = <&phandle0 &phandle1 &phandle2>; |
| 53 | |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 54 | clock-names = "xo_ao"; |
| 55 | clocks = <&clock_rpmh RPMH_CXO_CLK_A>; |
| 56 | #clock-cells = <1>; |
Deepak Katragadda | 7abd931 | 2016-12-21 14:18:00 -0800 | [diff] [blame] | 57 | }; |