blob: f47872a5ab74274e995eddcca364b84b3d0bac0e [file] [log] [blame]
Kiran Gundac1c1de72017-09-21 15:05:09 +05301/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&spmi_bus {
14 qcom,pm8950@0 {
15 compatible ="qcom,spmi-pmic";
16 reg = <0x0 SPMI_USID>;
17 #address-cells = <2>;
18 #size-cells = <0>;
19
20 pm8950_revid: qcom,revid@100 {
21 compatible = "qcom,qpnp-revid";
22 reg = <0x100 0x100>;
23 };
24
25 pm8950_temp_alarm: qcom,temp-alarm@2400 {
26 compatible = "qcom,qpnp-temp-alarm";
27 reg = <0x2400 0x100>;
28 interrupts = <0x0 0x24 0x0>;
29 label = "pm8950_tz";
30 qcom,channel-num = <8>;
31 qcom,threshold-set = <0>;
32 qcom,temp_alarm-vadc = <&pm8950_vadc>;
33 };
34
35 qcom,power-on@800 {
36 compatible = "qcom,qpnp-power-on";
37 reg = <0x800 0x100>;
38 interrupts = <0x0 0x8 0x0>,
39 <0x0 0x8 0x1>,
40 <0x0 0x8 0x4>,
41 <0x0 0x8 0x5>;
42 interrupt-names = "kpdpwr", "resin",
43 "resin-bark", "kpdpwr-resin-bark";
44 qcom,pon-dbc-delay = <15625>;
45 qcom,system-reset;
46
47 qcom,pon_1 {
48 qcom,pon-type = <0>;
49 qcom,pull-up = <1>;
50 linux,code = <116>;
51 };
52
53 qcom,pon_2 {
54 qcom,pon-type = <1>;
55 qcom,pull-up = <1>;
56 linux,code = <114>;
57 };
58 };
59
60 pm8950_coincell: qcom,coincell@2800 {
61 compatible = "qcom,qpnp-coincell";
62 reg = <0x2800 0x100>;
63 };
64
65 pm8950_mpps: mpps {
66 compatible = "qcom,qpnp-pin";
67 spmi-dev-container;
68 gpio-controller;
69 #gpio-cells = <2>;
70 #address-cells = <1>;
71 #size-cells = <1>;
72 label = "pm8950-mpp";
73
74 mpp@a000 {
75 reg = <0xa000 0x100>;
76 qcom,pin-num = <1>;
77 status = "disabled";
78 };
79
80 mpp@a100 {
81 /* MPP2 - PA_THERM config */
82 reg = <0xa100 0x100>;
83 qcom,pin-num = <2>;
84 qcom,mode = <4>; /* AIN input */
85 qcom,invert = <1>; /* Enable MPP */
86 qcom,ain-route = <1>; /* AMUX 6 */
87 qcom,master-en = <1>;
88 qcom,src-sel = <0>; /* Function constant */
89 };
90
91 mpp@a200 {
92 reg = <0xa200 0x100>;
93 qcom,pin-num = <3>;
94 status = "disabled";
95 };
96
97 mpp@a300 {
98 /* MPP4 - CASE_THERM config */
99 reg = <0xa300 0x100>;
100 qcom,pin-num = <4>;
101 qcom,mode = <4>; /* AIN input */
102 qcom,invert = <1>; /* Enable MPP */
103 qcom,ain-route = <3>; /* AMUX 8 */
104 qcom,master-en = <1>;
105 qcom,src-sel = <0>; /* Function constant */
106 };
107 };
108
109 pm8950_gpios: gpios {
110 spmi-dev-container;
111 compatible = "qcom,qpnp-pin";
112 gpio-controller;
113 #gpio-cells = <2>;
114 #address-cells = <1>;
115 #size-cells = <1>;
116 label = "pm8950-gpio";
117
118 gpio@c000 {
119 reg = <0xc000 0x100>;
120 qcom,pin-num = <1>;
121 status = "disabled";
122 };
123
124 gpio@c100 {
125 reg = <0xc100 0x100>;
126 qcom,pin-num = <2>;
127 status = "disabled";
128 };
129
130 gpio@c200 {
131 reg = <0xc200 0x100>;
132 qcom,pin-num = <3>;
133 status = "disabled";
134 };
135
136 gpio@c300 {
137 reg = <0xc300 0x100>;
138 qcom,pin-num = <4>;
139 status = "disabled";
140 };
141
142 gpio@c400 {
143 reg = <0xc400 0x100>;
144 qcom,pin-num = <5>;
145 status = "disabled";
146 };
147
148 gpio@c500 {
149 reg = <0xc500 0x100>;
150 qcom,pin-num = <6>;
151 status = "disabled";
152 };
153
154 gpio@c600 {
155 reg = <0xc600 0x100>;
156 qcom,pin-num = <7>;
157 status = "disabled";
158 };
159
160 gpio@c700 {
161 reg = <0xc700 0x100>;
162 qcom,pin-num = <8>;
163 status = "disabled";
164 };
165 };
166
167 pm8950_vadc: vadc@3100 {
168 compatible = "qcom,qpnp-vadc";
169 reg = <0x3100 0x100>;
170 #address-cells = <1>;
171 #size-cells = <0>;
172 interrupts = <0x0 0x31 0x0>;
173 interrupt-names = "eoc-int-en-set";
174 qcom,adc-bit-resolution = <15>;
175 qcom,adc-vdd-reference = <1800>;
176 qcom,vadc-poll-eoc;
177 qcom,pmic-revid = <&pm8950_revid>;
178
179 chan@5 {
180 label = "vcoin";
181 reg = <5>;
182 qcom,decimation = <0>;
183 qcom,pre-div-channel-scaling = <1>;
184 qcom,calibration-type = "absolute";
185 qcom,scale-function = <0>;
186 qcom,hw-settle-time = <0>;
187 qcom,fast-avg-setup = <0>;
188 };
189
190 chan@7 {
191 label = "vph_pwr";
192 reg = <7>;
193 qcom,decimation = <0>;
194 qcom,pre-div-channel-scaling = <1>;
195 qcom,calibration-type = "absolute";
196 qcom,scale-function = <0>;
197 qcom,hw-settle-time = <0>;
198 qcom,fast-avg-setup = <0>;
199 };
200
201 chan@8 {
202 label = "die_temp";
203 reg = <8>;
204 qcom,decimation = <0>;
205 qcom,pre-div-channel-scaling = <0>;
206 qcom,calibration-type = "absolute";
207 qcom,scale-function = <3>;
208 qcom,hw-settle-time = <0>;
209 qcom,fast-avg-setup = <0>;
210 };
211
212 chan@9 {
213 label = "ref_625mv";
214 reg = <9>;
215 qcom,decimation = <0>;
216 qcom,pre-div-channel-scaling = <0>;
217 qcom,calibration-type = "absolute";
218 qcom,scale-function = <0>;
219 qcom,hw-settle-time = <0>;
220 qcom,fast-avg-setup = <0>;
221 };
222
223 chan@a {
224 label = "ref_1250v";
225 reg = <0xa>;
226 qcom,decimation = <0>;
227 qcom,pre-div-channel-scaling = <0>;
228 qcom,calibration-type = "absolute";
229 qcom,scale-function = <0>;
230 qcom,hw-settle-time = <0>;
231 qcom,fast-avg-setup = <0>;
232 };
233
234 chan@c {
235 label = "ref_buf_625mv";
236 reg = <0xc>;
237 qcom,decimation = <0>;
238 qcom,pre-div-channel-scaling = <0>;
239 qcom,calibration-type = "absolute";
240 qcom,scale-function = <0>;
241 qcom,hw-settle-time = <0>;
242 qcom,fast-avg-setup = <0>;
243 };
244
245 chan@36 {
246 label = "pa_therm0";
247 reg = <0x36>;
248 qcom,decimation = <0>;
249 qcom,pre-div-channel-scaling = <0>;
250 qcom,calibration-type = "ratiometric";
251 qcom,scale-function = <2>;
252 qcom,hw-settle-time = <2>;
253 qcom,fast-avg-setup = <0>;
254 };
255
256 chan@11 {
257 label = "pa_therm1";
258 reg = <0x11>;
259 qcom,decimation = <0>;
260 qcom,pre-div-channel-scaling = <0>;
261 qcom,calibration-type = "ratiometric";
262 qcom,scale-function = <2>;
263 qcom,hw-settle-time = <2>;
264 qcom,fast-avg-setup = <0>;
265 qcom,vadc-thermal-node;
266 };
267
268 chan@32 {
269 label = "xo_therm";
270 reg = <0x32>;
271 qcom,decimation = <0>;
272 qcom,pre-div-channel-scaling = <0>;
273 qcom,calibration-type = "ratiometric";
274 qcom,scale-function = <4>;
275 qcom,hw-settle-time = <2>;
276 qcom,fast-avg-setup = <0>;
277 qcom,vadc-thermal-node;
278 };
279
280 chan@3c {
281 label = "xo_therm_buf";
282 reg = <0x3c>;
283 qcom,decimation = <0>;
284 qcom,pre-div-channel-scaling = <0>;
285 qcom,calibration-type = "ratiometric";
286 qcom,scale-function = <4>;
287 qcom,hw-settle-time = <2>;
288 qcom,fast-avg-setup = <0>;
289 qcom,vadc-thermal-node;
290 };
291
292 chan@13 {
293 label = "case_therm";
294 reg = <0x13>;
295 qcom,decimation = <0>;
296 qcom,pre-div-channel-scaling = <0>;
297 qcom,calibration-type = "ratiometric";
298 qcom,scale-function = <2>;
299 qcom,hw-settle-time = <2>;
300 qcom,fast-avg-setup = <0>;
301 qcom,vadc-thermal-node;
302 };
303 };
304
305 pm8950_adc_tm: vadc@3400 {
306 compatible = "qcom,qpnp-adc-tm";
307 reg = <0x3400 0x100>;
308 #address-cells = <1>;
309 #size-cells = <0>;
310 interrupts = <0x0 0x34 0x0>,
311 <0x0 0x34 0x3>,
312 <0x0 0x34 0x4>;
313 interrupt-names = "eoc-int-en-set",
314 "high-thr-en-set",
315 "low-thr-en-set";
316 qcom,adc-bit-resolution = <15>;
317 qcom,adc-vdd-reference = <1800>;
318 qcom,adc_tm-vadc = <&pm8950_vadc>;
319 qcom,pmic-revid = <&pm8950_revid>;
320
321 chan@36 {
322 label = "pa_therm0";
323 reg = <0x36>;
324 qcom,decimation = <0>;
325 qcom,pre-div-channel-scaling = <0>;
326 qcom,calibration-type = "ratiometric";
327 qcom,scale-function = <2>;
328 qcom,hw-settle-time = <2>;
329 qcom,fast-avg-setup = <0>;
330 qcom,btm-channel-number = <0x48>;
331 qcom,thermal-node;
332 };
333
334 chan@7 {
335 label = "vph_pwr";
336 reg = <0x7>;
337 qcom,decimation = <0>;
338 qcom,pre-div-channel-scaling = <1>;
339 qcom,calibration-type = "absolute";
340 qcom,scale-function = <0>;
341 qcom,hw-settle-time = <0>;
342 qcom,fast-avg-setup = <0>;
343 qcom,btm-channel-number = <0x68>;
344 };
345 };
346
347 pm8950_rtc: qcom,pm8950_rtc {
348 spmi-dev-container;
349 compatible = "qcom,qpnp-rtc";
350 #address-cells = <1>;
351 #size-cells = <1>;
352 qcom,qpnp-rtc-write = <0>;
353 qcom,qpnp-rtc-alarm-pwrup = <0>;
354
355 qcom,pm8950_rtc_rw@6000 {
356 reg = <0x6000 0x100>;
357 };
358
359 qcom,pm8950_rtc_alarm@6100 {
360 reg = <0x6100 0x100>;
361 interrupts = <0x0 0x61 0x1>;
362 };
363 };
364
365 qcom,leds@a300 {
366 compatible = "qcom,leds-qpnp";
367 reg = <0xa300 0x100>;
368 label = "mpp";
369 };
370 };
371
372 pm8950_1: qcom,pm8950@1 {
373 compatible ="qcom,spmi-pmic";
374 reg = <0x1 SPMI_USID>;
375 #address-cells = <2>;
376 #size-cells = <0>;
377
378 pm8950_pwm: pwm@bc00 {
379 status = "disabled";
380 compatible = "qcom,qpnp-pwm";
381 reg = <0xbc00 0x100>;
382 reg-names = "qpnp-lpg-channel-base";
383 qcom,channel-id = <0>;
384 qcom,supported-sizes = <6>, <9>;
385 #pwm-cells = <2>;
386 };
387 };
388};