blob: 3342cb1407bc927be59f42ece4410c4b38b4e472 [file] [log] [blame]
Simon Arlottec9653b2012-05-26 01:04:43 -06001/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "brcm,bcm2835";
5 model = "BCM2835";
Simon Arlott89214f02012-09-12 19:57:26 -06006 interrupt-parent = <&intc>;
Simon Arlottec9653b2012-05-26 01:04:43 -06007
8 chosen {
Simon Arlott407f9be2012-09-10 23:29:17 -06009 bootargs = "earlyprintk console=ttyAMA0";
Simon Arlottec9653b2012-05-26 01:04:43 -060010 };
11
12 soc {
13 compatible = "simple-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
16 ranges = <0x7e000000 0x20000000 0x02000000>;
Simon Arlott89214f02012-09-12 19:57:26 -060017
Stephen Warren25b2f1b2014-02-11 21:48:47 -070018 timer@7e003000 {
Simon Arlottee4af562012-09-10 22:38:35 -060019 compatible = "brcm,bcm2835-system-timer";
20 reg = <0x7e003000 0x1000>;
21 interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
22 clock-frequency = <1000000>;
23 };
24
Florian Meier89072332014-01-13 12:11:43 +010025 dma: dma@7e007000 {
26 compatible = "brcm,bcm2835-dma";
27 reg = <0x7e007000 0xf00>;
28 interrupts = <1 16>,
29 <1 17>,
30 <1 18>,
31 <1 19>,
32 <1 20>,
33 <1 21>,
34 <1 22>,
35 <1 23>,
36 <1 24>,
37 <1 25>,
38 <1 26>,
39 <1 27>,
40 <1 28>;
41
42 #dma-cells = <1>;
43 brcm,dma-channel-mask = <0x7f35>;
44 };
45
Stephen Warren25b2f1b2014-02-11 21:48:47 -070046 intc: interrupt-controller@7e00b200 {
Simon Arlott89214f02012-09-12 19:57:26 -060047 compatible = "brcm,bcm2835-armctrl-ic";
48 reg = <0x7e00b200 0x200>;
49 interrupt-controller;
50 #interrupt-cells = <2>;
51 };
Simon Arlott407f9be2012-09-10 23:29:17 -060052
Stephen Warren25b2f1b2014-02-11 21:48:47 -070053 watchdog@7e100000 {
Stephen Warrend0f1c7f2012-09-15 22:18:10 -060054 compatible = "brcm,bcm2835-pm-wdt";
55 reg = <0x7e100000 0x28>;
56 };
57
Stephen Warren25b2f1b2014-02-11 21:48:47 -070058 rng@7e104000 {
Lubomir Rintela1bf7082013-03-28 07:12:04 +010059 compatible = "brcm,bcm2835-rng";
60 reg = <0x7e104000 0x10>;
61 };
62
Stephen Warren25b2f1b2014-02-11 21:48:47 -070063 gpio: gpio@7e200000 {
Stephen Warren805504a2012-09-27 21:54:21 -060064 compatible = "brcm,bcm2835-gpio";
65 reg = <0x7e200000 0xb4>;
66 /*
67 * The GPIO IP block is designed for 3 banks of GPIOs.
68 * Each bank has a GPIO interrupt for itself.
69 * There is an overall "any bank" interrupt.
70 * In order, these are GIC interrupts 17, 18, 19, 20.
71 * Since the BCM2835 only has 2 banks, the 2nd bank
72 * interrupt output appears to be mirrored onto the
73 * 3rd bank's interrupt signal.
74 * So, a bank0 interrupt shows up on 17, 20, and
75 * a bank1 interrupt shows up on 18, 19, 20!
76 */
77 interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
78
79 gpio-controller;
80 #gpio-cells = <2>;
81
82 interrupt-controller;
83 #interrupt-cells = <2>;
84 };
Stephen Warren5186bf22012-12-24 21:58:56 -070085
Stephen Warren25b2f1b2014-02-11 21:48:47 -070086 uart@7e201000 {
Stephen Warrenef3c6902014-02-11 21:44:35 -070087 compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
88 reg = <0x7e201000 0x1000>;
89 interrupts = <2 25>;
90 clock-frequency = <3000000>;
91 arm,primecell-periphid = <0x00241011>;
92 };
93
Florian Meier9511cc4d2014-01-13 12:16:40 +010094 i2s: i2s@7e203000 {
95 compatible = "brcm,bcm2835-i2s";
96 reg = <0x7e203000 0x20>,
97 <0x7e101098 0x02>;
98
99 dmas = <&dma 2>,
100 <&dma 3>;
101 dma-names = "tx", "rx";
Mark Brown667bbd52014-09-16 19:51:36 -0600102 status = "disabled";
Florian Meier9511cc4d2014-01-13 12:16:40 +0100103 };
104
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700105 spi: spi@7e204000 {
Stephen Warren6ce5f022013-02-19 21:39:58 -0700106 compatible = "brcm,bcm2835-spi";
107 reg = <0x7e204000 0x1000>;
108 interrupts = <2 22>;
109 clocks = <&clk_spi>;
110 #address-cells = <1>;
111 #size-cells = <0>;
112 status = "disabled";
113 };
114
Stephen Warren232fed42012-12-31 23:26:45 -0700115 i2c0: i2c@20205000 {
116 compatible = "brcm,bcm2835-i2c";
117 reg = <0x7e205000 0x1000>;
118 interrupts = <2 21>;
119 clocks = <&clk_i2c>;
Stephen Warrena31ab442013-11-25 20:35:42 -0700120 #address-cells = <1>;
121 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700122 status = "disabled";
123 };
124
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700125 sdhci: sdhci@7e300000 {
Stephen Warrenef3c6902014-02-11 21:44:35 -0700126 compatible = "brcm,bcm2835-sdhci";
127 reg = <0x7e300000 0x100>;
128 interrupts = <2 30>;
129 clocks = <&clk_mmc>;
130 status = "disabled";
131 };
132
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700133 i2c1: i2c@7e804000 {
Stephen Warren232fed42012-12-31 23:26:45 -0700134 compatible = "brcm,bcm2835-i2c";
135 reg = <0x7e804000 0x1000>;
136 interrupts = <2 21>;
137 clocks = <&clk_i2c>;
Stephen Warrena31ab442013-11-25 20:35:42 -0700138 #address-cells = <1>;
139 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700140 status = "disabled";
141 };
142
Stephen Warren25b2f1b2014-02-11 21:48:47 -0700143 usb@7e980000 {
Stephen Warren5631e7f2013-12-26 19:43:10 -0700144 compatible = "brcm,bcm2835-usb";
145 reg = <0x7e980000 0x10000>;
146 interrupts = <1 9>;
147 };
Vince Weaver14ac6522013-12-31 16:54:16 -0500148
149 arm-pmu {
150 compatible = "arm,arm1176-pmu";
151 };
Stephen Warren5186bf22012-12-24 21:58:56 -0700152 };
153
Stephen Warren9692c192013-01-14 21:07:20 -0700154 clocks {
155 compatible = "simple-bus";
156 #address-cells = <1>;
157 #size-cells = <0>;
Stephen Warren232fed42012-12-31 23:26:45 -0700158
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700159 clk_mmc: clock@0 {
Stephen Warren9692c192013-01-14 21:07:20 -0700160 compatible = "fixed-clock";
161 reg = <0>;
162 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700163 clock-output-names = "mmc";
Stephen Warren9692c192013-01-14 21:07:20 -0700164 clock-frequency = <100000000>;
165 };
166
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700167 clk_i2c: clock@1 {
Stephen Warren9692c192013-01-14 21:07:20 -0700168 compatible = "fixed-clock";
169 reg = <1>;
170 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700171 clock-output-names = "i2c";
Stephen Warren2837a1d2013-02-21 22:42:38 -0700172 clock-frequency = <250000000>;
Stephen Warren9692c192013-01-14 21:07:20 -0700173 };
Stephen Warren6ce5f022013-02-19 21:39:58 -0700174
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700175 clk_spi: clock@2 {
Stephen Warren6ce5f022013-02-19 21:39:58 -0700176 compatible = "fixed-clock";
177 reg = <2>;
178 #clock-cells = <0>;
Stephen Warrenb7c6c172014-02-13 23:12:39 -0700179 clock-output-names = "spi";
Stephen Warren6ce5f022013-02-19 21:39:58 -0700180 clock-frequency = <250000000>;
181 };
Simon Arlottec9653b2012-05-26 01:04:43 -0600182 };
183};