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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/arch/arm/mach-s3c2410/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C2410 platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Modifications:
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +000013 * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
15 * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
16 * 29-Aug-2004 BJD Added timers 0 through 3
17 * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
18 * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
19 * 18-Aug-2004 BJD Created initial version
20*/
21
22#include <linux/kernel.h>
23#include <linux/types.h>
24#include <linux/interrupt.h>
25#include <linux/list.h>
26#include <linux/timer.h>
27#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010028#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#include <asm/mach/arch.h>
31#include <asm/mach/map.h>
32#include <asm/mach/irq.h>
Arnaud Patardf92273c2005-09-09 13:10:10 -070033#include <asm/arch/fb.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/hardware.h>
35#include <asm/io.h>
36#include <asm/irq.h>
37
38#include <asm/arch/regs-serial.h>
39
40#include "devs.h"
41
42/* Serial port registrations */
43
44struct platform_device *s3c24xx_uart_devs[3];
45
46/* USB Host Controller */
47
48static struct resource s3c_usb_resource[] = {
49 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +000050 .start = S3C24XX_PA_USBHOST,
51 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070052 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_USBH,
56 .end = IRQ_USBH,
57 .flags = IORESOURCE_IRQ,
58 }
59};
60
61static u64 s3c_device_usb_dmamask = 0xffffffffUL;
62
63struct platform_device s3c_device_usb = {
64 .name = "s3c2410-ohci",
65 .id = -1,
66 .num_resources = ARRAY_SIZE(s3c_usb_resource),
67 .resource = s3c_usb_resource,
68 .dev = {
69 .dma_mask = &s3c_device_usb_dmamask,
70 .coherent_dma_mask = 0xffffffffUL
71 }
72};
73
74EXPORT_SYMBOL(s3c_device_usb);
75
76/* LCD Controller */
77
78static struct resource s3c_lcd_resource[] = {
79 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +000080 .start = S3C24XX_PA_LCD,
81 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 .flags = IORESOURCE_MEM,
83 },
84 [1] = {
85 .start = IRQ_LCD,
86 .end = IRQ_LCD,
87 .flags = IORESOURCE_IRQ,
88 }
89
90};
91
92static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
93
94struct platform_device s3c_device_lcd = {
95 .name = "s3c2410-lcd",
96 .id = -1,
97 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
98 .resource = s3c_lcd_resource,
99 .dev = {
Ben Dooks6904b242005-06-29 11:09:15 +0100100 .dma_mask = &s3c_device_lcd_dmamask,
101 .coherent_dma_mask = 0xffffffffUL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102 }
103};
104
105EXPORT_SYMBOL(s3c_device_lcd);
106
Ben Dooks893b0302005-10-28 15:31:45 +0100107void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
Arnaud Patardf92273c2005-09-09 13:10:10 -0700108{
Ben Dooks893b0302005-10-28 15:31:45 +0100109 struct s3c2410fb_mach_info *npd;
110
111 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
112 if (npd) {
113 memcpy(npd, pd, sizeof(*npd));
114 s3c_device_lcd.dev.platform_data = npd;
115 } else {
116 printk(KERN_ERR "no memory for LCD platform data\n");
117 }
Arnaud Patardf92273c2005-09-09 13:10:10 -0700118}
Arnaud Patardf92273c2005-09-09 13:10:10 -0700119
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120/* NAND Controller */
121
122static struct resource s3c_nand_resource[] = {
123 [0] = {
124 .start = S3C2410_PA_NAND,
Ben Dooksa0e0adb2005-10-28 15:26:42 +0100125 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 .flags = IORESOURCE_MEM,
127 }
128};
129
130struct platform_device s3c_device_nand = {
131 .name = "s3c2410-nand",
132 .id = -1,
133 .num_resources = ARRAY_SIZE(s3c_nand_resource),
134 .resource = s3c_nand_resource,
135};
136
137EXPORT_SYMBOL(s3c_device_nand);
138
139/* USB Device (Gadget)*/
140
141static struct resource s3c_usbgadget_resource[] = {
142 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000143 .start = S3C24XX_PA_USBDEV,
144 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = IRQ_USBD,
149 .end = IRQ_USBD,
150 .flags = IORESOURCE_IRQ,
151 }
152
153};
154
155struct platform_device s3c_device_usbgadget = {
156 .name = "s3c2410-usbgadget",
157 .id = -1,
158 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
159 .resource = s3c_usbgadget_resource,
160};
161
162EXPORT_SYMBOL(s3c_device_usbgadget);
163
164/* Watchdog */
165
166static struct resource s3c_wdt_resource[] = {
167 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000168 .start = S3C24XX_PA_WATCHDOG,
169 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 .flags = IORESOURCE_MEM,
171 },
172 [1] = {
173 .start = IRQ_WDT,
174 .end = IRQ_WDT,
175 .flags = IORESOURCE_IRQ,
176 }
177
178};
179
180struct platform_device s3c_device_wdt = {
181 .name = "s3c2410-wdt",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
184 .resource = s3c_wdt_resource,
185};
186
187EXPORT_SYMBOL(s3c_device_wdt);
188
189/* I2C */
190
191static struct resource s3c_i2c_resource[] = {
192 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000193 .start = S3C24XX_PA_IIC,
194 .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 .flags = IORESOURCE_MEM,
196 },
197 [1] = {
198 .start = IRQ_IIC,
199 .end = IRQ_IIC,
200 .flags = IORESOURCE_IRQ,
201 }
202
203};
204
205struct platform_device s3c_device_i2c = {
206 .name = "s3c2410-i2c",
207 .id = -1,
208 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
209 .resource = s3c_i2c_resource,
210};
211
212EXPORT_SYMBOL(s3c_device_i2c);
213
214/* IIS */
215
216static struct resource s3c_iis_resource[] = {
217 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000218 .start = S3C24XX_PA_IIS,
219 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220 .flags = IORESOURCE_MEM,
221 }
222};
223
224static u64 s3c_device_iis_dmamask = 0xffffffffUL;
225
226struct platform_device s3c_device_iis = {
227 .name = "s3c2410-iis",
228 .id = -1,
229 .num_resources = ARRAY_SIZE(s3c_iis_resource),
230 .resource = s3c_iis_resource,
231 .dev = {
232 .dma_mask = &s3c_device_iis_dmamask,
233 .coherent_dma_mask = 0xffffffffUL
234 }
235};
236
237EXPORT_SYMBOL(s3c_device_iis);
238
239/* RTC */
240
241static struct resource s3c_rtc_resource[] = {
242 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000243 .start = S3C24XX_PA_RTC,
244 .end = S3C24XX_PA_RTC + 0xff,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 .flags = IORESOURCE_MEM,
246 },
247 [1] = {
248 .start = IRQ_RTC,
249 .end = IRQ_RTC,
250 .flags = IORESOURCE_IRQ,
251 },
252 [2] = {
253 .start = IRQ_TICK,
254 .end = IRQ_TICK,
255 .flags = IORESOURCE_IRQ
256 }
257};
258
259struct platform_device s3c_device_rtc = {
260 .name = "s3c2410-rtc",
261 .id = -1,
262 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
263 .resource = s3c_rtc_resource,
264};
265
266EXPORT_SYMBOL(s3c_device_rtc);
267
268/* ADC */
269
270static struct resource s3c_adc_resource[] = {
271 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000272 .start = S3C24XX_PA_ADC,
273 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 .flags = IORESOURCE_MEM,
275 },
276 [1] = {
277 .start = IRQ_TC,
Ben Dooks083d06e2006-02-08 22:03:31 +0000278 .end = IRQ_TC,
279 .flags = IORESOURCE_IRQ,
280 },
281 [2] = {
282 .start = IRQ_ADC,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 .end = IRQ_ADC,
284 .flags = IORESOURCE_IRQ,
285 }
286
287};
288
289struct platform_device s3c_device_adc = {
290 .name = "s3c2410-adc",
291 .id = -1,
292 .num_resources = ARRAY_SIZE(s3c_adc_resource),
293 .resource = s3c_adc_resource,
294};
295
296/* SDI */
297
298static struct resource s3c_sdi_resource[] = {
299 [0] = {
300 .start = S3C2410_PA_SDI,
Ben Dooksa0e0adb2005-10-28 15:26:42 +0100301 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302 .flags = IORESOURCE_MEM,
303 },
304 [1] = {
305 .start = IRQ_SDI,
306 .end = IRQ_SDI,
307 .flags = IORESOURCE_IRQ,
308 }
309
310};
311
312struct platform_device s3c_device_sdi = {
313 .name = "s3c2410-sdi",
314 .id = -1,
315 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
316 .resource = s3c_sdi_resource,
317};
318
319EXPORT_SYMBOL(s3c_device_sdi);
320
321/* SPI (0) */
322
323static struct resource s3c_spi0_resource[] = {
324 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000325 .start = S3C24XX_PA_SPI,
326 .end = S3C24XX_PA_SPI + 0x1f,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 .flags = IORESOURCE_MEM,
328 },
329 [1] = {
330 .start = IRQ_SPI0,
331 .end = IRQ_SPI0,
332 .flags = IORESOURCE_IRQ,
333 }
334
335};
336
Albrecht Dreß66be0c32006-03-15 16:03:05 +0000337static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
338
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339struct platform_device s3c_device_spi0 = {
340 .name = "s3c2410-spi",
341 .id = 0,
342 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
343 .resource = s3c_spi0_resource,
Albrecht Dreß66be0c32006-03-15 16:03:05 +0000344 .dev = {
345 .dma_mask = &s3c_device_spi0_dmamask,
346 .coherent_dma_mask = 0xffffffffUL
347 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348};
349
350EXPORT_SYMBOL(s3c_device_spi0);
351
352/* SPI (1) */
353
354static struct resource s3c_spi1_resource[] = {
355 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000356 .start = S3C24XX_PA_SPI + 0x20,
357 .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 .flags = IORESOURCE_MEM,
359 },
360 [1] = {
361 .start = IRQ_SPI1,
362 .end = IRQ_SPI1,
363 .flags = IORESOURCE_IRQ,
364 }
365
366};
367
Albrecht Dreß66be0c32006-03-15 16:03:05 +0000368static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370struct platform_device s3c_device_spi1 = {
371 .name = "s3c2410-spi",
372 .id = 1,
373 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
374 .resource = s3c_spi1_resource,
Albrecht Dreß66be0c32006-03-15 16:03:05 +0000375 .dev = {
376 .dma_mask = &s3c_device_spi1_dmamask,
377 .coherent_dma_mask = 0xffffffffUL
378 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700379};
380
381EXPORT_SYMBOL(s3c_device_spi1);
382
383/* pwm timer blocks */
384
385static struct resource s3c_timer0_resource[] = {
386 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000387 .start = S3C24XX_PA_TIMER + 0x0C,
388 .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 .flags = IORESOURCE_MEM,
390 },
391 [1] = {
392 .start = IRQ_TIMER0,
393 .end = IRQ_TIMER0,
394 .flags = IORESOURCE_IRQ,
395 }
396
397};
398
399struct platform_device s3c_device_timer0 = {
400 .name = "s3c2410-timer",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
403 .resource = s3c_timer0_resource,
404};
405
406EXPORT_SYMBOL(s3c_device_timer0);
407
408/* timer 1 */
409
410static struct resource s3c_timer1_resource[] = {
411 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000412 .start = S3C24XX_PA_TIMER + 0x18,
413 .end = S3C24XX_PA_TIMER + 0x23,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 .flags = IORESOURCE_MEM,
415 },
416 [1] = {
417 .start = IRQ_TIMER1,
418 .end = IRQ_TIMER1,
419 .flags = IORESOURCE_IRQ,
420 }
421
422};
423
424struct platform_device s3c_device_timer1 = {
425 .name = "s3c2410-timer",
426 .id = 1,
427 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
428 .resource = s3c_timer1_resource,
429};
430
431EXPORT_SYMBOL(s3c_device_timer1);
432
433/* timer 2 */
434
435static struct resource s3c_timer2_resource[] = {
436 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000437 .start = S3C24XX_PA_TIMER + 0x24,
438 .end = S3C24XX_PA_TIMER + 0x2F,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 .start = IRQ_TIMER2,
443 .end = IRQ_TIMER2,
444 .flags = IORESOURCE_IRQ,
445 }
446
447};
448
449struct platform_device s3c_device_timer2 = {
450 .name = "s3c2410-timer",
451 .id = 2,
452 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
453 .resource = s3c_timer2_resource,
454};
455
456EXPORT_SYMBOL(s3c_device_timer2);
457
458/* timer 3 */
459
460static struct resource s3c_timer3_resource[] = {
461 [0] = {
Lucas Correia Villa Real0367a8d2006-01-26 15:20:50 +0000462 .start = S3C24XX_PA_TIMER + 0x30,
463 .end = S3C24XX_PA_TIMER + 0x3B,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = IRQ_TIMER3,
468 .end = IRQ_TIMER3,
469 .flags = IORESOURCE_IRQ,
470 }
471
472};
473
474struct platform_device s3c_device_timer3 = {
475 .name = "s3c2410-timer",
476 .id = 3,
477 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
478 .resource = s3c_timer3_resource,
479};
480
481EXPORT_SYMBOL(s3c_device_timer3);
482
483#ifdef CONFIG_CPU_S3C2440
484
485/* Camif Controller */
486
487static struct resource s3c_camif_resource[] = {
488 [0] = {
489 .start = S3C2440_PA_CAMIF,
Ben Dooksa0e0adb2005-10-28 15:26:42 +0100490 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700491 .flags = IORESOURCE_MEM,
492 },
493 [1] = {
494 .start = IRQ_CAM,
495 .end = IRQ_CAM,
496 .flags = IORESOURCE_IRQ,
497 }
498
499};
500
501static u64 s3c_device_camif_dmamask = 0xffffffffUL;
502
503struct platform_device s3c_device_camif = {
504 .name = "s3c2440-camif",
505 .id = -1,
506 .num_resources = ARRAY_SIZE(s3c_camif_resource),
507 .resource = s3c_camif_resource,
508 .dev = {
509 .dma_mask = &s3c_device_camif_dmamask,
510 .coherent_dma_mask = 0xffffffffUL
511 }
512};
513
514EXPORT_SYMBOL(s3c_device_camif);
515
516#endif // CONFIG_CPU_S32440