Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 1 | #ifndef DEF_RDMAVT_INCQP_H |
| 2 | #define DEF_RDMAVT_INCQP_H |
| 3 | |
| 4 | /* |
Dennis Dalessandro | fe31419 | 2016-01-22 13:04:58 -0800 | [diff] [blame] | 5 | * Copyright(c) 2016 Intel Corporation. |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 6 | * |
| 7 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 8 | * redistributing this file, you may do so under either license. |
| 9 | * |
| 10 | * GPL LICENSE SUMMARY |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of version 2 of the GNU General Public License as |
| 14 | * published by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but |
| 17 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 19 | * General Public License for more details. |
| 20 | * |
| 21 | * BSD LICENSE |
| 22 | * |
| 23 | * Redistribution and use in source and binary forms, with or without |
| 24 | * modification, are permitted provided that the following conditions |
| 25 | * are met: |
| 26 | * |
| 27 | * - Redistributions of source code must retain the above copyright |
| 28 | * notice, this list of conditions and the following disclaimer. |
| 29 | * - Redistributions in binary form must reproduce the above copyright |
| 30 | * notice, this list of conditions and the following disclaimer in |
| 31 | * the documentation and/or other materials provided with the |
| 32 | * distribution. |
| 33 | * - Neither the name of Intel Corporation nor the names of its |
| 34 | * contributors may be used to endorse or promote products derived |
| 35 | * from this software without specific prior written permission. |
| 36 | * |
| 37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 38 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 39 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 40 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 41 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 42 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 43 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 44 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 45 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 46 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 47 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 48 | * |
| 49 | */ |
| 50 | |
Dennis Dalessandro | 5a9cf6f | 2016-01-22 12:50:24 -0800 | [diff] [blame] | 51 | #include <rdma/rdma_vt.h> |
Dennis Dalessandro | 050eb7f | 2016-01-22 12:50:11 -0800 | [diff] [blame] | 52 | #include <rdma/ib_pack.h> |
Dennis Dalessandro | 4e74080 | 2016-01-22 13:00:55 -0800 | [diff] [blame] | 53 | #include <rdma/ib_verbs.h> |
Dennis Dalessandro | 050eb7f | 2016-01-22 12:50:11 -0800 | [diff] [blame] | 54 | /* |
| 55 | * Atomic bit definitions for r_aflags. |
| 56 | */ |
| 57 | #define RVT_R_WRID_VALID 0 |
| 58 | #define RVT_R_REWIND_SGE 1 |
| 59 | |
| 60 | /* |
| 61 | * Bit definitions for r_flags. |
| 62 | */ |
| 63 | #define RVT_R_REUSE_SGE 0x01 |
| 64 | #define RVT_R_RDMAR_SEQ 0x02 |
| 65 | #define RVT_R_RSP_NAK 0x04 |
| 66 | #define RVT_R_RSP_SEND 0x08 |
| 67 | #define RVT_R_COMM_EST 0x10 |
| 68 | |
| 69 | /* |
| 70 | * Bit definitions for s_flags. |
| 71 | * |
| 72 | * RVT_S_SIGNAL_REQ_WR - set if QP send WRs contain completion signaled |
| 73 | * RVT_S_BUSY - send tasklet is processing the QP |
| 74 | * RVT_S_TIMER - the RC retry timer is active |
| 75 | * RVT_S_ACK_PENDING - an ACK is waiting to be sent after RDMA read/atomics |
| 76 | * RVT_S_WAIT_FENCE - waiting for all prior RDMA read or atomic SWQEs |
| 77 | * before processing the next SWQE |
| 78 | * RVT_S_WAIT_RDMAR - waiting for a RDMA read or atomic SWQE to complete |
| 79 | * before processing the next SWQE |
| 80 | * RVT_S_WAIT_RNR - waiting for RNR timeout |
| 81 | * RVT_S_WAIT_SSN_CREDIT - waiting for RC credits to process next SWQE |
| 82 | * RVT_S_WAIT_DMA - waiting for send DMA queue to drain before generating |
| 83 | * next send completion entry not via send DMA |
| 84 | * RVT_S_WAIT_PIO - waiting for a send buffer to be available |
Mike Marciniszyn | 14553ca | 2016-02-14 12:45:36 -0800 | [diff] [blame] | 85 | * RVT_S_WAIT_PIO_DRAIN - waiting for a qp to drain pio packets |
Dennis Dalessandro | 050eb7f | 2016-01-22 12:50:11 -0800 | [diff] [blame] | 86 | * RVT_S_WAIT_TX - waiting for a struct verbs_txreq to be available |
| 87 | * RVT_S_WAIT_DMA_DESC - waiting for DMA descriptors to be available |
| 88 | * RVT_S_WAIT_KMEM - waiting for kernel memory to be available |
| 89 | * RVT_S_WAIT_PSN - waiting for a packet to exit the send DMA queue |
| 90 | * RVT_S_WAIT_ACK - waiting for an ACK packet before sending more requests |
| 91 | * RVT_S_SEND_ONE - send one packet, request ACK, then wait for ACK |
| 92 | * RVT_S_ECN - a BECN was queued to the send engine |
| 93 | */ |
| 94 | #define RVT_S_SIGNAL_REQ_WR 0x0001 |
| 95 | #define RVT_S_BUSY 0x0002 |
| 96 | #define RVT_S_TIMER 0x0004 |
| 97 | #define RVT_S_RESP_PENDING 0x0008 |
| 98 | #define RVT_S_ACK_PENDING 0x0010 |
| 99 | #define RVT_S_WAIT_FENCE 0x0020 |
| 100 | #define RVT_S_WAIT_RDMAR 0x0040 |
| 101 | #define RVT_S_WAIT_RNR 0x0080 |
| 102 | #define RVT_S_WAIT_SSN_CREDIT 0x0100 |
| 103 | #define RVT_S_WAIT_DMA 0x0200 |
| 104 | #define RVT_S_WAIT_PIO 0x0400 |
Mike Marciniszyn | 14553ca | 2016-02-14 12:45:36 -0800 | [diff] [blame] | 105 | #define RVT_S_WAIT_PIO_DRAIN 0x0800 |
| 106 | #define RVT_S_WAIT_TX 0x1000 |
| 107 | #define RVT_S_WAIT_DMA_DESC 0x2000 |
| 108 | #define RVT_S_WAIT_KMEM 0x4000 |
| 109 | #define RVT_S_WAIT_PSN 0x8000 |
| 110 | #define RVT_S_WAIT_ACK 0x10000 |
| 111 | #define RVT_S_SEND_ONE 0x20000 |
| 112 | #define RVT_S_UNLIMITED_CREDIT 0x40000 |
| 113 | #define RVT_S_AHG_VALID 0x80000 |
| 114 | #define RVT_S_AHG_CLEAR 0x100000 |
| 115 | #define RVT_S_ECN 0x200000 |
Dennis Dalessandro | 050eb7f | 2016-01-22 12:50:11 -0800 | [diff] [blame] | 116 | |
| 117 | /* |
| 118 | * Wait flags that would prevent any packet type from being sent. |
| 119 | */ |
Mike Marciniszyn | f39cc34 | 2016-04-12 10:45:51 -0700 | [diff] [blame] | 120 | #define RVT_S_ANY_WAIT_IO \ |
| 121 | (RVT_S_WAIT_PIO | RVT_S_WAIT_PIO_DRAIN | RVT_S_WAIT_TX | \ |
| 122 | RVT_S_WAIT_DMA_DESC | RVT_S_WAIT_KMEM) |
Dennis Dalessandro | 050eb7f | 2016-01-22 12:50:11 -0800 | [diff] [blame] | 123 | |
| 124 | /* |
| 125 | * Wait flags that would prevent send work requests from making progress. |
| 126 | */ |
| 127 | #define RVT_S_ANY_WAIT_SEND (RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR | \ |
| 128 | RVT_S_WAIT_RNR | RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_DMA | \ |
| 129 | RVT_S_WAIT_PSN | RVT_S_WAIT_ACK) |
| 130 | |
| 131 | #define RVT_S_ANY_WAIT (RVT_S_ANY_WAIT_IO | RVT_S_ANY_WAIT_SEND) |
| 132 | |
| 133 | /* Number of bits to pay attention to in the opcode for checking qp type */ |
| 134 | #define RVT_OPCODE_QP_MASK 0xE0 |
| 135 | |
Dennis Dalessandro | bfbac09 | 2016-01-22 13:00:22 -0800 | [diff] [blame] | 136 | /* Flags for checking QP state (see ib_rvt_state_ops[]) */ |
| 137 | #define RVT_POST_SEND_OK 0x01 |
| 138 | #define RVT_POST_RECV_OK 0x02 |
| 139 | #define RVT_PROCESS_RECV_OK 0x04 |
| 140 | #define RVT_PROCESS_SEND_OK 0x08 |
| 141 | #define RVT_PROCESS_NEXT_SEND_OK 0x10 |
| 142 | #define RVT_FLUSH_SEND 0x20 |
| 143 | #define RVT_FLUSH_RECV 0x40 |
| 144 | #define RVT_PROCESS_OR_FLUSH_SEND \ |
| 145 | (RVT_PROCESS_SEND_OK | RVT_FLUSH_SEND) |
| 146 | |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 147 | /* |
| 148 | * Send work request queue entry. |
| 149 | * The size of the sg_list is determined when the QP is created and stored |
| 150 | * in qp->s_max_sge. |
| 151 | */ |
| 152 | struct rvt_swqe { |
| 153 | union { |
| 154 | struct ib_send_wr wr; /* don't use wr.sg_list */ |
| 155 | struct ib_ud_wr ud_wr; |
| 156 | struct ib_reg_wr reg_wr; |
| 157 | struct ib_rdma_wr rdma_wr; |
| 158 | struct ib_atomic_wr atomic_wr; |
| 159 | }; |
| 160 | u32 psn; /* first packet sequence number */ |
| 161 | u32 lpsn; /* last packet sequence number */ |
| 162 | u32 ssn; /* send sequence number */ |
| 163 | u32 length; /* total length of data in sg_list */ |
| 164 | struct rvt_sge sg_list[0]; |
| 165 | }; |
| 166 | |
| 167 | /* |
| 168 | * Receive work request queue entry. |
| 169 | * The size of the sg_list is determined when the QP (or SRQ) is created |
| 170 | * and stored in qp->r_rq.max_sge (or srq->rq.max_sge). |
| 171 | */ |
| 172 | struct rvt_rwqe { |
| 173 | u64 wr_id; |
| 174 | u8 num_sge; |
| 175 | struct ib_sge sg_list[0]; |
| 176 | }; |
| 177 | |
| 178 | /* |
| 179 | * This structure is used to contain the head pointer, tail pointer, |
| 180 | * and receive work queue entries as a single memory allocation so |
| 181 | * it can be mmap'ed into user space. |
| 182 | * Note that the wq array elements are variable size so you can't |
| 183 | * just index into the array to get the N'th element; |
| 184 | * use get_rwqe_ptr() instead. |
| 185 | */ |
| 186 | struct rvt_rwq { |
| 187 | u32 head; /* new work requests posted to the head */ |
| 188 | u32 tail; /* receives pull requests from here. */ |
| 189 | struct rvt_rwqe wq[0]; |
| 190 | }; |
| 191 | |
| 192 | struct rvt_rq { |
| 193 | struct rvt_rwq *wq; |
| 194 | u32 size; /* size of RWQE array */ |
| 195 | u8 max_sge; |
| 196 | /* protect changes in this struct */ |
| 197 | spinlock_t lock ____cacheline_aligned_in_smp; |
| 198 | }; |
| 199 | |
| 200 | /* |
| 201 | * This structure is used by rvt_mmap() to validate an offset |
| 202 | * when an mmap() request is made. The vm_area_struct then uses |
| 203 | * this as its vm_private_data. |
| 204 | */ |
| 205 | struct rvt_mmap_info { |
| 206 | struct list_head pending_mmaps; |
| 207 | struct ib_ucontext *context; |
| 208 | void *obj; |
| 209 | __u64 offset; |
| 210 | struct kref ref; |
| 211 | unsigned size; |
| 212 | }; |
| 213 | |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 214 | /* |
| 215 | * This structure holds the information that the send tasklet needs |
| 216 | * to send a RDMA read response or atomic operation. |
| 217 | */ |
| 218 | struct rvt_ack_entry { |
| 219 | u8 opcode; |
| 220 | u8 sent; |
| 221 | u32 psn; |
| 222 | u32 lpsn; |
| 223 | union { |
| 224 | struct rvt_sge rdma_sge; |
| 225 | u64 atomic_data; |
| 226 | }; |
| 227 | }; |
| 228 | |
Vennila Megavannan | bfee5e3 | 2016-02-09 14:29:49 -0800 | [diff] [blame] | 229 | #define RC_QP_SCALING_INTERVAL 5 |
| 230 | |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 231 | /* |
| 232 | * Variables prefixed with s_ are for the requester (sender). |
| 233 | * Variables prefixed with r_ are for the responder (receiver). |
| 234 | * Variables prefixed with ack_ are for responder replies. |
| 235 | * |
| 236 | * Common variables are protected by both r_rq.lock and s_lock in that order |
| 237 | * which only happens in modify_qp() or changing the QP 'state'. |
| 238 | */ |
| 239 | struct rvt_qp { |
| 240 | struct ib_qp ibqp; |
| 241 | void *priv; /* Driver private data */ |
| 242 | /* read mostly fields above and below */ |
| 243 | struct ib_ah_attr remote_ah_attr; |
| 244 | struct ib_ah_attr alt_ah_attr; |
| 245 | struct rvt_qp __rcu *next; /* link list for QPN hash table */ |
| 246 | struct rvt_swqe *s_wq; /* send work queue */ |
| 247 | struct rvt_mmap_info *ip; |
| 248 | |
| 249 | unsigned long timeout_jiffies; /* computed from timeout */ |
| 250 | |
| 251 | enum ib_mtu path_mtu; |
| 252 | int srate_mbps; /* s_srate (below) converted to Mbit/s */ |
Mike Marciniszyn | ef086c0 | 2016-03-07 11:35:08 -0800 | [diff] [blame] | 253 | pid_t pid; /* pid for user mode QPs */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 254 | u32 remote_qpn; |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 255 | u32 qkey; /* QKEY for this QP (for UD or RD) */ |
| 256 | u32 s_size; /* send work queue size */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 257 | u32 s_ahgpsn; /* set to the psn in the copy of the header */ |
| 258 | |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 259 | u16 pmtu; /* decoded from path_mtu */ |
| 260 | u8 log_pmtu; /* shift for pmtu */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 261 | u8 state; /* QP state */ |
| 262 | u8 allowed_ops; /* high order bits of allowed opcodes */ |
| 263 | u8 qp_access_flags; |
| 264 | u8 alt_timeout; /* Alternate path timeout for this QP */ |
| 265 | u8 timeout; /* Timeout for this QP */ |
| 266 | u8 s_srate; |
| 267 | u8 s_mig_state; |
| 268 | u8 port_num; |
| 269 | u8 s_pkey_index; /* PKEY index to use */ |
| 270 | u8 s_alt_pkey_index; /* Alternate path PKEY index to use */ |
| 271 | u8 r_max_rd_atomic; /* max number of RDMA read/atomic to receive */ |
| 272 | u8 s_max_rd_atomic; /* max number of RDMA read/atomic to send */ |
| 273 | u8 s_retry_cnt; /* number of times to retry */ |
| 274 | u8 s_rnr_retry_cnt; |
| 275 | u8 r_min_rnr_timer; /* retry timeout value for RNR NAKs */ |
| 276 | u8 s_max_sge; /* size of s_wq->sg_list */ |
| 277 | u8 s_draining; |
| 278 | |
| 279 | /* start of read/write fields */ |
| 280 | atomic_t refcount ____cacheline_aligned_in_smp; |
| 281 | wait_queue_head_t wait; |
| 282 | |
Mike Marciniszyn | 8b103e9 | 2016-05-24 12:50:40 -0700 | [diff] [blame] | 283 | struct rvt_ack_entry *s_ack_queue; |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 284 | struct rvt_sge_state s_rdma_read_sge; |
| 285 | |
| 286 | spinlock_t r_lock ____cacheline_aligned_in_smp; /* used for APM */ |
Mike Marciniszyn | d2421a8 | 2016-02-14 12:44:26 -0800 | [diff] [blame] | 287 | u32 r_psn; /* expected rcv packet sequence number */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 288 | unsigned long r_aflags; |
| 289 | u64 r_wr_id; /* ID for current receive WQE */ |
| 290 | u32 r_ack_psn; /* PSN for next ACK or atomic ACK */ |
| 291 | u32 r_len; /* total length of r_sge */ |
| 292 | u32 r_rcv_len; /* receive data len processed */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 293 | u32 r_msn; /* message sequence number */ |
| 294 | |
| 295 | u8 r_state; /* opcode of last packet received */ |
| 296 | u8 r_flags; |
| 297 | u8 r_head_ack_queue; /* index into s_ack_queue[] */ |
| 298 | |
| 299 | struct list_head rspwait; /* link for waiting to respond */ |
| 300 | |
| 301 | struct rvt_sge_state r_sge; /* current receive data */ |
| 302 | struct rvt_rq r_rq; /* receive work queue */ |
| 303 | |
Mike Marciniszyn | 46a80d6 | 2016-02-14 12:10:04 -0800 | [diff] [blame] | 304 | /* post send line */ |
| 305 | spinlock_t s_hlock ____cacheline_aligned_in_smp; |
| 306 | u32 s_head; /* new entries added here */ |
| 307 | u32 s_next_psn; /* PSN for next request */ |
| 308 | u32 s_avail; /* number of entries avail */ |
| 309 | u32 s_ssn; /* SSN of tail entry */ |
| 310 | |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 311 | spinlock_t s_lock ____cacheline_aligned_in_smp; |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 312 | u32 s_flags; |
Mike Marciniszyn | d2421a8 | 2016-02-14 12:44:26 -0800 | [diff] [blame] | 313 | struct rvt_sge_state *s_cur_sge; |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 314 | struct rvt_swqe *s_wqe; |
| 315 | struct rvt_sge_state s_sge; /* current send request data */ |
| 316 | struct rvt_mregion *s_rdma_mr; |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 317 | u32 s_cur_size; /* size of send packet in bytes */ |
| 318 | u32 s_len; /* total length of s_sge */ |
| 319 | u32 s_rdma_read_len; /* total length of s_rdma_read_sge */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 320 | u32 s_last_psn; /* last response PSN processed */ |
| 321 | u32 s_sending_psn; /* lowest PSN that is being sent */ |
| 322 | u32 s_sending_hpsn; /* highest PSN that is being sent */ |
| 323 | u32 s_psn; /* current packet sequence number */ |
| 324 | u32 s_ack_rdma_psn; /* PSN for sending RDMA read responses */ |
| 325 | u32 s_ack_psn; /* PSN for acking sends and RDMA writes */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 326 | u32 s_tail; /* next entry to process */ |
| 327 | u32 s_cur; /* current work queue entry */ |
| 328 | u32 s_acked; /* last un-ACK'ed entry */ |
| 329 | u32 s_last; /* last completed entry */ |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 330 | u32 s_lsn; /* limit sequence number (credit) */ |
| 331 | u16 s_hdrwords; /* size of s_hdr in 32 bit words */ |
| 332 | u16 s_rdma_ack_cnt; |
| 333 | s8 s_ahgidx; |
| 334 | u8 s_state; /* opcode of last packet sent */ |
| 335 | u8 s_ack_state; /* opcode of packet to ACK */ |
| 336 | u8 s_nak_state; /* non-zero if NAK is pending */ |
| 337 | u8 r_nak_state; /* non-zero if NAK is pending */ |
| 338 | u8 s_retry; /* requester retry counter */ |
| 339 | u8 s_rnr_retry; /* requester RNR retry counter */ |
| 340 | u8 s_num_rd_atomic; /* number of RDMA read/atomic pending */ |
| 341 | u8 s_tail_ack_queue; /* index into s_ack_queue[] */ |
| 342 | |
| 343 | struct rvt_sge_state s_ack_rdma_sge; |
| 344 | struct timer_list s_timer; |
| 345 | |
| 346 | /* |
| 347 | * This sge list MUST be last. Do not add anything below here. |
| 348 | */ |
| 349 | struct rvt_sge r_sg_list[0] /* verified SGEs */ |
| 350 | ____cacheline_aligned_in_smp; |
| 351 | }; |
| 352 | |
| 353 | struct rvt_srq { |
| 354 | struct ib_srq ibsrq; |
| 355 | struct rvt_rq rq; |
| 356 | struct rvt_mmap_info *ip; |
| 357 | /* send signal when number of RWQEs < limit */ |
| 358 | u32 limit; |
| 359 | }; |
| 360 | |
Dennis Dalessandro | 0acb0cc | 2016-01-06 10:04:46 -0800 | [diff] [blame] | 361 | #define RVT_QPN_MAX BIT(24) |
| 362 | #define RVT_QPNMAP_ENTRIES (RVT_QPN_MAX / PAGE_SIZE / BITS_PER_BYTE) |
| 363 | #define RVT_BITS_PER_PAGE (PAGE_SIZE * BITS_PER_BYTE) |
| 364 | #define RVT_BITS_PER_PAGE_MASK (RVT_BITS_PER_PAGE - 1) |
Dennis Dalessandro | 3b0b3fb | 2016-01-22 13:00:35 -0800 | [diff] [blame] | 365 | #define RVT_QPN_MASK 0xFFFFFF |
Dennis Dalessandro | 0acb0cc | 2016-01-06 10:04:46 -0800 | [diff] [blame] | 366 | |
| 367 | /* |
| 368 | * QPN-map pages start out as NULL, they get allocated upon |
| 369 | * first use and are never deallocated. This way, |
| 370 | * large bitmaps are not allocated unless large numbers of QPs are used. |
| 371 | */ |
| 372 | struct rvt_qpn_map { |
| 373 | void *page; |
| 374 | }; |
| 375 | |
| 376 | struct rvt_qpn_table { |
| 377 | spinlock_t lock; /* protect changes to the qp table */ |
| 378 | unsigned flags; /* flags for QP0/1 allocated for each port */ |
| 379 | u32 last; /* last QP number allocated */ |
| 380 | u32 nmaps; /* size of the map table */ |
| 381 | u16 limit; |
| 382 | u8 incr; |
| 383 | /* bit map of free QP numbers other than 0/1 */ |
| 384 | struct rvt_qpn_map map[RVT_QPNMAP_ENTRIES]; |
| 385 | }; |
| 386 | |
| 387 | struct rvt_qp_ibdev { |
| 388 | u32 qp_table_size; |
| 389 | u32 qp_table_bits; |
| 390 | struct rvt_qp __rcu **qp_table; |
| 391 | spinlock_t qpt_lock; /* qptable lock */ |
| 392 | struct rvt_qpn_table qpn_table; |
| 393 | }; |
| 394 | |
Dennis Dalessandro | bfbac09 | 2016-01-22 13:00:22 -0800 | [diff] [blame] | 395 | /* |
Dennis Dalessandro | 4e74080 | 2016-01-22 13:00:55 -0800 | [diff] [blame] | 396 | * There is one struct rvt_mcast for each multicast GID. |
| 397 | * All attached QPs are then stored as a list of |
| 398 | * struct rvt_mcast_qp. |
| 399 | */ |
| 400 | struct rvt_mcast_qp { |
| 401 | struct list_head list; |
| 402 | struct rvt_qp *qp; |
| 403 | }; |
| 404 | |
| 405 | struct rvt_mcast { |
| 406 | struct rb_node rb_node; |
| 407 | union ib_gid mgid; |
| 408 | struct list_head qp_list; |
| 409 | wait_queue_head_t wait; |
| 410 | atomic_t refcount; |
| 411 | int n_attached; |
| 412 | }; |
| 413 | |
| 414 | /* |
Dennis Dalessandro | bfbac09 | 2016-01-22 13:00:22 -0800 | [diff] [blame] | 415 | * Since struct rvt_swqe is not a fixed size, we can't simply index into |
Dennis Dalessandro | 4e74080 | 2016-01-22 13:00:55 -0800 | [diff] [blame] | 416 | * struct rvt_qp.s_wq. This function does the array index computation. |
Dennis Dalessandro | bfbac09 | 2016-01-22 13:00:22 -0800 | [diff] [blame] | 417 | */ |
| 418 | static inline struct rvt_swqe *rvt_get_swqe_ptr(struct rvt_qp *qp, |
| 419 | unsigned n) |
| 420 | { |
| 421 | return (struct rvt_swqe *)((char *)qp->s_wq + |
| 422 | (sizeof(struct rvt_swqe) + |
| 423 | qp->s_max_sge * |
| 424 | sizeof(struct rvt_sge)) * n); |
| 425 | } |
| 426 | |
Dennis Dalessandro | 3b0b3fb | 2016-01-22 13:00:35 -0800 | [diff] [blame] | 427 | /* |
| 428 | * Since struct rvt_rwqe is not a fixed size, we can't simply index into |
| 429 | * struct rvt_rwq.wq. This function does the array index computation. |
| 430 | */ |
| 431 | static inline struct rvt_rwqe *rvt_get_rwqe_ptr(struct rvt_rq *rq, unsigned n) |
| 432 | { |
| 433 | return (struct rvt_rwqe *) |
| 434 | ((char *)rq->wq->wq + |
| 435 | (sizeof(struct rvt_rwqe) + |
| 436 | rq->max_sge * sizeof(struct ib_sge)) * n); |
| 437 | } |
| 438 | |
Dennis Dalessandro | bfbac09 | 2016-01-22 13:00:22 -0800 | [diff] [blame] | 439 | extern const int ib_rvt_state_ops[]; |
| 440 | |
Dennis Dalessandro | 3b0b3fb | 2016-01-22 13:00:35 -0800 | [diff] [blame] | 441 | struct rvt_dev_info; |
Dennis Dalessandro | 3b0b3fb | 2016-01-22 13:00:35 -0800 | [diff] [blame] | 442 | int rvt_error_qp(struct rvt_qp *qp, enum ib_wc_status err); |
Dennis Dalessandro | 3b0b3fb | 2016-01-22 13:00:35 -0800 | [diff] [blame] | 443 | |
Dennis Dalessandro | b4e6439 | 2016-01-06 10:04:31 -0800 | [diff] [blame] | 444 | #endif /* DEF_RDMAVT_INCQP_H */ |