dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 1 | /* |
| 2 | * arch/mips/emma2rh/markeins/irq.c |
| 3 | * This file defines the irq handler for EMMA2RH. |
| 4 | * |
| 5 | * Copyright (C) NEC Electronics Corporation 2004-2006 |
| 6 | * |
| 7 | * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c |
| 8 | * |
| 9 | * Copyright 2001 MontaVista Software Inc. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License as published by |
| 13 | * the Free Software Foundation; either version 2 of the License, or |
| 14 | * (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 24 | */ |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 25 | #include <linux/init.h> |
| 26 | #include <linux/interrupt.h> |
| 27 | #include <linux/irq.h> |
| 28 | #include <linux/types.h> |
| 29 | #include <linux/ptrace.h> |
| 30 | #include <linux/delay.h> |
| 31 | |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 32 | #include <asm/irq_cpu.h> |
| 33 | #include <asm/system.h> |
| 34 | #include <asm/mipsregs.h> |
| 35 | #include <asm/debug.h> |
| 36 | #include <asm/addrspace.h> |
| 37 | #include <asm/bootinfo.h> |
| 38 | |
Shinya Kuribayashi | d91f2cb | 2008-10-24 01:30:20 +0900 | [diff] [blame] | 39 | #include <asm/emma/emma2rh.h> |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * IRQ mapping |
| 43 | * |
| 44 | * 0-7: 8 CPU interrupts |
| 45 | * 0 - software interrupt 0 |
| 46 | * 1 - software interrupt 1 |
| 47 | * 2 - most Vrc5477 interrupts are routed to this pin |
| 48 | * 3 - (optional) some other interrupts routed to this pin for debugg |
| 49 | * 4 - not used |
| 50 | * 5 - not used |
| 51 | * 6 - not used |
| 52 | * 7 - cpu timer (used by default) |
| 53 | * |
| 54 | */ |
| 55 | |
Shinya Kuribayashi | 68ed1ca | 2008-10-24 01:31:43 +0900 | [diff] [blame^] | 56 | extern void emma2rh_sw_irq_init(void); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 57 | extern void emma2rh_gpio_irq_init(u32 base); |
Shinya Kuribayashi | 9b6c04b | 2008-10-24 01:31:16 +0900 | [diff] [blame] | 58 | extern void emma2rh_irq_init(void); |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 59 | extern void emma2rh_irq_dispatch(void); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 60 | |
| 61 | static struct irqaction irq_cascade = { |
| 62 | .handler = no_action, |
| 63 | .flags = 0, |
| 64 | .mask = CPU_MASK_NONE, |
| 65 | .name = "cascade", |
| 66 | .dev_id = NULL, |
| 67 | .next = NULL, |
| 68 | }; |
| 69 | |
| 70 | void __init arch_init_irq(void) |
| 71 | { |
| 72 | u32 reg; |
| 73 | |
| 74 | db_run(printk("markeins_irq_setup invoked.\n")); |
| 75 | |
| 76 | /* by default, interrupts are disabled. */ |
| 77 | emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0); |
| 78 | emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0); |
| 79 | emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0); |
| 80 | emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0); |
| 81 | emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0); |
| 82 | emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0); |
| 83 | emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0); |
| 84 | |
| 85 | clear_c0_status(0xff00); |
| 86 | set_c0_status(0x0400); |
| 87 | |
| 88 | #define GPIO_PCI (0xf<<15) |
| 89 | /* setup GPIO interrupt for PCI interface */ |
| 90 | /* direction input */ |
| 91 | reg = emma2rh_in32(EMMA2RH_GPIO_DIR); |
| 92 | emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI); |
| 93 | /* disable interrupt */ |
| 94 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK); |
| 95 | emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI); |
| 96 | /* level triggerd */ |
| 97 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE); |
| 98 | emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI); |
| 99 | reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A); |
| 100 | emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI)); |
| 101 | /* interrupt clear */ |
| 102 | emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI); |
| 103 | |
| 104 | /* init all controllers */ |
Shinya Kuribayashi | 9b6c04b | 2008-10-24 01:31:16 +0900 | [diff] [blame] | 105 | emma2rh_irq_init(); |
Shinya Kuribayashi | 68ed1ca | 2008-10-24 01:31:43 +0900 | [diff] [blame^] | 106 | emma2rh_sw_irq_init(); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 107 | emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); |
Atsushi Nemoto | 97dcb82 | 2007-01-08 02:14:29 +0900 | [diff] [blame] | 108 | mips_cpu_irq_init(); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 109 | |
| 110 | /* setup cascade interrupts */ |
| 111 | setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); |
| 112 | setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade); |
| 113 | setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade); |
| 114 | } |
| 115 | |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 116 | asmlinkage void plat_irq_dispatch(void) |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 117 | { |
Thiemo Seufer | 119537c | 2007-03-19 00:13:37 +0000 | [diff] [blame] | 118 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 119 | |
| 120 | if (pending & STATUSF_IP7) |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 121 | do_IRQ(CPU_IRQ_BASE + 7); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 122 | else if (pending & STATUSF_IP2) |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 123 | emma2rh_irq_dispatch(); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 124 | else if (pending & STATUSF_IP1) |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 125 | do_IRQ(CPU_IRQ_BASE + 1); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 126 | else if (pending & STATUSF_IP0) |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 127 | do_IRQ(CPU_IRQ_BASE + 0); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 128 | else |
Ralf Baechle | 937a801 | 2006-10-07 19:44:33 +0100 | [diff] [blame] | 129 | spurious_interrupt(); |
dmitry pervushin | 355c471 | 2006-05-21 14:53:06 +0400 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | |