blob: 8ba8fa9004cfc67fb3f68cfba9d859c45c2a923c [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
229 skb_queue_purge(&htt->tx_compl_q);
230 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200231 skb_queue_purge(&htt->rx_in_ord_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232
Michal Kaziorc5450702015-01-24 12:14:48 +0200233 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300234
235 dma_free_coherent(htt->ar->dev,
236 (htt->rx_ring.size *
237 sizeof(htt->rx_ring.paddrs_ring)),
238 htt->rx_ring.paddrs_ring,
239 htt->rx_ring.base_paddr);
240
241 dma_free_coherent(htt->ar->dev,
242 sizeof(*htt->rx_ring.alloc_idx.vaddr),
243 htt->rx_ring.alloc_idx.vaddr,
244 htt->rx_ring.alloc_idx.paddr);
245
246 kfree(htt->rx_ring.netbufs_ring);
247}
248
249static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
250{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252 int idx;
253 struct sk_buff *msdu;
254
Michal Kazior45967082014-02-27 18:50:05 +0200255 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
Michal Kazior8d60ee82014-02-27 18:50:05 +0200257 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200258 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200259 return NULL;
260 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300261
262 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
263 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300264 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200265 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266
267 idx++;
268 idx &= htt->rx_ring.size_mask;
269 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
270 htt->rx_ring.fill_cnt--;
271
Michal Kazior4de02802014-10-23 17:04:23 +0300272 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200273 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300274 msdu->len + skb_tailroom(msdu),
275 DMA_FROM_DEVICE);
276 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
277 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300278
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 return msdu;
280}
281
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100282/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
284 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200285 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200287 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200289 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300290 struct htt_rx_desc *rx_desc;
291
Michal Kazior45967082014-02-27 18:50:05 +0200292 lockdep_assert_held(&htt->rx_ring.lock);
293
Michal Kazior9aa505d2014-11-18 09:24:47 +0200294 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300295 int last_msdu, msdu_len_invalid, msdu_chained;
296
Michal Kazior9aa505d2014-11-18 09:24:47 +0200297 msdu = ath10k_htt_rx_netbuf_pop(htt);
298 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200299 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200300 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200301 }
302
303 __skb_queue_tail(amsdu, msdu);
304
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 rx_desc = (struct htt_rx_desc *)msdu->data;
306
307 /* FIXME: we must report msdu payload since this is what caller
308 * expects now */
309 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
310 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311
312 /*
313 * Sanity check - confirm the HW is finished filling in the
314 * rx data.
315 * If the HW and SW are working correctly, then it's guaranteed
316 * that the HW's MAC DMA is done before this point in the SW.
317 * To prevent the case that we handle a stale Rx descriptor,
318 * just assert for now until we have a way to recover.
319 */
320 if (!(__le32_to_cpu(rx_desc->attention.flags)
321 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 }
325
326 /*
327 * Copy the FW rx descriptor for this MSDU from the rx
328 * indication message into the MSDU's netbuf. HL uses the
329 * same rx indication message definition as LL, and simply
330 * appends new info (fields from the HW rx desc, and the
331 * MSDU payload itself). So, the offset into the rx
332 * indication message only has to account for the standard
333 * offset of the per-MSDU FW rx desc info within the
334 * message, and how many bytes of the per-MSDU FW rx desc
335 * info have already been consumed. (And the endianness of
336 * the host, since for a big-endian host, the rx ind
337 * message contents, including the per-MSDU rx desc bytes,
338 * were byteswapped during upload.)
339 */
340 if (*fw_desc_len > 0) {
341 rx_desc->fw_desc.info0 = **fw_desc;
342 /*
343 * The target is expected to only provide the basic
344 * per-MSDU rx descriptors. Just to be sure, verify
345 * that the target has not attached extension data
346 * (e.g. LRO flow ID).
347 */
348
349 /* or more, if there's extension data */
350 (*fw_desc)++;
351 (*fw_desc_len)--;
352 } else {
353 /*
354 * When an oversized AMSDU happened, FW will lost
355 * some of MSDU status - in this case, the FW
356 * descriptors provided will be less than the
357 * actual MSDUs inside this MPDU. Mark the FW
358 * descriptors so that it will still deliver to
359 * upper stack, if no CRC error for this MPDU.
360 *
361 * FIX THIS - the FW descriptors are actually for
362 * MSDUs in the end of this A-MSDU instead of the
363 * beginning.
364 */
365 rx_desc->fw_desc.info0 = 0;
366 }
367
368 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
369 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
370 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700371 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300372 RX_MSDU_START_INFO0_MSDU_LENGTH);
373 msdu_chained = rx_desc->frag_info.ring2_more_count;
374
375 if (msdu_len_invalid)
376 msdu_len = 0;
377
378 skb_trim(msdu, 0);
379 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
380 msdu_len -= msdu->len;
381
Michal Kazior9aa505d2014-11-18 09:24:47 +0200382 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200384 msdu = ath10k_htt_rx_netbuf_pop(htt);
385 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200386 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200387 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300388 }
389
Michal Kazior9aa505d2014-11-18 09:24:47 +0200390 __skb_queue_tail(amsdu, msdu);
391 skb_trim(msdu, 0);
392 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
393 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300394 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300395 }
396
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700397 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
Kalle Valo5e3dd152013-06-12 20:52:10 +0300398 RX_MSDU_END_INFO0_LAST_MSDU;
399
Michal Kaziorb04e2042014-10-23 17:04:27 +0300400 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300401 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200402
403 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300404 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406
Michal Kazior9aa505d2014-11-18 09:24:47 +0200407 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100408 msdu_chaining = -1;
409
Kalle Valo5e3dd152013-06-12 20:52:10 +0300410 /*
411 * Don't refill the ring yet.
412 *
413 * First, the elements popped here are still in use - it is not
414 * safe to overwrite them until the matching call to
415 * mpdu_desc_list_next. Second, for efficiency it is preferable to
416 * refill the rx ring with 1 PPDU's worth of rx buffers (something
417 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
418 * (something like 3 buffers). Consequently, we'll rely on the txrx
419 * SW to tell us when it is done pulling all the PPDU's rx buffers
420 * out of the rx ring, and then refill it just once.
421 */
422
423 return msdu_chaining;
424}
425
Michal Kazior6e712d42013-09-24 10:18:36 +0200426static void ath10k_htt_rx_replenish_task(unsigned long ptr)
427{
428 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300429
Michal Kazior6e712d42013-09-24 10:18:36 +0200430 ath10k_htt_rx_msdu_buff_replenish(htt);
431}
432
Michal Kaziorc5450702015-01-24 12:14:48 +0200433static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
434 u32 paddr)
435{
436 struct ath10k *ar = htt->ar;
437 struct ath10k_skb_rxcb *rxcb;
438 struct sk_buff *msdu;
439
440 lockdep_assert_held(&htt->rx_ring.lock);
441
442 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
443 if (!msdu)
444 return NULL;
445
446 rxcb = ATH10K_SKB_RXCB(msdu);
447 hash_del(&rxcb->hlist);
448 htt->rx_ring.fill_cnt--;
449
450 dma_unmap_single(htt->ar->dev, rxcb->paddr,
451 msdu->len + skb_tailroom(msdu),
452 DMA_FROM_DEVICE);
453 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
454 msdu->data, msdu->len + skb_tailroom(msdu));
455
456 return msdu;
457}
458
459static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
460 struct htt_rx_in_ord_ind *ev,
461 struct sk_buff_head *list)
462{
463 struct ath10k *ar = htt->ar;
464 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
465 struct htt_rx_desc *rxd;
466 struct sk_buff *msdu;
467 int msdu_count;
468 bool is_offload;
469 u32 paddr;
470
471 lockdep_assert_held(&htt->rx_ring.lock);
472
473 msdu_count = __le16_to_cpu(ev->msdu_count);
474 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
475
476 while (msdu_count--) {
477 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
478
479 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
480 if (!msdu) {
481 __skb_queue_purge(list);
482 return -ENOENT;
483 }
484
485 __skb_queue_tail(list, msdu);
486
487 if (!is_offload) {
488 rxd = (void *)msdu->data;
489
490 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
491
492 skb_put(msdu, sizeof(*rxd));
493 skb_pull(msdu, sizeof(*rxd));
494 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
495
496 if (!(__le32_to_cpu(rxd->attention.flags) &
497 RX_ATTENTION_FLAGS_MSDU_DONE)) {
498 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
499 return -EIO;
500 }
501 }
502
503 msdu_desc++;
504 }
505
506 return 0;
507}
508
Michal Kazior95bf21f2014-05-16 17:15:39 +0300509int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200511 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512 dma_addr_t paddr;
513 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300514 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
516
Michal Kazior51fc7d72014-10-23 17:04:24 +0300517 htt->rx_confused = false;
518
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100519 /* XXX: The fill level could be changed during runtime in response to
520 * the host processing latency. Is this really worth it?
521 */
522 htt->rx_ring.size = HTT_RX_RING_SIZE;
523 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
524 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200527 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return -EINVAL;
529 }
530
Kalle Valo5e3dd152013-06-12 20:52:10 +0300531 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300532 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300533 GFP_KERNEL);
534 if (!htt->rx_ring.netbufs_ring)
535 goto err_netbuf;
536
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300537 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
538
539 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300540 if (!vaddr)
541 goto err_dma_ring;
542
543 htt->rx_ring.paddrs_ring = vaddr;
544 htt->rx_ring.base_paddr = paddr;
545
546 vaddr = dma_alloc_coherent(htt->ar->dev,
547 sizeof(*htt->rx_ring.alloc_idx.vaddr),
548 &paddr, GFP_DMA);
549 if (!vaddr)
550 goto err_dma_idx;
551
552 htt->rx_ring.alloc_idx.vaddr = vaddr;
553 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200554 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300555 *htt->rx_ring.alloc_idx.vaddr = 0;
556
557 /* Initialize the Rx refill retry timer */
558 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
559
560 spin_lock_init(&htt->rx_ring.lock);
561
562 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200563 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
564 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300565
Michal Kazior6e712d42013-09-24 10:18:36 +0200566 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
567 (unsigned long)htt);
568
Michal Kazior6c5151a2014-02-27 18:50:04 +0200569 skb_queue_head_init(&htt->tx_compl_q);
570 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200571 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200572
573 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
574 (unsigned long)htt);
575
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 htt->rx_ring.size, htt->rx_ring.fill_level);
578 return 0;
579
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580err_dma_idx:
581 dma_free_coherent(htt->ar->dev,
582 (htt->rx_ring.size *
583 sizeof(htt->rx_ring.paddrs_ring)),
584 htt->rx_ring.paddrs_ring,
585 htt->rx_ring.base_paddr);
586err_dma_ring:
587 kfree(htt->rx_ring.netbufs_ring);
588err_netbuf:
589 return -ENOMEM;
590}
591
Michal Kazior7aa7a722014-08-25 12:09:38 +0200592static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
593 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596 case HTT_RX_MPDU_ENCRYPT_NONE:
597 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300598 case HTT_RX_MPDU_ENCRYPT_WEP40:
599 case HTT_RX_MPDU_ENCRYPT_WEP104:
600 return IEEE80211_WEP_IV_LEN;
601 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
602 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
603 return IEEE80211_TKIP_IV_LEN;
604 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
605 return IEEE80211_CCMP_HDR_LEN;
606 case HTT_RX_MPDU_ENCRYPT_WEP128:
607 case HTT_RX_MPDU_ENCRYPT_WAPI:
608 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300609 }
610
Michal Kazior890d3b22014-10-23 17:04:22 +0300611 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return 0;
613}
614
Michal Kazior890d3b22014-10-23 17:04:22 +0300615#define MICHAEL_MIC_LEN 8
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
618 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619{
620 switch (type) {
621 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300622 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300623 case HTT_RX_MPDU_ENCRYPT_WEP40:
624 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300626 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
627 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300628 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_CCMP_MIC_LEN;
631 case HTT_RX_MPDU_ENCRYPT_WEP128:
632 case HTT_RX_MPDU_ENCRYPT_WAPI:
633 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634 }
635
Michal Kazior890d3b22014-10-23 17:04:22 +0300636 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300637 return 0;
638}
639
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300640struct amsdu_subframe_hdr {
641 u8 dst[ETH_ALEN];
642 u8 src[ETH_ALEN];
643 __be16 len;
644} __packed;
645
Michal Kazior6986fdd2015-08-27 14:47:33 +0200646#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
647
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100648static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200649 struct ieee80211_rx_status *status,
650 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100651{
Michal Kazior5528e032015-03-30 09:51:56 +0300652 struct ieee80211_supported_band *sband;
653 u8 cck, rate, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100654 u8 preamble = 0;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200655 u8 group_id;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200656 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100657
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200658 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
659 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
660 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
661
662 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100663
664 switch (preamble) {
665 case HTT_RX_LEGACY:
Michal Kazior5528e032015-03-30 09:51:56 +0300666 /* To get legacy rate index band is required. Since band can't
667 * be undefined check if freq is non-zero.
668 */
669 if (!status->freq)
670 return;
671
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200672 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
673 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Michal Kazior5528e032015-03-30 09:51:56 +0300674 rate &= ~RX_PPDU_START_RATE_FLAG;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100675
Michal Kazior5528e032015-03-30 09:51:56 +0300676 sband = &ar->mac.sbands[status->band];
677 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100678 break;
679 case HTT_RX_HT:
680 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200681 /* HT-SIG - Table 20-11 in info2 and info3 */
682 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100683 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200684 bw = (info2 >> 7) & 1;
685 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100686
687 status->rate_idx = mcs;
688 status->flag |= RX_FLAG_HT;
689 if (sgi)
690 status->flag |= RX_FLAG_SHORT_GI;
691 if (bw)
692 status->flag |= RX_FLAG_40MHZ;
693 break;
694 case HTT_RX_VHT:
695 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200696 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100697 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200698 bw = info2 & 3;
699 sgi = info3 & 1;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200700 group_id = (info2 >> 4) & 0x3F;
701
702 if (GROUP_ID_IS_SU_MIMO(group_id)) {
703 mcs = (info3 >> 4) & 0x0F;
704 nss = ((info2 >> 10) & 0x07) + 1;
705 } else {
706 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
707 * so it's impossible to decode MCS. Also since
708 * firmware consumes Group Id Management frames host
709 * has no knowledge regarding group/user position
710 * mapping so it's impossible to pick the correct Nsts
711 * from VHT-SIG-A1.
712 *
713 * Bandwidth and SGI are valid so report the rateinfo
714 * on best-effort basis.
715 */
716 mcs = 0;
717 nss = 1;
718 }
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100719
720 status->rate_idx = mcs;
721 status->vht_nss = nss;
722
723 if (sgi)
724 status->flag |= RX_FLAG_SHORT_GI;
725
726 switch (bw) {
727 /* 20MHZ */
728 case 0:
729 break;
730 /* 40MHZ */
731 case 1:
732 status->flag |= RX_FLAG_40MHZ;
733 break;
734 /* 80MHZ */
735 case 2:
736 status->vht_flag |= RX_VHT_FLAG_80MHZ;
737 }
738
739 status->flag |= RX_FLAG_VHT;
740 break;
741 default:
742 break;
743 }
744}
745
Michal Kazior500ff9f2015-03-31 10:26:21 +0000746static struct ieee80211_channel *
747ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
748{
749 struct ath10k_peer *peer;
750 struct ath10k_vif *arvif;
751 struct cfg80211_chan_def def;
752 u16 peer_id;
753
754 lockdep_assert_held(&ar->data_lock);
755
756 if (!rxd)
757 return NULL;
758
759 if (rxd->attention.flags &
760 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
761 return NULL;
762
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700763 if (!(rxd->msdu_end.common.info0 &
Michal Kazior500ff9f2015-03-31 10:26:21 +0000764 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
765 return NULL;
766
767 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
768 RX_MPDU_START_INFO0_PEER_IDX);
769
770 peer = ath10k_peer_find_by_id(ar, peer_id);
771 if (!peer)
772 return NULL;
773
774 arvif = ath10k_get_arvif(ar, peer->vdev_id);
775 if (WARN_ON_ONCE(!arvif))
776 return NULL;
777
778 if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
779 return NULL;
780
781 return def.chan;
782}
783
784static struct ieee80211_channel *
785ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
786{
787 struct ath10k_vif *arvif;
788 struct cfg80211_chan_def def;
789
790 lockdep_assert_held(&ar->data_lock);
791
792 list_for_each_entry(arvif, &ar->arvifs, list) {
793 if (arvif->vdev_id == vdev_id &&
794 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
795 return def.chan;
796 }
797
798 return NULL;
799}
800
801static void
802ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
803 struct ieee80211_chanctx_conf *conf,
804 void *data)
805{
806 struct cfg80211_chan_def *def = data;
807
808 *def = conf->def;
809}
810
811static struct ieee80211_channel *
812ath10k_htt_rx_h_any_channel(struct ath10k *ar)
813{
814 struct cfg80211_chan_def def = {};
815
816 ieee80211_iter_chan_contexts_atomic(ar->hw,
817 ath10k_htt_rx_h_any_chan_iter,
818 &def);
819
820 return def.chan;
821}
822
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100823static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000824 struct ieee80211_rx_status *status,
825 struct htt_rx_desc *rxd,
826 u32 vdev_id)
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100827{
828 struct ieee80211_channel *ch;
829
830 spin_lock_bh(&ar->data_lock);
831 ch = ar->scan_channel;
832 if (!ch)
833 ch = ar->rx_channel;
Michal Kazior500ff9f2015-03-31 10:26:21 +0000834 if (!ch)
835 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
836 if (!ch)
837 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
838 if (!ch)
839 ch = ath10k_htt_rx_h_any_channel(ar);
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100840 spin_unlock_bh(&ar->data_lock);
841
842 if (!ch)
843 return false;
844
845 status->band = ch->band;
846 status->freq = ch->center_freq;
847
848 return true;
849}
850
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200851static void ath10k_htt_rx_h_signal(struct ath10k *ar,
852 struct ieee80211_rx_status *status,
853 struct htt_rx_desc *rxd)
854{
855 /* FIXME: Get real NF */
856 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
857 rxd->ppdu_start.rssi_comb;
858 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
859}
860
861static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
862 struct ieee80211_rx_status *status,
863 struct htt_rx_desc *rxd)
864{
865 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
866 * means all prior MSDUs in a PPDU are reported to mac80211 without the
867 * TSF. Is it worth holding frames until end of PPDU is known?
868 *
869 * FIXME: Can we get/compute 64bit TSF?
870 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200871 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200872 status->flag |= RX_FLAG_MACTIME_END;
873}
874
875static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
876 struct sk_buff_head *amsdu,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000877 struct ieee80211_rx_status *status,
878 u32 vdev_id)
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200879{
880 struct sk_buff *first;
881 struct htt_rx_desc *rxd;
882 bool is_first_ppdu;
883 bool is_last_ppdu;
884
885 if (skb_queue_empty(amsdu))
886 return;
887
888 first = skb_peek(amsdu);
889 rxd = (void *)first->data - sizeof(*rxd);
890
891 is_first_ppdu = !!(rxd->attention.flags &
892 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
893 is_last_ppdu = !!(rxd->attention.flags &
894 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
895
896 if (is_first_ppdu) {
897 /* New PPDU starts so clear out the old per-PPDU status. */
898 status->freq = 0;
899 status->rate_idx = 0;
900 status->vht_nss = 0;
901 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
902 status->flag &= ~(RX_FLAG_HT |
903 RX_FLAG_VHT |
904 RX_FLAG_SHORT_GI |
905 RX_FLAG_40MHZ |
906 RX_FLAG_MACTIME_END);
907 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
908
909 ath10k_htt_rx_h_signal(ar, status, rxd);
Michal Kazior500ff9f2015-03-31 10:26:21 +0000910 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200911 ath10k_htt_rx_h_rates(ar, status, rxd);
912 }
913
914 if (is_last_ppdu)
915 ath10k_htt_rx_h_mactime(ar, status, rxd);
916}
917
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300918static const char * const tid_to_ac[] = {
919 "BE",
920 "BK",
921 "BK",
922 "BE",
923 "VI",
924 "VI",
925 "VO",
926 "VO",
927};
928
929static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
930{
931 u8 *qc;
932 int tid;
933
934 if (!ieee80211_is_data_qos(hdr->frame_control))
935 return "";
936
937 qc = ieee80211_get_qos_ctl(hdr);
938 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
939 if (tid < 8)
940 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
941 else
942 snprintf(out, size, "tid %d", tid);
943
944 return out;
945}
946
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100947static void ath10k_process_rx(struct ath10k *ar,
948 struct ieee80211_rx_status *rx_status,
949 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100950{
951 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300952 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
953 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100954
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100955 status = IEEE80211_SKB_RXCB(skb);
956 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100957
Michal Kazior7aa7a722014-08-25 12:09:38 +0200958 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300959 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100960 skb,
961 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300962 ieee80211_get_SA(hdr),
963 ath10k_get_tid(hdr, tid, sizeof(tid)),
964 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
965 "mcast" : "ucast",
966 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100967 status->flag == 0 ? "legacy" : "",
968 status->flag & RX_FLAG_HT ? "ht" : "",
969 status->flag & RX_FLAG_VHT ? "vht" : "",
970 status->flag & RX_FLAG_40MHZ ? "40" : "",
971 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
972 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
973 status->rate_idx,
974 status->vht_nss,
975 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100976 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100977 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300978 !!(status->flag & RX_FLAG_MMIC_ERROR),
979 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200980 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100981 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +0530982 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
983 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100984
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100985 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100986}
987
Michal Kazior48f4ca32015-05-19 14:09:34 +0200988static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
989 struct ieee80211_hdr *hdr)
Michal Kaziord960c362014-02-25 09:29:57 +0200990{
Michal Kazior48f4ca32015-05-19 14:09:34 +0200991 int len = ieee80211_hdrlen(hdr->frame_control);
992
993 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
994 ar->fw_features))
995 len = round_up(len, 4);
996
997 return len;
Michal Kaziord960c362014-02-25 09:29:57 +0200998}
999
Michal Kazior581c25f2014-11-18 09:24:48 +02001000static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1001 struct sk_buff *msdu,
1002 struct ieee80211_rx_status *status,
1003 enum htt_rx_mpdu_encrypt_type enctype,
1004 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001005{
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001006 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001007 struct htt_rx_desc *rxd;
1008 size_t hdr_len;
1009 size_t crypto_len;
1010 bool is_first;
1011 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001012
Michal Kazior581c25f2014-11-18 09:24:48 +02001013 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001014 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001015 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001016 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001017 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +02001018
Michal Kazior581c25f2014-11-18 09:24:48 +02001019 /* Delivered decapped frame:
1020 * [802.11 header]
1021 * [crypto param] <-- can be trimmed if !fcs_err &&
1022 * !decrypt_err && !peer_idx_invalid
1023 * [amsdu header] <-- only if A-MSDU
1024 * [rfc1042/llc]
1025 * [payload]
1026 * [FCS] <-- at end, needs to be trimmed
1027 */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001028
Michal Kazior581c25f2014-11-18 09:24:48 +02001029 /* This probably shouldn't happen but warn just in case */
1030 if (unlikely(WARN_ON_ONCE(!is_first)))
1031 return;
1032
1033 /* This probably shouldn't happen but warn just in case */
1034 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1035 return;
1036
1037 skb_trim(msdu, msdu->len - FCS_LEN);
1038
1039 /* In most cases this will be true for sniffed frames. It makes sense
David Liuccec9032015-07-24 20:25:32 +03001040 * to deliver them as-is without stripping the crypto param. This is
1041 * necessary for software based decryption.
Michal Kazior581c25f2014-11-18 09:24:48 +02001042 *
1043 * If there's no error then the frame is decrypted. At least that is
1044 * the case for frames that come in via fragmented rx indication.
1045 */
1046 if (!is_decrypted)
1047 return;
1048
1049 /* The payload is decrypted so strip crypto params. Start from tail
1050 * since hdr is used to compute some stuff.
1051 */
1052
1053 hdr = (void *)msdu->data;
1054
1055 /* Tail */
1056 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
1057
1058 /* MMIC */
1059 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1060 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1061 skb_trim(msdu, msdu->len - 8);
1062
1063 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001064 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001065 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001066
Michal Kazior581c25f2014-11-18 09:24:48 +02001067 memmove((void *)msdu->data + crypto_len,
1068 (void *)msdu->data, hdr_len);
1069 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001070}
1071
Michal Kazior581c25f2014-11-18 09:24:48 +02001072static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1073 struct sk_buff *msdu,
1074 struct ieee80211_rx_status *status,
1075 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001076{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001077 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001078 size_t hdr_len;
1079 u8 da[ETH_ALEN];
1080 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001081
Michal Kazior581c25f2014-11-18 09:24:48 +02001082 /* Delivered decapped frame:
1083 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1084 * [rfc1042/llc]
1085 *
1086 * Note: The nwifi header doesn't have QoS Control and is
1087 * (always?) a 3addr frame.
1088 *
1089 * Note2: There's no A-MSDU subframe header. Even if it's part
1090 * of an A-MSDU.
1091 */
1092
1093 /* pull decapped header and copy SA & DA */
1094 hdr = (struct ieee80211_hdr *)msdu->data;
Michal Kazior48f4ca32015-05-19 14:09:34 +02001095 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
Michal Kazior581c25f2014-11-18 09:24:48 +02001096 ether_addr_copy(da, ieee80211_get_DA(hdr));
1097 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1098 skb_pull(msdu, hdr_len);
1099
1100 /* push original 802.11 header */
1101 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001102 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001103 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001104
Michal Kazior581c25f2014-11-18 09:24:48 +02001105 /* original 802.11 header has a different DA and in
1106 * case of 4addr it may also have different SA
1107 */
1108 hdr = (struct ieee80211_hdr *)msdu->data;
1109 ether_addr_copy(ieee80211_get_DA(hdr), da);
1110 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1111}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001112
Michal Kazior581c25f2014-11-18 09:24:48 +02001113static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1114 struct sk_buff *msdu,
1115 enum htt_rx_mpdu_encrypt_type enctype)
1116{
1117 struct ieee80211_hdr *hdr;
1118 struct htt_rx_desc *rxd;
1119 size_t hdr_len, crypto_len;
1120 void *rfc1042;
1121 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001122
Michal Kazior581c25f2014-11-18 09:24:48 +02001123 rxd = (void *)msdu->data - sizeof(*rxd);
1124 hdr = (void *)rxd->rx_hdr_status;
1125
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001126 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001127 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001128 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001129 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1130 is_amsdu = !(is_first && is_last);
1131
1132 rfc1042 = hdr;
1133
1134 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001135 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001136 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001137
Michal Kazior581c25f2014-11-18 09:24:48 +02001138 rfc1042 += round_up(hdr_len, 4) +
1139 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001140 }
1141
Michal Kazior581c25f2014-11-18 09:24:48 +02001142 if (is_amsdu)
1143 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001144
Michal Kazior581c25f2014-11-18 09:24:48 +02001145 return rfc1042;
1146}
1147
1148static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1149 struct sk_buff *msdu,
1150 struct ieee80211_rx_status *status,
1151 const u8 first_hdr[64],
1152 enum htt_rx_mpdu_encrypt_type enctype)
1153{
1154 struct ieee80211_hdr *hdr;
1155 struct ethhdr *eth;
1156 size_t hdr_len;
1157 void *rfc1042;
1158 u8 da[ETH_ALEN];
1159 u8 sa[ETH_ALEN];
1160
1161 /* Delivered decapped frame:
1162 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1163 * [payload]
1164 */
1165
1166 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1167 if (WARN_ON_ONCE(!rfc1042))
1168 return;
1169
1170 /* pull decapped header and copy SA & DA */
1171 eth = (struct ethhdr *)msdu->data;
1172 ether_addr_copy(da, eth->h_dest);
1173 ether_addr_copy(sa, eth->h_source);
1174 skb_pull(msdu, sizeof(struct ethhdr));
1175
1176 /* push rfc1042/llc/snap */
1177 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1178 sizeof(struct rfc1042_hdr));
1179
1180 /* push original 802.11 header */
1181 hdr = (struct ieee80211_hdr *)first_hdr;
1182 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1183 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1184
1185 /* original 802.11 header has a different DA and in
1186 * case of 4addr it may also have different SA
1187 */
1188 hdr = (struct ieee80211_hdr *)msdu->data;
1189 ether_addr_copy(ieee80211_get_DA(hdr), da);
1190 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1191}
1192
1193static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1194 struct sk_buff *msdu,
1195 struct ieee80211_rx_status *status,
1196 const u8 first_hdr[64])
1197{
1198 struct ieee80211_hdr *hdr;
1199 size_t hdr_len;
1200
1201 /* Delivered decapped frame:
1202 * [amsdu header] <-- replaced with 802.11 hdr
1203 * [rfc1042/llc]
1204 * [payload]
1205 */
1206
1207 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1208
1209 hdr = (struct ieee80211_hdr *)first_hdr;
1210 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1211 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1212}
1213
1214static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1215 struct sk_buff *msdu,
1216 struct ieee80211_rx_status *status,
1217 u8 first_hdr[64],
1218 enum htt_rx_mpdu_encrypt_type enctype,
1219 bool is_decrypted)
1220{
1221 struct htt_rx_desc *rxd;
1222 enum rx_msdu_decap_format decap;
Michal Kazior581c25f2014-11-18 09:24:48 +02001223
1224 /* First msdu's decapped header:
1225 * [802.11 header] <-- padded to 4 bytes long
1226 * [crypto param] <-- padded to 4 bytes long
1227 * [amsdu header] <-- only if A-MSDU
1228 * [rfc1042/llc]
1229 *
1230 * Other (2nd, 3rd, ..) msdu's decapped header:
1231 * [amsdu header] <-- only if A-MSDU
1232 * [rfc1042/llc]
1233 */
1234
1235 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001236 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001237 RX_MSDU_START_INFO1_DECAP_FORMAT);
1238
1239 switch (decap) {
1240 case RX_MSDU_DECAP_RAW:
1241 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1242 is_decrypted);
1243 break;
1244 case RX_MSDU_DECAP_NATIVE_WIFI:
1245 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1246 break;
1247 case RX_MSDU_DECAP_ETHERNET2_DIX:
1248 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1249 break;
1250 case RX_MSDU_DECAP_8023_SNAP_LLC:
1251 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1252 break;
1253 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001254}
1255
Michal Kazior605f81a2013-07-31 10:47:56 +02001256static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1257{
1258 struct htt_rx_desc *rxd;
1259 u32 flags, info;
1260 bool is_ip4, is_ip6;
1261 bool is_tcp, is_udp;
1262 bool ip_csum_ok, tcpudp_csum_ok;
1263
1264 rxd = (void *)skb->data - sizeof(*rxd);
1265 flags = __le32_to_cpu(rxd->attention.flags);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001266 info = __le32_to_cpu(rxd->msdu_start.common.info1);
Michal Kazior605f81a2013-07-31 10:47:56 +02001267
1268 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1269 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1270 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1271 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1272 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1273 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1274
1275 if (!is_ip4 && !is_ip6)
1276 return CHECKSUM_NONE;
1277 if (!is_tcp && !is_udp)
1278 return CHECKSUM_NONE;
1279 if (!ip_csum_ok)
1280 return CHECKSUM_NONE;
1281 if (!tcpudp_csum_ok)
1282 return CHECKSUM_NONE;
1283
1284 return CHECKSUM_UNNECESSARY;
1285}
1286
Michal Kazior581c25f2014-11-18 09:24:48 +02001287static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1288{
1289 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1290}
1291
1292static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1293 struct sk_buff_head *amsdu,
1294 struct ieee80211_rx_status *status)
1295{
1296 struct sk_buff *first;
1297 struct sk_buff *last;
1298 struct sk_buff *msdu;
1299 struct htt_rx_desc *rxd;
1300 struct ieee80211_hdr *hdr;
1301 enum htt_rx_mpdu_encrypt_type enctype;
1302 u8 first_hdr[64];
1303 u8 *qos;
1304 size_t hdr_len;
1305 bool has_fcs_err;
1306 bool has_crypto_err;
1307 bool has_tkip_err;
1308 bool has_peer_idx_invalid;
1309 bool is_decrypted;
1310 u32 attention;
1311
1312 if (skb_queue_empty(amsdu))
1313 return;
1314
1315 first = skb_peek(amsdu);
1316 rxd = (void *)first->data - sizeof(*rxd);
1317
1318 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1319 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1320
1321 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1322 * decapped header. It'll be used for undecapping of each MSDU.
1323 */
1324 hdr = (void *)rxd->rx_hdr_status;
1325 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1326 memcpy(first_hdr, hdr, hdr_len);
1327
1328 /* Each A-MSDU subframe will use the original header as the base and be
1329 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1330 */
1331 hdr = (void *)first_hdr;
1332 qos = ieee80211_get_qos_ctl(hdr);
1333 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1334
1335 /* Some attention flags are valid only in the last MSDU. */
1336 last = skb_peek_tail(amsdu);
1337 rxd = (void *)last->data - sizeof(*rxd);
1338 attention = __le32_to_cpu(rxd->attention.flags);
1339
1340 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1341 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1342 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1343 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1344
1345 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1346 * e.g. due to fcs error, missing peer or invalid key data it will
1347 * report the frame as raw.
1348 */
1349 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1350 !has_fcs_err &&
1351 !has_crypto_err &&
1352 !has_peer_idx_invalid);
1353
1354 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1355 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1356 RX_FLAG_MMIC_ERROR |
1357 RX_FLAG_DECRYPTED |
1358 RX_FLAG_IV_STRIPPED |
1359 RX_FLAG_MMIC_STRIPPED);
1360
1361 if (has_fcs_err)
1362 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1363
1364 if (has_tkip_err)
1365 status->flag |= RX_FLAG_MMIC_ERROR;
1366
1367 if (is_decrypted)
1368 status->flag |= RX_FLAG_DECRYPTED |
1369 RX_FLAG_IV_STRIPPED |
1370 RX_FLAG_MMIC_STRIPPED;
1371
1372 skb_queue_walk(amsdu, msdu) {
1373 ath10k_htt_rx_h_csum_offload(msdu);
1374 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1375 is_decrypted);
1376
1377 /* Undecapping involves copying the original 802.11 header back
1378 * to sk_buff. If frame is protected and hardware has decrypted
1379 * it then remove the protected bit.
1380 */
1381 if (!is_decrypted)
1382 continue;
1383
1384 hdr = (void *)msdu->data;
1385 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1386 }
1387}
1388
1389static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1390 struct sk_buff_head *amsdu,
1391 struct ieee80211_rx_status *status)
1392{
1393 struct sk_buff *msdu;
1394
1395 while ((msdu = __skb_dequeue(amsdu))) {
1396 /* Setup per-MSDU flags */
1397 if (skb_queue_empty(amsdu))
1398 status->flag &= ~RX_FLAG_AMSDU_MORE;
1399 else
1400 status->flag |= RX_FLAG_AMSDU_MORE;
1401
1402 ath10k_process_rx(ar, status, msdu);
1403 }
1404}
1405
Michal Kazior9aa505d2014-11-18 09:24:47 +02001406static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001407{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001408 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001409 int space;
1410 int total_len = 0;
1411
1412 /* TODO: Might could optimize this by using
1413 * skb_try_coalesce or similar method to
1414 * decrease copying, or maybe get mac80211 to
1415 * provide a way to just receive a list of
1416 * skb?
1417 */
1418
Michal Kazior9aa505d2014-11-18 09:24:47 +02001419 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001420
1421 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001422 skb_queue_walk(amsdu, skb)
1423 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001424
Michal Kazior9aa505d2014-11-18 09:24:47 +02001425 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001426 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001427 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001428 /* TODO: bump some rx-oom error stat */
1429 /* put it back together so we can free the
1430 * whole list at once.
1431 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001432 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001433 return -1;
1434 }
1435
1436 /* Walk list again, copying contents into
1437 * msdu_head
1438 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001439 while ((skb = __skb_dequeue(amsdu))) {
1440 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1441 skb->len);
1442 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001443 }
1444
Michal Kazior9aa505d2014-11-18 09:24:47 +02001445 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001446 return 0;
1447}
1448
Michal Kazior581c25f2014-11-18 09:24:48 +02001449static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1450 struct sk_buff_head *amsdu,
1451 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001452{
Michal Kazior581c25f2014-11-18 09:24:48 +02001453 struct sk_buff *first;
1454 struct htt_rx_desc *rxd;
1455 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001456
Michal Kazior581c25f2014-11-18 09:24:48 +02001457 first = skb_peek(amsdu);
1458 rxd = (void *)first->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001459 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001460 RX_MSDU_START_INFO1_DECAP_FORMAT);
1461
1462 if (!chained)
1463 return;
1464
1465 /* FIXME: Current unchaining logic can only handle simple case of raw
1466 * msdu chaining. If decapping is other than raw the chaining may be
1467 * more complex and this isn't handled by the current code. Don't even
1468 * try re-constructing such frames - it'll be pretty much garbage.
1469 */
1470 if (decap != RX_MSDU_DECAP_RAW ||
1471 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1472 __skb_queue_purge(amsdu);
1473 return;
1474 }
1475
1476 ath10k_unchain_msdu(amsdu);
1477}
1478
1479static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1480 struct sk_buff_head *amsdu,
1481 struct ieee80211_rx_status *rx_status)
1482{
1483 struct sk_buff *msdu;
1484 struct htt_rx_desc *rxd;
Michal Kaziord67d0a02014-11-24 15:34:08 +01001485 bool is_mgmt;
1486 bool has_fcs_err;
Michal Kazior581c25f2014-11-18 09:24:48 +02001487
1488 msdu = skb_peek(amsdu);
1489 rxd = (void *)msdu->data - sizeof(*rxd);
1490
1491 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1492 * invalid/dangerous frames.
1493 */
1494
1495 if (!rx_status->freq) {
1496 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001497 return false;
1498 }
1499
Michal Kaziord67d0a02014-11-24 15:34:08 +01001500 is_mgmt = !!(rxd->attention.flags &
1501 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1502 has_fcs_err = !!(rxd->attention.flags &
1503 __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
1504
Michal Kazior581c25f2014-11-18 09:24:48 +02001505 /* Management frames are handled via WMI events. The pros of such
1506 * approach is that channel is explicitly provided in WMI events
1507 * whereas HTT doesn't provide channel information for Rxed frames.
Michal Kaziord67d0a02014-11-24 15:34:08 +01001508 *
1509 * However some firmware revisions don't report corrupted frames via
1510 * WMI so don't drop them.
Michal Kazior581c25f2014-11-18 09:24:48 +02001511 */
Michal Kaziord67d0a02014-11-24 15:34:08 +01001512 if (is_mgmt && !has_fcs_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001513 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001514 return false;
1515 }
1516
Michal Kazior581c25f2014-11-18 09:24:48 +02001517 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1518 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001519 return false;
1520 }
1521
1522 return true;
1523}
1524
Michal Kazior581c25f2014-11-18 09:24:48 +02001525static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1526 struct sk_buff_head *amsdu,
1527 struct ieee80211_rx_status *rx_status)
1528{
1529 if (skb_queue_empty(amsdu))
1530 return;
1531
1532 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1533 return;
1534
1535 __skb_queue_purge(amsdu);
1536}
1537
Kalle Valo5e3dd152013-06-12 20:52:10 +03001538static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1539 struct htt_rx_indication *rx)
1540{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001541 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001542 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001543 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001544 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001545 int num_mpdu_ranges;
1546 int fw_desc_len;
1547 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001548 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001549
Michal Kazior45967082014-02-27 18:50:05 +02001550 lockdep_assert_held(&htt->rx_ring.lock);
1551
Michal Kaziore0bd7512014-11-18 09:24:48 +02001552 if (htt->rx_confused)
1553 return;
1554
Kalle Valo5e3dd152013-06-12 20:52:10 +03001555 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1556 fw_desc = (u8 *)&rx->fw_desc;
1557
1558 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1559 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1560 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1561
Michal Kazior7aa7a722014-08-25 12:09:38 +02001562 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001563 rx, sizeof(*rx) +
1564 (sizeof(struct htt_rx_indication_mpdu_range) *
1565 num_mpdu_ranges));
1566
Michal Kaziord5406902014-11-18 09:24:47 +02001567 for (i = 0; i < num_mpdu_ranges; i++)
1568 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001569
Michal Kaziord5406902014-11-18 09:24:47 +02001570 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001571 __skb_queue_head_init(&amsdu);
1572 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001573 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001574 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001575 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001576 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001577 /* FIXME: It's probably a good idea to reboot the
1578 * device instead of leaving it inoperable.
1579 */
1580 htt->rx_confused = true;
1581 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001582 }
Michal Kaziord5406902014-11-18 09:24:47 +02001583
Michal Kazior500ff9f2015-03-31 10:26:21 +00001584 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001585 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1586 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1587 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1588 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001589 }
1590
Michal Kazior6e712d42013-09-24 10:18:36 +02001591 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001592}
1593
1594static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001595 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001596{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001597 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001598 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001599 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001600 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001601 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001602 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001603
1604 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1605 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1606
Michal Kazior9aa505d2014-11-18 09:24:47 +02001607 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001608
1609 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001610 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001611 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001612 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001613
Michal Kazior686687c2014-10-23 17:04:24 +03001614 tasklet_schedule(&htt->rx_replenish_task);
1615
Michal Kazior7aa7a722014-08-25 12:09:38 +02001616 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001617
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001618 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001619 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001620 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001621 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001622 return;
1623 }
1624
Michal Kazior9aa505d2014-11-18 09:24:47 +02001625 if (skb_queue_len(&amsdu) != 1) {
1626 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1627 __skb_queue_purge(&amsdu);
1628 return;
1629 }
1630
Michal Kazior500ff9f2015-03-31 10:26:21 +00001631 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001632 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1633 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1634 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001635
Kalle Valo5e3dd152013-06-12 20:52:10 +03001636 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001637 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001638 "expecting more fragmented rx in one indication %d\n",
1639 fw_desc_len);
1640 }
1641}
1642
Michal Kazior6c5151a2014-02-27 18:50:04 +02001643static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1644 struct sk_buff *skb)
1645{
1646 struct ath10k_htt *htt = &ar->htt;
1647 struct htt_resp *resp = (struct htt_resp *)skb->data;
1648 struct htt_tx_done tx_done = {};
1649 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1650 __le16 msdu_id;
1651 int i;
1652
1653 switch (status) {
1654 case HTT_DATA_TX_STATUS_NO_ACK:
1655 tx_done.no_ack = true;
1656 break;
1657 case HTT_DATA_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03001658 tx_done.success = true;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001659 break;
1660 case HTT_DATA_TX_STATUS_DISCARD:
1661 case HTT_DATA_TX_STATUS_POSTPONE:
1662 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1663 tx_done.discard = true;
1664 break;
1665 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001666 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001667 tx_done.discard = true;
1668 break;
1669 }
1670
Michal Kazior7aa7a722014-08-25 12:09:38 +02001671 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001672 resp->data_tx_completion.num_msdus);
1673
1674 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1675 msdu_id = resp->data_tx_completion.msdus[i];
1676 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1677 ath10k_txrx_tx_unref(htt, &tx_done);
1678 }
1679}
1680
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001681static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1682{
1683 struct htt_rx_addba *ev = &resp->rx_addba;
1684 struct ath10k_peer *peer;
1685 struct ath10k_vif *arvif;
1686 u16 info0, tid, peer_id;
1687
1688 info0 = __le16_to_cpu(ev->info0);
1689 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1690 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1691
Michal Kazior7aa7a722014-08-25 12:09:38 +02001692 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001693 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1694 tid, peer_id, ev->window_size);
1695
1696 spin_lock_bh(&ar->data_lock);
1697 peer = ath10k_peer_find_by_id(ar, peer_id);
1698 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001699 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001700 peer_id);
1701 spin_unlock_bh(&ar->data_lock);
1702 return;
1703 }
1704
1705 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1706 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001707 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001708 peer->vdev_id);
1709 spin_unlock_bh(&ar->data_lock);
1710 return;
1711 }
1712
Michal Kazior7aa7a722014-08-25 12:09:38 +02001713 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001714 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1715 peer->addr, tid, ev->window_size);
1716
1717 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1718 spin_unlock_bh(&ar->data_lock);
1719}
1720
1721static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1722{
1723 struct htt_rx_delba *ev = &resp->rx_delba;
1724 struct ath10k_peer *peer;
1725 struct ath10k_vif *arvif;
1726 u16 info0, tid, peer_id;
1727
1728 info0 = __le16_to_cpu(ev->info0);
1729 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1730 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1731
Michal Kazior7aa7a722014-08-25 12:09:38 +02001732 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001733 "htt rx delba tid %hu peer_id %hu\n",
1734 tid, peer_id);
1735
1736 spin_lock_bh(&ar->data_lock);
1737 peer = ath10k_peer_find_by_id(ar, peer_id);
1738 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001739 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001740 peer_id);
1741 spin_unlock_bh(&ar->data_lock);
1742 return;
1743 }
1744
1745 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1746 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001747 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001748 peer->vdev_id);
1749 spin_unlock_bh(&ar->data_lock);
1750 return;
1751 }
1752
Michal Kazior7aa7a722014-08-25 12:09:38 +02001753 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001754 "htt rx stop rx ba session sta %pM tid %hu\n",
1755 peer->addr, tid);
1756
1757 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1758 spin_unlock_bh(&ar->data_lock);
1759}
1760
Michal Kaziorc5450702015-01-24 12:14:48 +02001761static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1762 struct sk_buff_head *amsdu)
1763{
1764 struct sk_buff *msdu;
1765 struct htt_rx_desc *rxd;
1766
1767 if (skb_queue_empty(list))
1768 return -ENOBUFS;
1769
1770 if (WARN_ON(!skb_queue_empty(amsdu)))
1771 return -EINVAL;
1772
1773 while ((msdu = __skb_dequeue(list))) {
1774 __skb_queue_tail(amsdu, msdu);
1775
1776 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001777 if (rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001778 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1779 break;
1780 }
1781
1782 msdu = skb_peek_tail(amsdu);
1783 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001784 if (!(rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001785 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1786 skb_queue_splice_init(amsdu, list);
1787 return -EAGAIN;
1788 }
1789
1790 return 0;
1791}
1792
1793static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1794 struct sk_buff *skb)
1795{
1796 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1797
1798 if (!ieee80211_has_protected(hdr->frame_control))
1799 return;
1800
1801 /* Offloaded frames are already decrypted but firmware insists they are
1802 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1803 * will drop the frame.
1804 */
1805
1806 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1807 status->flag |= RX_FLAG_DECRYPTED |
1808 RX_FLAG_IV_STRIPPED |
1809 RX_FLAG_MMIC_STRIPPED;
1810}
1811
1812static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1813 struct sk_buff_head *list)
1814{
1815 struct ath10k_htt *htt = &ar->htt;
1816 struct ieee80211_rx_status *status = &htt->rx_status;
1817 struct htt_rx_offload_msdu *rx;
1818 struct sk_buff *msdu;
1819 size_t offset;
1820
1821 while ((msdu = __skb_dequeue(list))) {
1822 /* Offloaded frames don't have Rx descriptor. Instead they have
1823 * a short meta information header.
1824 */
1825
1826 rx = (void *)msdu->data;
1827
1828 skb_put(msdu, sizeof(*rx));
1829 skb_pull(msdu, sizeof(*rx));
1830
1831 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1832 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1833 dev_kfree_skb_any(msdu);
1834 continue;
1835 }
1836
1837 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1838
1839 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1840 * actual payload is unaligned. Align the frame. Otherwise
1841 * mac80211 complains. This shouldn't reduce performance much
1842 * because these offloaded frames are rare.
1843 */
1844 offset = 4 - ((unsigned long)msdu->data & 3);
1845 skb_put(msdu, offset);
1846 memmove(msdu->data + offset, msdu->data, msdu->len);
1847 skb_pull(msdu, offset);
1848
1849 /* FIXME: The frame is NWifi. Re-construct QoS Control
1850 * if possible later.
1851 */
1852
1853 memset(status, 0, sizeof(*status));
1854 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1855
1856 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
Michal Kazior500ff9f2015-03-31 10:26:21 +00001857 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001858 ath10k_process_rx(ar, status, msdu);
1859 }
1860}
1861
1862static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1863{
1864 struct ath10k_htt *htt = &ar->htt;
1865 struct htt_resp *resp = (void *)skb->data;
1866 struct ieee80211_rx_status *status = &htt->rx_status;
1867 struct sk_buff_head list;
1868 struct sk_buff_head amsdu;
1869 u16 peer_id;
1870 u16 msdu_count;
1871 u8 vdev_id;
1872 u8 tid;
1873 bool offload;
1874 bool frag;
1875 int ret;
1876
1877 lockdep_assert_held(&htt->rx_ring.lock);
1878
1879 if (htt->rx_confused)
1880 return;
1881
1882 skb_pull(skb, sizeof(resp->hdr));
1883 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1884
1885 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1886 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1887 vdev_id = resp->rx_in_ord_ind.vdev_id;
1888 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1889 offload = !!(resp->rx_in_ord_ind.info &
1890 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1891 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1892
1893 ath10k_dbg(ar, ATH10K_DBG_HTT,
1894 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1895 vdev_id, peer_id, tid, offload, frag, msdu_count);
1896
1897 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1898 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1899 return;
1900 }
1901
1902 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1903 * extracted and processed.
1904 */
1905 __skb_queue_head_init(&list);
1906 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1907 if (ret < 0) {
1908 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1909 htt->rx_confused = true;
1910 return;
1911 }
1912
1913 /* Offloaded frames are very different and need to be handled
1914 * separately.
1915 */
1916 if (offload)
1917 ath10k_htt_rx_h_rx_offload(ar, &list);
1918
1919 while (!skb_queue_empty(&list)) {
1920 __skb_queue_head_init(&amsdu);
1921 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1922 switch (ret) {
1923 case 0:
1924 /* Note: The in-order indication may report interleaved
1925 * frames from different PPDUs meaning reported rx rate
1926 * to mac80211 isn't accurate/reliable. It's still
1927 * better to report something than nothing though. This
1928 * should still give an idea about rx rate to the user.
1929 */
Michal Kazior500ff9f2015-03-31 10:26:21 +00001930 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001931 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1932 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1933 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1934 break;
1935 case -EAGAIN:
1936 /* fall through */
1937 default:
1938 /* Should not happen. */
1939 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1940 htt->rx_confused = true;
1941 __skb_queue_purge(&list);
1942 return;
1943 }
1944 }
1945
1946 tasklet_schedule(&htt->rx_replenish_task);
1947}
1948
Kalle Valo5e3dd152013-06-12 20:52:10 +03001949void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1950{
Michal Kazioredb82362013-07-05 16:15:14 +03001951 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001952 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001953 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001954
1955 /* confirm alignment */
1956 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001957 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001958
Michal Kazior7aa7a722014-08-25 12:09:38 +02001959 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001960 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001961
1962 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
1963 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
1964 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
1965 dev_kfree_skb_any(skb);
1966 return;
1967 }
1968 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
1969
1970 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001971 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1972 htt->target_version_major = resp->ver_resp.major;
1973 htt->target_version_minor = resp->ver_resp.minor;
1974 complete(&htt->target_version_received);
1975 break;
1976 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001977 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001978 spin_lock_bh(&htt->rx_ring.lock);
1979 __skb_queue_tail(&htt->rx_compl_q, skb);
1980 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001981 tasklet_schedule(&htt->txrx_compl_task);
1982 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001983 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1984 struct htt_peer_map_event ev = {
1985 .vdev_id = resp->peer_map.vdev_id,
1986 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1987 };
1988 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1989 ath10k_peer_map_event(htt, &ev);
1990 break;
1991 }
1992 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1993 struct htt_peer_unmap_event ev = {
1994 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1995 };
1996 ath10k_peer_unmap_event(htt, &ev);
1997 break;
1998 }
1999 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
2000 struct htt_tx_done tx_done = {};
2001 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
2002
2003 tx_done.msdu_id =
2004 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
2005
2006 switch (status) {
2007 case HTT_MGMT_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03002008 tx_done.success = true;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002009 break;
2010 case HTT_MGMT_TX_STATUS_RETRY:
2011 tx_done.no_ack = true;
2012 break;
2013 case HTT_MGMT_TX_STATUS_DROP:
2014 tx_done.discard = true;
2015 break;
2016 }
2017
Michal Kazior0a89f8a2013-09-18 14:43:20 +02002018 ath10k_txrx_tx_unref(htt, &tx_done);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002019 break;
2020 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002021 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
Qi Zhou005fb162015-07-22 16:38:24 -04002022 skb_queue_tail(&htt->tx_compl_q, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002023 tasklet_schedule(&htt->txrx_compl_task);
2024 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002025 case HTT_T2H_MSG_TYPE_SEC_IND: {
2026 struct ath10k *ar = htt->ar;
2027 struct htt_security_indication *ev = &resp->security_indication;
2028
Michal Kazior7aa7a722014-08-25 12:09:38 +02002029 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03002030 "sec ind peer_id %d unicast %d type %d\n",
2031 __le16_to_cpu(ev->peer_id),
2032 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2033 MS(ev->flags, HTT_SECURITY_TYPE));
2034 complete(&ar->install_key_done);
2035 break;
2036 }
2037 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02002038 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002039 skb->data, skb->len);
2040 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
2041 break;
2042 }
2043 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002044 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002045 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03002046 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03002047 break;
2048 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03002049 /* Firmware can return tx frames if it's unable to fully
2050 * process them and suspects host may be able to fix it. ath10k
2051 * sends all tx frames as already inspected so this shouldn't
2052 * happen unless fw has a bug.
2053 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02002054 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03002055 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002056 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002057 ath10k_htt_rx_addba(ar, resp);
2058 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002059 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002060 ath10k_htt_rx_delba(ar, resp);
2061 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03002062 case HTT_T2H_MSG_TYPE_PKTLOG: {
2063 struct ath10k_pktlog_hdr *hdr =
2064 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2065
2066 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2067 sizeof(*hdr) +
2068 __le16_to_cpu(hdr->size));
2069 break;
2070 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002071 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2072 /* Ignore this event because mac80211 takes care of Rx
2073 * aggregation reordering.
2074 */
2075 break;
2076 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002077 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
2078 spin_lock_bh(&htt->rx_ring.lock);
2079 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
2080 spin_unlock_bh(&htt->rx_ring.lock);
2081 tasklet_schedule(&htt->txrx_compl_task);
2082 return;
2083 }
2084 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002085 break;
2086 case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
Michal Kaziorc5450702015-01-24 12:14:48 +02002087 break;
David Liuccec9032015-07-24 20:25:32 +03002088 case HTT_T2H_MSG_TYPE_AGGR_CONF:
2089 break;
Raja Mani721ad3c2015-06-22 20:22:24 +05302090 case HTT_T2H_MSG_TYPE_EN_STATS:
2091 case HTT_T2H_MSG_TYPE_TX_FETCH_IND:
2092 case HTT_T2H_MSG_TYPE_TX_FETCH_CONF:
2093 case HTT_T2H_MSG_TYPE_TX_LOW_LATENCY_IND:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002094 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002095 ath10k_warn(ar, "htt event (%d) not handled\n",
2096 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002097 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002098 skb->data, skb->len);
2099 break;
2100 };
2101
2102 /* Free the indication buffer */
2103 dev_kfree_skb_any(skb);
2104}
Michal Kazior6c5151a2014-02-27 18:50:04 +02002105
2106static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2107{
2108 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002109 struct ath10k *ar = htt->ar;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002110 struct htt_resp *resp;
2111 struct sk_buff *skb;
2112
Qi Zhou005fb162015-07-22 16:38:24 -04002113 while ((skb = skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002114 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
2115 dev_kfree_skb_any(skb);
2116 }
2117
Michal Kazior45967082014-02-27 18:50:05 +02002118 spin_lock_bh(&htt->rx_ring.lock);
2119 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002120 resp = (struct htt_resp *)skb->data;
2121 ath10k_htt_rx_handler(htt, &resp->rx_ind);
2122 dev_kfree_skb_any(skb);
2123 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002124
2125 while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
2126 ath10k_htt_rx_in_ord_ind(ar, skb);
2127 dev_kfree_skb_any(skb);
2128 }
Michal Kazior45967082014-02-27 18:50:05 +02002129 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002130}