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Kyle Yan679cbee2016-07-27 16:55:20 -07001/*
Kyle Yan59c00012017-01-11 15:00:16 -08002 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
Kyle Yan679cbee2016-07-27 16:55:20 -07003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/module.h>
15#include <linux/of.h>
16#include <linux/platform_device.h>
17#include <linux/pinctrl/pinctrl.h>
18
19#include "pinctrl-msm.h"
20
Kyle Yan59c00012017-01-11 15:00:16 -080021#define FUNCTION(fname) \
22 [msm_mux_##fname] = { \
Kyle Yan679cbee2016-07-27 16:55:20 -070023 .name = #fname, \
Kyle Yan59c00012017-01-11 15:00:16 -080024 .groups = fname##_groups, \
Kyle Yan679cbee2016-07-27 16:55:20 -070025 .ngroups = ARRAY_SIZE(fname##_groups), \
26 }
27
Kyle Yan679cbee2016-07-27 16:55:20 -070028#define REG_SIZE 0x1000
Kyle Yanbc97ed92017-07-12 13:26:50 -070029#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
Kyle Yan59c00012017-01-11 15:00:16 -080030 { \
Kyle Yan679cbee2016-07-27 16:55:20 -070031 .name = "gpio" #id, \
32 .pins = gpio##id##_pins, \
33 .npins = (unsigned int)ARRAY_SIZE(gpio##id##_pins), \
34 .funcs = (int[]){ \
35 msm_mux_gpio, /* gpio mode */ \
36 msm_mux_##f1, \
37 msm_mux_##f2, \
38 msm_mux_##f3, \
39 msm_mux_##f4, \
40 msm_mux_##f5, \
41 msm_mux_##f6, \
42 msm_mux_##f7, \
43 msm_mux_##f8, \
44 msm_mux_##f9 \
Kyle Yan59c00012017-01-11 15:00:16 -080045 }, \
Kyle Yan679cbee2016-07-27 16:55:20 -070046 .nfuncs = 10, \
Kyle Yanbc97ed92017-07-12 13:26:50 -070047 .ctl_reg = REG_SIZE * id, \
48 .io_reg = 0x4 + REG_SIZE * id, \
49 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
50 .intr_status_reg = 0xc + REG_SIZE * id, \
51 .intr_target_reg = 0x8 + REG_SIZE * id, \
Kyle Yan679cbee2016-07-27 16:55:20 -070052 .mux_bit = 2, \
53 .pull_bit = 0, \
54 .drv_bit = 6, \
55 .oe_bit = 9, \
56 .in_bit = 0, \
57 .out_bit = 1, \
58 .intr_enable_bit = 0, \
59 .intr_status_bit = 0, \
60 .intr_target_bit = 5, \
61 .intr_target_kpss_val = 3, \
62 .intr_raw_status_bit = 4, \
63 .intr_polarity_bit = 1, \
64 .intr_detection_bit = 2, \
65 .intr_detection_width = 2, \
66 }
67
68#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \
Kyle Yan59c00012017-01-11 15:00:16 -080069 { \
Kyle Yan679cbee2016-07-27 16:55:20 -070070 .name = #pg_name, \
71 .pins = pg_name##_pins, \
72 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
73 .ctl_reg = ctl, \
74 .io_reg = 0, \
75 .intr_cfg_reg = 0, \
76 .intr_status_reg = 0, \
77 .intr_target_reg = 0, \
78 .mux_bit = -1, \
79 .pull_bit = pull, \
80 .drv_bit = drv, \
81 .oe_bit = -1, \
82 .in_bit = -1, \
83 .out_bit = -1, \
84 .intr_enable_bit = -1, \
85 .intr_status_bit = -1, \
86 .intr_target_bit = -1, \
87 .intr_raw_status_bit = -1, \
88 .intr_polarity_bit = -1, \
89 .intr_detection_bit = -1, \
90 .intr_detection_width = -1, \
91 }
Kyle Yan59c00012017-01-11 15:00:16 -080092
93#define UFS_RESET(pg_name, offset) \
94 { \
95 .name = #pg_name, \
96 .pins = pg_name##_pins, \
97 .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \
98 .ctl_reg = offset, \
99 .io_reg = offset + 0x4, \
100 .intr_cfg_reg = 0, \
101 .intr_status_reg = 0, \
102 .intr_target_reg = 0, \
103 .mux_bit = -1, \
104 .pull_bit = 3, \
105 .drv_bit = 0, \
106 .oe_bit = -1, \
107 .in_bit = -1, \
108 .out_bit = 0, \
109 .intr_enable_bit = -1, \
110 .intr_status_bit = -1, \
111 .intr_target_bit = -1, \
112 .intr_raw_status_bit = -1, \
113 .intr_polarity_bit = -1, \
114 .intr_detection_bit = -1, \
115 .intr_detection_width = -1, \
116 }
Kyle Yanbc97ed92017-07-12 13:26:50 -0700117
Kyle Yan038bc672017-07-27 16:18:09 -0700118static const u32 sdm845_tile_offsets[] = {0x500000, 0x900000, 0x100000};
Kyle Yanbc97ed92017-07-12 13:26:50 -0700119static u32 sdm845_pin_base[150];
120
Kyle Yan6a20fae2017-02-14 13:34:41 -0800121static const struct pinctrl_pin_desc sdm845_pins[] = {
Kyle Yan679cbee2016-07-27 16:55:20 -0700122 PINCTRL_PIN(0, "GPIO_0"),
123 PINCTRL_PIN(1, "GPIO_1"),
124 PINCTRL_PIN(2, "GPIO_2"),
125 PINCTRL_PIN(3, "GPIO_3"),
126 PINCTRL_PIN(4, "GPIO_4"),
127 PINCTRL_PIN(5, "GPIO_5"),
128 PINCTRL_PIN(6, "GPIO_6"),
129 PINCTRL_PIN(7, "GPIO_7"),
130 PINCTRL_PIN(8, "GPIO_8"),
131 PINCTRL_PIN(9, "GPIO_9"),
132 PINCTRL_PIN(10, "GPIO_10"),
133 PINCTRL_PIN(11, "GPIO_11"),
134 PINCTRL_PIN(12, "GPIO_12"),
135 PINCTRL_PIN(13, "GPIO_13"),
136 PINCTRL_PIN(14, "GPIO_14"),
137 PINCTRL_PIN(15, "GPIO_15"),
138 PINCTRL_PIN(16, "GPIO_16"),
139 PINCTRL_PIN(17, "GPIO_17"),
140 PINCTRL_PIN(18, "GPIO_18"),
141 PINCTRL_PIN(19, "GPIO_19"),
142 PINCTRL_PIN(20, "GPIO_20"),
143 PINCTRL_PIN(21, "GPIO_21"),
144 PINCTRL_PIN(22, "GPIO_22"),
145 PINCTRL_PIN(23, "GPIO_23"),
146 PINCTRL_PIN(24, "GPIO_24"),
147 PINCTRL_PIN(25, "GPIO_25"),
148 PINCTRL_PIN(26, "GPIO_26"),
149 PINCTRL_PIN(27, "GPIO_27"),
150 PINCTRL_PIN(28, "GPIO_28"),
151 PINCTRL_PIN(29, "GPIO_29"),
152 PINCTRL_PIN(30, "GPIO_30"),
153 PINCTRL_PIN(31, "GPIO_31"),
154 PINCTRL_PIN(32, "GPIO_32"),
155 PINCTRL_PIN(33, "GPIO_33"),
156 PINCTRL_PIN(34, "GPIO_34"),
157 PINCTRL_PIN(35, "GPIO_35"),
158 PINCTRL_PIN(36, "GPIO_36"),
159 PINCTRL_PIN(37, "GPIO_37"),
160 PINCTRL_PIN(38, "GPIO_38"),
161 PINCTRL_PIN(39, "GPIO_39"),
162 PINCTRL_PIN(40, "GPIO_40"),
163 PINCTRL_PIN(41, "GPIO_41"),
164 PINCTRL_PIN(42, "GPIO_42"),
165 PINCTRL_PIN(43, "GPIO_43"),
166 PINCTRL_PIN(44, "GPIO_44"),
167 PINCTRL_PIN(45, "GPIO_45"),
168 PINCTRL_PIN(46, "GPIO_46"),
169 PINCTRL_PIN(47, "GPIO_47"),
170 PINCTRL_PIN(48, "GPIO_48"),
171 PINCTRL_PIN(49, "GPIO_49"),
172 PINCTRL_PIN(50, "GPIO_50"),
173 PINCTRL_PIN(51, "GPIO_51"),
174 PINCTRL_PIN(52, "GPIO_52"),
175 PINCTRL_PIN(53, "GPIO_53"),
176 PINCTRL_PIN(54, "GPIO_54"),
177 PINCTRL_PIN(55, "GPIO_55"),
178 PINCTRL_PIN(56, "GPIO_56"),
179 PINCTRL_PIN(57, "GPIO_57"),
180 PINCTRL_PIN(58, "GPIO_58"),
181 PINCTRL_PIN(59, "GPIO_59"),
182 PINCTRL_PIN(60, "GPIO_60"),
183 PINCTRL_PIN(61, "GPIO_61"),
184 PINCTRL_PIN(62, "GPIO_62"),
185 PINCTRL_PIN(63, "GPIO_63"),
186 PINCTRL_PIN(64, "GPIO_64"),
187 PINCTRL_PIN(65, "GPIO_65"),
188 PINCTRL_PIN(66, "GPIO_66"),
189 PINCTRL_PIN(67, "GPIO_67"),
190 PINCTRL_PIN(68, "GPIO_68"),
191 PINCTRL_PIN(69, "GPIO_69"),
192 PINCTRL_PIN(70, "GPIO_70"),
193 PINCTRL_PIN(71, "GPIO_71"),
194 PINCTRL_PIN(72, "GPIO_72"),
195 PINCTRL_PIN(73, "GPIO_73"),
196 PINCTRL_PIN(74, "GPIO_74"),
197 PINCTRL_PIN(75, "GPIO_75"),
198 PINCTRL_PIN(76, "GPIO_76"),
199 PINCTRL_PIN(77, "GPIO_77"),
200 PINCTRL_PIN(78, "GPIO_78"),
201 PINCTRL_PIN(79, "GPIO_79"),
202 PINCTRL_PIN(80, "GPIO_80"),
203 PINCTRL_PIN(81, "GPIO_81"),
204 PINCTRL_PIN(82, "GPIO_82"),
205 PINCTRL_PIN(83, "GPIO_83"),
206 PINCTRL_PIN(84, "GPIO_84"),
207 PINCTRL_PIN(85, "GPIO_85"),
208 PINCTRL_PIN(86, "GPIO_86"),
209 PINCTRL_PIN(87, "GPIO_87"),
210 PINCTRL_PIN(88, "GPIO_88"),
211 PINCTRL_PIN(89, "GPIO_89"),
212 PINCTRL_PIN(90, "GPIO_90"),
213 PINCTRL_PIN(91, "GPIO_91"),
214 PINCTRL_PIN(92, "GPIO_92"),
215 PINCTRL_PIN(93, "GPIO_93"),
216 PINCTRL_PIN(94, "GPIO_94"),
217 PINCTRL_PIN(95, "GPIO_95"),
218 PINCTRL_PIN(96, "GPIO_96"),
219 PINCTRL_PIN(97, "GPIO_97"),
220 PINCTRL_PIN(98, "GPIO_98"),
221 PINCTRL_PIN(99, "GPIO_99"),
222 PINCTRL_PIN(100, "GPIO_100"),
223 PINCTRL_PIN(101, "GPIO_101"),
224 PINCTRL_PIN(102, "GPIO_102"),
225 PINCTRL_PIN(103, "GPIO_103"),
226 PINCTRL_PIN(104, "GPIO_104"),
227 PINCTRL_PIN(105, "GPIO_105"),
228 PINCTRL_PIN(106, "GPIO_106"),
229 PINCTRL_PIN(107, "GPIO_107"),
230 PINCTRL_PIN(108, "GPIO_108"),
231 PINCTRL_PIN(109, "GPIO_109"),
232 PINCTRL_PIN(110, "GPIO_110"),
233 PINCTRL_PIN(111, "GPIO_111"),
234 PINCTRL_PIN(112, "GPIO_112"),
235 PINCTRL_PIN(113, "GPIO_113"),
236 PINCTRL_PIN(114, "GPIO_114"),
237 PINCTRL_PIN(115, "GPIO_115"),
238 PINCTRL_PIN(116, "GPIO_116"),
239 PINCTRL_PIN(117, "GPIO_117"),
240 PINCTRL_PIN(118, "GPIO_118"),
241 PINCTRL_PIN(119, "GPIO_119"),
242 PINCTRL_PIN(120, "GPIO_120"),
243 PINCTRL_PIN(121, "GPIO_121"),
244 PINCTRL_PIN(122, "GPIO_122"),
245 PINCTRL_PIN(123, "GPIO_123"),
246 PINCTRL_PIN(124, "GPIO_124"),
247 PINCTRL_PIN(125, "GPIO_125"),
248 PINCTRL_PIN(126, "GPIO_126"),
249 PINCTRL_PIN(127, "GPIO_127"),
250 PINCTRL_PIN(128, "GPIO_128"),
251 PINCTRL_PIN(129, "GPIO_129"),
252 PINCTRL_PIN(130, "GPIO_130"),
253 PINCTRL_PIN(131, "GPIO_131"),
254 PINCTRL_PIN(132, "GPIO_132"),
255 PINCTRL_PIN(133, "GPIO_133"),
256 PINCTRL_PIN(134, "GPIO_134"),
257 PINCTRL_PIN(135, "GPIO_135"),
258 PINCTRL_PIN(136, "GPIO_136"),
259 PINCTRL_PIN(137, "GPIO_137"),
260 PINCTRL_PIN(138, "GPIO_138"),
261 PINCTRL_PIN(139, "GPIO_139"),
262 PINCTRL_PIN(140, "GPIO_140"),
263 PINCTRL_PIN(141, "GPIO_141"),
264 PINCTRL_PIN(142, "GPIO_142"),
265 PINCTRL_PIN(143, "GPIO_143"),
266 PINCTRL_PIN(144, "GPIO_144"),
267 PINCTRL_PIN(145, "GPIO_145"),
268 PINCTRL_PIN(146, "GPIO_146"),
269 PINCTRL_PIN(147, "GPIO_147"),
270 PINCTRL_PIN(148, "GPIO_148"),
271 PINCTRL_PIN(149, "GPIO_149"),
272 PINCTRL_PIN(150, "SDC2_CLK"),
273 PINCTRL_PIN(151, "SDC2_CMD"),
274 PINCTRL_PIN(152, "SDC2_DATA"),
Kyle Yan77b80522017-03-28 11:08:49 -0700275 PINCTRL_PIN(153, "UFS_RESET"),
Kyle Yan679cbee2016-07-27 16:55:20 -0700276};
277
278#define DECLARE_MSM_GPIO_PINS(pin) \
279 static const unsigned int gpio##pin##_pins[] = { pin }
280DECLARE_MSM_GPIO_PINS(0);
281DECLARE_MSM_GPIO_PINS(1);
282DECLARE_MSM_GPIO_PINS(2);
283DECLARE_MSM_GPIO_PINS(3);
284DECLARE_MSM_GPIO_PINS(4);
285DECLARE_MSM_GPIO_PINS(5);
286DECLARE_MSM_GPIO_PINS(6);
287DECLARE_MSM_GPIO_PINS(7);
288DECLARE_MSM_GPIO_PINS(8);
289DECLARE_MSM_GPIO_PINS(9);
290DECLARE_MSM_GPIO_PINS(10);
291DECLARE_MSM_GPIO_PINS(11);
292DECLARE_MSM_GPIO_PINS(12);
293DECLARE_MSM_GPIO_PINS(13);
294DECLARE_MSM_GPIO_PINS(14);
295DECLARE_MSM_GPIO_PINS(15);
296DECLARE_MSM_GPIO_PINS(16);
297DECLARE_MSM_GPIO_PINS(17);
298DECLARE_MSM_GPIO_PINS(18);
299DECLARE_MSM_GPIO_PINS(19);
300DECLARE_MSM_GPIO_PINS(20);
301DECLARE_MSM_GPIO_PINS(21);
302DECLARE_MSM_GPIO_PINS(22);
303DECLARE_MSM_GPIO_PINS(23);
304DECLARE_MSM_GPIO_PINS(24);
305DECLARE_MSM_GPIO_PINS(25);
306DECLARE_MSM_GPIO_PINS(26);
307DECLARE_MSM_GPIO_PINS(27);
308DECLARE_MSM_GPIO_PINS(28);
309DECLARE_MSM_GPIO_PINS(29);
310DECLARE_MSM_GPIO_PINS(30);
311DECLARE_MSM_GPIO_PINS(31);
312DECLARE_MSM_GPIO_PINS(32);
313DECLARE_MSM_GPIO_PINS(33);
314DECLARE_MSM_GPIO_PINS(34);
315DECLARE_MSM_GPIO_PINS(35);
316DECLARE_MSM_GPIO_PINS(36);
317DECLARE_MSM_GPIO_PINS(37);
318DECLARE_MSM_GPIO_PINS(38);
319DECLARE_MSM_GPIO_PINS(39);
320DECLARE_MSM_GPIO_PINS(40);
321DECLARE_MSM_GPIO_PINS(41);
322DECLARE_MSM_GPIO_PINS(42);
323DECLARE_MSM_GPIO_PINS(43);
324DECLARE_MSM_GPIO_PINS(44);
325DECLARE_MSM_GPIO_PINS(45);
326DECLARE_MSM_GPIO_PINS(46);
327DECLARE_MSM_GPIO_PINS(47);
328DECLARE_MSM_GPIO_PINS(48);
329DECLARE_MSM_GPIO_PINS(49);
330DECLARE_MSM_GPIO_PINS(50);
331DECLARE_MSM_GPIO_PINS(51);
332DECLARE_MSM_GPIO_PINS(52);
333DECLARE_MSM_GPIO_PINS(53);
334DECLARE_MSM_GPIO_PINS(54);
335DECLARE_MSM_GPIO_PINS(55);
336DECLARE_MSM_GPIO_PINS(56);
337DECLARE_MSM_GPIO_PINS(57);
338DECLARE_MSM_GPIO_PINS(58);
339DECLARE_MSM_GPIO_PINS(59);
340DECLARE_MSM_GPIO_PINS(60);
341DECLARE_MSM_GPIO_PINS(61);
342DECLARE_MSM_GPIO_PINS(62);
343DECLARE_MSM_GPIO_PINS(63);
344DECLARE_MSM_GPIO_PINS(64);
345DECLARE_MSM_GPIO_PINS(65);
346DECLARE_MSM_GPIO_PINS(66);
347DECLARE_MSM_GPIO_PINS(67);
348DECLARE_MSM_GPIO_PINS(68);
349DECLARE_MSM_GPIO_PINS(69);
350DECLARE_MSM_GPIO_PINS(70);
351DECLARE_MSM_GPIO_PINS(71);
352DECLARE_MSM_GPIO_PINS(72);
353DECLARE_MSM_GPIO_PINS(73);
354DECLARE_MSM_GPIO_PINS(74);
355DECLARE_MSM_GPIO_PINS(75);
356DECLARE_MSM_GPIO_PINS(76);
357DECLARE_MSM_GPIO_PINS(77);
358DECLARE_MSM_GPIO_PINS(78);
359DECLARE_MSM_GPIO_PINS(79);
360DECLARE_MSM_GPIO_PINS(80);
361DECLARE_MSM_GPIO_PINS(81);
362DECLARE_MSM_GPIO_PINS(82);
363DECLARE_MSM_GPIO_PINS(83);
364DECLARE_MSM_GPIO_PINS(84);
365DECLARE_MSM_GPIO_PINS(85);
366DECLARE_MSM_GPIO_PINS(86);
367DECLARE_MSM_GPIO_PINS(87);
368DECLARE_MSM_GPIO_PINS(88);
369DECLARE_MSM_GPIO_PINS(89);
370DECLARE_MSM_GPIO_PINS(90);
371DECLARE_MSM_GPIO_PINS(91);
372DECLARE_MSM_GPIO_PINS(92);
373DECLARE_MSM_GPIO_PINS(93);
374DECLARE_MSM_GPIO_PINS(94);
375DECLARE_MSM_GPIO_PINS(95);
376DECLARE_MSM_GPIO_PINS(96);
377DECLARE_MSM_GPIO_PINS(97);
378DECLARE_MSM_GPIO_PINS(98);
379DECLARE_MSM_GPIO_PINS(99);
380DECLARE_MSM_GPIO_PINS(100);
381DECLARE_MSM_GPIO_PINS(101);
382DECLARE_MSM_GPIO_PINS(102);
383DECLARE_MSM_GPIO_PINS(103);
384DECLARE_MSM_GPIO_PINS(104);
385DECLARE_MSM_GPIO_PINS(105);
386DECLARE_MSM_GPIO_PINS(106);
387DECLARE_MSM_GPIO_PINS(107);
388DECLARE_MSM_GPIO_PINS(108);
389DECLARE_MSM_GPIO_PINS(109);
390DECLARE_MSM_GPIO_PINS(110);
391DECLARE_MSM_GPIO_PINS(111);
392DECLARE_MSM_GPIO_PINS(112);
393DECLARE_MSM_GPIO_PINS(113);
394DECLARE_MSM_GPIO_PINS(114);
395DECLARE_MSM_GPIO_PINS(115);
396DECLARE_MSM_GPIO_PINS(116);
397DECLARE_MSM_GPIO_PINS(117);
398DECLARE_MSM_GPIO_PINS(118);
399DECLARE_MSM_GPIO_PINS(119);
400DECLARE_MSM_GPIO_PINS(120);
401DECLARE_MSM_GPIO_PINS(121);
402DECLARE_MSM_GPIO_PINS(122);
403DECLARE_MSM_GPIO_PINS(123);
404DECLARE_MSM_GPIO_PINS(124);
405DECLARE_MSM_GPIO_PINS(125);
406DECLARE_MSM_GPIO_PINS(126);
407DECLARE_MSM_GPIO_PINS(127);
408DECLARE_MSM_GPIO_PINS(128);
409DECLARE_MSM_GPIO_PINS(129);
410DECLARE_MSM_GPIO_PINS(130);
411DECLARE_MSM_GPIO_PINS(131);
412DECLARE_MSM_GPIO_PINS(132);
413DECLARE_MSM_GPIO_PINS(133);
414DECLARE_MSM_GPIO_PINS(134);
415DECLARE_MSM_GPIO_PINS(135);
416DECLARE_MSM_GPIO_PINS(136);
417DECLARE_MSM_GPIO_PINS(137);
418DECLARE_MSM_GPIO_PINS(138);
419DECLARE_MSM_GPIO_PINS(139);
420DECLARE_MSM_GPIO_PINS(140);
421DECLARE_MSM_GPIO_PINS(141);
422DECLARE_MSM_GPIO_PINS(142);
423DECLARE_MSM_GPIO_PINS(143);
424DECLARE_MSM_GPIO_PINS(144);
425DECLARE_MSM_GPIO_PINS(145);
426DECLARE_MSM_GPIO_PINS(146);
427DECLARE_MSM_GPIO_PINS(147);
428DECLARE_MSM_GPIO_PINS(148);
429DECLARE_MSM_GPIO_PINS(149);
430
431static const unsigned int sdc2_clk_pins[] = { 150 };
432static const unsigned int sdc2_cmd_pins[] = { 151 };
433static const unsigned int sdc2_data_pins[] = { 152 };
Kyle Yan77b80522017-03-28 11:08:49 -0700434static const unsigned int ufs_reset_pins[] = { 153 };
Kyle Yan679cbee2016-07-27 16:55:20 -0700435
Kyle Yan6a20fae2017-02-14 13:34:41 -0800436enum sdm845_functions {
Kyle Yan679cbee2016-07-27 16:55:20 -0700437 msm_mux_ddr_pxi3,
Kyle Yan679cbee2016-07-27 16:55:20 -0700438 msm_mux_cam_mclk,
439 msm_mux_pll_bypassnl,
440 msm_mux_qdss_gpio0,
Kyle Yan679cbee2016-07-27 16:55:20 -0700441 msm_mux_pll_reset,
442 msm_mux_qdss_gpio1,
Kyle Yan679cbee2016-07-27 16:55:20 -0700443 msm_mux_qdss_gpio2,
Kyle Yan679cbee2016-07-27 16:55:20 -0700444 msm_mux_qdss_gpio3,
Kyle Yan679cbee2016-07-27 16:55:20 -0700445 msm_mux_cci_i2c,
446 msm_mux_qup1,
447 msm_mux_qdss_gpio4,
Kyle Yan679cbee2016-07-27 16:55:20 -0700448 msm_mux_qdss_gpio5,
Kyle Yan679cbee2016-07-27 16:55:20 -0700449 msm_mux_qdss_gpio6,
Kyle Yan679cbee2016-07-27 16:55:20 -0700450 msm_mux_qdss_gpio7,
Kyle Yan679cbee2016-07-27 16:55:20 -0700451 msm_mux_cci_timer0,
452 msm_mux_gcc_gp2,
453 msm_mux_qdss_gpio8,
Kyle Yan679cbee2016-07-27 16:55:20 -0700454 msm_mux_cci_timer1,
455 msm_mux_gcc_gp3,
456 msm_mux_qdss_gpio,
Kyle Yan679cbee2016-07-27 16:55:20 -0700457 msm_mux_cci_timer2,
458 msm_mux_qdss_gpio9,
Kyle Yan679cbee2016-07-27 16:55:20 -0700459 msm_mux_cci_timer3,
460 msm_mux_cci_async,
461 msm_mux_qdss_gpio10,
Kyle Yan679cbee2016-07-27 16:55:20 -0700462 msm_mux_cci_timer4,
463 msm_mux_qdss_gpio11,
Kyle Yan679cbee2016-07-27 16:55:20 -0700464 msm_mux_qdss_gpio12,
Kyle Yan679cbee2016-07-27 16:55:20 -0700465 msm_mux_qup2,
466 msm_mux_qdss_gpio13,
Kyle Yan679cbee2016-07-27 16:55:20 -0700467 msm_mux_qdss_gpio14,
Kyle Yan679cbee2016-07-27 16:55:20 -0700468 msm_mux_phase_flag1,
469 msm_mux_qdss_gpio15,
Kyle Yan679cbee2016-07-27 16:55:20 -0700470 msm_mux_phase_flag2,
Kyle Yan679cbee2016-07-27 16:55:20 -0700471 msm_mux_qup11,
472 msm_mux_qup14,
Kyle Yan679cbee2016-07-27 16:55:20 -0700473 msm_mux_pci_e0,
474 msm_mux_jitter_bist,
Kyle Yan679cbee2016-07-27 16:55:20 -0700475 msm_mux_pll_bist,
476 msm_mux_atest_tsens,
Kyle Yan679cbee2016-07-27 16:55:20 -0700477 msm_mux_agera_pll,
Kyle Yan679cbee2016-07-27 16:55:20 -0700478 msm_mux_usb_phy,
Kyle Yan679cbee2016-07-27 16:55:20 -0700479 msm_mux_lpass_slimbus,
Kyle Yan679cbee2016-07-27 16:55:20 -0700480 msm_mux_sd_write,
481 msm_mux_tsif1_error,
Kyle Yan679cbee2016-07-27 16:55:20 -0700482 msm_mux_qup3,
Kyle Yan679cbee2016-07-27 16:55:20 -0700483 msm_mux_qup6,
Kyle Yan679cbee2016-07-27 16:55:20 -0700484 msm_mux_qup12,
Kyle Yan679cbee2016-07-27 16:55:20 -0700485 msm_mux_phase_flag16,
Kyle Yan679cbee2016-07-27 16:55:20 -0700486 msm_mux_qup10,
487 msm_mux_phase_flag11,
Kyle Yan679cbee2016-07-27 16:55:20 -0700488 msm_mux_phase_flag12,
Kyle Yan679cbee2016-07-27 16:55:20 -0700489 msm_mux_phase_flag13,
Kyle Yan679cbee2016-07-27 16:55:20 -0700490 msm_mux_phase_flag17,
Kyle Yan679cbee2016-07-27 16:55:20 -0700491 msm_mux_qua_mi2s,
492 msm_mux_gcc_gp1,
493 msm_mux_phase_flag18,
Kyle Yan679cbee2016-07-27 16:55:20 -0700494 msm_mux_phase_flag19,
Kyle Yan679cbee2016-07-27 16:55:20 -0700495 msm_mux_phase_flag20,
Kyle Yan679cbee2016-07-27 16:55:20 -0700496 msm_mux_cri_trng0,
497 msm_mux_phase_flag21,
Kyle Yan679cbee2016-07-27 16:55:20 -0700498 msm_mux_cri_trng1,
499 msm_mux_phase_flag22,
Kyle Yan679cbee2016-07-27 16:55:20 -0700500 msm_mux_cri_trng,
501 msm_mux_phase_flag23,
Kyle Yan679cbee2016-07-27 16:55:20 -0700502 msm_mux_phase_flag24,
Kyle Yan679cbee2016-07-27 16:55:20 -0700503 msm_mux_pri_mi2s,
504 msm_mux_sp_cmu,
505 msm_mux_phase_flag25,
Kyle Yan679cbee2016-07-27 16:55:20 -0700506 msm_mux_qup8,
Kyle Yan679cbee2016-07-27 16:55:20 -0700507 msm_mux_pri_mi2s_ws,
Kyle Yan679cbee2016-07-27 16:55:20 -0700508 msm_mux_spkr_i2s,
509 msm_mux_audio_ref,
Kyle Yan679cbee2016-07-27 16:55:20 -0700510 msm_mux_tsense_pwm1,
511 msm_mux_tsense_pwm2,
Kyle Yan679cbee2016-07-27 16:55:20 -0700512 msm_mux_btfm_slimbus,
513 msm_mux_atest_usb2,
Kyle Yan679cbee2016-07-27 16:55:20 -0700514 msm_mux_ter_mi2s,
515 msm_mux_phase_flag7,
516 msm_mux_atest_usb23,
Kyle Yan679cbee2016-07-27 16:55:20 -0700517 msm_mux_phase_flag8,
518 msm_mux_atest_usb22,
Kyle Yan679cbee2016-07-27 16:55:20 -0700519 msm_mux_phase_flag9,
520 msm_mux_atest_usb21,
Kyle Yan679cbee2016-07-27 16:55:20 -0700521 msm_mux_phase_flag4,
522 msm_mux_atest_usb20,
Kyle Yan679cbee2016-07-27 16:55:20 -0700523 msm_mux_sec_mi2s,
Kyle Yan679cbee2016-07-27 16:55:20 -0700524 msm_mux_qup15,
Kyle Yan49a7e842017-04-04 11:18:19 -0700525 msm_mux_qup5,
Kyle Yan679cbee2016-07-27 16:55:20 -0700526 msm_mux_tsif1_clk,
527 msm_mux_qup4,
528 msm_mux_tgu_ch3,
529 msm_mux_phase_flag10,
Kyle Yan679cbee2016-07-27 16:55:20 -0700530 msm_mux_tsif1_en,
531 msm_mux_mdp_vsync0,
532 msm_mux_mdp_vsync1,
533 msm_mux_mdp_vsync2,
534 msm_mux_mdp_vsync3,
535 msm_mux_tgu_ch0,
536 msm_mux_phase_flag0,
Kyle Yan679cbee2016-07-27 16:55:20 -0700537 msm_mux_tsif1_data,
538 msm_mux_sdc4_cmd,
539 msm_mux_tgu_ch1,
Kyle Yan679cbee2016-07-27 16:55:20 -0700540 msm_mux_tsif2_error,
541 msm_mux_sdc43,
542 msm_mux_vfr_1,
543 msm_mux_tgu_ch2,
Kyle Yan679cbee2016-07-27 16:55:20 -0700544 msm_mux_tsif2_clk,
545 msm_mux_sdc4_clk,
546 msm_mux_qup7,
Kyle Yan679cbee2016-07-27 16:55:20 -0700547 msm_mux_tsif2_en,
548 msm_mux_sdc42,
Kyle Yan679cbee2016-07-27 16:55:20 -0700549 msm_mux_tsif2_data,
550 msm_mux_sdc41,
Kyle Yan679cbee2016-07-27 16:55:20 -0700551 msm_mux_tsif2_sync,
552 msm_mux_sdc40,
Kyle Yane687a862017-04-26 19:04:57 -0700553 msm_mux_phase_flag3,
Kyle Yan038bc672017-07-27 16:18:09 -0700554 msm_mux_ldo_en,
555 msm_mux_ldo_update,
556 msm_mux_phase_flag14,
557 msm_mux_phase_flag15,
558 msm_mux_pci_e1,
559 msm_mux_prng_rosc,
560 msm_mux_phase_flag5,
561 msm_mux_uim2_data,
562 msm_mux_qup13,
563 msm_mux_uim2_clk,
564 msm_mux_uim2_reset,
565 msm_mux_uim2_present,
566 msm_mux_uim1_data,
567 msm_mux_uim1_clk,
568 msm_mux_uim1_reset,
569 msm_mux_uim1_present,
570 msm_mux_uim_batt,
571 msm_mux_edp_hot,
572 msm_mux_nav_pps,
573 msm_mux_atest_char,
574 msm_mux_adsp_ext,
575 msm_mux_atest_char3,
576 msm_mux_atest_char2,
577 msm_mux_atest_char1,
578 msm_mux_atest_char0,
579 msm_mux_qlink_request,
580 msm_mux_qlink_enable,
581 msm_mux_pa_indicator,
582 msm_mux_phase_flag26,
583 msm_mux_phase_flag27,
584 msm_mux_phase_flag28,
585 msm_mux_phase_flag6,
586 msm_mux_phase_flag29,
587 msm_mux_phase_flag30,
588 msm_mux_phase_flag31,
589 msm_mux_mss_lte,
590 msm_mux_qup0,
591 msm_mux_gpio,
592 msm_mux_qup9,
593 msm_mux_qdss_cti,
594 msm_mux_ddr_pxi0,
595 msm_mux_ddr_bist,
596 msm_mux_atest_tsens2,
597 msm_mux_vsense_trigger,
598 msm_mux_atest_usb1,
599 msm_mux_qup_l4,
600 msm_mux_wlan1_adc1,
601 msm_mux_atest_usb13,
602 msm_mux_ddr_pxi1,
603 msm_mux_qup_l5,
604 msm_mux_wlan1_adc0,
605 msm_mux_atest_usb12,
606 msm_mux_mdp_vsync,
607 msm_mux_qup_l6,
608 msm_mux_wlan2_adc1,
609 msm_mux_atest_usb11,
610 msm_mux_ddr_pxi2,
611 msm_mux_edp_lcd,
612 msm_mux_dbg_out,
613 msm_mux_wlan2_adc0,
614 msm_mux_atest_usb10,
615 msm_mux_m_voc,
616 msm_mux_tsif1_sync,
Kyle Yan679cbee2016-07-27 16:55:20 -0700617 msm_mux_NA,
618};
619
Kyle Yan038bc672017-07-27 16:18:09 -0700620static const char * const ddr_pxi3_groups[] = {
621 "gpio12", "gpio13",
622};
623static const char * const cam_mclk_groups[] = {
624 "gpio13", "gpio14", "gpio15", "gpio16",
625};
626static const char * const pll_bypassnl_groups[] = {
627 "gpio13",
628};
629static const char * const qdss_gpio0_groups[] = {
630 "gpio13", "gpio117",
631};
632static const char * const pll_reset_groups[] = {
633 "gpio14",
634};
635static const char * const qdss_gpio1_groups[] = {
636 "gpio14", "gpio118",
637};
638static const char * const qdss_gpio2_groups[] = {
639 "gpio15", "gpio119",
640};
641static const char * const qdss_gpio3_groups[] = {
642 "gpio16", "gpio120",
643};
644static const char * const cci_i2c_groups[] = {
645 "gpio17", "gpio18", "gpio19", "gpio20",
646};
647static const char * const qup1_groups[] = {
648 "gpio17", "gpio18", "gpio19", "gpio20",
649};
650static const char * const qdss_gpio4_groups[] = {
651 "gpio17", "gpio121",
652};
653static const char * const qdss_gpio5_groups[] = {
654 "gpio18", "gpio122",
655};
656static const char * const qdss_gpio6_groups[] = {
657 "gpio19", "gpio41",
658};
659static const char * const qdss_gpio7_groups[] = {
660 "gpio20", "gpio42",
661};
662static const char * const cci_timer0_groups[] = {
663 "gpio21",
664};
665static const char * const gcc_gp2_groups[] = {
666 "gpio21", "gpio58",
667};
668static const char * const qdss_gpio8_groups[] = {
669 "gpio21", "gpio75",
670};
671static const char * const cci_timer1_groups[] = {
672 "gpio22",
673};
674static const char * const gcc_gp3_groups[] = {
675 "gpio22", "gpio59",
676};
677static const char * const qdss_gpio_groups[] = {
678 "gpio22", "gpio30", "gpio123", "gpio124",
679};
680static const char * const cci_timer2_groups[] = {
681 "gpio23",
682};
683static const char * const qdss_gpio9_groups[] = {
684 "gpio23", "gpio76",
685};
686static const char * const cci_timer3_groups[] = {
687 "gpio24",
688};
689static const char * const cci_async_groups[] = {
690 "gpio24", "gpio25", "gpio26",
691};
692static const char * const qdss_gpio10_groups[] = {
693 "gpio24", "gpio77",
694};
695static const char * const cci_timer4_groups[] = {
696 "gpio25",
697};
698static const char * const qdss_gpio11_groups[] = {
699 "gpio25", "gpio79",
700};
701static const char * const qdss_gpio12_groups[] = {
702 "gpio26", "gpio80",
703};
704static const char * const qup2_groups[] = {
705 "gpio27", "gpio28", "gpio29", "gpio30",
706};
707static const char * const qdss_gpio13_groups[] = {
708 "gpio27", "gpio93",
709};
710static const char * const qdss_gpio14_groups[] = {
711 "gpio28", "gpio43",
712};
713static const char * const phase_flag1_groups[] = {
714 "gpio29",
715};
716static const char * const qdss_gpio15_groups[] = {
717 "gpio29", "gpio44",
718};
719static const char * const phase_flag2_groups[] = {
720 "gpio30",
721};
722static const char * const qup11_groups[] = {
723 "gpio31", "gpio32", "gpio33", "gpio34",
724};
725static const char * const qup14_groups[] = {
726 "gpio31", "gpio32", "gpio33", "gpio34",
727};
728static const char * const pci_e0_groups[] = {
729 "gpio35", "gpio36",
730};
731static const char * const jitter_bist_groups[] = {
732 "gpio35",
733};
734static const char * const pll_bist_groups[] = {
735 "gpio36",
736};
737static const char * const atest_tsens_groups[] = {
738 "gpio36",
739};
740static const char * const agera_pll_groups[] = {
741 "gpio37",
742};
743static const char * const usb_phy_groups[] = {
744 "gpio38",
745};
746static const char * const lpass_slimbus_groups[] = {
747 "gpio39", "gpio70", "gpio71", "gpio72",
748};
749static const char * const sd_write_groups[] = {
750 "gpio40",
751};
752static const char * const tsif1_error_groups[] = {
753 "gpio40",
754};
755static const char * const qup3_groups[] = {
756 "gpio41", "gpio42", "gpio43", "gpio44",
757};
758static const char * const qup6_groups[] = {
759 "gpio45", "gpio46", "gpio47", "gpio48",
760};
761static const char * const qup12_groups[] = {
762 "gpio49", "gpio50", "gpio51", "gpio52",
763};
764static const char * const phase_flag16_groups[] = {
765 "gpio52",
766};
767static const char * const qup10_groups[] = {
768 "gpio53", "gpio54", "gpio55", "gpio56",
769};
770static const char * const phase_flag11_groups[] = {
771 "gpio53",
772};
773static const char * const phase_flag12_groups[] = {
774 "gpio54",
775};
776static const char * const phase_flag13_groups[] = {
777 "gpio55",
778};
779static const char * const phase_flag17_groups[] = {
780 "gpio56",
781};
782static const char * const qua_mi2s_groups[] = {
783 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
784};
785static const char * const gcc_gp1_groups[] = {
786 "gpio57", "gpio78",
787};
788static const char * const phase_flag18_groups[] = {
789 "gpio57",
790};
791static const char * const phase_flag19_groups[] = {
792 "gpio58",
793};
794static const char * const phase_flag20_groups[] = {
795 "gpio59",
796};
797static const char * const cri_trng0_groups[] = {
798 "gpio60",
799};
800static const char * const phase_flag21_groups[] = {
801 "gpio60",
802};
803static const char * const cri_trng1_groups[] = {
804 "gpio61",
805};
806static const char * const phase_flag22_groups[] = {
807 "gpio61",
808};
809static const char * const cri_trng_groups[] = {
810 "gpio62",
811};
812static const char * const phase_flag23_groups[] = {
813 "gpio62",
814};
815static const char * const phase_flag24_groups[] = {
816 "gpio63",
817};
818static const char * const pri_mi2s_groups[] = {
819 "gpio64", "gpio65", "gpio67", "gpio68",
820};
821static const char * const sp_cmu_groups[] = {
822 "gpio64",
823};
824static const char * const phase_flag25_groups[] = {
825 "gpio64",
826};
827static const char * const qup8_groups[] = {
828 "gpio65", "gpio66", "gpio67", "gpio68",
829};
830static const char * const pri_mi2s_ws_groups[] = {
831 "gpio66",
832};
833static const char * const spkr_i2s_groups[] = {
834 "gpio69", "gpio70", "gpio71", "gpio72",
835};
836static const char * const audio_ref_groups[] = {
837 "gpio69",
838};
839static const char * const tsense_pwm1_groups[] = {
840 "gpio71",
841};
842static const char * const tsense_pwm2_groups[] = {
843 "gpio71",
844};
845static const char * const btfm_slimbus_groups[] = {
846 "gpio73", "gpio74",
847};
848static const char * const atest_usb2_groups[] = {
849 "gpio73",
850};
851static const char * const ter_mi2s_groups[] = {
852 "gpio74", "gpio75", "gpio76", "gpio77", "gpio78",
853};
854static const char * const phase_flag7_groups[] = {
855 "gpio74",
856};
857static const char * const atest_usb23_groups[] = {
858 "gpio74",
859};
860static const char * const phase_flag8_groups[] = {
861 "gpio75",
862};
863static const char * const atest_usb22_groups[] = {
864 "gpio75",
865};
866static const char * const phase_flag9_groups[] = {
867 "gpio76",
868};
869static const char * const atest_usb21_groups[] = {
870 "gpio76",
871};
872static const char * const phase_flag4_groups[] = {
873 "gpio77",
874};
875static const char * const atest_usb20_groups[] = {
876 "gpio77",
877};
878static const char * const sec_mi2s_groups[] = {
879 "gpio79", "gpio80", "gpio81", "gpio82", "gpio83",
880};
881static const char * const qup15_groups[] = {
882 "gpio81", "gpio82", "gpio83", "gpio84",
883};
884static const char * const qup5_groups[] = {
885 "gpio85", "gpio86", "gpio87", "gpio88",
886};
887static const char * const tsif1_clk_groups[] = {
888 "gpio89",
889};
890static const char * const qup4_groups[] = {
891 "gpio89", "gpio90", "gpio91", "gpio92",
892};
893static const char * const tgu_ch3_groups[] = {
894 "gpio89",
895};
896static const char * const phase_flag10_groups[] = {
897 "gpio89",
898};
899static const char * const tsif1_en_groups[] = {
900 "gpio90",
901};
902static const char * const mdp_vsync0_groups[] = {
903 "gpio90",
904};
905static const char * const mdp_vsync1_groups[] = {
906 "gpio90",
907};
908static const char * const mdp_vsync2_groups[] = {
909 "gpio90",
910};
911static const char * const mdp_vsync3_groups[] = {
912 "gpio90",
913};
914static const char * const tgu_ch0_groups[] = {
915 "gpio90",
916};
917static const char * const phase_flag0_groups[] = {
918 "gpio90",
919};
920static const char * const tsif1_data_groups[] = {
921 "gpio91",
922};
923static const char * const sdc4_cmd_groups[] = {
924 "gpio91",
925};
926static const char * const tgu_ch1_groups[] = {
927 "gpio91",
928};
929static const char * const tsif2_error_groups[] = {
930 "gpio92",
931};
932static const char * const sdc43_groups[] = {
933 "gpio92",
934};
935static const char * const vfr_1_groups[] = {
936 "gpio92",
937};
938static const char * const tgu_ch2_groups[] = {
939 "gpio92",
940};
941static const char * const tsif2_clk_groups[] = {
942 "gpio93",
943};
944static const char * const sdc4_clk_groups[] = {
945 "gpio93",
946};
947static const char * const qup7_groups[] = {
948 "gpio93", "gpio94", "gpio95", "gpio96",
949};
950static const char * const tsif2_en_groups[] = {
951 "gpio94",
952};
953static const char * const sdc42_groups[] = {
954 "gpio94",
955};
956static const char * const tsif2_data_groups[] = {
957 "gpio95",
958};
959static const char * const sdc41_groups[] = {
960 "gpio95",
961};
962static const char * const tsif2_sync_groups[] = {
963 "gpio96",
964};
965static const char * const sdc40_groups[] = {
966 "gpio96",
967};
968static const char * const phase_flag3_groups[] = {
969 "gpio96",
970};
971static const char * const ldo_en_groups[] = {
972 "gpio97",
973};
974static const char * const ldo_update_groups[] = {
975 "gpio98",
976};
977static const char * const phase_flag14_groups[] = {
978 "gpio99",
979};
980static const char * const phase_flag15_groups[] = {
981 "gpio100",
982};
983static const char * const pci_e1_groups[] = {
984 "gpio102", "gpio103",
985};
986static const char * const prng_rosc_groups[] = {
987 "gpio102",
988};
989static const char * const phase_flag5_groups[] = {
990 "gpio103",
991};
992static const char * const uim2_data_groups[] = {
993 "gpio105",
994};
995static const char * const qup13_groups[] = {
996 "gpio105", "gpio106", "gpio107", "gpio108",
997};
998static const char * const uim2_clk_groups[] = {
999 "gpio106",
1000};
1001static const char * const uim2_reset_groups[] = {
1002 "gpio107",
1003};
1004static const char * const uim2_present_groups[] = {
1005 "gpio108",
1006};
1007static const char * const uim1_data_groups[] = {
1008 "gpio109",
1009};
1010static const char * const uim1_clk_groups[] = {
1011 "gpio110",
1012};
1013static const char * const uim1_reset_groups[] = {
1014 "gpio111",
1015};
1016static const char * const uim1_present_groups[] = {
1017 "gpio112",
1018};
1019static const char * const uim_batt_groups[] = {
1020 "gpio113",
1021};
1022static const char * const edp_hot_groups[] = {
1023 "gpio113",
1024};
1025static const char * const nav_pps_groups[] = {
1026 "gpio114", "gpio114", "gpio115", "gpio115", "gpio128", "gpio128",
1027 "gpio129", "gpio129", "gpio143", "gpio143",
1028};
1029static const char * const atest_char_groups[] = {
1030 "gpio117",
1031};
1032static const char * const adsp_ext_groups[] = {
1033 "gpio118",
1034};
1035static const char * const atest_char3_groups[] = {
1036 "gpio118",
1037};
1038static const char * const atest_char2_groups[] = {
1039 "gpio119",
1040};
1041static const char * const atest_char1_groups[] = {
1042 "gpio120",
1043};
1044static const char * const atest_char0_groups[] = {
1045 "gpio121",
1046};
1047static const char * const qlink_request_groups[] = {
1048 "gpio130",
1049};
1050static const char * const qlink_enable_groups[] = {
1051 "gpio131",
1052};
1053static const char * const pa_indicator_groups[] = {
1054 "gpio135",
1055};
1056static const char * const phase_flag26_groups[] = {
1057 "gpio137",
1058};
1059static const char * const phase_flag27_groups[] = {
1060 "gpio138",
1061};
1062static const char * const phase_flag28_groups[] = {
1063 "gpio139",
1064};
1065static const char * const phase_flag6_groups[] = {
1066 "gpio140",
1067};
1068static const char * const phase_flag29_groups[] = {
1069 "gpio141",
1070};
1071static const char * const phase_flag30_groups[] = {
1072 "gpio142",
1073};
1074static const char * const phase_flag31_groups[] = {
1075 "gpio143",
1076};
1077static const char * const mss_lte_groups[] = {
1078 "gpio144", "gpio145",
1079};
1080static const char * const qup0_groups[] = {
1081 "gpio0", "gpio1", "gpio2", "gpio3",
1082};
Kyle Yan679cbee2016-07-27 16:55:20 -07001083static const char * const gpio_groups[] = {
1084 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
1085 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
1086 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
1087 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
1088 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
Kyle Yane687a862017-04-26 19:04:57 -07001089 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
1090 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
1091 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
1092 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
1093 "gpio64", "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", "gpio70",
1094 "gpio71", "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77",
1095 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
1096 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", "gpio91",
1097 "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98",
1098 "gpio99", "gpio100", "gpio101", "gpio102", "gpio103", "gpio104",
1099 "gpio105", "gpio106", "gpio107", "gpio108", "gpio109", "gpio110",
1100 "gpio111", "gpio112", "gpio113", "gpio114", "gpio115", "gpio116",
1101 "gpio117", "gpio118", "gpio119", "gpio120", "gpio121", "gpio122",
1102 "gpio123", "gpio124", "gpio125", "gpio126", "gpio127", "gpio128",
1103 "gpio129", "gpio130", "gpio131", "gpio132", "gpio133", "gpio134",
1104 "gpio135", "gpio136", "gpio137", "gpio138", "gpio139", "gpio140",
1105 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146",
1106 "gpio147", "gpio148", "gpio149",
Kyle Yan679cbee2016-07-27 16:55:20 -07001107};
Kyle Yan679cbee2016-07-27 16:55:20 -07001108static const char * const qup9_groups[] = {
1109 "gpio4", "gpio5", "gpio6", "gpio7",
1110};
1111static const char * const qdss_cti_groups[] = {
1112 "gpio4", "gpio5", "gpio51", "gpio52", "gpio62", "gpio63", "gpio90",
1113 "gpio91",
1114};
Kyle Yan679cbee2016-07-27 16:55:20 -07001115static const char * const ddr_pxi0_groups[] = {
1116 "gpio6", "gpio7",
1117};
Kyle Yan679cbee2016-07-27 16:55:20 -07001118static const char * const ddr_bist_groups[] = {
1119 "gpio7", "gpio8", "gpio9", "gpio10",
1120};
1121static const char * const atest_tsens2_groups[] = {
1122 "gpio7",
1123};
1124static const char * const vsense_trigger_groups[] = {
1125 "gpio7",
1126};
1127static const char * const atest_usb1_groups[] = {
1128 "gpio7",
1129};
Kyle Yan679cbee2016-07-27 16:55:20 -07001130static const char * const qup_l4_groups[] = {
1131 "gpio8", "gpio35", "gpio105", "gpio123",
1132};
1133static const char * const wlan1_adc1_groups[] = {
1134 "gpio8",
1135};
1136static const char * const atest_usb13_groups[] = {
1137 "gpio8",
1138};
1139static const char * const ddr_pxi1_groups[] = {
1140 "gpio8", "gpio9",
1141};
Kyle Yan679cbee2016-07-27 16:55:20 -07001142static const char * const qup_l5_groups[] = {
1143 "gpio9", "gpio36", "gpio106", "gpio124",
1144};
1145static const char * const wlan1_adc0_groups[] = {
1146 "gpio9",
1147};
1148static const char * const atest_usb12_groups[] = {
1149 "gpio9",
1150};
Kyle Yan679cbee2016-07-27 16:55:20 -07001151static const char * const mdp_vsync_groups[] = {
1152 "gpio10", "gpio11", "gpio12", "gpio97", "gpio98",
1153};
1154static const char * const qup_l6_groups[] = {
1155 "gpio10", "gpio37", "gpio107", "gpio125",
1156};
1157static const char * const wlan2_adc1_groups[] = {
1158 "gpio10",
1159};
1160static const char * const atest_usb11_groups[] = {
1161 "gpio10",
1162};
1163static const char * const ddr_pxi2_groups[] = {
1164 "gpio10", "gpio11",
1165};
Kyle Yan679cbee2016-07-27 16:55:20 -07001166static const char * const edp_lcd_groups[] = {
1167 "gpio11",
1168};
1169static const char * const dbg_out_groups[] = {
1170 "gpio11",
1171};
1172static const char * const wlan2_adc0_groups[] = {
1173 "gpio11",
1174};
1175static const char * const atest_usb10_groups[] = {
1176 "gpio11",
1177};
Kyle Yan679cbee2016-07-27 16:55:20 -07001178static const char * const m_voc_groups[] = {
1179 "gpio12",
1180};
1181static const char * const tsif1_sync_groups[] = {
1182 "gpio12",
1183};
Kyle Yan679cbee2016-07-27 16:55:20 -07001184
Kyle Yan6a20fae2017-02-14 13:34:41 -08001185static const struct msm_function sdm845_functions[] = {
Kyle Yan679cbee2016-07-27 16:55:20 -07001186 FUNCTION(ddr_pxi3),
Kyle Yan679cbee2016-07-27 16:55:20 -07001187 FUNCTION(cam_mclk),
1188 FUNCTION(pll_bypassnl),
1189 FUNCTION(qdss_gpio0),
Kyle Yan679cbee2016-07-27 16:55:20 -07001190 FUNCTION(pll_reset),
1191 FUNCTION(qdss_gpio1),
Kyle Yan679cbee2016-07-27 16:55:20 -07001192 FUNCTION(qdss_gpio2),
Kyle Yan679cbee2016-07-27 16:55:20 -07001193 FUNCTION(qdss_gpio3),
Kyle Yan679cbee2016-07-27 16:55:20 -07001194 FUNCTION(cci_i2c),
1195 FUNCTION(qup1),
1196 FUNCTION(qdss_gpio4),
Kyle Yan679cbee2016-07-27 16:55:20 -07001197 FUNCTION(qdss_gpio5),
Kyle Yan679cbee2016-07-27 16:55:20 -07001198 FUNCTION(qdss_gpio6),
Kyle Yan679cbee2016-07-27 16:55:20 -07001199 FUNCTION(qdss_gpio7),
Kyle Yan679cbee2016-07-27 16:55:20 -07001200 FUNCTION(cci_timer0),
1201 FUNCTION(gcc_gp2),
1202 FUNCTION(qdss_gpio8),
Kyle Yan679cbee2016-07-27 16:55:20 -07001203 FUNCTION(cci_timer1),
1204 FUNCTION(gcc_gp3),
1205 FUNCTION(qdss_gpio),
Kyle Yan679cbee2016-07-27 16:55:20 -07001206 FUNCTION(cci_timer2),
1207 FUNCTION(qdss_gpio9),
Kyle Yan679cbee2016-07-27 16:55:20 -07001208 FUNCTION(cci_timer3),
1209 FUNCTION(cci_async),
1210 FUNCTION(qdss_gpio10),
Kyle Yan679cbee2016-07-27 16:55:20 -07001211 FUNCTION(cci_timer4),
1212 FUNCTION(qdss_gpio11),
Kyle Yan679cbee2016-07-27 16:55:20 -07001213 FUNCTION(qdss_gpio12),
Kyle Yan679cbee2016-07-27 16:55:20 -07001214 FUNCTION(qup2),
1215 FUNCTION(qdss_gpio13),
Kyle Yan679cbee2016-07-27 16:55:20 -07001216 FUNCTION(qdss_gpio14),
Kyle Yan679cbee2016-07-27 16:55:20 -07001217 FUNCTION(phase_flag1),
1218 FUNCTION(qdss_gpio15),
Kyle Yan679cbee2016-07-27 16:55:20 -07001219 FUNCTION(phase_flag2),
Kyle Yan679cbee2016-07-27 16:55:20 -07001220 FUNCTION(qup11),
1221 FUNCTION(qup14),
Kyle Yan679cbee2016-07-27 16:55:20 -07001222 FUNCTION(pci_e0),
1223 FUNCTION(jitter_bist),
Kyle Yan679cbee2016-07-27 16:55:20 -07001224 FUNCTION(pll_bist),
1225 FUNCTION(atest_tsens),
Kyle Yan679cbee2016-07-27 16:55:20 -07001226 FUNCTION(agera_pll),
Kyle Yan679cbee2016-07-27 16:55:20 -07001227 FUNCTION(usb_phy),
Kyle Yan679cbee2016-07-27 16:55:20 -07001228 FUNCTION(lpass_slimbus),
Kyle Yan679cbee2016-07-27 16:55:20 -07001229 FUNCTION(sd_write),
1230 FUNCTION(tsif1_error),
Kyle Yan679cbee2016-07-27 16:55:20 -07001231 FUNCTION(qup3),
Kyle Yan679cbee2016-07-27 16:55:20 -07001232 FUNCTION(qup6),
Kyle Yan679cbee2016-07-27 16:55:20 -07001233 FUNCTION(qup12),
Kyle Yan679cbee2016-07-27 16:55:20 -07001234 FUNCTION(phase_flag16),
Kyle Yan679cbee2016-07-27 16:55:20 -07001235 FUNCTION(qup10),
1236 FUNCTION(phase_flag11),
Kyle Yan679cbee2016-07-27 16:55:20 -07001237 FUNCTION(phase_flag12),
Kyle Yan679cbee2016-07-27 16:55:20 -07001238 FUNCTION(phase_flag13),
Kyle Yan679cbee2016-07-27 16:55:20 -07001239 FUNCTION(phase_flag17),
Kyle Yan679cbee2016-07-27 16:55:20 -07001240 FUNCTION(qua_mi2s),
1241 FUNCTION(gcc_gp1),
1242 FUNCTION(phase_flag18),
Kyle Yan679cbee2016-07-27 16:55:20 -07001243 FUNCTION(phase_flag19),
Kyle Yan679cbee2016-07-27 16:55:20 -07001244 FUNCTION(phase_flag20),
Kyle Yan679cbee2016-07-27 16:55:20 -07001245 FUNCTION(cri_trng0),
1246 FUNCTION(phase_flag21),
Kyle Yan679cbee2016-07-27 16:55:20 -07001247 FUNCTION(cri_trng1),
1248 FUNCTION(phase_flag22),
Kyle Yan679cbee2016-07-27 16:55:20 -07001249 FUNCTION(cri_trng),
1250 FUNCTION(phase_flag23),
Kyle Yan679cbee2016-07-27 16:55:20 -07001251 FUNCTION(phase_flag24),
Kyle Yan679cbee2016-07-27 16:55:20 -07001252 FUNCTION(pri_mi2s),
1253 FUNCTION(sp_cmu),
1254 FUNCTION(phase_flag25),
Kyle Yan679cbee2016-07-27 16:55:20 -07001255 FUNCTION(qup8),
Kyle Yan679cbee2016-07-27 16:55:20 -07001256 FUNCTION(pri_mi2s_ws),
Kyle Yan679cbee2016-07-27 16:55:20 -07001257 FUNCTION(spkr_i2s),
1258 FUNCTION(audio_ref),
Kyle Yan679cbee2016-07-27 16:55:20 -07001259 FUNCTION(tsense_pwm1),
1260 FUNCTION(tsense_pwm2),
Kyle Yan679cbee2016-07-27 16:55:20 -07001261 FUNCTION(btfm_slimbus),
1262 FUNCTION(atest_usb2),
Kyle Yan679cbee2016-07-27 16:55:20 -07001263 FUNCTION(ter_mi2s),
1264 FUNCTION(phase_flag7),
1265 FUNCTION(atest_usb23),
Kyle Yan679cbee2016-07-27 16:55:20 -07001266 FUNCTION(phase_flag8),
1267 FUNCTION(atest_usb22),
Kyle Yan679cbee2016-07-27 16:55:20 -07001268 FUNCTION(phase_flag9),
1269 FUNCTION(atest_usb21),
Kyle Yan679cbee2016-07-27 16:55:20 -07001270 FUNCTION(phase_flag4),
1271 FUNCTION(atest_usb20),
Kyle Yan679cbee2016-07-27 16:55:20 -07001272 FUNCTION(sec_mi2s),
Kyle Yan679cbee2016-07-27 16:55:20 -07001273 FUNCTION(qup15),
Kyle Yan49a7e842017-04-04 11:18:19 -07001274 FUNCTION(qup5),
Kyle Yan679cbee2016-07-27 16:55:20 -07001275 FUNCTION(tsif1_clk),
1276 FUNCTION(qup4),
1277 FUNCTION(tgu_ch3),
1278 FUNCTION(phase_flag10),
Kyle Yan679cbee2016-07-27 16:55:20 -07001279 FUNCTION(tsif1_en),
1280 FUNCTION(mdp_vsync0),
1281 FUNCTION(mdp_vsync1),
1282 FUNCTION(mdp_vsync2),
1283 FUNCTION(mdp_vsync3),
1284 FUNCTION(tgu_ch0),
1285 FUNCTION(phase_flag0),
Kyle Yan679cbee2016-07-27 16:55:20 -07001286 FUNCTION(tsif1_data),
1287 FUNCTION(sdc4_cmd),
1288 FUNCTION(tgu_ch1),
Kyle Yan679cbee2016-07-27 16:55:20 -07001289 FUNCTION(tsif2_error),
1290 FUNCTION(sdc43),
1291 FUNCTION(vfr_1),
1292 FUNCTION(tgu_ch2),
Kyle Yan679cbee2016-07-27 16:55:20 -07001293 FUNCTION(tsif2_clk),
1294 FUNCTION(sdc4_clk),
1295 FUNCTION(qup7),
Kyle Yan679cbee2016-07-27 16:55:20 -07001296 FUNCTION(tsif2_en),
1297 FUNCTION(sdc42),
Kyle Yan679cbee2016-07-27 16:55:20 -07001298 FUNCTION(tsif2_data),
1299 FUNCTION(sdc41),
Kyle Yan679cbee2016-07-27 16:55:20 -07001300 FUNCTION(tsif2_sync),
1301 FUNCTION(sdc40),
Kyle Yane687a862017-04-26 19:04:57 -07001302 FUNCTION(phase_flag3),
Kyle Yan038bc672017-07-27 16:18:09 -07001303 FUNCTION(ldo_en),
1304 FUNCTION(ldo_update),
1305 FUNCTION(phase_flag14),
1306 FUNCTION(phase_flag15),
1307 FUNCTION(pci_e1),
1308 FUNCTION(prng_rosc),
1309 FUNCTION(phase_flag5),
1310 FUNCTION(uim2_data),
1311 FUNCTION(qup13),
1312 FUNCTION(uim2_clk),
1313 FUNCTION(uim2_reset),
1314 FUNCTION(uim2_present),
1315 FUNCTION(uim1_data),
1316 FUNCTION(uim1_clk),
1317 FUNCTION(uim1_reset),
1318 FUNCTION(uim1_present),
1319 FUNCTION(uim_batt),
1320 FUNCTION(edp_hot),
1321 FUNCTION(nav_pps),
1322 FUNCTION(atest_char),
1323 FUNCTION(adsp_ext),
1324 FUNCTION(atest_char3),
1325 FUNCTION(atest_char2),
1326 FUNCTION(atest_char1),
1327 FUNCTION(atest_char0),
1328 FUNCTION(qlink_request),
1329 FUNCTION(qlink_enable),
1330 FUNCTION(pa_indicator),
1331 FUNCTION(phase_flag26),
1332 FUNCTION(phase_flag27),
1333 FUNCTION(phase_flag28),
1334 FUNCTION(phase_flag6),
1335 FUNCTION(phase_flag29),
1336 FUNCTION(phase_flag30),
1337 FUNCTION(phase_flag31),
1338 FUNCTION(mss_lte),
1339 FUNCTION(qup0),
1340 FUNCTION(gpio),
1341 FUNCTION(qup9),
1342 FUNCTION(qdss_cti),
1343 FUNCTION(ddr_pxi0),
1344 FUNCTION(ddr_bist),
1345 FUNCTION(atest_tsens2),
1346 FUNCTION(vsense_trigger),
1347 FUNCTION(atest_usb1),
1348 FUNCTION(qup_l4),
1349 FUNCTION(wlan1_adc1),
1350 FUNCTION(atest_usb13),
1351 FUNCTION(ddr_pxi1),
1352 FUNCTION(qup_l5),
1353 FUNCTION(wlan1_adc0),
1354 FUNCTION(atest_usb12),
1355 FUNCTION(mdp_vsync),
1356 FUNCTION(qup_l6),
1357 FUNCTION(wlan2_adc1),
1358 FUNCTION(atest_usb11),
1359 FUNCTION(ddr_pxi2),
1360 FUNCTION(edp_lcd),
1361 FUNCTION(dbg_out),
1362 FUNCTION(wlan2_adc0),
1363 FUNCTION(atest_usb10),
1364 FUNCTION(m_voc),
1365 FUNCTION(tsif1_sync),
Kyle Yan679cbee2016-07-27 16:55:20 -07001366};
1367
Kyle Yan038bc672017-07-27 16:18:09 -07001368/* Every pin is maintained as a single group, and missing or non-existing pin
1369 * would be maintained as dummy group to synchronize pin group index with
1370 * pin descriptor registered with pinctrl core.
1371 * Clients would not be able to request these dummy pin groups.
1372 */
Kyle Yan6a20fae2017-02-14 13:34:41 -08001373static const struct msm_pingroup sdm845_groups[] = {
Kyle Yan038bc672017-07-27 16:18:09 -07001374 [0] = PINGROUP(0, qup0, NA, NA, NA, NA, NA, NA, NA, NA),
1375 [1] = PINGROUP(1, qup0, NA, NA, NA, NA, NA, NA, NA, NA),
1376 [2] = PINGROUP(2, qup0, NA, NA, NA, NA, NA, NA, NA, NA),
1377 [3] = PINGROUP(3, qup0, NA, NA, NA, NA, NA, NA, NA, NA),
1378 [4] = PINGROUP(4, qup9, qdss_cti, NA, NA, NA, NA, NA, NA, NA),
1379 [5] = PINGROUP(5, qup9, qdss_cti, NA, NA, NA, NA, NA, NA, NA),
1380 [6] = PINGROUP(6, qup9, NA, ddr_pxi0, NA, NA, NA, NA, NA, NA),
1381 [7] = PINGROUP(7, qup9, ddr_bist, NA, atest_tsens2,
1382 vsense_trigger, atest_usb1, ddr_pxi0, NA, NA),
1383 [8] = PINGROUP(8, qup_l4, NA, ddr_bist, NA, NA, wlan1_adc1,
1384 atest_usb13, ddr_pxi1, NA),
1385 [9] = PINGROUP(9, qup_l5, ddr_bist, NA, wlan1_adc0, atest_usb12,
1386 ddr_pxi1, NA, NA, NA),
1387 [10] = PINGROUP(10, mdp_vsync, qup_l6, ddr_bist, wlan2_adc1,
1388 atest_usb11, ddr_pxi2, NA, NA, NA),
1389 [11] = PINGROUP(11, mdp_vsync, edp_lcd, dbg_out, wlan2_adc0,
1390 atest_usb10, ddr_pxi2, NA, NA, NA),
1391 [12] = PINGROUP(12, mdp_vsync, m_voc, tsif1_sync, ddr_pxi3, NA,
1392 NA, NA, NA, NA),
1393 [13] = PINGROUP(13, cam_mclk, pll_bypassnl, qdss_gpio0,
1394 ddr_pxi3, NA, NA, NA, NA, NA),
1395 [14] = PINGROUP(14, cam_mclk, pll_reset, qdss_gpio1, NA, NA, NA,
1396 NA, NA, NA),
1397 [15] = PINGROUP(15, cam_mclk, qdss_gpio2, NA, NA, NA, NA, NA,
1398 NA, NA),
1399 [16] = PINGROUP(16, cam_mclk, qdss_gpio3, NA, NA, NA, NA, NA,
1400 NA, NA),
1401 [17] = PINGROUP(17, cci_i2c, qup1, qdss_gpio4, NA, NA, NA, NA,
1402 NA, NA),
1403 [18] = PINGROUP(18, cci_i2c, qup1, NA, qdss_gpio5, NA, NA, NA,
1404 NA, NA),
1405 [19] = PINGROUP(19, cci_i2c, qup1, NA, qdss_gpio6, NA, NA, NA,
1406 NA, NA),
1407 [20] = PINGROUP(20, cci_i2c, qup1, NA, qdss_gpio7, NA, NA, NA,
1408 NA, NA),
1409 [21] = PINGROUP(21, cci_timer0, gcc_gp2, qdss_gpio8, NA, NA, NA,
1410 NA, NA, NA),
1411 [22] = PINGROUP(22, cci_timer1, gcc_gp3, qdss_gpio, NA, NA, NA,
1412 NA, NA, NA),
1413 [23] = PINGROUP(23, cci_timer2, qdss_gpio9, NA, NA, NA, NA, NA,
1414 NA, NA),
1415 [24] = PINGROUP(24, cci_timer3, cci_async, qdss_gpio10, NA, NA,
1416 NA, NA, NA, NA),
1417 [25] = PINGROUP(25, cci_timer4, cci_async, qdss_gpio11, NA, NA,
1418 NA, NA, NA, NA),
1419 [26] = PINGROUP(26, cci_async, qdss_gpio12, NA, NA, NA, NA, NA,
1420 NA, NA),
1421 [27] = PINGROUP(27, qup2, qdss_gpio13, NA, NA, NA, NA, NA, NA,
1422 NA),
1423 [28] = PINGROUP(28, qup2, qdss_gpio14, NA, NA, NA, NA, NA, NA,
1424 NA),
1425 [29] = PINGROUP(29, qup2, NA, phase_flag1, qdss_gpio15, NA, NA,
1426 NA, NA, NA),
1427 [30] = PINGROUP(30, qup2, phase_flag2, qdss_gpio, NA, NA, NA, NA,
1428 NA, NA),
1429 [31] = PINGROUP(31, qup11, qup14, NA, NA, NA, NA, NA, NA, NA),
1430 [32] = PINGROUP(32, qup11, qup14, NA, NA, NA, NA, NA, NA, NA),
1431 [33] = PINGROUP(33, qup11, qup14, NA, NA, NA, NA, NA, NA, NA),
1432 [34] = PINGROUP(34, qup11, qup14, NA, NA, NA, NA, NA, NA, NA),
1433 [35] = PINGROUP(35, pci_e0, qup_l4, jitter_bist, NA, NA, NA, NA,
1434 NA, NA),
1435 [36] = PINGROUP(36, pci_e0, qup_l5, pll_bist, NA, atest_tsens,
1436 NA, NA, NA, NA),
1437 [37] = PINGROUP(37, qup_l6, agera_pll, NA, NA, NA, NA, NA, NA,
1438 NA),
1439 [38] = PINGROUP(38, usb_phy, NA, NA, NA, NA, NA, NA, NA, NA),
1440 [39] = PINGROUP(39, lpass_slimbus, NA, NA, NA, NA, NA, NA, NA,
1441 NA),
1442 [40] = PINGROUP(40, sd_write, tsif1_error, NA, NA, NA, NA, NA,
1443 NA, NA),
1444 [41] = PINGROUP(41, qup3, NA, qdss_gpio6, NA, NA, NA, NA, NA, NA),
1445 [42] = PINGROUP(42, qup3, NA, qdss_gpio7, NA, NA, NA, NA, NA, NA),
1446 [43] = PINGROUP(43, qup3, NA, qdss_gpio14, NA, NA, NA, NA, NA,
1447 NA),
1448 [44] = PINGROUP(44, qup3, NA, qdss_gpio15, NA, NA, NA, NA, NA,
1449 NA),
1450 [45] = PINGROUP(45, qup6, NA, NA, NA, NA, NA, NA, NA, NA),
1451 [46] = PINGROUP(46, qup6, NA, NA, NA, NA, NA, NA, NA, NA),
1452 [47] = PINGROUP(47, qup6, NA, NA, NA, NA, NA, NA, NA, NA),
1453 [48] = PINGROUP(48, qup6, NA, NA, NA, NA, NA, NA, NA, NA),
1454 [49] = PINGROUP(49, qup12, NA, NA, NA, NA, NA, NA, NA, NA),
1455 [50] = PINGROUP(50, qup12, NA, NA, NA, NA, NA, NA, NA, NA),
1456 [51] = PINGROUP(51, qup12, qdss_cti, NA, NA, NA, NA, NA, NA, NA),
1457 [52] = PINGROUP(52, qup12, phase_flag16, qdss_cti, NA, NA, NA,
1458 NA, NA, NA),
1459 [53] = PINGROUP(53, qup10, phase_flag11, NA, NA, NA, NA, NA, NA,
1460 NA),
1461 [54] = PINGROUP(54, qup10, NA, phase_flag12, NA, NA, NA, NA, NA,
1462 NA),
1463 [55] = PINGROUP(55, qup10, phase_flag13, NA, NA, NA, NA, NA, NA,
1464 NA),
1465 [56] = PINGROUP(56, qup10, phase_flag17, NA, NA, NA, NA, NA, NA,
1466 NA),
1467 [57] = PINGROUP(57, qua_mi2s, gcc_gp1, phase_flag18, NA, NA, NA,
1468 NA, NA, NA),
1469 [58] = PINGROUP(58, qua_mi2s, gcc_gp2, phase_flag19, NA, NA, NA,
1470 NA, NA, NA),
1471 [59] = PINGROUP(59, qua_mi2s, gcc_gp3, phase_flag20, NA, NA, NA,
1472 NA, NA, NA),
1473 [60] = PINGROUP(60, qua_mi2s, cri_trng0, phase_flag21, NA, NA,
1474 NA, NA, NA, NA),
1475 [61] = PINGROUP(61, qua_mi2s, cri_trng1, phase_flag22, NA, NA,
1476 NA, NA, NA, NA),
1477 [62] = PINGROUP(62, qua_mi2s, cri_trng, phase_flag23, qdss_cti,
1478 NA, NA, NA, NA, NA),
1479 [63] = PINGROUP(63, qua_mi2s, NA, phase_flag24, qdss_cti, NA,
1480 NA, NA, NA, NA),
1481 [64] = PINGROUP(64, pri_mi2s, sp_cmu, phase_flag25, NA, NA, NA,
1482 NA, NA, NA),
1483 [65] = PINGROUP(65, pri_mi2s, qup8, NA, NA, NA, NA, NA, NA, NA),
1484 [66] = PINGROUP(66, pri_mi2s_ws, qup8, NA, NA, NA, NA, NA, NA,
1485 NA),
1486 [67] = PINGROUP(67, pri_mi2s, qup8, NA, NA, NA, NA, NA, NA, NA),
1487 [68] = PINGROUP(68, pri_mi2s, qup8, NA, NA, NA, NA, NA, NA, NA),
1488 [69] = PINGROUP(69, spkr_i2s, audio_ref, NA, NA, NA, NA, NA, NA,
1489 NA),
1490 [70] = PINGROUP(70, lpass_slimbus, spkr_i2s, NA, NA, NA, NA, NA,
1491 NA, NA),
1492 [71] = PINGROUP(71, lpass_slimbus, spkr_i2s, tsense_pwm1,
1493 tsense_pwm2, NA, NA, NA, NA, NA),
1494 [72] = PINGROUP(72, lpass_slimbus, spkr_i2s, NA, NA, NA, NA, NA,
1495 NA, NA),
1496 [73] = PINGROUP(73, btfm_slimbus, atest_usb2, NA, NA, NA, NA, NA,
1497 NA, NA),
1498 [74] = PINGROUP(74, btfm_slimbus, ter_mi2s, phase_flag7,
1499 atest_usb23, NA, NA, NA, NA, NA),
1500 [75] = PINGROUP(75, ter_mi2s, phase_flag8, qdss_gpio8,
1501 atest_usb22, NA, NA, NA, NA, NA),
1502 [76] = PINGROUP(76, ter_mi2s, phase_flag9, qdss_gpio9,
1503 atest_usb21, NA, NA, NA, NA, NA),
1504 [77] = PINGROUP(77, ter_mi2s, phase_flag4, qdss_gpio10,
1505 atest_usb20, NA, NA, NA, NA, NA),
1506 [78] = PINGROUP(78, ter_mi2s, gcc_gp1, NA, NA, NA, NA, NA, NA,
1507 NA),
1508 [79] = PINGROUP(79, sec_mi2s, NA, NA, qdss_gpio11, NA, NA, NA,
1509 NA, NA),
1510 [80] = PINGROUP(80, sec_mi2s, NA, qdss_gpio12, NA, NA, NA, NA,
1511 NA, NA),
1512 [81] = PINGROUP(81, sec_mi2s, qup15, NA, NA, NA, NA, NA, NA, NA),
1513 [82] = PINGROUP(82, sec_mi2s, qup15, NA, NA, NA, NA, NA, NA, NA),
1514 [83] = PINGROUP(83, sec_mi2s, qup15, NA, NA, NA, NA, NA, NA, NA),
1515 [84] = PINGROUP(84, qup15, NA, NA, NA, NA, NA, NA, NA, NA),
1516 [85] = PINGROUP(85, qup5, NA, NA, NA, NA, NA, NA, NA, NA),
1517 [86] = PINGROUP(86, qup5, NA, NA, NA, NA, NA, NA, NA, NA),
1518 [87] = PINGROUP(87, qup5, NA, NA, NA, NA, NA, NA, NA, NA),
1519 [88] = PINGROUP(88, qup5, NA, NA, NA, NA, NA, NA, NA, NA),
1520 [89] = PINGROUP(89, tsif1_clk, qup4, tgu_ch3, phase_flag10, NA,
1521 NA, NA, NA, NA),
1522 [90] = PINGROUP(90, tsif1_en, mdp_vsync0, qup4, mdp_vsync1,
1523 mdp_vsync2, mdp_vsync3, tgu_ch0, phase_flag0, qdss_cti),
1524 [91] = PINGROUP(91, tsif1_data, sdc4_cmd, qup4, tgu_ch1, NA,
1525 qdss_cti, NA, NA, NA),
1526 [92] = PINGROUP(92, tsif2_error, sdc43, qup4, vfr_1, tgu_ch2,
1527 NA, NA, NA, NA),
1528 [93] = PINGROUP(93, tsif2_clk, sdc4_clk, qup7, NA, qdss_gpio13,
1529 NA, NA, NA, NA),
1530 [94] = PINGROUP(94, tsif2_en, sdc42, qup7, NA, NA, NA, NA, NA,
1531 NA),
1532 [95] = PINGROUP(95, tsif2_data, sdc41, qup7, NA, NA, NA, NA, NA,
1533 NA),
1534 [96] = PINGROUP(96, tsif2_sync, sdc40, qup7, phase_flag3, NA,
1535 NA, NA, NA, NA),
1536 [97] = PINGROUP(97, NA, NA, mdp_vsync, ldo_en, NA, NA, NA, NA,
1537 NA),
1538 [98] = PINGROUP(98, NA, mdp_vsync, ldo_update, NA, NA, NA, NA,
1539 NA, NA),
1540 [99] = PINGROUP(99, phase_flag14, NA, NA, NA, NA, NA, NA, NA,
1541 NA),
1542 [100] = PINGROUP(100, phase_flag15, NA, NA, NA, NA, NA, NA, NA,
1543 NA),
1544 [101] = PINGROUP(101, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1545 [102] = PINGROUP(102, pci_e1, prng_rosc, NA, NA, NA, NA, NA, NA,
1546 NA),
1547 [103] = PINGROUP(103, pci_e1, phase_flag5, NA, NA, NA, NA, NA,
1548 NA, NA),
1549 [104] = PINGROUP(104, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1550 [105] = PINGROUP(105, uim2_data, qup13, qup_l4, NA, NA, NA, NA,
1551 NA, NA),
1552 [106] = PINGROUP(106, uim2_clk, qup13, qup_l5, NA, NA, NA, NA,
1553 NA, NA),
1554 [107] = PINGROUP(107, uim2_reset, qup13, qup_l6, NA, NA, NA, NA,
1555 NA, NA),
1556 [108] = PINGROUP(108, uim2_present, qup13, NA, NA, NA, NA, NA,
1557 NA, NA),
1558 [109] = PINGROUP(109, uim1_data, NA, NA, NA, NA, NA, NA, NA, NA),
1559 [110] = PINGROUP(110, uim1_clk, NA, NA, NA, NA, NA, NA, NA, NA),
1560 [111] = PINGROUP(111, uim1_reset, NA, NA, NA, NA, NA, NA, NA,
1561 NA),
1562 [112] = PINGROUP(112, uim1_present, NA, NA, NA, NA, NA, NA, NA,
1563 NA),
1564 [113] = PINGROUP(113, uim_batt, edp_hot, NA, NA, NA, NA, NA, NA,
1565 NA),
1566 [114] = PINGROUP(114, NA, nav_pps, nav_pps, NA, NA, NA, NA, NA,
1567 NA),
1568 [115] = PINGROUP(115, NA, nav_pps, nav_pps, NA, NA, NA, NA, NA,
1569 NA),
1570 [116] = PINGROUP(116, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1571 [117] = PINGROUP(117, NA, qdss_gpio0, atest_char, NA, NA, NA,
1572 NA, NA, NA),
1573 [118] = PINGROUP(118, adsp_ext, NA, qdss_gpio1, atest_char3, NA,
1574 NA, NA, NA, NA),
1575 [119] = PINGROUP(119, NA, qdss_gpio2, atest_char2, NA, NA, NA,
1576 NA, NA, NA),
1577 [120] = PINGROUP(120, NA, qdss_gpio3, atest_char1, NA, NA, NA,
1578 NA, NA, NA),
1579 [121] = PINGROUP(121, NA, qdss_gpio4, atest_char0, NA, NA, NA,
1580 NA, NA, NA),
1581 [122] = PINGROUP(122, NA, qdss_gpio5, NA, NA, NA, NA, NA, NA, NA),
1582 [123] = PINGROUP(123, qup_l4, NA, qdss_gpio, NA, NA, NA, NA, NA,
1583 NA),
1584 [124] = PINGROUP(124, qup_l5, NA, qdss_gpio, NA, NA, NA, NA, NA,
1585 NA),
1586 [125] = PINGROUP(125, qup_l6, NA, NA, NA, NA, NA, NA, NA, NA),
1587 [126] = PINGROUP(126, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1588 [127] = PINGROUP(127, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1589 [128] = PINGROUP(128, nav_pps, nav_pps, NA, NA, NA, NA, NA, NA,
1590 NA),
1591 [129] = PINGROUP(129, nav_pps, nav_pps, NA, NA, NA, NA, NA, NA,
1592 NA),
1593 [130] = PINGROUP(130, qlink_request, NA, NA, NA, NA, NA, NA, NA,
1594 NA),
1595 [131] = PINGROUP(131, qlink_enable, NA, NA, NA, NA, NA, NA, NA,
1596 NA),
1597 [132] = PINGROUP(132, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1598 [133] = PINGROUP(133, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1599 [134] = PINGROUP(134, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1600 [135] = PINGROUP(135, NA, pa_indicator, NA, NA, NA, NA, NA, NA,
1601 NA),
1602 [136] = PINGROUP(136, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1603 [137] = PINGROUP(137, NA, NA, phase_flag26, NA, NA, NA, NA, NA,
1604 NA),
1605 [138] = PINGROUP(138, NA, NA, phase_flag27, NA, NA, NA, NA, NA,
1606 NA),
1607 [139] = PINGROUP(139, NA, phase_flag28, NA, NA, NA, NA, NA, NA,
1608 NA),
1609 [140] = PINGROUP(140, NA, NA, phase_flag6, NA, NA, NA, NA, NA,
1610 NA),
1611 [141] = PINGROUP(141, NA, phase_flag29, NA, NA, NA, NA, NA, NA,
1612 NA),
1613 [142] = PINGROUP(142, NA, phase_flag30, NA, NA, NA, NA, NA, NA,
1614 NA),
1615 [143] = PINGROUP(143, NA, nav_pps, nav_pps, NA, phase_flag31,
1616 NA, NA, NA, NA),
1617 [144] = PINGROUP(144, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA),
1618 [145] = PINGROUP(145, mss_lte, NA, NA, NA, NA, NA, NA, NA, NA),
1619 [146] = PINGROUP(146, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1620 [147] = PINGROUP(147, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1621 [148] = PINGROUP(148, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1622 [149] = PINGROUP(149, NA, NA, NA, NA, NA, NA, NA, NA, NA),
1623 [150] = SDC_QDSD_PINGROUP(sdc2_clk, 0x99a000, 14, 6),
1624 [151] = SDC_QDSD_PINGROUP(sdc2_cmd, 0x99a000, 11, 3),
1625 [152] = SDC_QDSD_PINGROUP(sdc2_data, 0x99a000, 9, 0),
1626 [153] = UFS_RESET(ufs_reset, 0x99f000),
Kyle Yan679cbee2016-07-27 16:55:20 -07001627};
1628
Mahesh Sivasubramanian0db1db72017-04-24 10:31:39 -06001629static const struct msm_dir_conn sdm845_dir_conn[] = {
1630 {1, 510},
1631 {3, 511},
1632 {5, 512},
1633 {10, 513},
1634 {11, 514},
1635 {20, 515},
1636 {22, 516},
1637 {24, 517},
1638 {26, 518},
1639 {30, 519},
1640 {31, 639},
1641 {32, 521},
1642 {34, 522},
1643 {36, 523},
1644 {37, 524},
1645 {38, 525},
1646 {39, 526},
1647 {40, 527},
1648 {41, 637},
1649 {43, 529},
1650 {44, 530},
1651 {46, 531},
1652 {48, 532},
1653 {49, 640},
1654 {52, 534},
1655 {53, 535},
1656 {54, 536},
1657 {56, 537},
1658 {57, 538},
1659 {58, 539},
1660 {59, 540},
1661 {60, 541},
1662 {61, 542},
1663 {62, 543},
1664 {63, 544},
1665 {64, 545},
1666 {66, 546},
1667 {68, 547},
1668 {71, 548},
1669 {73, 549},
1670 {77, 550},
1671 {78, 551},
1672 {79, 552},
1673 {80, 553},
1674 {84, 554},
1675 {85, 555},
1676 {86, 556},
1677 {88, 557},
1678 {89, 638},
1679 {91, 559},
1680 {92, 560},
1681 {95, 561},
1682 {96, 562},
1683 {97, 563},
1684 {101, 564},
1685 {103, 565},
1686 {104, 566},
1687 {115, 570},
1688 {116, 571},
1689 {117, 572},
1690 {118, 573},
1691 {119, 609},
1692 {120, 610},
1693 {121, 611},
1694 {122, 612},
1695 {123, 613},
1696 {124, 614},
1697 {125, 615},
1698 {127, 617},
1699 {128, 618},
1700 {129, 619},
1701 {130, 620},
1702 {132, 621},
1703 {133, 622},
1704 {145, 623},
1705};
1706
Kyle Yan6a20fae2017-02-14 13:34:41 -08001707static const struct msm_pinctrl_soc_data sdm845_pinctrl = {
1708 .pins = sdm845_pins,
1709 .npins = ARRAY_SIZE(sdm845_pins),
1710 .functions = sdm845_functions,
1711 .nfunctions = ARRAY_SIZE(sdm845_functions),
1712 .groups = sdm845_groups,
1713 .ngroups = ARRAY_SIZE(sdm845_groups),
Kyle Yan679cbee2016-07-27 16:55:20 -07001714 .ngpios = 150,
Mahesh Sivasubramanian0db1db72017-04-24 10:31:39 -06001715 .dir_conn = sdm845_dir_conn,
1716 .n_dir_conns = ARRAY_SIZE(sdm845_dir_conn),
Kyle Yanbc97ed92017-07-12 13:26:50 -07001717 .tile_offsets = sdm845_tile_offsets,
1718 .n_tile_offsets = ARRAY_SIZE(sdm845_tile_offsets),
1719 .pin_base = sdm845_pin_base,
1720 .reg_size = REG_SIZE,
Kyle Yan679cbee2016-07-27 16:55:20 -07001721};
1722
Kyle Yan6a20fae2017-02-14 13:34:41 -08001723static int sdm845_pinctrl_probe(struct platform_device *pdev)
Kyle Yan679cbee2016-07-27 16:55:20 -07001724{
Kyle Yan6a20fae2017-02-14 13:34:41 -08001725 return msm_pinctrl_probe(pdev, &sdm845_pinctrl);
Kyle Yan679cbee2016-07-27 16:55:20 -07001726}
1727
Kyle Yan6a20fae2017-02-14 13:34:41 -08001728static const struct of_device_id sdm845_pinctrl_of_match[] = {
1729 { .compatible = "qcom,sdm845-pinctrl", },
Kyle Yan679cbee2016-07-27 16:55:20 -07001730 { },
1731};
1732
Kyle Yan6a20fae2017-02-14 13:34:41 -08001733static struct platform_driver sdm845_pinctrl_driver = {
Kyle Yan679cbee2016-07-27 16:55:20 -07001734 .driver = {
Kyle Yan6a20fae2017-02-14 13:34:41 -08001735 .name = "sdm845-pinctrl",
Kyle Yan679cbee2016-07-27 16:55:20 -07001736 .owner = THIS_MODULE,
Kyle Yan6a20fae2017-02-14 13:34:41 -08001737 .of_match_table = sdm845_pinctrl_of_match,
Kyle Yan679cbee2016-07-27 16:55:20 -07001738 },
Kyle Yan6a20fae2017-02-14 13:34:41 -08001739 .probe = sdm845_pinctrl_probe,
Kyle Yan679cbee2016-07-27 16:55:20 -07001740 .remove = msm_pinctrl_remove,
1741};
1742
Kyle Yan6a20fae2017-02-14 13:34:41 -08001743static int __init sdm845_pinctrl_init(void)
Kyle Yan679cbee2016-07-27 16:55:20 -07001744{
Kyle Yan6a20fae2017-02-14 13:34:41 -08001745 return platform_driver_register(&sdm845_pinctrl_driver);
Kyle Yan679cbee2016-07-27 16:55:20 -07001746}
Kyle Yan6a20fae2017-02-14 13:34:41 -08001747arch_initcall(sdm845_pinctrl_init);
Kyle Yan679cbee2016-07-27 16:55:20 -07001748
Kyle Yan6a20fae2017-02-14 13:34:41 -08001749static void __exit sdm845_pinctrl_exit(void)
Kyle Yan679cbee2016-07-27 16:55:20 -07001750{
Kyle Yan6a20fae2017-02-14 13:34:41 -08001751 platform_driver_unregister(&sdm845_pinctrl_driver);
Kyle Yan679cbee2016-07-27 16:55:20 -07001752}
Kyle Yan6a20fae2017-02-14 13:34:41 -08001753module_exit(sdm845_pinctrl_exit);
Kyle Yan679cbee2016-07-27 16:55:20 -07001754
Kyle Yan6a20fae2017-02-14 13:34:41 -08001755MODULE_DESCRIPTION("QTI sdm845 pinctrl driver");
Kyle Yan679cbee2016-07-27 16:55:20 -07001756MODULE_LICENSE("GPL v2");
Kyle Yan6a20fae2017-02-14 13:34:41 -08001757MODULE_DEVICE_TABLE(of, sdm845_pinctrl_of_match);