Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1 | /* |
| 2 | * QLogic Fibre Channel HBA Driver |
| 3 | * Copyright (c) 2003-2013 QLogic Corporation |
| 4 | * |
| 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
| 6 | */ |
| 7 | #include "qla_def.h" |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/pci.h> |
| 10 | #include <linux/ratelimit.h> |
| 11 | #include <linux/vmalloc.h> |
| 12 | #include <scsi/scsi_tcq.h> |
| 13 | #include <linux/utsname.h> |
| 14 | |
| 15 | |
| 16 | /* QLAFX00 specific Mailbox implementation functions */ |
| 17 | |
| 18 | /* |
| 19 | * qlafx00_mailbox_command |
| 20 | * Issue mailbox command and waits for completion. |
| 21 | * |
| 22 | * Input: |
| 23 | * ha = adapter block pointer. |
| 24 | * mcp = driver internal mbx struct pointer. |
| 25 | * |
| 26 | * Output: |
| 27 | * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. |
| 28 | * |
| 29 | * Returns: |
| 30 | * 0 : QLA_SUCCESS = cmd performed success |
| 31 | * 1 : QLA_FUNCTION_FAILED (error encountered) |
| 32 | * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) |
| 33 | * |
| 34 | * Context: |
| 35 | * Kernel context. |
| 36 | */ |
| 37 | static int |
| 38 | qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp) |
| 39 | |
| 40 | { |
| 41 | int rval; |
| 42 | unsigned long flags = 0; |
Chad Dupuis | f73cb69 | 2014-02-26 04:15:06 -0500 | [diff] [blame] | 43 | device_reg_t *reg; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 44 | uint8_t abort_active; |
| 45 | uint8_t io_lock_on; |
| 46 | uint16_t command = 0; |
| 47 | uint32_t *iptr; |
| 48 | uint32_t __iomem *optr; |
| 49 | uint32_t cnt; |
| 50 | uint32_t mboxes; |
| 51 | unsigned long wait_time; |
| 52 | struct qla_hw_data *ha = vha->hw; |
| 53 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
| 54 | |
| 55 | if (ha->pdev->error_state > pci_channel_io_frozen) { |
| 56 | ql_log(ql_log_warn, vha, 0x115c, |
| 57 | "error_state is greater than pci_channel_io_frozen, " |
| 58 | "exiting.\n"); |
| 59 | return QLA_FUNCTION_TIMEOUT; |
| 60 | } |
| 61 | |
| 62 | if (vha->device_flags & DFLG_DEV_FAILED) { |
| 63 | ql_log(ql_log_warn, vha, 0x115f, |
| 64 | "Device in failed state, exiting.\n"); |
| 65 | return QLA_FUNCTION_TIMEOUT; |
| 66 | } |
| 67 | |
| 68 | reg = ha->iobase; |
| 69 | io_lock_on = base_vha->flags.init_done; |
| 70 | |
| 71 | rval = QLA_SUCCESS; |
| 72 | abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
| 73 | |
| 74 | if (ha->flags.pci_channel_io_perm_failure) { |
| 75 | ql_log(ql_log_warn, vha, 0x1175, |
| 76 | "Perm failure on EEH timeout MBX, exiting.\n"); |
| 77 | return QLA_FUNCTION_TIMEOUT; |
| 78 | } |
| 79 | |
| 80 | if (ha->flags.isp82xx_fw_hung) { |
| 81 | /* Setting Link-Down error */ |
| 82 | mcp->mb[0] = MBS_LINK_DOWN_ERROR; |
| 83 | ql_log(ql_log_warn, vha, 0x1176, |
| 84 | "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); |
| 85 | rval = QLA_FUNCTION_FAILED; |
| 86 | goto premature_exit; |
| 87 | } |
| 88 | |
| 89 | /* |
| 90 | * Wait for active mailbox commands to finish by waiting at most tov |
| 91 | * seconds. This is to serialize actual issuing of mailbox cmds during |
| 92 | * non ISP abort time. |
| 93 | */ |
| 94 | if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { |
| 95 | /* Timeout occurred. Return error. */ |
| 96 | ql_log(ql_log_warn, vha, 0x1177, |
| 97 | "Cmd access timeout, cmd=0x%x, Exiting.\n", |
| 98 | mcp->mb[0]); |
| 99 | return QLA_FUNCTION_TIMEOUT; |
| 100 | } |
| 101 | |
| 102 | ha->flags.mbox_busy = 1; |
| 103 | /* Save mailbox command for debug */ |
| 104 | ha->mcp32 = mcp; |
| 105 | |
| 106 | ql_dbg(ql_dbg_mbx, vha, 0x1178, |
| 107 | "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); |
| 108 | |
| 109 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 110 | |
| 111 | /* Load mailbox registers. */ |
| 112 | optr = (uint32_t __iomem *)®->ispfx00.mailbox0; |
| 113 | |
| 114 | iptr = mcp->mb; |
| 115 | command = mcp->mb[0]; |
| 116 | mboxes = mcp->out_mb; |
| 117 | |
| 118 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
| 119 | if (mboxes & BIT_0) |
| 120 | WRT_REG_DWORD(optr, *iptr); |
| 121 | |
| 122 | mboxes >>= 1; |
| 123 | optr++; |
| 124 | iptr++; |
| 125 | } |
| 126 | |
| 127 | /* Issue set host interrupt command to send cmd out. */ |
| 128 | ha->flags.mbox_int = 0; |
| 129 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); |
| 130 | |
| 131 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172, |
| 132 | (uint8_t *)mcp->mb, 16); |
| 133 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173, |
| 134 | ((uint8_t *)mcp->mb + 0x10), 16); |
| 135 | ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174, |
| 136 | ((uint8_t *)mcp->mb + 0x20), 8); |
| 137 | |
| 138 | /* Unlock mbx registers and wait for interrupt */ |
| 139 | ql_dbg(ql_dbg_mbx, vha, 0x1179, |
| 140 | "Going to unlock irq & waiting for interrupts. " |
| 141 | "jiffies=%lx.\n", jiffies); |
| 142 | |
| 143 | /* Wait for mbx cmd completion until timeout */ |
| 144 | if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { |
| 145 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); |
| 146 | |
| 147 | QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); |
| 148 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 149 | |
| 150 | wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 151 | } else { |
| 152 | ql_dbg(ql_dbg_mbx, vha, 0x112c, |
| 153 | "Cmd=%x Polling Mode.\n", command); |
| 154 | |
| 155 | QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); |
| 156 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 157 | |
| 158 | wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ |
| 159 | while (!ha->flags.mbox_int) { |
| 160 | if (time_after(jiffies, wait_time)) |
| 161 | break; |
| 162 | |
| 163 | /* Check for pending interrupts. */ |
| 164 | qla2x00_poll(ha->rsp_q_map[0]); |
| 165 | |
| 166 | if (!ha->flags.mbox_int && |
| 167 | !(IS_QLA2200(ha) && |
| 168 | command == MBC_LOAD_RISC_RAM_EXTENDED)) |
| 169 | usleep_range(10000, 11000); |
| 170 | } /* while */ |
| 171 | ql_dbg(ql_dbg_mbx, vha, 0x112d, |
| 172 | "Waited %d sec.\n", |
| 173 | (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); |
| 174 | } |
| 175 | |
| 176 | /* Check whether we timed out */ |
| 177 | if (ha->flags.mbox_int) { |
| 178 | uint32_t *iptr2; |
| 179 | |
| 180 | ql_dbg(ql_dbg_mbx, vha, 0x112e, |
| 181 | "Cmd=%x completed.\n", command); |
| 182 | |
| 183 | /* Got interrupt. Clear the flag. */ |
| 184 | ha->flags.mbox_int = 0; |
| 185 | clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); |
| 186 | |
| 187 | if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE) |
| 188 | rval = QLA_FUNCTION_FAILED; |
| 189 | |
| 190 | /* Load return mailbox registers. */ |
| 191 | iptr2 = mcp->mb; |
| 192 | iptr = (uint32_t *)&ha->mailbox_out32[0]; |
| 193 | mboxes = mcp->in_mb; |
| 194 | for (cnt = 0; cnt < ha->mbx_count; cnt++) { |
| 195 | if (mboxes & BIT_0) |
| 196 | *iptr2 = *iptr; |
| 197 | |
| 198 | mboxes >>= 1; |
| 199 | iptr2++; |
| 200 | iptr++; |
| 201 | } |
| 202 | } else { |
| 203 | |
| 204 | rval = QLA_FUNCTION_TIMEOUT; |
| 205 | } |
| 206 | |
| 207 | ha->flags.mbox_busy = 0; |
| 208 | |
| 209 | /* Clean up */ |
| 210 | ha->mcp32 = NULL; |
| 211 | |
| 212 | if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { |
| 213 | ql_dbg(ql_dbg_mbx, vha, 0x113a, |
| 214 | "checking for additional resp interrupt.\n"); |
| 215 | |
| 216 | /* polling mode for non isp_abort commands. */ |
| 217 | qla2x00_poll(ha->rsp_q_map[0]); |
| 218 | } |
| 219 | |
| 220 | if (rval == QLA_FUNCTION_TIMEOUT && |
| 221 | mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { |
| 222 | if (!io_lock_on || (mcp->flags & IOCTL_CMD) || |
| 223 | ha->flags.eeh_busy) { |
| 224 | /* not in dpc. schedule it for dpc to take over. */ |
| 225 | ql_dbg(ql_dbg_mbx, vha, 0x115d, |
| 226 | "Timeout, schedule isp_abort_needed.\n"); |
| 227 | |
| 228 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && |
| 229 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && |
| 230 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { |
| 231 | |
| 232 | ql_log(ql_log_info, base_vha, 0x115e, |
| 233 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
| 234 | "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " |
| 235 | "abort.\n", command, mcp->mb[0], |
| 236 | ha->flags.eeh_busy); |
| 237 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 238 | qla2xxx_wake_dpc(vha); |
| 239 | } |
| 240 | } else if (!abort_active) { |
| 241 | /* call abort directly since we are in the DPC thread */ |
| 242 | ql_dbg(ql_dbg_mbx, vha, 0x1160, |
| 243 | "Timeout, calling abort_isp.\n"); |
| 244 | |
| 245 | if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && |
| 246 | !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && |
| 247 | !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { |
| 248 | |
| 249 | ql_log(ql_log_info, base_vha, 0x1161, |
| 250 | "Mailbox cmd timeout occurred, cmd=0x%x, " |
| 251 | "mb[0]=0x%x. Scheduling ISP abort ", |
| 252 | command, mcp->mb[0]); |
| 253 | |
| 254 | set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); |
| 255 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 256 | if (ha->isp_ops->abort_isp(vha)) { |
| 257 | /* Failed. retry later. */ |
| 258 | set_bit(ISP_ABORT_NEEDED, |
| 259 | &vha->dpc_flags); |
| 260 | } |
| 261 | clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); |
| 262 | ql_dbg(ql_dbg_mbx, vha, 0x1162, |
| 263 | "Finished abort_isp.\n"); |
| 264 | } |
| 265 | } |
| 266 | } |
| 267 | |
| 268 | premature_exit: |
| 269 | /* Allow next mbx cmd to come in. */ |
| 270 | complete(&ha->mbx_cmd_comp); |
| 271 | |
| 272 | if (rval) { |
| 273 | ql_log(ql_log_warn, base_vha, 0x1163, |
| 274 | "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, " |
| 275 | "mb[3]=%x, cmd=%x ****.\n", |
| 276 | mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); |
| 277 | } else { |
| 278 | ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__); |
| 279 | } |
| 280 | |
| 281 | return rval; |
| 282 | } |
| 283 | |
| 284 | /* |
| 285 | * qlafx00_driver_shutdown |
| 286 | * Indicate a driver shutdown to firmware. |
| 287 | * |
| 288 | * Input: |
| 289 | * ha = adapter block pointer. |
| 290 | * |
| 291 | * Returns: |
| 292 | * local function return status code. |
| 293 | * |
| 294 | * Context: |
| 295 | * Kernel context. |
| 296 | */ |
Armen Baloyan | 4247934 | 2013-08-27 01:37:37 -0400 | [diff] [blame] | 297 | int |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 298 | qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo) |
| 299 | { |
| 300 | int rval; |
| 301 | struct mbx_cmd_32 mc; |
| 302 | struct mbx_cmd_32 *mcp = &mc; |
| 303 | |
| 304 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166, |
| 305 | "Entered %s.\n", __func__); |
| 306 | |
| 307 | mcp->mb[0] = MBC_MR_DRV_SHUTDOWN; |
| 308 | mcp->out_mb = MBX_0; |
| 309 | mcp->in_mb = MBX_0; |
| 310 | if (tmo) |
| 311 | mcp->tov = tmo; |
| 312 | else |
| 313 | mcp->tov = MBX_TOV_SECONDS; |
| 314 | mcp->flags = 0; |
| 315 | rval = qlafx00_mailbox_command(vha, mcp); |
| 316 | |
| 317 | if (rval != QLA_SUCCESS) { |
| 318 | ql_dbg(ql_dbg_mbx, vha, 0x1167, |
| 319 | "Failed=%x.\n", rval); |
| 320 | } else { |
| 321 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168, |
| 322 | "Done %s.\n", __func__); |
| 323 | } |
| 324 | |
| 325 | return rval; |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * qlafx00_get_firmware_state |
| 330 | * Get adapter firmware state. |
| 331 | * |
| 332 | * Input: |
| 333 | * ha = adapter block pointer. |
| 334 | * TARGET_QUEUE_LOCK must be released. |
| 335 | * ADAPTER_STATE_LOCK must be released. |
| 336 | * |
| 337 | * Returns: |
| 338 | * qla7xxx local function return status code. |
| 339 | * |
| 340 | * Context: |
| 341 | * Kernel context. |
| 342 | */ |
| 343 | static int |
| 344 | qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states) |
| 345 | { |
| 346 | int rval; |
| 347 | struct mbx_cmd_32 mc; |
| 348 | struct mbx_cmd_32 *mcp = &mc; |
| 349 | |
| 350 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169, |
| 351 | "Entered %s.\n", __func__); |
| 352 | |
| 353 | mcp->mb[0] = MBC_GET_FIRMWARE_STATE; |
| 354 | mcp->out_mb = MBX_0; |
| 355 | mcp->in_mb = MBX_1|MBX_0; |
| 356 | mcp->tov = MBX_TOV_SECONDS; |
| 357 | mcp->flags = 0; |
| 358 | rval = qlafx00_mailbox_command(vha, mcp); |
| 359 | |
| 360 | /* Return firmware states. */ |
| 361 | states[0] = mcp->mb[1]; |
| 362 | |
| 363 | if (rval != QLA_SUCCESS) { |
| 364 | ql_dbg(ql_dbg_mbx, vha, 0x116a, |
| 365 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); |
| 366 | } else { |
| 367 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b, |
| 368 | "Done %s.\n", __func__); |
| 369 | } |
| 370 | return rval; |
| 371 | } |
| 372 | |
| 373 | /* |
| 374 | * qlafx00_init_firmware |
| 375 | * Initialize adapter firmware. |
| 376 | * |
| 377 | * Input: |
| 378 | * ha = adapter block pointer. |
| 379 | * dptr = Initialization control block pointer. |
| 380 | * size = size of initialization control block. |
| 381 | * TARGET_QUEUE_LOCK must be released. |
| 382 | * ADAPTER_STATE_LOCK must be released. |
| 383 | * |
| 384 | * Returns: |
| 385 | * qlafx00 local function return status code. |
| 386 | * |
| 387 | * Context: |
| 388 | * Kernel context. |
| 389 | */ |
| 390 | int |
| 391 | qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size) |
| 392 | { |
| 393 | int rval; |
| 394 | struct mbx_cmd_32 mc; |
| 395 | struct mbx_cmd_32 *mcp = &mc; |
| 396 | struct qla_hw_data *ha = vha->hw; |
| 397 | |
| 398 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c, |
| 399 | "Entered %s.\n", __func__); |
| 400 | |
| 401 | mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; |
| 402 | |
| 403 | mcp->mb[1] = 0; |
| 404 | mcp->mb[2] = MSD(ha->init_cb_dma); |
| 405 | mcp->mb[3] = LSD(ha->init_cb_dma); |
| 406 | |
| 407 | mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; |
| 408 | mcp->in_mb = MBX_0; |
| 409 | mcp->buf_size = size; |
| 410 | mcp->flags = MBX_DMA_OUT; |
| 411 | mcp->tov = MBX_TOV_SECONDS; |
| 412 | rval = qlafx00_mailbox_command(vha, mcp); |
| 413 | |
| 414 | if (rval != QLA_SUCCESS) { |
| 415 | ql_dbg(ql_dbg_mbx, vha, 0x116d, |
| 416 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); |
| 417 | } else { |
| 418 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e, |
| 419 | "Done %s.\n", __func__); |
| 420 | } |
| 421 | return rval; |
| 422 | } |
| 423 | |
| 424 | /* |
| 425 | * qlafx00_mbx_reg_test |
| 426 | */ |
| 427 | static int |
| 428 | qlafx00_mbx_reg_test(scsi_qla_host_t *vha) |
| 429 | { |
| 430 | int rval; |
| 431 | struct mbx_cmd_32 mc; |
| 432 | struct mbx_cmd_32 *mcp = &mc; |
| 433 | |
| 434 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f, |
| 435 | "Entered %s.\n", __func__); |
| 436 | |
| 437 | |
| 438 | mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; |
| 439 | mcp->mb[1] = 0xAAAA; |
| 440 | mcp->mb[2] = 0x5555; |
| 441 | mcp->mb[3] = 0xAA55; |
| 442 | mcp->mb[4] = 0x55AA; |
| 443 | mcp->mb[5] = 0xA5A5; |
| 444 | mcp->mb[6] = 0x5A5A; |
| 445 | mcp->mb[7] = 0x2525; |
| 446 | mcp->mb[8] = 0xBBBB; |
| 447 | mcp->mb[9] = 0x6666; |
| 448 | mcp->mb[10] = 0xBB66; |
| 449 | mcp->mb[11] = 0x66BB; |
| 450 | mcp->mb[12] = 0xB6B6; |
| 451 | mcp->mb[13] = 0x6B6B; |
| 452 | mcp->mb[14] = 0x3636; |
| 453 | mcp->mb[15] = 0xCCCC; |
| 454 | |
| 455 | |
| 456 | mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| |
| 457 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
| 458 | mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| |
| 459 | MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; |
| 460 | mcp->buf_size = 0; |
| 461 | mcp->flags = MBX_DMA_OUT; |
| 462 | mcp->tov = MBX_TOV_SECONDS; |
| 463 | rval = qlafx00_mailbox_command(vha, mcp); |
| 464 | if (rval == QLA_SUCCESS) { |
| 465 | if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 || |
| 466 | mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA) |
| 467 | rval = QLA_FUNCTION_FAILED; |
| 468 | if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A || |
| 469 | mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB) |
| 470 | rval = QLA_FUNCTION_FAILED; |
| 471 | if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 || |
| 472 | mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6) |
| 473 | rval = QLA_FUNCTION_FAILED; |
| 474 | if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 || |
| 475 | mcp->mb[31] != 0xCCCC) |
| 476 | rval = QLA_FUNCTION_FAILED; |
| 477 | } |
| 478 | |
| 479 | if (rval != QLA_SUCCESS) { |
| 480 | ql_dbg(ql_dbg_mbx, vha, 0x1170, |
| 481 | "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); |
| 482 | } else { |
| 483 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171, |
| 484 | "Done %s.\n", __func__); |
| 485 | } |
| 486 | return rval; |
| 487 | } |
| 488 | |
| 489 | /** |
| 490 | * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers. |
| 491 | * @ha: HA context |
| 492 | * |
| 493 | * Returns 0 on success. |
| 494 | */ |
| 495 | int |
| 496 | qlafx00_pci_config(scsi_qla_host_t *vha) |
| 497 | { |
| 498 | uint16_t w; |
| 499 | struct qla_hw_data *ha = vha->hw; |
| 500 | |
| 501 | pci_set_master(ha->pdev); |
| 502 | pci_try_set_mwi(ha->pdev); |
| 503 | |
| 504 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
| 505 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
| 506 | w &= ~PCI_COMMAND_INTX_DISABLE; |
| 507 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
| 508 | |
| 509 | /* PCIe -- adjust Maximum Read Request Size (2048). */ |
Yijing Wang | ce9f7ed | 2013-09-05 15:55:30 +0800 | [diff] [blame] | 510 | if (pci_is_pcie(ha->pdev)) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 511 | pcie_set_readrq(ha->pdev, 2048); |
| 512 | |
| 513 | ha->chip_revision = ha->pdev->revision; |
| 514 | |
| 515 | return QLA_SUCCESS; |
| 516 | } |
| 517 | |
| 518 | /** |
| 519 | * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC). |
| 520 | * @ha: HA context |
| 521 | * |
| 522 | */ |
| 523 | static inline void |
| 524 | qlafx00_soc_cpu_reset(scsi_qla_host_t *vha) |
| 525 | { |
| 526 | unsigned long flags = 0; |
| 527 | struct qla_hw_data *ha = vha->hw; |
| 528 | int i, core; |
| 529 | uint32_t cnt; |
| 530 | |
| 531 | /* Set all 4 cores in reset */ |
| 532 | for (i = 0; i < 4; i++) { |
| 533 | QLAFX00_SET_HBA_SOC_REG(ha, |
| 534 | (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01)); |
| 535 | } |
| 536 | |
| 537 | /* Set all 4 core Clock gating control */ |
| 538 | for (i = 0; i < 4; i++) { |
| 539 | QLAFX00_SET_HBA_SOC_REG(ha, |
| 540 | (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101)); |
| 541 | } |
| 542 | |
| 543 | /* Reset all units in Fabric */ |
| 544 | QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101)); |
| 545 | |
| 546 | /* Reset all interrupt control registers */ |
| 547 | for (i = 0; i < 115; i++) { |
| 548 | QLAFX00_SET_HBA_SOC_REG(ha, |
| 549 | (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0)); |
| 550 | } |
| 551 | |
| 552 | /* Reset Timers control registers. per core */ |
| 553 | for (core = 0; core < 4; core++) |
| 554 | for (i = 0; i < 8; i++) |
| 555 | QLAFX00_SET_HBA_SOC_REG(ha, |
| 556 | (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0)); |
| 557 | |
| 558 | /* Reset per core IRQ ack register */ |
| 559 | for (core = 0; core < 4; core++) |
| 560 | QLAFX00_SET_HBA_SOC_REG(ha, |
| 561 | (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF)); |
| 562 | |
| 563 | /* Set Fabric control and config to defaults */ |
| 564 | QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2)); |
| 565 | QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3)); |
| 566 | |
| 567 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 568 | |
| 569 | /* Kick in Fabric units */ |
| 570 | QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0)); |
| 571 | |
| 572 | /* Kick in Core0 to start boot process */ |
| 573 | QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); |
| 574 | |
| 575 | /* Wait 10secs for soft-reset to complete. */ |
| 576 | for (cnt = 10; cnt; cnt--) { |
| 577 | msleep(1000); |
| 578 | barrier(); |
| 579 | } |
| 580 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 581 | } |
| 582 | |
| 583 | /** |
| 584 | * qlafx00_soft_reset() - Soft Reset ISPFx00. |
| 585 | * @ha: HA context |
| 586 | * |
| 587 | * Returns 0 on success. |
| 588 | */ |
| 589 | void |
| 590 | qlafx00_soft_reset(scsi_qla_host_t *vha) |
| 591 | { |
| 592 | struct qla_hw_data *ha = vha->hw; |
| 593 | |
| 594 | if (unlikely(pci_channel_offline(ha->pdev) && |
| 595 | ha->flags.pci_channel_io_perm_failure)) |
| 596 | return; |
| 597 | |
| 598 | ha->isp_ops->disable_intrs(ha); |
| 599 | qlafx00_soc_cpu_reset(vha); |
| 600 | ha->isp_ops->enable_intrs(ha); |
| 601 | } |
| 602 | |
| 603 | /** |
| 604 | * qlafx00_chip_diag() - Test ISPFx00 for proper operation. |
| 605 | * @ha: HA context |
| 606 | * |
| 607 | * Returns 0 on success. |
| 608 | */ |
| 609 | int |
| 610 | qlafx00_chip_diag(scsi_qla_host_t *vha) |
| 611 | { |
| 612 | int rval = 0; |
| 613 | struct qla_hw_data *ha = vha->hw; |
| 614 | struct req_que *req = ha->req_q_map[0]; |
| 615 | |
| 616 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
| 617 | |
| 618 | rval = qlafx00_mbx_reg_test(vha); |
| 619 | if (rval) { |
| 620 | ql_log(ql_log_warn, vha, 0x1165, |
| 621 | "Failed mailbox send register test\n"); |
| 622 | } else { |
| 623 | /* Flag a successful rval */ |
| 624 | rval = QLA_SUCCESS; |
| 625 | } |
| 626 | return rval; |
| 627 | } |
| 628 | |
| 629 | void |
| 630 | qlafx00_config_rings(struct scsi_qla_host *vha) |
| 631 | { |
| 632 | struct qla_hw_data *ha = vha->hw; |
| 633 | struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 634 | |
| 635 | WRT_REG_DWORD(®->req_q_in, 0); |
| 636 | WRT_REG_DWORD(®->req_q_out, 0); |
| 637 | |
| 638 | WRT_REG_DWORD(®->rsp_q_in, 0); |
| 639 | WRT_REG_DWORD(®->rsp_q_out, 0); |
| 640 | |
| 641 | /* PCI posting */ |
| 642 | RD_REG_DWORD(®->rsp_q_out); |
| 643 | } |
| 644 | |
| 645 | char * |
| 646 | qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str) |
| 647 | { |
| 648 | struct qla_hw_data *ha = vha->hw; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 649 | |
Yijing Wang | ce9f7ed | 2013-09-05 15:55:30 +0800 | [diff] [blame] | 650 | if (pci_is_pcie(ha->pdev)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 651 | strcpy(str, "PCIe iSA"); |
| 652 | return str; |
| 653 | } |
| 654 | return str; |
| 655 | } |
| 656 | |
| 657 | char * |
| 658 | qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str) |
| 659 | { |
| 660 | struct qla_hw_data *ha = vha->hw; |
| 661 | |
| 662 | sprintf(str, "%s", ha->mr.fw_version); |
| 663 | return str; |
| 664 | } |
| 665 | |
| 666 | void |
| 667 | qlafx00_enable_intrs(struct qla_hw_data *ha) |
| 668 | { |
| 669 | unsigned long flags = 0; |
| 670 | |
| 671 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 672 | ha->interrupts_on = 1; |
| 673 | QLAFX00_ENABLE_ICNTRL_REG(ha); |
| 674 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 675 | } |
| 676 | |
| 677 | void |
| 678 | qlafx00_disable_intrs(struct qla_hw_data *ha) |
| 679 | { |
| 680 | unsigned long flags = 0; |
| 681 | |
| 682 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 683 | ha->interrupts_on = 0; |
| 684 | QLAFX00_DISABLE_ICNTRL_REG(ha); |
| 685 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 686 | } |
| 687 | |
| 688 | static void |
| 689 | qlafx00_tmf_iocb_timeout(void *data) |
| 690 | { |
| 691 | srb_t *sp = (srb_t *)data; |
| 692 | struct srb_iocb *tmf = &sp->u.iocb_cmd; |
| 693 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 694 | tmf->u.tmf.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 695 | complete(&tmf->u.tmf.comp); |
| 696 | } |
| 697 | |
| 698 | static void |
| 699 | qlafx00_tmf_sp_done(void *data, void *ptr, int res) |
| 700 | { |
| 701 | srb_t *sp = (srb_t *)ptr; |
| 702 | struct srb_iocb *tmf = &sp->u.iocb_cmd; |
| 703 | |
| 704 | complete(&tmf->u.tmf.comp); |
| 705 | } |
| 706 | |
| 707 | static int |
| 708 | qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, |
| 709 | uint32_t lun, uint32_t tag) |
| 710 | { |
| 711 | scsi_qla_host_t *vha = fcport->vha; |
| 712 | struct srb_iocb *tm_iocb; |
| 713 | srb_t *sp; |
| 714 | int rval = QLA_FUNCTION_FAILED; |
| 715 | |
| 716 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
| 717 | if (!sp) |
| 718 | goto done; |
| 719 | |
| 720 | tm_iocb = &sp->u.iocb_cmd; |
| 721 | sp->type = SRB_TM_CMD; |
| 722 | sp->name = "tmf"; |
| 723 | qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); |
| 724 | tm_iocb->u.tmf.flags = flags; |
| 725 | tm_iocb->u.tmf.lun = lun; |
| 726 | tm_iocb->u.tmf.data = tag; |
| 727 | sp->done = qlafx00_tmf_sp_done; |
| 728 | tm_iocb->timeout = qlafx00_tmf_iocb_timeout; |
| 729 | init_completion(&tm_iocb->u.tmf.comp); |
| 730 | |
| 731 | rval = qla2x00_start_sp(sp); |
| 732 | if (rval != QLA_SUCCESS) |
| 733 | goto done_free_sp; |
| 734 | |
| 735 | ql_dbg(ql_dbg_async, vha, 0x507b, |
| 736 | "Task management command issued target_id=%x\n", |
| 737 | fcport->tgt_id); |
| 738 | |
| 739 | wait_for_completion(&tm_iocb->u.tmf.comp); |
| 740 | |
| 741 | rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? |
| 742 | QLA_SUCCESS : QLA_FUNCTION_FAILED; |
| 743 | |
| 744 | done_free_sp: |
| 745 | sp->free(vha, sp); |
| 746 | done: |
| 747 | return rval; |
| 748 | } |
| 749 | |
| 750 | int |
| 751 | qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag) |
| 752 | { |
| 753 | return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); |
| 754 | } |
| 755 | |
| 756 | int |
| 757 | qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag) |
| 758 | { |
| 759 | return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); |
| 760 | } |
| 761 | |
| 762 | int |
Armen Baloyan | 5854771 | 2013-08-27 01:37:33 -0400 | [diff] [blame] | 763 | qlafx00_loop_reset(scsi_qla_host_t *vha) |
| 764 | { |
| 765 | int ret; |
| 766 | struct fc_port *fcport; |
| 767 | struct qla_hw_data *ha = vha->hw; |
| 768 | |
| 769 | if (ql2xtargetreset) { |
| 770 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 771 | if (fcport->port_type != FCT_TARGET) |
| 772 | continue; |
| 773 | |
| 774 | ret = ha->isp_ops->target_reset(fcport, 0, 0); |
| 775 | if (ret != QLA_SUCCESS) { |
| 776 | ql_dbg(ql_dbg_taskm, vha, 0x803d, |
| 777 | "Bus Reset failed: Reset=%d " |
| 778 | "d_id=%x.\n", ret, fcport->d_id.b24); |
| 779 | } |
| 780 | } |
| 781 | } |
| 782 | return QLA_SUCCESS; |
| 783 | } |
| 784 | |
| 785 | int |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 786 | qlafx00_iospace_config(struct qla_hw_data *ha) |
| 787 | { |
| 788 | if (pci_request_selected_regions(ha->pdev, ha->bars, |
| 789 | QLA2XXX_DRIVER_NAME)) { |
| 790 | ql_log_pci(ql_log_fatal, ha->pdev, 0x014e, |
| 791 | "Failed to reserve PIO/MMIO regions (%s), aborting.\n", |
| 792 | pci_name(ha->pdev)); |
| 793 | goto iospace_error_exit; |
| 794 | } |
| 795 | |
| 796 | /* Use MMIO operations for all accesses. */ |
| 797 | if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { |
| 798 | ql_log_pci(ql_log_warn, ha->pdev, 0x014f, |
| 799 | "Invalid pci I/O region size (%s).\n", |
| 800 | pci_name(ha->pdev)); |
| 801 | goto iospace_error_exit; |
| 802 | } |
| 803 | if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) { |
| 804 | ql_log_pci(ql_log_warn, ha->pdev, 0x0127, |
| 805 | "Invalid PCI mem BAR0 region size (%s), aborting\n", |
| 806 | pci_name(ha->pdev)); |
| 807 | goto iospace_error_exit; |
| 808 | } |
| 809 | |
| 810 | ha->cregbase = |
| 811 | ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); |
| 812 | if (!ha->cregbase) { |
| 813 | ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, |
| 814 | "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); |
| 815 | goto iospace_error_exit; |
| 816 | } |
| 817 | |
| 818 | if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) { |
| 819 | ql_log_pci(ql_log_warn, ha->pdev, 0x0129, |
| 820 | "region #2 not an MMIO resource (%s), aborting\n", |
| 821 | pci_name(ha->pdev)); |
| 822 | goto iospace_error_exit; |
| 823 | } |
| 824 | if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) { |
| 825 | ql_log_pci(ql_log_warn, ha->pdev, 0x012a, |
| 826 | "Invalid PCI mem BAR2 region size (%s), aborting\n", |
| 827 | pci_name(ha->pdev)); |
| 828 | goto iospace_error_exit; |
| 829 | } |
| 830 | |
| 831 | ha->iobase = |
| 832 | ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); |
| 833 | if (!ha->iobase) { |
| 834 | ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, |
| 835 | "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); |
| 836 | goto iospace_error_exit; |
| 837 | } |
| 838 | |
| 839 | /* Determine queue resources */ |
| 840 | ha->max_req_queues = ha->max_rsp_queues = 1; |
| 841 | |
| 842 | ql_log_pci(ql_log_info, ha->pdev, 0x012c, |
| 843 | "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n", |
| 844 | ha->bars, ha->cregbase, ha->iobase); |
| 845 | |
| 846 | return 0; |
| 847 | |
| 848 | iospace_error_exit: |
| 849 | return -ENOMEM; |
| 850 | } |
| 851 | |
| 852 | static void |
| 853 | qlafx00_save_queue_ptrs(struct scsi_qla_host *vha) |
| 854 | { |
| 855 | struct qla_hw_data *ha = vha->hw; |
| 856 | struct req_que *req = ha->req_q_map[0]; |
| 857 | struct rsp_que *rsp = ha->rsp_q_map[0]; |
| 858 | |
| 859 | req->length_fx00 = req->length; |
| 860 | req->ring_fx00 = req->ring; |
| 861 | req->dma_fx00 = req->dma; |
| 862 | |
| 863 | rsp->length_fx00 = rsp->length; |
| 864 | rsp->ring_fx00 = rsp->ring; |
| 865 | rsp->dma_fx00 = rsp->dma; |
| 866 | |
| 867 | ql_dbg(ql_dbg_init, vha, 0x012d, |
| 868 | "req: %p, ring_fx00: %p, length_fx00: 0x%x," |
| 869 | "req->dma_fx00: 0x%llx\n", req, req->ring_fx00, |
| 870 | req->length_fx00, (u64)req->dma_fx00); |
| 871 | |
| 872 | ql_dbg(ql_dbg_init, vha, 0x012e, |
| 873 | "rsp: %p, ring_fx00: %p, length_fx00: 0x%x," |
| 874 | "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00, |
| 875 | rsp->length_fx00, (u64)rsp->dma_fx00); |
| 876 | } |
| 877 | |
| 878 | static int |
| 879 | qlafx00_config_queues(struct scsi_qla_host *vha) |
| 880 | { |
| 881 | struct qla_hw_data *ha = vha->hw; |
| 882 | struct req_que *req = ha->req_q_map[0]; |
| 883 | struct rsp_que *rsp = ha->rsp_q_map[0]; |
| 884 | dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2); |
| 885 | |
| 886 | req->length = ha->req_que_len; |
| 887 | req->ring = (void *)ha->iobase + ha->req_que_off; |
| 888 | req->dma = bar2_hdl + ha->req_que_off; |
| 889 | if ((!req->ring) || (req->length == 0)) { |
| 890 | ql_log_pci(ql_log_info, ha->pdev, 0x012f, |
| 891 | "Unable to allocate memory for req_ring\n"); |
| 892 | return QLA_FUNCTION_FAILED; |
| 893 | } |
| 894 | |
| 895 | ql_dbg(ql_dbg_init, vha, 0x0130, |
| 896 | "req: %p req_ring pointer %p req len 0x%x " |
| 897 | "req off 0x%x\n, req->dma: 0x%llx", |
| 898 | req, req->ring, req->length, |
| 899 | ha->req_que_off, (u64)req->dma); |
| 900 | |
| 901 | rsp->length = ha->rsp_que_len; |
| 902 | rsp->ring = (void *)ha->iobase + ha->rsp_que_off; |
| 903 | rsp->dma = bar2_hdl + ha->rsp_que_off; |
| 904 | if ((!rsp->ring) || (rsp->length == 0)) { |
| 905 | ql_log_pci(ql_log_info, ha->pdev, 0x0131, |
| 906 | "Unable to allocate memory for rsp_ring\n"); |
| 907 | return QLA_FUNCTION_FAILED; |
| 908 | } |
| 909 | |
| 910 | ql_dbg(ql_dbg_init, vha, 0x0132, |
| 911 | "rsp: %p rsp_ring pointer %p rsp len 0x%x " |
| 912 | "rsp off 0x%x, rsp->dma: 0x%llx\n", |
| 913 | rsp, rsp->ring, rsp->length, |
| 914 | ha->rsp_que_off, (u64)rsp->dma); |
| 915 | |
| 916 | return QLA_SUCCESS; |
| 917 | } |
| 918 | |
| 919 | static int |
| 920 | qlafx00_init_fw_ready(scsi_qla_host_t *vha) |
| 921 | { |
| 922 | int rval = 0; |
| 923 | unsigned long wtime; |
| 924 | uint16_t wait_time; /* Wait time */ |
| 925 | struct qla_hw_data *ha = vha->hw; |
| 926 | struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; |
| 927 | uint32_t aenmbx, aenmbx7 = 0; |
Armen Baloyan | f9a2a54 | 2013-08-27 01:37:42 -0400 | [diff] [blame] | 928 | uint32_t pseudo_aen; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 929 | uint32_t state[5]; |
| 930 | bool done = false; |
| 931 | |
| 932 | /* 30 seconds wait - Adjust if required */ |
| 933 | wait_time = 30; |
| 934 | |
Armen Baloyan | f9a2a54 | 2013-08-27 01:37:42 -0400 | [diff] [blame] | 935 | pseudo_aen = RD_REG_DWORD(®->pseudoaen); |
| 936 | if (pseudo_aen == 1) { |
| 937 | aenmbx7 = RD_REG_DWORD(®->initval7); |
| 938 | ha->mbx_intr_code = MSW(aenmbx7); |
| 939 | ha->rqstq_intr_code = LSW(aenmbx7); |
| 940 | rval = qlafx00_driver_shutdown(vha, 10); |
| 941 | if (rval != QLA_SUCCESS) |
| 942 | qlafx00_soft_reset(vha); |
| 943 | } |
| 944 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 945 | /* wait time before firmware ready */ |
| 946 | wtime = jiffies + (wait_time * HZ); |
| 947 | do { |
| 948 | aenmbx = RD_REG_DWORD(®->aenmailbox0); |
| 949 | barrier(); |
| 950 | ql_dbg(ql_dbg_mbx, vha, 0x0133, |
| 951 | "aenmbx: 0x%x\n", aenmbx); |
| 952 | |
| 953 | switch (aenmbx) { |
| 954 | case MBA_FW_NOT_STARTED: |
| 955 | case MBA_FW_STARTING: |
| 956 | break; |
| 957 | |
| 958 | case MBA_SYSTEM_ERR: |
| 959 | case MBA_REQ_TRANSFER_ERR: |
| 960 | case MBA_RSP_TRANSFER_ERR: |
| 961 | case MBA_FW_INIT_FAILURE: |
| 962 | qlafx00_soft_reset(vha); |
| 963 | break; |
| 964 | |
| 965 | case MBA_FW_RESTART_CMPLT: |
| 966 | /* Set the mbx and rqstq intr code */ |
| 967 | aenmbx7 = RD_REG_DWORD(®->aenmailbox7); |
| 968 | ha->mbx_intr_code = MSW(aenmbx7); |
| 969 | ha->rqstq_intr_code = LSW(aenmbx7); |
| 970 | ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); |
| 971 | ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); |
| 972 | ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); |
| 973 | ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); |
| 974 | WRT_REG_DWORD(®->aenmailbox0, 0); |
| 975 | RD_REG_DWORD_RELAXED(®->aenmailbox0); |
| 976 | ql_dbg(ql_dbg_init, vha, 0x0134, |
| 977 | "f/w returned mbx_intr_code: 0x%x, " |
| 978 | "rqstq_intr_code: 0x%x\n", |
| 979 | ha->mbx_intr_code, ha->rqstq_intr_code); |
| 980 | QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); |
| 981 | rval = QLA_SUCCESS; |
| 982 | done = true; |
| 983 | break; |
| 984 | |
| 985 | default: |
Armen Baloyan | 0f8cdff | 2014-02-26 04:14:57 -0500 | [diff] [blame] | 986 | if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS) |
| 987 | break; |
| 988 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 989 | /* If fw is apparently not ready. In order to continue, |
| 990 | * we might need to issue Mbox cmd, but the problem is |
| 991 | * that the DoorBell vector values that come with the |
| 992 | * 8060 AEN are most likely gone by now (and thus no |
| 993 | * bell would be rung on the fw side when mbox cmd is |
| 994 | * issued). We have to therefore grab the 8060 AEN |
| 995 | * shadow regs (filled in by FW when the last 8060 |
| 996 | * AEN was being posted). |
| 997 | * Do the following to determine what is needed in |
| 998 | * order to get the FW ready: |
| 999 | * 1. reload the 8060 AEN values from the shadow regs |
| 1000 | * 2. clear int status to get rid of possible pending |
| 1001 | * interrupts |
| 1002 | * 3. issue Get FW State Mbox cmd to determine fw state |
| 1003 | * Set the mbx and rqstq intr code from Shadow Regs |
| 1004 | */ |
| 1005 | aenmbx7 = RD_REG_DWORD(®->initval7); |
| 1006 | ha->mbx_intr_code = MSW(aenmbx7); |
| 1007 | ha->rqstq_intr_code = LSW(aenmbx7); |
| 1008 | ha->req_que_off = RD_REG_DWORD(®->initval1); |
| 1009 | ha->rsp_que_off = RD_REG_DWORD(®->initval3); |
| 1010 | ha->req_que_len = RD_REG_DWORD(®->initval5); |
| 1011 | ha->rsp_que_len = RD_REG_DWORD(®->initval6); |
| 1012 | ql_dbg(ql_dbg_init, vha, 0x0135, |
| 1013 | "f/w returned mbx_intr_code: 0x%x, " |
| 1014 | "rqstq_intr_code: 0x%x\n", |
| 1015 | ha->mbx_intr_code, ha->rqstq_intr_code); |
| 1016 | QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); |
| 1017 | |
| 1018 | /* Get the FW state */ |
| 1019 | rval = qlafx00_get_firmware_state(vha, state); |
| 1020 | if (rval != QLA_SUCCESS) { |
| 1021 | /* Retry if timer has not expired */ |
| 1022 | break; |
| 1023 | } |
| 1024 | |
| 1025 | if (state[0] == FSTATE_FX00_CONFIG_WAIT) { |
| 1026 | /* Firmware is waiting to be |
| 1027 | * initialized by driver |
| 1028 | */ |
| 1029 | rval = QLA_SUCCESS; |
| 1030 | done = true; |
| 1031 | break; |
| 1032 | } |
| 1033 | |
| 1034 | /* Issue driver shutdown and wait until f/w recovers. |
| 1035 | * Driver should continue to poll until 8060 AEN is |
| 1036 | * received indicating firmware recovery. |
| 1037 | */ |
| 1038 | ql_dbg(ql_dbg_init, vha, 0x0136, |
| 1039 | "Sending Driver shutdown fw_state 0x%x\n", |
| 1040 | state[0]); |
| 1041 | |
| 1042 | rval = qlafx00_driver_shutdown(vha, 10); |
| 1043 | if (rval != QLA_SUCCESS) { |
| 1044 | rval = QLA_FUNCTION_FAILED; |
| 1045 | break; |
| 1046 | } |
| 1047 | msleep(500); |
| 1048 | |
| 1049 | wtime = jiffies + (wait_time * HZ); |
| 1050 | break; |
| 1051 | } |
| 1052 | |
| 1053 | if (!done) { |
| 1054 | if (time_after_eq(jiffies, wtime)) { |
| 1055 | ql_dbg(ql_dbg_init, vha, 0x0137, |
| 1056 | "Init f/w failed: aen[7]: 0x%x\n", |
| 1057 | RD_REG_DWORD(®->aenmailbox7)); |
| 1058 | rval = QLA_FUNCTION_FAILED; |
| 1059 | done = true; |
| 1060 | break; |
| 1061 | } |
| 1062 | /* Delay for a while */ |
| 1063 | msleep(500); |
| 1064 | } |
| 1065 | } while (!done); |
| 1066 | |
| 1067 | if (rval) |
| 1068 | ql_dbg(ql_dbg_init, vha, 0x0138, |
| 1069 | "%s **** FAILED ****.\n", __func__); |
| 1070 | else |
| 1071 | ql_dbg(ql_dbg_init, vha, 0x0139, |
| 1072 | "%s **** SUCCESS ****.\n", __func__); |
| 1073 | |
| 1074 | return rval; |
| 1075 | } |
| 1076 | |
| 1077 | /* |
| 1078 | * qlafx00_fw_ready() - Waits for firmware ready. |
| 1079 | * @ha: HA context |
| 1080 | * |
| 1081 | * Returns 0 on success. |
| 1082 | */ |
| 1083 | int |
| 1084 | qlafx00_fw_ready(scsi_qla_host_t *vha) |
| 1085 | { |
| 1086 | int rval; |
| 1087 | unsigned long wtime; |
| 1088 | uint16_t wait_time; /* Wait time if loop is coming ready */ |
| 1089 | uint32_t state[5]; |
| 1090 | |
| 1091 | rval = QLA_SUCCESS; |
| 1092 | |
| 1093 | wait_time = 10; |
| 1094 | |
| 1095 | /* wait time before firmware ready */ |
| 1096 | wtime = jiffies + (wait_time * HZ); |
| 1097 | |
| 1098 | /* Wait for ISP to finish init */ |
| 1099 | if (!vha->flags.init_done) |
| 1100 | ql_dbg(ql_dbg_init, vha, 0x013a, |
| 1101 | "Waiting for init to complete...\n"); |
| 1102 | |
| 1103 | do { |
| 1104 | rval = qlafx00_get_firmware_state(vha, state); |
| 1105 | |
| 1106 | if (rval == QLA_SUCCESS) { |
| 1107 | if (state[0] == FSTATE_FX00_INITIALIZED) { |
| 1108 | ql_dbg(ql_dbg_init, vha, 0x013b, |
| 1109 | "fw_state=%x\n", state[0]); |
| 1110 | rval = QLA_SUCCESS; |
| 1111 | break; |
| 1112 | } |
| 1113 | } |
| 1114 | rval = QLA_FUNCTION_FAILED; |
| 1115 | |
| 1116 | if (time_after_eq(jiffies, wtime)) |
| 1117 | break; |
| 1118 | |
| 1119 | /* Delay for a while */ |
| 1120 | msleep(500); |
| 1121 | |
| 1122 | ql_dbg(ql_dbg_init, vha, 0x013c, |
| 1123 | "fw_state=%x curr time=%lx.\n", state[0], jiffies); |
| 1124 | } while (1); |
| 1125 | |
| 1126 | |
| 1127 | if (rval) |
| 1128 | ql_dbg(ql_dbg_init, vha, 0x013d, |
| 1129 | "Firmware ready **** FAILED ****.\n"); |
| 1130 | else |
| 1131 | ql_dbg(ql_dbg_init, vha, 0x013e, |
| 1132 | "Firmware ready **** SUCCESS ****.\n"); |
| 1133 | |
| 1134 | return rval; |
| 1135 | } |
| 1136 | |
| 1137 | static int |
| 1138 | qlafx00_find_all_targets(scsi_qla_host_t *vha, |
| 1139 | struct list_head *new_fcports) |
| 1140 | { |
| 1141 | int rval; |
| 1142 | uint16_t tgt_id; |
| 1143 | fc_port_t *fcport, *new_fcport; |
| 1144 | int found; |
| 1145 | struct qla_hw_data *ha = vha->hw; |
| 1146 | |
| 1147 | rval = QLA_SUCCESS; |
| 1148 | |
| 1149 | if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) |
| 1150 | return QLA_FUNCTION_FAILED; |
| 1151 | |
| 1152 | if ((atomic_read(&vha->loop_down_timer) || |
| 1153 | STATE_TRANSITION(vha))) { |
| 1154 | atomic_set(&vha->loop_down_timer, 0); |
| 1155 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1156 | return QLA_FUNCTION_FAILED; |
| 1157 | } |
| 1158 | |
| 1159 | ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088, |
| 1160 | "Listing Target bit map...\n"); |
| 1161 | ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, |
| 1162 | 0x2089, (uint8_t *)ha->gid_list, 32); |
| 1163 | |
| 1164 | /* Allocate temporary rmtport for any new rmtports discovered. */ |
| 1165 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
| 1166 | if (new_fcport == NULL) |
| 1167 | return QLA_MEMORY_ALLOC_FAILED; |
| 1168 | |
| 1169 | for_each_set_bit(tgt_id, (void *)ha->gid_list, |
| 1170 | QLAFX00_TGT_NODE_LIST_SIZE) { |
| 1171 | |
| 1172 | /* Send get target node info */ |
| 1173 | new_fcport->tgt_id = tgt_id; |
| 1174 | rval = qlafx00_fx_disc(vha, new_fcport, |
| 1175 | FXDISC_GET_TGT_NODE_INFO); |
| 1176 | if (rval != QLA_SUCCESS) { |
| 1177 | ql_log(ql_log_warn, vha, 0x208a, |
| 1178 | "Target info scan failed -- assuming zero-entry " |
| 1179 | "result...\n"); |
| 1180 | continue; |
| 1181 | } |
| 1182 | |
| 1183 | /* Locate matching device in database. */ |
| 1184 | found = 0; |
| 1185 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 1186 | if (memcmp(new_fcport->port_name, |
| 1187 | fcport->port_name, WWN_SIZE)) |
| 1188 | continue; |
| 1189 | |
| 1190 | found++; |
| 1191 | |
| 1192 | /* |
| 1193 | * If tgt_id is same and state FCS_ONLINE, nothing |
| 1194 | * changed. |
| 1195 | */ |
| 1196 | if (fcport->tgt_id == new_fcport->tgt_id && |
| 1197 | atomic_read(&fcport->state) == FCS_ONLINE) |
| 1198 | break; |
| 1199 | |
| 1200 | /* |
| 1201 | * Tgt ID changed or device was marked to be updated. |
| 1202 | */ |
| 1203 | ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b, |
| 1204 | "TGT-ID Change(%s): Present tgt id: " |
| 1205 | "0x%x state: 0x%x " |
| 1206 | "wwnn = %llx wwpn = %llx.\n", |
| 1207 | __func__, fcport->tgt_id, |
| 1208 | atomic_read(&fcport->state), |
| 1209 | (unsigned long long)wwn_to_u64(fcport->node_name), |
| 1210 | (unsigned long long)wwn_to_u64(fcport->port_name)); |
| 1211 | |
| 1212 | ql_log(ql_log_info, vha, 0x208c, |
| 1213 | "TGT-ID Announce(%s): Discovered tgt " |
| 1214 | "id 0x%x wwnn = %llx " |
| 1215 | "wwpn = %llx.\n", __func__, new_fcport->tgt_id, |
| 1216 | (unsigned long long) |
| 1217 | wwn_to_u64(new_fcport->node_name), |
| 1218 | (unsigned long long) |
| 1219 | wwn_to_u64(new_fcport->port_name)); |
| 1220 | |
| 1221 | if (atomic_read(&fcport->state) != FCS_ONLINE) { |
| 1222 | fcport->old_tgt_id = fcport->tgt_id; |
| 1223 | fcport->tgt_id = new_fcport->tgt_id; |
| 1224 | ql_log(ql_log_info, vha, 0x208d, |
| 1225 | "TGT-ID: New fcport Added: %p\n", fcport); |
| 1226 | qla2x00_update_fcport(vha, fcport); |
| 1227 | } else { |
| 1228 | ql_log(ql_log_info, vha, 0x208e, |
| 1229 | " Existing TGT-ID %x did not get " |
| 1230 | " offline event from firmware.\n", |
| 1231 | fcport->old_tgt_id); |
| 1232 | qla2x00_mark_device_lost(vha, fcport, 0, 0); |
| 1233 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1234 | kfree(new_fcport); |
| 1235 | return rval; |
| 1236 | } |
| 1237 | break; |
| 1238 | } |
| 1239 | |
| 1240 | if (found) |
| 1241 | continue; |
| 1242 | |
| 1243 | /* If device was not in our fcports list, then add it. */ |
| 1244 | list_add_tail(&new_fcport->list, new_fcports); |
| 1245 | |
| 1246 | /* Allocate a new replacement fcport. */ |
| 1247 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
| 1248 | if (new_fcport == NULL) |
| 1249 | return QLA_MEMORY_ALLOC_FAILED; |
| 1250 | } |
| 1251 | |
| 1252 | kfree(new_fcport); |
| 1253 | return rval; |
| 1254 | } |
| 1255 | |
| 1256 | /* |
| 1257 | * qlafx00_configure_all_targets |
| 1258 | * Setup target devices with node ID's. |
| 1259 | * |
| 1260 | * Input: |
| 1261 | * ha = adapter block pointer. |
| 1262 | * |
| 1263 | * Returns: |
| 1264 | * 0 = success. |
| 1265 | * BIT_0 = error |
| 1266 | */ |
| 1267 | static int |
| 1268 | qlafx00_configure_all_targets(scsi_qla_host_t *vha) |
| 1269 | { |
| 1270 | int rval; |
| 1271 | fc_port_t *fcport, *rmptemp; |
| 1272 | LIST_HEAD(new_fcports); |
| 1273 | |
| 1274 | rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport, |
| 1275 | FXDISC_GET_TGT_NODE_LIST); |
| 1276 | if (rval != QLA_SUCCESS) { |
| 1277 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1278 | return rval; |
| 1279 | } |
| 1280 | |
| 1281 | rval = qlafx00_find_all_targets(vha, &new_fcports); |
| 1282 | if (rval != QLA_SUCCESS) { |
| 1283 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1284 | return rval; |
| 1285 | } |
| 1286 | |
| 1287 | /* |
| 1288 | * Delete all previous devices marked lost. |
| 1289 | */ |
| 1290 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 1291 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
| 1292 | break; |
| 1293 | |
| 1294 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { |
| 1295 | if (fcport->port_type != FCT_INITIATOR) |
| 1296 | qla2x00_mark_device_lost(vha, fcport, 0, 0); |
| 1297 | } |
| 1298 | } |
| 1299 | |
| 1300 | /* |
| 1301 | * Add the new devices to our devices list. |
| 1302 | */ |
| 1303 | list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { |
| 1304 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
| 1305 | break; |
| 1306 | |
| 1307 | qla2x00_update_fcport(vha, fcport); |
| 1308 | list_move_tail(&fcport->list, &vha->vp_fcports); |
| 1309 | ql_log(ql_log_info, vha, 0x208f, |
| 1310 | "Attach new target id 0x%x wwnn = %llx " |
| 1311 | "wwpn = %llx.\n", |
| 1312 | fcport->tgt_id, |
| 1313 | (unsigned long long)wwn_to_u64(fcport->node_name), |
| 1314 | (unsigned long long)wwn_to_u64(fcport->port_name)); |
| 1315 | } |
| 1316 | |
| 1317 | /* Free all new device structures not processed. */ |
| 1318 | list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { |
| 1319 | list_del(&fcport->list); |
| 1320 | kfree(fcport); |
| 1321 | } |
| 1322 | |
| 1323 | return rval; |
| 1324 | } |
| 1325 | |
| 1326 | /* |
| 1327 | * qlafx00_configure_devices |
| 1328 | * Updates Fibre Channel Device Database with what is actually on loop. |
| 1329 | * |
| 1330 | * Input: |
| 1331 | * ha = adapter block pointer. |
| 1332 | * |
| 1333 | * Returns: |
| 1334 | * 0 = success. |
| 1335 | * 1 = error. |
| 1336 | * 2 = database was full and device was not configured. |
| 1337 | */ |
| 1338 | int |
| 1339 | qlafx00_configure_devices(scsi_qla_host_t *vha) |
| 1340 | { |
| 1341 | int rval; |
| 1342 | unsigned long flags, save_flags; |
| 1343 | rval = QLA_SUCCESS; |
| 1344 | |
| 1345 | save_flags = flags = vha->dpc_flags; |
| 1346 | |
| 1347 | ql_dbg(ql_dbg_disc, vha, 0x2090, |
| 1348 | "Configure devices -- dpc flags =0x%lx\n", flags); |
| 1349 | |
| 1350 | rval = qlafx00_configure_all_targets(vha); |
| 1351 | |
| 1352 | if (rval == QLA_SUCCESS) { |
| 1353 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
| 1354 | rval = QLA_FUNCTION_FAILED; |
| 1355 | } else { |
| 1356 | atomic_set(&vha->loop_state, LOOP_READY); |
| 1357 | ql_log(ql_log_info, vha, 0x2091, |
| 1358 | "Device Ready\n"); |
| 1359 | } |
| 1360 | } |
| 1361 | |
| 1362 | if (rval) { |
| 1363 | ql_dbg(ql_dbg_disc, vha, 0x2092, |
| 1364 | "%s *** FAILED ***.\n", __func__); |
| 1365 | } else { |
| 1366 | ql_dbg(ql_dbg_disc, vha, 0x2093, |
| 1367 | "%s: exiting normally.\n", __func__); |
| 1368 | } |
| 1369 | return rval; |
| 1370 | } |
| 1371 | |
| 1372 | static void |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1373 | qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1374 | { |
| 1375 | struct qla_hw_data *ha = vha->hw; |
| 1376 | fc_port_t *fcport; |
| 1377 | |
| 1378 | vha->flags.online = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1379 | ha->mr.fw_hbt_en = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1380 | |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1381 | if (!critemp) { |
| 1382 | ha->flags.chip_reset_done = 0; |
| 1383 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 1384 | vha->qla_stats.total_isp_aborts++; |
| 1385 | ql_log(ql_log_info, vha, 0x013f, |
| 1386 | "Performing ISP error recovery - ha = %p.\n", ha); |
| 1387 | ha->isp_ops->reset_chip(vha); |
| 1388 | } |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1389 | |
| 1390 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
| 1391 | atomic_set(&vha->loop_state, LOOP_DOWN); |
| 1392 | atomic_set(&vha->loop_down_timer, |
| 1393 | QLAFX00_LOOP_DOWN_TIME); |
| 1394 | } else { |
| 1395 | if (!atomic_read(&vha->loop_down_timer)) |
| 1396 | atomic_set(&vha->loop_down_timer, |
| 1397 | QLAFX00_LOOP_DOWN_TIME); |
| 1398 | } |
| 1399 | |
| 1400 | /* Clear all async request states across all VPs. */ |
| 1401 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 1402 | fcport->flags = 0; |
| 1403 | if (atomic_read(&fcport->state) == FCS_ONLINE) |
| 1404 | qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); |
| 1405 | } |
| 1406 | |
| 1407 | if (!ha->flags.eeh_busy) { |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1408 | if (critemp) { |
| 1409 | qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16); |
| 1410 | } else { |
| 1411 | /* Requeue all commands in outstanding command list. */ |
| 1412 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
| 1413 | } |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1414 | } |
| 1415 | |
| 1416 | qla2x00_free_irqs(vha); |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1417 | if (critemp) |
| 1418 | set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags); |
| 1419 | else |
| 1420 | set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1421 | |
| 1422 | /* Clear the Interrupts */ |
| 1423 | QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); |
| 1424 | |
| 1425 | ql_log(ql_log_info, vha, 0x0140, |
| 1426 | "%s Done done - ha=%p.\n", __func__, ha); |
| 1427 | } |
| 1428 | |
| 1429 | /** |
| 1430 | * qlafx00_init_response_q_entries() - Initializes response queue entries. |
| 1431 | * @ha: HA context |
| 1432 | * |
| 1433 | * Beginning of request ring has initialization control block already built |
| 1434 | * by nvram config routine. |
| 1435 | * |
| 1436 | * Returns 0 on success. |
| 1437 | */ |
| 1438 | void |
| 1439 | qlafx00_init_response_q_entries(struct rsp_que *rsp) |
| 1440 | { |
| 1441 | uint16_t cnt; |
| 1442 | response_t *pkt; |
| 1443 | |
| 1444 | rsp->ring_ptr = rsp->ring; |
| 1445 | rsp->ring_index = 0; |
| 1446 | rsp->status_srb = NULL; |
| 1447 | pkt = rsp->ring_ptr; |
| 1448 | for (cnt = 0; cnt < rsp->length; cnt++) { |
| 1449 | pkt->signature = RESPONSE_PROCESSED; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 1450 | WRT_REG_DWORD((void __iomem *)&pkt->signature, |
| 1451 | RESPONSE_PROCESSED); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1452 | pkt++; |
| 1453 | } |
| 1454 | } |
| 1455 | |
| 1456 | int |
| 1457 | qlafx00_rescan_isp(scsi_qla_host_t *vha) |
| 1458 | { |
| 1459 | uint32_t status = QLA_FUNCTION_FAILED; |
| 1460 | struct qla_hw_data *ha = vha->hw; |
| 1461 | struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; |
| 1462 | uint32_t aenmbx7; |
| 1463 | |
| 1464 | qla2x00_request_irqs(ha, ha->rsp_q_map[0]); |
| 1465 | |
| 1466 | aenmbx7 = RD_REG_DWORD(®->aenmailbox7); |
| 1467 | ha->mbx_intr_code = MSW(aenmbx7); |
| 1468 | ha->rqstq_intr_code = LSW(aenmbx7); |
| 1469 | ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); |
| 1470 | ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); |
| 1471 | ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); |
| 1472 | ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); |
| 1473 | |
| 1474 | ql_dbg(ql_dbg_disc, vha, 0x2094, |
| 1475 | "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x " |
| 1476 | " Req que offset 0x%x Rsp que offset 0x%x\n", |
| 1477 | ha->mbx_intr_code, ha->rqstq_intr_code, |
| 1478 | ha->req_que_off, ha->rsp_que_len); |
| 1479 | |
| 1480 | /* Clear the Interrupts */ |
| 1481 | QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); |
| 1482 | |
| 1483 | status = qla2x00_init_rings(vha); |
| 1484 | if (!status) { |
| 1485 | vha->flags.online = 1; |
| 1486 | |
| 1487 | /* if no cable then assume it's good */ |
| 1488 | if ((vha->device_flags & DFLG_NO_CABLE)) |
| 1489 | status = 0; |
| 1490 | /* Register system information */ |
| 1491 | if (qlafx00_fx_disc(vha, |
| 1492 | &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO)) |
| 1493 | ql_dbg(ql_dbg_disc, vha, 0x2095, |
| 1494 | "failed to register host info\n"); |
| 1495 | } |
| 1496 | scsi_unblock_requests(vha->host); |
| 1497 | return status; |
| 1498 | } |
| 1499 | |
| 1500 | void |
| 1501 | qlafx00_timer_routine(scsi_qla_host_t *vha) |
| 1502 | { |
| 1503 | struct qla_hw_data *ha = vha->hw; |
| 1504 | uint32_t fw_heart_beat; |
| 1505 | uint32_t aenmbx0; |
| 1506 | struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1507 | uint32_t tempc; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1508 | |
| 1509 | /* Check firmware health */ |
| 1510 | if (ha->mr.fw_hbt_cnt) |
| 1511 | ha->mr.fw_hbt_cnt--; |
| 1512 | else { |
| 1513 | if ((!ha->flags.mr_reset_hdlr_active) && |
| 1514 | (!test_bit(UNLOADING, &vha->dpc_flags)) && |
| 1515 | (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && |
| 1516 | (ha->mr.fw_hbt_en)) { |
| 1517 | fw_heart_beat = RD_REG_DWORD(®->fwheartbeat); |
| 1518 | if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) { |
| 1519 | ha->mr.old_fw_hbt_cnt = fw_heart_beat; |
| 1520 | ha->mr.fw_hbt_miss_cnt = 0; |
| 1521 | } else { |
| 1522 | ha->mr.fw_hbt_miss_cnt++; |
| 1523 | if (ha->mr.fw_hbt_miss_cnt == |
| 1524 | QLAFX00_HEARTBEAT_MISS_CNT) { |
| 1525 | set_bit(ISP_ABORT_NEEDED, |
| 1526 | &vha->dpc_flags); |
| 1527 | qla2xxx_wake_dpc(vha); |
| 1528 | ha->mr.fw_hbt_miss_cnt = 0; |
| 1529 | } |
| 1530 | } |
| 1531 | } |
| 1532 | ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; |
| 1533 | } |
| 1534 | |
| 1535 | if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) { |
| 1536 | /* Reset recovery to be performed in timer routine */ |
| 1537 | aenmbx0 = RD_REG_DWORD(®->aenmailbox0); |
| 1538 | if (ha->mr.fw_reset_timer_exp) { |
| 1539 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 1540 | qla2xxx_wake_dpc(vha); |
| 1541 | ha->mr.fw_reset_timer_exp = 0; |
| 1542 | } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) { |
| 1543 | /* Wake up DPC to rescan the targets */ |
| 1544 | set_bit(FX00_TARGET_SCAN, &vha->dpc_flags); |
| 1545 | clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); |
| 1546 | qla2xxx_wake_dpc(vha); |
| 1547 | ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; |
| 1548 | } else if ((aenmbx0 == MBA_FW_STARTING) && |
| 1549 | (!ha->mr.fw_hbt_en)) { |
| 1550 | ha->mr.fw_hbt_en = 1; |
| 1551 | } else if (!ha->mr.fw_reset_timer_tick) { |
| 1552 | if (aenmbx0 == ha->mr.old_aenmbx0_state) |
| 1553 | ha->mr.fw_reset_timer_exp = 1; |
| 1554 | ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; |
| 1555 | } else if (aenmbx0 == 0xFFFFFFFF) { |
| 1556 | uint32_t data0, data1; |
| 1557 | |
| 1558 | data0 = QLAFX00_RD_REG(ha, |
| 1559 | QLAFX00_BAR1_BASE_ADDR_REG); |
| 1560 | data1 = QLAFX00_RD_REG(ha, |
| 1561 | QLAFX00_PEX0_WIN0_BASE_ADDR_REG); |
| 1562 | |
| 1563 | data0 &= 0xffff0000; |
| 1564 | data1 &= 0x0000ffff; |
| 1565 | |
| 1566 | QLAFX00_WR_REG(ha, |
| 1567 | QLAFX00_PEX0_WIN0_BASE_ADDR_REG, |
| 1568 | (data0 | data1)); |
| 1569 | } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) { |
| 1570 | ha->mr.fw_reset_timer_tick = |
| 1571 | QLAFX00_MAX_RESET_INTERVAL; |
Armen Baloyan | b6511d9 | 2013-08-27 01:37:31 -0400 | [diff] [blame] | 1572 | } else if (aenmbx0 == MBA_FW_RESET_FCT) { |
| 1573 | ha->mr.fw_reset_timer_tick = |
| 1574 | QLAFX00_MAX_RESET_INTERVAL; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1575 | } |
| 1576 | ha->mr.old_aenmbx0_state = aenmbx0; |
| 1577 | ha->mr.fw_reset_timer_tick--; |
| 1578 | } |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1579 | if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) { |
| 1580 | /* |
| 1581 | * Critical temperature recovery to be |
| 1582 | * performed in timer routine |
| 1583 | */ |
| 1584 | if (ha->mr.fw_critemp_timer_tick == 0) { |
| 1585 | tempc = QLAFX00_GET_TEMPERATURE(ha); |
Saurav Kashyap | 6ddcfef | 2013-08-27 01:37:53 -0400 | [diff] [blame] | 1586 | ql_dbg(ql_dbg_timer, vha, 0x6012, |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1587 | "ISPFx00(%s): Critical temp timer, " |
| 1588 | "current SOC temperature: %d\n", |
| 1589 | __func__, tempc); |
| 1590 | if (tempc < ha->mr.critical_temperature) { |
| 1591 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 1592 | clear_bit(FX00_CRITEMP_RECOVERY, |
| 1593 | &vha->dpc_flags); |
| 1594 | qla2xxx_wake_dpc(vha); |
| 1595 | } |
| 1596 | ha->mr.fw_critemp_timer_tick = |
| 1597 | QLAFX00_CRITEMP_INTERVAL; |
| 1598 | } else { |
| 1599 | ha->mr.fw_critemp_timer_tick--; |
| 1600 | } |
| 1601 | } |
Armen Baloyan | e8f5e95 | 2013-10-30 03:38:17 -0400 | [diff] [blame] | 1602 | if (ha->mr.host_info_resend) { |
| 1603 | /* |
| 1604 | * Incomplete host info might be sent to firmware |
| 1605 | * durinng system boot - info should be resend |
| 1606 | */ |
| 1607 | if (ha->mr.hinfo_resend_timer_tick == 0) { |
| 1608 | ha->mr.host_info_resend = false; |
| 1609 | set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags); |
| 1610 | ha->mr.hinfo_resend_timer_tick = |
| 1611 | QLAFX00_HINFO_RESEND_INTERVAL; |
| 1612 | qla2xxx_wake_dpc(vha); |
| 1613 | } else { |
| 1614 | ha->mr.hinfo_resend_timer_tick--; |
| 1615 | } |
| 1616 | } |
| 1617 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1618 | } |
| 1619 | |
| 1620 | /* |
| 1621 | * qlfx00a_reset_initialize |
| 1622 | * Re-initialize after a iSA device reset. |
| 1623 | * |
| 1624 | * Input: |
| 1625 | * ha = adapter block pointer. |
| 1626 | * |
| 1627 | * Returns: |
| 1628 | * 0 = success |
| 1629 | */ |
| 1630 | int |
| 1631 | qlafx00_reset_initialize(scsi_qla_host_t *vha) |
| 1632 | { |
| 1633 | struct qla_hw_data *ha = vha->hw; |
| 1634 | |
| 1635 | if (vha->device_flags & DFLG_DEV_FAILED) { |
| 1636 | ql_dbg(ql_dbg_init, vha, 0x0142, |
| 1637 | "Device in failed state\n"); |
| 1638 | return QLA_SUCCESS; |
| 1639 | } |
| 1640 | |
| 1641 | ha->flags.mr_reset_hdlr_active = 1; |
| 1642 | |
| 1643 | if (vha->flags.online) { |
| 1644 | scsi_block_requests(vha->host); |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1645 | qlafx00_abort_isp_cleanup(vha, false); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1646 | } |
| 1647 | |
| 1648 | ql_log(ql_log_info, vha, 0x0143, |
| 1649 | "(%s): succeeded.\n", __func__); |
| 1650 | ha->flags.mr_reset_hdlr_active = 0; |
| 1651 | return QLA_SUCCESS; |
| 1652 | } |
| 1653 | |
| 1654 | /* |
| 1655 | * qlafx00_abort_isp |
| 1656 | * Resets ISP and aborts all outstanding commands. |
| 1657 | * |
| 1658 | * Input: |
| 1659 | * ha = adapter block pointer. |
| 1660 | * |
| 1661 | * Returns: |
| 1662 | * 0 = success |
| 1663 | */ |
| 1664 | int |
| 1665 | qlafx00_abort_isp(scsi_qla_host_t *vha) |
| 1666 | { |
| 1667 | struct qla_hw_data *ha = vha->hw; |
| 1668 | |
| 1669 | if (vha->flags.online) { |
| 1670 | if (unlikely(pci_channel_offline(ha->pdev) && |
| 1671 | ha->flags.pci_channel_io_perm_failure)) { |
| 1672 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
| 1673 | return QLA_SUCCESS; |
| 1674 | } |
| 1675 | |
| 1676 | scsi_block_requests(vha->host); |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1677 | qlafx00_abort_isp_cleanup(vha, false); |
Armen Baloyan | e601d77 | 2013-08-27 01:37:32 -0400 | [diff] [blame] | 1678 | } else { |
| 1679 | scsi_block_requests(vha->host); |
| 1680 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 1681 | vha->qla_stats.total_isp_aborts++; |
| 1682 | ha->isp_ops->reset_chip(vha); |
| 1683 | set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); |
| 1684 | /* Clear the Interrupts */ |
| 1685 | QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1686 | } |
| 1687 | |
| 1688 | ql_log(ql_log_info, vha, 0x0145, |
| 1689 | "(%s): succeeded.\n", __func__); |
| 1690 | |
| 1691 | return QLA_SUCCESS; |
| 1692 | } |
| 1693 | |
| 1694 | static inline fc_port_t* |
| 1695 | qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id) |
| 1696 | { |
| 1697 | fc_port_t *fcport; |
| 1698 | |
| 1699 | /* Check for matching device in remote port list. */ |
| 1700 | fcport = NULL; |
| 1701 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 1702 | if (fcport->tgt_id == tgt_id) { |
| 1703 | ql_dbg(ql_dbg_async, vha, 0x5072, |
| 1704 | "Matching fcport(%p) found with TGT-ID: 0x%x " |
| 1705 | "and Remote TGT_ID: 0x%x\n", |
| 1706 | fcport, fcport->tgt_id, tgt_id); |
| 1707 | break; |
| 1708 | } |
| 1709 | } |
| 1710 | return fcport; |
| 1711 | } |
| 1712 | |
| 1713 | static void |
| 1714 | qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id) |
| 1715 | { |
| 1716 | fc_port_t *fcport; |
| 1717 | |
| 1718 | ql_log(ql_log_info, vha, 0x5073, |
| 1719 | "Detach TGT-ID: 0x%x\n", tgt_id); |
| 1720 | |
| 1721 | fcport = qlafx00_get_fcport(vha, tgt_id); |
| 1722 | if (!fcport) |
| 1723 | return; |
| 1724 | |
| 1725 | qla2x00_mark_device_lost(vha, fcport, 0, 0); |
| 1726 | |
| 1727 | return; |
| 1728 | } |
| 1729 | |
| 1730 | int |
| 1731 | qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt) |
| 1732 | { |
| 1733 | int rval = 0; |
| 1734 | uint32_t aen_code, aen_data; |
| 1735 | |
| 1736 | aen_code = FCH_EVT_VENDOR_UNIQUE; |
| 1737 | aen_data = evt->u.aenfx.evtcode; |
| 1738 | |
| 1739 | switch (evt->u.aenfx.evtcode) { |
| 1740 | case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ |
| 1741 | if (evt->u.aenfx.mbx[1] == 0) { |
| 1742 | if (evt->u.aenfx.mbx[2] == 1) { |
| 1743 | if (!vha->flags.fw_tgt_reported) |
| 1744 | vha->flags.fw_tgt_reported = 1; |
| 1745 | atomic_set(&vha->loop_down_timer, 0); |
| 1746 | atomic_set(&vha->loop_state, LOOP_UP); |
| 1747 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1748 | qla2xxx_wake_dpc(vha); |
| 1749 | } else if (evt->u.aenfx.mbx[2] == 2) { |
| 1750 | qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]); |
| 1751 | } |
| 1752 | } else if (evt->u.aenfx.mbx[1] == 0xffff) { |
| 1753 | if (evt->u.aenfx.mbx[2] == 1) { |
| 1754 | if (!vha->flags.fw_tgt_reported) |
| 1755 | vha->flags.fw_tgt_reported = 1; |
| 1756 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
| 1757 | } else if (evt->u.aenfx.mbx[2] == 2) { |
| 1758 | vha->device_flags |= DFLG_NO_CABLE; |
| 1759 | qla2x00_mark_all_devices_lost(vha, 1); |
| 1760 | } |
| 1761 | } |
| 1762 | break; |
| 1763 | case QLAFX00_MBA_LINK_UP: |
| 1764 | aen_code = FCH_EVT_LINKUP; |
| 1765 | aen_data = 0; |
| 1766 | break; |
| 1767 | case QLAFX00_MBA_LINK_DOWN: |
| 1768 | aen_code = FCH_EVT_LINKDOWN; |
| 1769 | aen_data = 0; |
| 1770 | break; |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 1771 | case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ |
| 1772 | ql_log(ql_log_info, vha, 0x5082, |
| 1773 | "Process critical temperature event " |
| 1774 | "aenmb[0]: %x\n", |
| 1775 | evt->u.aenfx.evtcode); |
| 1776 | scsi_block_requests(vha->host); |
| 1777 | qlafx00_abort_isp_cleanup(vha, true); |
| 1778 | scsi_unblock_requests(vha->host); |
| 1779 | break; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1780 | } |
| 1781 | |
| 1782 | fc_host_post_event(vha->host, fc_get_event_number(), |
| 1783 | aen_code, aen_data); |
| 1784 | |
| 1785 | return rval; |
| 1786 | } |
| 1787 | |
| 1788 | static void |
| 1789 | qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo) |
| 1790 | { |
| 1791 | u64 port_name = 0, node_name = 0; |
| 1792 | |
| 1793 | port_name = (unsigned long long)wwn_to_u64(pinfo->port_name); |
| 1794 | node_name = (unsigned long long)wwn_to_u64(pinfo->node_name); |
| 1795 | |
| 1796 | fc_host_node_name(vha->host) = node_name; |
| 1797 | fc_host_port_name(vha->host) = port_name; |
| 1798 | if (!pinfo->port_type) |
| 1799 | vha->hw->current_topology = ISP_CFG_F; |
| 1800 | if (pinfo->link_status == QLAFX00_LINK_STATUS_UP) |
| 1801 | atomic_set(&vha->loop_state, LOOP_READY); |
| 1802 | else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN) |
| 1803 | atomic_set(&vha->loop_state, LOOP_DOWN); |
| 1804 | vha->hw->link_data_rate = (uint16_t)pinfo->link_config; |
| 1805 | } |
| 1806 | |
| 1807 | static void |
| 1808 | qla2x00_fxdisc_iocb_timeout(void *data) |
| 1809 | { |
| 1810 | srb_t *sp = (srb_t *)data; |
| 1811 | struct srb_iocb *lio = &sp->u.iocb_cmd; |
| 1812 | |
| 1813 | complete(&lio->u.fxiocb.fxiocb_comp); |
| 1814 | } |
| 1815 | |
| 1816 | static void |
| 1817 | qla2x00_fxdisc_sp_done(void *data, void *ptr, int res) |
| 1818 | { |
| 1819 | srb_t *sp = (srb_t *)ptr; |
| 1820 | struct srb_iocb *lio = &sp->u.iocb_cmd; |
| 1821 | |
| 1822 | complete(&lio->u.fxiocb.fxiocb_comp); |
| 1823 | } |
| 1824 | |
| 1825 | int |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 1826 | qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1827 | { |
| 1828 | srb_t *sp; |
| 1829 | struct srb_iocb *fdisc; |
| 1830 | int rval = QLA_FUNCTION_FAILED; |
| 1831 | struct qla_hw_data *ha = vha->hw; |
| 1832 | struct host_system_info *phost_info; |
| 1833 | struct register_host_info *preg_hsi; |
| 1834 | struct new_utsname *p_sysid = NULL; |
| 1835 | struct timeval tv; |
| 1836 | |
| 1837 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
| 1838 | if (!sp) |
| 1839 | goto done; |
| 1840 | |
| 1841 | fdisc = &sp->u.iocb_cmd; |
| 1842 | switch (fx_type) { |
| 1843 | case FXDISC_GET_CONFIG_INFO: |
| 1844 | fdisc->u.fxiocb.flags = |
| 1845 | SRB_FXDISC_RESP_DMA_VALID; |
| 1846 | fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data); |
| 1847 | break; |
| 1848 | case FXDISC_GET_PORT_INFO: |
| 1849 | fdisc->u.fxiocb.flags = |
| 1850 | SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; |
| 1851 | fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 1852 | fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1853 | break; |
| 1854 | case FXDISC_GET_TGT_NODE_INFO: |
| 1855 | fdisc->u.fxiocb.flags = |
| 1856 | SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; |
| 1857 | fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 1858 | fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1859 | break; |
| 1860 | case FXDISC_GET_TGT_NODE_LIST: |
| 1861 | fdisc->u.fxiocb.flags = |
| 1862 | SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; |
| 1863 | fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE; |
| 1864 | break; |
| 1865 | case FXDISC_REG_HOST_INFO: |
| 1866 | fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID; |
| 1867 | fdisc->u.fxiocb.req_len = sizeof(struct register_host_info); |
| 1868 | p_sysid = utsname(); |
| 1869 | if (!p_sysid) { |
| 1870 | ql_log(ql_log_warn, vha, 0x303c, |
Masanari Iida | 0b1587b | 2013-07-17 04:37:44 +0900 | [diff] [blame] | 1871 | "Not able to get the system information\n"); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1872 | goto done_free_sp; |
| 1873 | } |
| 1874 | break; |
Armen Baloyan | 767157c | 2013-10-30 03:38:21 -0400 | [diff] [blame] | 1875 | case FXDISC_ABORT_IOCTL: |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1876 | default: |
| 1877 | break; |
| 1878 | } |
| 1879 | |
| 1880 | if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { |
| 1881 | fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev, |
| 1882 | fdisc->u.fxiocb.req_len, |
| 1883 | &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL); |
| 1884 | if (!fdisc->u.fxiocb.req_addr) |
| 1885 | goto done_free_sp; |
| 1886 | |
| 1887 | if (fx_type == FXDISC_REG_HOST_INFO) { |
| 1888 | preg_hsi = (struct register_host_info *) |
| 1889 | fdisc->u.fxiocb.req_addr; |
| 1890 | phost_info = &preg_hsi->hsi; |
| 1891 | memset(preg_hsi, 0, sizeof(struct register_host_info)); |
| 1892 | phost_info->os_type = OS_TYPE_LINUX; |
| 1893 | strncpy(phost_info->sysname, |
| 1894 | p_sysid->sysname, SYSNAME_LENGTH); |
| 1895 | strncpy(phost_info->nodename, |
| 1896 | p_sysid->nodename, NODENAME_LENGTH); |
Armen Baloyan | e8f5e95 | 2013-10-30 03:38:17 -0400 | [diff] [blame] | 1897 | if (!strcmp(phost_info->nodename, "(none)")) |
| 1898 | ha->mr.host_info_resend = true; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1899 | strncpy(phost_info->release, |
| 1900 | p_sysid->release, RELEASE_LENGTH); |
| 1901 | strncpy(phost_info->version, |
| 1902 | p_sysid->version, VERSION_LENGTH); |
| 1903 | strncpy(phost_info->machine, |
| 1904 | p_sysid->machine, MACHINE_LENGTH); |
| 1905 | strncpy(phost_info->domainname, |
| 1906 | p_sysid->domainname, DOMNAME_LENGTH); |
| 1907 | strncpy(phost_info->hostdriver, |
| 1908 | QLA2XXX_VERSION, VERSION_LENGTH); |
| 1909 | do_gettimeofday(&tv); |
| 1910 | preg_hsi->utc = (uint64_t)tv.tv_sec; |
| 1911 | ql_dbg(ql_dbg_init, vha, 0x0149, |
| 1912 | "ISP%04X: Host registration with firmware\n", |
| 1913 | ha->pdev->device); |
| 1914 | ql_dbg(ql_dbg_init, vha, 0x014a, |
| 1915 | "os_type = '%d', sysname = '%s', nodname = '%s'\n", |
| 1916 | phost_info->os_type, |
| 1917 | phost_info->sysname, |
| 1918 | phost_info->nodename); |
| 1919 | ql_dbg(ql_dbg_init, vha, 0x014b, |
| 1920 | "release = '%s', version = '%s'\n", |
| 1921 | phost_info->release, |
| 1922 | phost_info->version); |
| 1923 | ql_dbg(ql_dbg_init, vha, 0x014c, |
| 1924 | "machine = '%s' " |
| 1925 | "domainname = '%s', hostdriver = '%s'\n", |
| 1926 | phost_info->machine, |
| 1927 | phost_info->domainname, |
| 1928 | phost_info->hostdriver); |
| 1929 | ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d, |
| 1930 | (uint8_t *)phost_info, |
| 1931 | sizeof(struct host_system_info)); |
| 1932 | } |
| 1933 | } |
| 1934 | |
| 1935 | if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { |
| 1936 | fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev, |
| 1937 | fdisc->u.fxiocb.rsp_len, |
| 1938 | &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL); |
| 1939 | if (!fdisc->u.fxiocb.rsp_addr) |
| 1940 | goto done_unmap_req; |
| 1941 | } |
| 1942 | |
| 1943 | sp->type = SRB_FXIOCB_DCMD; |
| 1944 | sp->name = "fxdisc"; |
| 1945 | qla2x00_init_timer(sp, FXDISC_TIMEOUT); |
| 1946 | fdisc->timeout = qla2x00_fxdisc_iocb_timeout; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 1947 | fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1948 | sp->done = qla2x00_fxdisc_sp_done; |
| 1949 | |
| 1950 | rval = qla2x00_start_sp(sp); |
| 1951 | if (rval != QLA_SUCCESS) |
| 1952 | goto done_unmap_dma; |
| 1953 | |
| 1954 | wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp); |
| 1955 | |
| 1956 | if (fx_type == FXDISC_GET_CONFIG_INFO) { |
| 1957 | struct config_info_data *pinfo = |
| 1958 | (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; |
Armen Baloyan | 03eb912 | 2013-10-30 03:38:22 -0400 | [diff] [blame] | 1959 | strcpy(vha->hw->model_number, pinfo->model_num); |
| 1960 | strcpy(vha->hw->model_desc, pinfo->model_description); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1961 | memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, |
| 1962 | sizeof(vha->hw->mr.symbolic_name)); |
| 1963 | memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, |
| 1964 | sizeof(vha->hw->mr.serial_num)); |
| 1965 | memcpy(&vha->hw->mr.hw_version, pinfo->hw_version, |
| 1966 | sizeof(vha->hw->mr.hw_version)); |
| 1967 | memcpy(&vha->hw->mr.fw_version, pinfo->fw_version, |
| 1968 | sizeof(vha->hw->mr.fw_version)); |
| 1969 | strim(vha->hw->mr.fw_version); |
| 1970 | memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version, |
| 1971 | sizeof(vha->hw->mr.uboot_version)); |
| 1972 | memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num, |
| 1973 | sizeof(vha->hw->mr.fru_serial_num)); |
Armen Baloyan | f875cd4 | 2013-08-27 01:37:47 -0400 | [diff] [blame] | 1974 | vha->hw->mr.critical_temperature = |
| 1975 | (pinfo->nominal_temp_value) ? |
| 1976 | pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD; |
Armen Baloyan | 1fe19ee | 2013-08-27 01:37:41 -0400 | [diff] [blame] | 1977 | ha->mr.extended_io_enabled = (pinfo->enabled_capabilities & |
| 1978 | QLAFX00_EXTENDED_IO_EN_MASK) != 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 1979 | } else if (fx_type == FXDISC_GET_PORT_INFO) { |
| 1980 | struct port_info_data *pinfo = |
| 1981 | (struct port_info_data *) fdisc->u.fxiocb.rsp_addr; |
| 1982 | memcpy(vha->node_name, pinfo->node_name, WWN_SIZE); |
| 1983 | memcpy(vha->port_name, pinfo->port_name, WWN_SIZE); |
| 1984 | vha->d_id.b.domain = pinfo->port_id[0]; |
| 1985 | vha->d_id.b.area = pinfo->port_id[1]; |
| 1986 | vha->d_id.b.al_pa = pinfo->port_id[2]; |
| 1987 | qlafx00_update_host_attr(vha, pinfo); |
| 1988 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141, |
| 1989 | (uint8_t *)pinfo, 16); |
| 1990 | } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) { |
| 1991 | struct qlafx00_tgt_node_info *pinfo = |
| 1992 | (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; |
| 1993 | memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE); |
| 1994 | memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE); |
| 1995 | fcport->port_type = FCT_TARGET; |
| 1996 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144, |
| 1997 | (uint8_t *)pinfo, 16); |
| 1998 | } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) { |
| 1999 | struct qlafx00_tgt_node_info *pinfo = |
| 2000 | (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; |
| 2001 | ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, |
| 2002 | (uint8_t *)pinfo, 16); |
| 2003 | memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); |
Armen Baloyan | 767157c | 2013-10-30 03:38:21 -0400 | [diff] [blame] | 2004 | } else if (fx_type == FXDISC_ABORT_IOCTL) |
| 2005 | fdisc->u.fxiocb.result = |
Armen Baloyan | b593931 | 2014-02-26 04:14:58 -0500 | [diff] [blame] | 2006 | (fdisc->u.fxiocb.result == |
| 2007 | cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ? |
Armen Baloyan | 767157c | 2013-10-30 03:38:21 -0400 | [diff] [blame] | 2008 | cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED); |
| 2009 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2010 | rval = le32_to_cpu(fdisc->u.fxiocb.result); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2011 | |
| 2012 | done_unmap_dma: |
| 2013 | if (fdisc->u.fxiocb.rsp_addr) |
| 2014 | dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len, |
| 2015 | fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle); |
| 2016 | |
| 2017 | done_unmap_req: |
| 2018 | if (fdisc->u.fxiocb.req_addr) |
| 2019 | dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len, |
| 2020 | fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle); |
| 2021 | done_free_sp: |
| 2022 | sp->free(vha, sp); |
| 2023 | done: |
| 2024 | return rval; |
| 2025 | } |
| 2026 | |
| 2027 | static void |
| 2028 | qlafx00_abort_iocb_timeout(void *data) |
| 2029 | { |
| 2030 | srb_t *sp = (srb_t *)data; |
| 2031 | struct srb_iocb *abt = &sp->u.iocb_cmd; |
| 2032 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2033 | abt->u.abt.comp_status = cpu_to_le16((uint16_t)CS_TIMEOUT); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2034 | complete(&abt->u.abt.comp); |
| 2035 | } |
| 2036 | |
| 2037 | static void |
| 2038 | qlafx00_abort_sp_done(void *data, void *ptr, int res) |
| 2039 | { |
| 2040 | srb_t *sp = (srb_t *)ptr; |
| 2041 | struct srb_iocb *abt = &sp->u.iocb_cmd; |
| 2042 | |
| 2043 | complete(&abt->u.abt.comp); |
| 2044 | } |
| 2045 | |
| 2046 | static int |
| 2047 | qlafx00_async_abt_cmd(srb_t *cmd_sp) |
| 2048 | { |
| 2049 | scsi_qla_host_t *vha = cmd_sp->fcport->vha; |
| 2050 | fc_port_t *fcport = cmd_sp->fcport; |
| 2051 | struct srb_iocb *abt_iocb; |
| 2052 | srb_t *sp; |
| 2053 | int rval = QLA_FUNCTION_FAILED; |
| 2054 | |
| 2055 | sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); |
| 2056 | if (!sp) |
| 2057 | goto done; |
| 2058 | |
| 2059 | abt_iocb = &sp->u.iocb_cmd; |
| 2060 | sp->type = SRB_ABT_CMD; |
| 2061 | sp->name = "abort"; |
| 2062 | qla2x00_init_timer(sp, FXDISC_TIMEOUT); |
| 2063 | abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; |
| 2064 | sp->done = qlafx00_abort_sp_done; |
| 2065 | abt_iocb->timeout = qlafx00_abort_iocb_timeout; |
| 2066 | init_completion(&abt_iocb->u.abt.comp); |
| 2067 | |
| 2068 | rval = qla2x00_start_sp(sp); |
| 2069 | if (rval != QLA_SUCCESS) |
| 2070 | goto done_free_sp; |
| 2071 | |
| 2072 | ql_dbg(ql_dbg_async, vha, 0x507c, |
| 2073 | "Abort command issued - hdl=%x, target_id=%x\n", |
| 2074 | cmd_sp->handle, fcport->tgt_id); |
| 2075 | |
| 2076 | wait_for_completion(&abt_iocb->u.abt.comp); |
| 2077 | |
| 2078 | rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? |
| 2079 | QLA_SUCCESS : QLA_FUNCTION_FAILED; |
| 2080 | |
| 2081 | done_free_sp: |
| 2082 | sp->free(vha, sp); |
| 2083 | done: |
| 2084 | return rval; |
| 2085 | } |
| 2086 | |
| 2087 | int |
| 2088 | qlafx00_abort_command(srb_t *sp) |
| 2089 | { |
| 2090 | unsigned long flags = 0; |
| 2091 | |
| 2092 | uint32_t handle; |
| 2093 | fc_port_t *fcport = sp->fcport; |
| 2094 | struct scsi_qla_host *vha = fcport->vha; |
| 2095 | struct qla_hw_data *ha = vha->hw; |
| 2096 | struct req_que *req = vha->req; |
| 2097 | |
| 2098 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 2099 | for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) { |
| 2100 | if (req->outstanding_cmds[handle] == sp) |
| 2101 | break; |
| 2102 | } |
| 2103 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 2104 | if (handle == DEFAULT_OUTSTANDING_COMMANDS) { |
| 2105 | /* Command not found. */ |
| 2106 | return QLA_FUNCTION_FAILED; |
| 2107 | } |
Armen Baloyan | 767157c | 2013-10-30 03:38:21 -0400 | [diff] [blame] | 2108 | if (sp->type == SRB_FXIOCB_DCMD) |
| 2109 | return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, |
| 2110 | FXDISC_ABORT_IOCTL); |
| 2111 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2112 | return qlafx00_async_abt_cmd(sp); |
| 2113 | } |
| 2114 | |
| 2115 | /* |
| 2116 | * qlafx00_initialize_adapter |
| 2117 | * Initialize board. |
| 2118 | * |
| 2119 | * Input: |
| 2120 | * ha = adapter block pointer. |
| 2121 | * |
| 2122 | * Returns: |
| 2123 | * 0 = success |
| 2124 | */ |
| 2125 | int |
| 2126 | qlafx00_initialize_adapter(scsi_qla_host_t *vha) |
| 2127 | { |
| 2128 | int rval; |
| 2129 | struct qla_hw_data *ha = vha->hw; |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 2130 | uint32_t tempc; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2131 | |
| 2132 | /* Clear adapter flags. */ |
| 2133 | vha->flags.online = 0; |
| 2134 | ha->flags.chip_reset_done = 0; |
| 2135 | vha->flags.reset_active = 0; |
| 2136 | ha->flags.pci_channel_io_perm_failure = 0; |
| 2137 | ha->flags.eeh_busy = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2138 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
| 2139 | atomic_set(&vha->loop_state, LOOP_DOWN); |
| 2140 | vha->device_flags = DFLG_NO_CABLE; |
| 2141 | vha->dpc_flags = 0; |
| 2142 | vha->flags.management_server_logged_in = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2143 | ha->isp_abort_cnt = 0; |
| 2144 | ha->beacon_blink_led = 0; |
| 2145 | |
| 2146 | set_bit(0, ha->req_qid_map); |
| 2147 | set_bit(0, ha->rsp_qid_map); |
| 2148 | |
| 2149 | ql_dbg(ql_dbg_init, vha, 0x0147, |
| 2150 | "Configuring PCI space...\n"); |
| 2151 | |
| 2152 | rval = ha->isp_ops->pci_config(vha); |
| 2153 | if (rval) { |
| 2154 | ql_log(ql_log_warn, vha, 0x0148, |
| 2155 | "Unable to configure PCI space.\n"); |
| 2156 | return rval; |
| 2157 | } |
| 2158 | |
| 2159 | rval = qlafx00_init_fw_ready(vha); |
| 2160 | if (rval != QLA_SUCCESS) |
| 2161 | return rval; |
| 2162 | |
| 2163 | qlafx00_save_queue_ptrs(vha); |
| 2164 | |
| 2165 | rval = qlafx00_config_queues(vha); |
| 2166 | if (rval != QLA_SUCCESS) |
| 2167 | return rval; |
| 2168 | |
| 2169 | /* |
| 2170 | * Allocate the array of outstanding commands |
| 2171 | * now that we know the firmware resources. |
| 2172 | */ |
| 2173 | rval = qla2x00_alloc_outstanding_cmds(ha, vha->req); |
| 2174 | if (rval != QLA_SUCCESS) |
| 2175 | return rval; |
| 2176 | |
| 2177 | rval = qla2x00_init_rings(vha); |
| 2178 | ha->flags.chip_reset_done = 1; |
| 2179 | |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 2180 | tempc = QLAFX00_GET_TEMPERATURE(ha); |
| 2181 | ql_dbg(ql_dbg_init, vha, 0x0152, |
| 2182 | "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n", |
| 2183 | __func__, tempc); |
| 2184 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2185 | return rval; |
| 2186 | } |
| 2187 | |
| 2188 | uint32_t |
| 2189 | qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr, |
| 2190 | char *buf) |
| 2191 | { |
| 2192 | scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); |
| 2193 | int rval = QLA_FUNCTION_FAILED; |
| 2194 | uint32_t state[1]; |
| 2195 | |
| 2196 | if (qla2x00_reset_active(vha)) |
| 2197 | ql_log(ql_log_warn, vha, 0x70ce, |
| 2198 | "ISP reset active.\n"); |
| 2199 | else if (!vha->hw->flags.eeh_busy) { |
| 2200 | rval = qlafx00_get_firmware_state(vha, state); |
| 2201 | } |
| 2202 | if (rval != QLA_SUCCESS) |
| 2203 | memset(state, -1, sizeof(state)); |
| 2204 | |
| 2205 | return state[0]; |
| 2206 | } |
| 2207 | |
| 2208 | void |
| 2209 | qlafx00_get_host_speed(struct Scsi_Host *shost) |
| 2210 | { |
| 2211 | struct qla_hw_data *ha = ((struct scsi_qla_host *) |
| 2212 | (shost_priv(shost)))->hw; |
| 2213 | u32 speed = FC_PORTSPEED_UNKNOWN; |
| 2214 | |
| 2215 | switch (ha->link_data_rate) { |
| 2216 | case QLAFX00_PORT_SPEED_2G: |
| 2217 | speed = FC_PORTSPEED_2GBIT; |
| 2218 | break; |
| 2219 | case QLAFX00_PORT_SPEED_4G: |
| 2220 | speed = FC_PORTSPEED_4GBIT; |
| 2221 | break; |
| 2222 | case QLAFX00_PORT_SPEED_8G: |
| 2223 | speed = FC_PORTSPEED_8GBIT; |
| 2224 | break; |
| 2225 | case QLAFX00_PORT_SPEED_10G: |
| 2226 | speed = FC_PORTSPEED_10GBIT; |
| 2227 | break; |
| 2228 | } |
| 2229 | fc_host_speed(shost) = speed; |
| 2230 | } |
| 2231 | |
| 2232 | /** QLAFX00 specific ISR implementation functions */ |
| 2233 | |
| 2234 | static inline void |
| 2235 | qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
| 2236 | uint32_t sense_len, struct rsp_que *rsp, int res) |
| 2237 | { |
| 2238 | struct scsi_qla_host *vha = sp->fcport->vha; |
| 2239 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
| 2240 | uint32_t track_sense_len; |
| 2241 | |
| 2242 | SET_FW_SENSE_LEN(sp, sense_len); |
| 2243 | |
| 2244 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) |
| 2245 | sense_len = SCSI_SENSE_BUFFERSIZE; |
| 2246 | |
| 2247 | SET_CMD_SENSE_LEN(sp, sense_len); |
| 2248 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); |
| 2249 | track_sense_len = sense_len; |
| 2250 | |
| 2251 | if (sense_len > par_sense_len) |
| 2252 | sense_len = par_sense_len; |
| 2253 | |
| 2254 | memcpy(cp->sense_buffer, sense_data, sense_len); |
| 2255 | |
| 2256 | SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len); |
| 2257 | |
| 2258 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
| 2259 | track_sense_len -= sense_len; |
| 2260 | SET_CMD_SENSE_LEN(sp, track_sense_len); |
| 2261 | |
| 2262 | ql_dbg(ql_dbg_io, vha, 0x304d, |
| 2263 | "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n", |
| 2264 | sense_len, par_sense_len, track_sense_len); |
| 2265 | if (GET_FW_SENSE_LEN(sp) > 0) { |
| 2266 | rsp->status_srb = sp; |
| 2267 | cp->result = res; |
| 2268 | } |
| 2269 | |
| 2270 | if (sense_len) { |
| 2271 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039, |
| 2272 | "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n", |
| 2273 | sp->fcport->vha->host_no, cp->device->id, cp->device->lun, |
| 2274 | cp); |
| 2275 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049, |
| 2276 | cp->sense_buffer, sense_len); |
| 2277 | } |
| 2278 | } |
| 2279 | |
| 2280 | static void |
| 2281 | qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, |
| 2282 | struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp, |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2283 | __le16 sstatus, __le16 cpstatus) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2284 | { |
| 2285 | struct srb_iocb *tmf; |
| 2286 | |
| 2287 | tmf = &sp->u.iocb_cmd; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2288 | if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) || |
| 2289 | (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID))) |
| 2290 | cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2291 | tmf->u.tmf.comp_status = cpstatus; |
| 2292 | sp->done(vha, sp, 0); |
| 2293 | } |
| 2294 | |
| 2295 | static void |
| 2296 | qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, |
| 2297 | struct abort_iocb_entry_fx00 *pkt) |
| 2298 | { |
| 2299 | const char func[] = "ABT_IOCB"; |
| 2300 | srb_t *sp; |
| 2301 | struct srb_iocb *abt; |
| 2302 | |
| 2303 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
| 2304 | if (!sp) |
| 2305 | return; |
| 2306 | |
| 2307 | abt = &sp->u.iocb_cmd; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2308 | abt->u.abt.comp_status = pkt->tgt_id_sts; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2309 | sp->done(vha, sp, 0); |
| 2310 | } |
| 2311 | |
| 2312 | static void |
| 2313 | qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req, |
| 2314 | struct ioctl_iocb_entry_fx00 *pkt) |
| 2315 | { |
| 2316 | const char func[] = "IOSB_IOCB"; |
| 2317 | srb_t *sp; |
| 2318 | struct fc_bsg_job *bsg_job; |
| 2319 | struct srb_iocb *iocb_job; |
| 2320 | int res; |
| 2321 | struct qla_mt_iocb_rsp_fx00 fstatus; |
| 2322 | uint8_t *fw_sts_ptr; |
| 2323 | |
| 2324 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
| 2325 | if (!sp) |
| 2326 | return; |
| 2327 | |
| 2328 | if (sp->type == SRB_FXIOCB_DCMD) { |
| 2329 | iocb_job = &sp->u.iocb_cmd; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2330 | iocb_job->u.fxiocb.seq_number = pkt->seq_no; |
| 2331 | iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags; |
| 2332 | iocb_job->u.fxiocb.result = pkt->status; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2333 | if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID) |
| 2334 | iocb_job->u.fxiocb.req_data = |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2335 | pkt->dataword_r; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2336 | } else { |
| 2337 | bsg_job = sp->u.bsg_job; |
| 2338 | |
| 2339 | memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00)); |
| 2340 | |
| 2341 | fstatus.reserved_1 = pkt->reserved_0; |
| 2342 | fstatus.func_type = pkt->comp_func_num; |
| 2343 | fstatus.ioctl_flags = pkt->fw_iotcl_flags; |
| 2344 | fstatus.ioctl_data = pkt->dataword_r; |
| 2345 | fstatus.adapid = pkt->adapid; |
Armen Baloyan | d68b3e0 | 2014-02-26 04:15:09 -0500 | [diff] [blame] | 2346 | fstatus.reserved_2 = pkt->dataword_r_extra; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2347 | fstatus.res_count = pkt->residuallen; |
| 2348 | fstatus.status = pkt->status; |
| 2349 | fstatus.seq_number = pkt->seq_no; |
| 2350 | memcpy(fstatus.reserved_3, |
| 2351 | pkt->reserved_2, 20 * sizeof(uint8_t)); |
| 2352 | |
| 2353 | fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) + |
| 2354 | sizeof(struct fc_bsg_reply); |
| 2355 | |
| 2356 | memcpy(fw_sts_ptr, (uint8_t *)&fstatus, |
| 2357 | sizeof(struct qla_mt_iocb_rsp_fx00)); |
| 2358 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + |
| 2359 | sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t); |
| 2360 | |
| 2361 | ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, |
| 2362 | sp->fcport->vha, 0x5080, |
| 2363 | (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00)); |
| 2364 | |
| 2365 | ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, |
| 2366 | sp->fcport->vha, 0x5074, |
| 2367 | (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00)); |
| 2368 | |
| 2369 | res = bsg_job->reply->result = DID_OK << 16; |
| 2370 | bsg_job->reply->reply_payload_rcv_len = |
| 2371 | bsg_job->reply_payload.payload_len; |
| 2372 | } |
| 2373 | sp->done(vha, sp, res); |
| 2374 | } |
| 2375 | |
| 2376 | /** |
| 2377 | * qlafx00_status_entry() - Process a Status IOCB entry. |
| 2378 | * @ha: SCSI driver HA context |
| 2379 | * @pkt: Entry pointer |
| 2380 | */ |
| 2381 | static void |
| 2382 | qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
| 2383 | { |
| 2384 | srb_t *sp; |
| 2385 | fc_port_t *fcport; |
| 2386 | struct scsi_cmnd *cp; |
| 2387 | struct sts_entry_fx00 *sts; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2388 | __le16 comp_status; |
| 2389 | __le16 scsi_status; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2390 | uint16_t ox_id; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2391 | __le16 lscsi_status; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2392 | int32_t resid; |
| 2393 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
| 2394 | fw_resid_len; |
| 2395 | uint8_t *rsp_info = NULL, *sense_data = NULL; |
| 2396 | struct qla_hw_data *ha = vha->hw; |
| 2397 | uint32_t hindex, handle; |
| 2398 | uint16_t que; |
| 2399 | struct req_que *req; |
| 2400 | int logit = 1; |
| 2401 | int res = 0; |
| 2402 | |
| 2403 | sts = (struct sts_entry_fx00 *) pkt; |
| 2404 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2405 | comp_status = sts->comp_status; |
| 2406 | scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2407 | hindex = sts->handle; |
| 2408 | handle = LSW(hindex); |
| 2409 | |
| 2410 | que = MSW(hindex); |
| 2411 | req = ha->req_q_map[que]; |
| 2412 | |
| 2413 | /* Validate handle. */ |
| 2414 | if (handle < req->num_outstanding_cmds) |
| 2415 | sp = req->outstanding_cmds[handle]; |
| 2416 | else |
| 2417 | sp = NULL; |
| 2418 | |
| 2419 | if (sp == NULL) { |
| 2420 | ql_dbg(ql_dbg_io, vha, 0x3034, |
| 2421 | "Invalid status handle (0x%x).\n", handle); |
| 2422 | |
| 2423 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2424 | qla2xxx_wake_dpc(vha); |
| 2425 | return; |
| 2426 | } |
| 2427 | |
| 2428 | if (sp->type == SRB_TM_CMD) { |
| 2429 | req->outstanding_cmds[handle] = NULL; |
| 2430 | qlafx00_tm_iocb_entry(vha, req, pkt, sp, |
| 2431 | scsi_status, comp_status); |
| 2432 | return; |
| 2433 | } |
| 2434 | |
| 2435 | /* Fast path completion. */ |
| 2436 | if (comp_status == CS_COMPLETE && scsi_status == 0) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2437 | qla2x00_process_completed_request(vha, req, handle); |
| 2438 | return; |
| 2439 | } |
| 2440 | |
| 2441 | req->outstanding_cmds[handle] = NULL; |
| 2442 | cp = GET_CMD_SP(sp); |
| 2443 | if (cp == NULL) { |
| 2444 | ql_dbg(ql_dbg_io, vha, 0x3048, |
| 2445 | "Command already returned (0x%x/%p).\n", |
| 2446 | handle, sp); |
| 2447 | |
| 2448 | return; |
| 2449 | } |
| 2450 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2451 | lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2452 | |
| 2453 | fcport = sp->fcport; |
| 2454 | |
| 2455 | ox_id = 0; |
| 2456 | sense_len = par_sense_len = rsp_info_len = resid_len = |
| 2457 | fw_resid_len = 0; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2458 | if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)) |
| 2459 | sense_len = sts->sense_len; |
| 2460 | if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER |
| 2461 | | (uint16_t)SS_RESIDUAL_OVER))) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2462 | resid_len = le32_to_cpu(sts->residual_len); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2463 | if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN)) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2464 | fw_resid_len = le32_to_cpu(sts->residual_len); |
| 2465 | rsp_info = sense_data = sts->data; |
| 2466 | par_sense_len = sizeof(sts->data); |
| 2467 | |
| 2468 | /* Check for overrun. */ |
| 2469 | if (comp_status == CS_COMPLETE && |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2470 | scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER)) |
| 2471 | comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2472 | |
| 2473 | /* |
| 2474 | * Based on Host and scsi status generate status code for Linux |
| 2475 | */ |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2476 | switch (le16_to_cpu(comp_status)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2477 | case CS_COMPLETE: |
| 2478 | case CS_QUEUE_FULL: |
| 2479 | if (scsi_status == 0) { |
| 2480 | res = DID_OK << 16; |
| 2481 | break; |
| 2482 | } |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2483 | if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER |
| 2484 | | (uint16_t)SS_RESIDUAL_OVER))) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2485 | resid = resid_len; |
| 2486 | scsi_set_resid(cp, resid); |
| 2487 | |
| 2488 | if (!lscsi_status && |
| 2489 | ((unsigned)(scsi_bufflen(cp) - resid) < |
| 2490 | cp->underflow)) { |
| 2491 | ql_dbg(ql_dbg_io, fcport->vha, 0x3050, |
| 2492 | "Mid-layer underflow " |
| 2493 | "detected (0x%x of 0x%x bytes).\n", |
| 2494 | resid, scsi_bufflen(cp)); |
| 2495 | |
| 2496 | res = DID_ERROR << 16; |
| 2497 | break; |
| 2498 | } |
| 2499 | } |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2500 | res = DID_OK << 16 | le16_to_cpu(lscsi_status); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2501 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2502 | if (lscsi_status == |
| 2503 | cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2504 | ql_dbg(ql_dbg_io, fcport->vha, 0x3051, |
| 2505 | "QUEUE FULL detected.\n"); |
| 2506 | break; |
| 2507 | } |
| 2508 | logit = 0; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2509 | if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2510 | break; |
| 2511 | |
| 2512 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2513 | if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2514 | break; |
| 2515 | |
| 2516 | qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
| 2517 | rsp, res); |
| 2518 | break; |
| 2519 | |
| 2520 | case CS_DATA_UNDERRUN: |
| 2521 | /* Use F/W calculated residual length. */ |
| 2522 | if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
| 2523 | resid = fw_resid_len; |
| 2524 | else |
| 2525 | resid = resid_len; |
| 2526 | scsi_set_resid(cp, resid); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2527 | if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2528 | if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
| 2529 | && fw_resid_len != resid_len) { |
| 2530 | ql_dbg(ql_dbg_io, fcport->vha, 0x3052, |
| 2531 | "Dropped frame(s) detected " |
| 2532 | "(0x%x of 0x%x bytes).\n", |
| 2533 | resid, scsi_bufflen(cp)); |
| 2534 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2535 | res = DID_ERROR << 16 | |
| 2536 | le16_to_cpu(lscsi_status); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2537 | goto check_scsi_status; |
| 2538 | } |
| 2539 | |
| 2540 | if (!lscsi_status && |
| 2541 | ((unsigned)(scsi_bufflen(cp) - resid) < |
| 2542 | cp->underflow)) { |
| 2543 | ql_dbg(ql_dbg_io, fcport->vha, 0x3053, |
| 2544 | "Mid-layer underflow " |
| 2545 | "detected (0x%x of 0x%x bytes, " |
| 2546 | "cp->underflow: 0x%x).\n", |
| 2547 | resid, scsi_bufflen(cp), cp->underflow); |
| 2548 | |
| 2549 | res = DID_ERROR << 16; |
| 2550 | break; |
| 2551 | } |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2552 | } else if (lscsi_status != |
| 2553 | cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) && |
| 2554 | lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2555 | /* |
| 2556 | * scsi status of task set and busy are considered |
| 2557 | * to be task not completed. |
| 2558 | */ |
| 2559 | |
| 2560 | ql_dbg(ql_dbg_io, fcport->vha, 0x3054, |
| 2561 | "Dropped frame(s) detected (0x%x " |
| 2562 | "of 0x%x bytes).\n", resid, |
| 2563 | scsi_bufflen(cp)); |
| 2564 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2565 | res = DID_ERROR << 16 | le16_to_cpu(lscsi_status); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2566 | goto check_scsi_status; |
| 2567 | } else { |
| 2568 | ql_dbg(ql_dbg_io, fcport->vha, 0x3055, |
| 2569 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", |
| 2570 | scsi_status, lscsi_status); |
| 2571 | } |
| 2572 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2573 | res = DID_OK << 16 | le16_to_cpu(lscsi_status); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2574 | logit = 0; |
| 2575 | |
| 2576 | check_scsi_status: |
| 2577 | /* |
| 2578 | * Check to see if SCSI Status is non zero. If so report SCSI |
| 2579 | * Status. |
| 2580 | */ |
| 2581 | if (lscsi_status != 0) { |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2582 | if (lscsi_status == |
| 2583 | cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2584 | ql_dbg(ql_dbg_io, fcport->vha, 0x3056, |
| 2585 | "QUEUE FULL detected.\n"); |
| 2586 | logit = 1; |
| 2587 | break; |
| 2588 | } |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2589 | if (lscsi_status != |
| 2590 | cpu_to_le16((uint16_t)SS_CHECK_CONDITION)) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2591 | break; |
| 2592 | |
| 2593 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2594 | if (!(scsi_status & |
| 2595 | cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2596 | break; |
| 2597 | |
| 2598 | qlafx00_handle_sense(sp, sense_data, par_sense_len, |
| 2599 | sense_len, rsp, res); |
| 2600 | } |
| 2601 | break; |
| 2602 | |
| 2603 | case CS_PORT_LOGGED_OUT: |
| 2604 | case CS_PORT_CONFIG_CHG: |
| 2605 | case CS_PORT_BUSY: |
| 2606 | case CS_INCOMPLETE: |
| 2607 | case CS_PORT_UNAVAILABLE: |
| 2608 | case CS_TIMEOUT: |
| 2609 | case CS_RESET: |
| 2610 | |
| 2611 | /* |
| 2612 | * We are going to have the fc class block the rport |
| 2613 | * while we try to recover so instruct the mid layer |
| 2614 | * to requeue until the class decides how to handle this. |
| 2615 | */ |
| 2616 | res = DID_TRANSPORT_DISRUPTED << 16; |
| 2617 | |
| 2618 | ql_dbg(ql_dbg_io, fcport->vha, 0x3057, |
| 2619 | "Port down status: port-state=0x%x.\n", |
| 2620 | atomic_read(&fcport->state)); |
| 2621 | |
| 2622 | if (atomic_read(&fcport->state) == FCS_ONLINE) |
| 2623 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
| 2624 | break; |
| 2625 | |
| 2626 | case CS_ABORTED: |
| 2627 | res = DID_RESET << 16; |
| 2628 | break; |
| 2629 | |
| 2630 | default: |
| 2631 | res = DID_ERROR << 16; |
| 2632 | break; |
| 2633 | } |
| 2634 | |
| 2635 | if (logit) |
| 2636 | ql_dbg(ql_dbg_io, fcport->vha, 0x3058, |
Oleksandr Khoshaba | 7b83355 | 2013-08-27 01:37:27 -0400 | [diff] [blame] | 2637 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%d " |
| 2638 | "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x " |
| 2639 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x sense_len=0x%x, " |
| 2640 | "par_sense_len=0x%x, rsp_info_len=0x%x\n", |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2641 | comp_status, scsi_status, res, vha->host_no, |
| 2642 | cp->device->id, cp->device->lun, fcport->tgt_id, |
Oleksandr Khoshaba | 7b83355 | 2013-08-27 01:37:27 -0400 | [diff] [blame] | 2643 | lscsi_status, cp->cmnd, scsi_bufflen(cp), |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2644 | rsp_info_len, resid_len, fw_resid_len, sense_len, |
| 2645 | par_sense_len, rsp_info_len); |
| 2646 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2647 | if (rsp->status_srb == NULL) |
| 2648 | sp->done(ha, sp, res); |
| 2649 | } |
| 2650 | |
| 2651 | /** |
| 2652 | * qlafx00_status_cont_entry() - Process a Status Continuations entry. |
| 2653 | * @ha: SCSI driver HA context |
| 2654 | * @pkt: Entry pointer |
| 2655 | * |
| 2656 | * Extended sense data. |
| 2657 | */ |
| 2658 | static void |
| 2659 | qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
| 2660 | { |
| 2661 | uint8_t sense_sz = 0; |
| 2662 | struct qla_hw_data *ha = rsp->hw; |
| 2663 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
| 2664 | srb_t *sp = rsp->status_srb; |
| 2665 | struct scsi_cmnd *cp; |
| 2666 | uint32_t sense_len; |
| 2667 | uint8_t *sense_ptr; |
| 2668 | |
| 2669 | if (!sp) { |
| 2670 | ql_dbg(ql_dbg_io, vha, 0x3037, |
| 2671 | "no SP, sp = %p\n", sp); |
| 2672 | return; |
| 2673 | } |
| 2674 | |
| 2675 | if (!GET_FW_SENSE_LEN(sp)) { |
| 2676 | ql_dbg(ql_dbg_io, vha, 0x304b, |
| 2677 | "no fw sense data, sp = %p\n", sp); |
| 2678 | return; |
| 2679 | } |
| 2680 | cp = GET_CMD_SP(sp); |
| 2681 | if (cp == NULL) { |
| 2682 | ql_log(ql_log_warn, vha, 0x303b, |
| 2683 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); |
| 2684 | |
| 2685 | rsp->status_srb = NULL; |
| 2686 | return; |
| 2687 | } |
| 2688 | |
| 2689 | if (!GET_CMD_SENSE_LEN(sp)) { |
| 2690 | ql_dbg(ql_dbg_io, vha, 0x304c, |
| 2691 | "no sense data, sp = %p\n", sp); |
| 2692 | } else { |
| 2693 | sense_len = GET_CMD_SENSE_LEN(sp); |
| 2694 | sense_ptr = GET_CMD_SENSE_PTR(sp); |
| 2695 | ql_dbg(ql_dbg_io, vha, 0x304f, |
| 2696 | "sp=%p sense_len=0x%x sense_ptr=%p.\n", |
| 2697 | sp, sense_len, sense_ptr); |
| 2698 | |
| 2699 | if (sense_len > sizeof(pkt->data)) |
| 2700 | sense_sz = sizeof(pkt->data); |
| 2701 | else |
| 2702 | sense_sz = sense_len; |
| 2703 | |
| 2704 | /* Move sense data. */ |
| 2705 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e, |
| 2706 | (uint8_t *)pkt, sizeof(sts_cont_entry_t)); |
| 2707 | memcpy(sense_ptr, pkt->data, sense_sz); |
| 2708 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a, |
| 2709 | sense_ptr, sense_sz); |
| 2710 | |
| 2711 | sense_len -= sense_sz; |
| 2712 | sense_ptr += sense_sz; |
| 2713 | |
| 2714 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
| 2715 | SET_CMD_SENSE_LEN(sp, sense_len); |
| 2716 | } |
| 2717 | sense_len = GET_FW_SENSE_LEN(sp); |
| 2718 | sense_len = (sense_len > sizeof(pkt->data)) ? |
| 2719 | (sense_len - sizeof(pkt->data)) : 0; |
| 2720 | SET_FW_SENSE_LEN(sp, sense_len); |
| 2721 | |
| 2722 | /* Place command on done queue. */ |
| 2723 | if (sense_len == 0) { |
| 2724 | rsp->status_srb = NULL; |
| 2725 | sp->done(ha, sp, cp->result); |
| 2726 | } |
| 2727 | } |
| 2728 | |
| 2729 | /** |
| 2730 | * qlafx00_multistatus_entry() - Process Multi response queue entries. |
| 2731 | * @ha: SCSI driver HA context |
| 2732 | */ |
| 2733 | static void |
| 2734 | qlafx00_multistatus_entry(struct scsi_qla_host *vha, |
| 2735 | struct rsp_que *rsp, void *pkt) |
| 2736 | { |
| 2737 | srb_t *sp; |
| 2738 | struct multi_sts_entry_fx00 *stsmfx; |
| 2739 | struct qla_hw_data *ha = vha->hw; |
| 2740 | uint32_t handle, hindex, handle_count, i; |
| 2741 | uint16_t que; |
| 2742 | struct req_que *req; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2743 | __le32 *handle_ptr; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2744 | |
| 2745 | stsmfx = (struct multi_sts_entry_fx00 *) pkt; |
| 2746 | |
| 2747 | handle_count = stsmfx->handle_count; |
| 2748 | |
| 2749 | if (handle_count > MAX_HANDLE_COUNT) { |
| 2750 | ql_dbg(ql_dbg_io, vha, 0x3035, |
| 2751 | "Invalid handle count (0x%x).\n", handle_count); |
| 2752 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2753 | qla2xxx_wake_dpc(vha); |
| 2754 | return; |
| 2755 | } |
| 2756 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2757 | handle_ptr = &stsmfx->handles[0]; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2758 | |
| 2759 | for (i = 0; i < handle_count; i++) { |
| 2760 | hindex = le32_to_cpu(*handle_ptr); |
| 2761 | handle = LSW(hindex); |
| 2762 | que = MSW(hindex); |
| 2763 | req = ha->req_q_map[que]; |
| 2764 | |
| 2765 | /* Validate handle. */ |
| 2766 | if (handle < req->num_outstanding_cmds) |
| 2767 | sp = req->outstanding_cmds[handle]; |
| 2768 | else |
| 2769 | sp = NULL; |
| 2770 | |
| 2771 | if (sp == NULL) { |
| 2772 | ql_dbg(ql_dbg_io, vha, 0x3044, |
| 2773 | "Invalid status handle (0x%x).\n", handle); |
| 2774 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2775 | qla2xxx_wake_dpc(vha); |
| 2776 | return; |
| 2777 | } |
| 2778 | qla2x00_process_completed_request(vha, req, handle); |
| 2779 | handle_ptr++; |
| 2780 | } |
| 2781 | } |
| 2782 | |
| 2783 | /** |
| 2784 | * qlafx00_error_entry() - Process an error entry. |
| 2785 | * @ha: SCSI driver HA context |
| 2786 | * @pkt: Entry pointer |
| 2787 | */ |
| 2788 | static void |
| 2789 | qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, |
| 2790 | struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype) |
| 2791 | { |
| 2792 | srb_t *sp; |
| 2793 | struct qla_hw_data *ha = vha->hw; |
| 2794 | const char func[] = "ERROR-IOCB"; |
Saurav Kashyap | d550dd2 | 2014-02-26 04:15:01 -0500 | [diff] [blame] | 2795 | uint16_t que = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2796 | struct req_que *req = NULL; |
| 2797 | int res = DID_ERROR << 16; |
| 2798 | |
| 2799 | ql_dbg(ql_dbg_async, vha, 0x507f, |
| 2800 | "type of error status in response: 0x%x\n", estatus); |
| 2801 | |
| 2802 | req = ha->req_q_map[que]; |
| 2803 | |
| 2804 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
| 2805 | if (sp) { |
| 2806 | sp->done(ha, sp, res); |
| 2807 | return; |
| 2808 | } |
| 2809 | |
| 2810 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2811 | qla2xxx_wake_dpc(vha); |
| 2812 | } |
| 2813 | |
| 2814 | /** |
| 2815 | * qlafx00_process_response_queue() - Process response queue entries. |
| 2816 | * @ha: SCSI driver HA context |
| 2817 | */ |
| 2818 | static void |
| 2819 | qlafx00_process_response_queue(struct scsi_qla_host *vha, |
| 2820 | struct rsp_que *rsp) |
| 2821 | { |
| 2822 | struct sts_entry_fx00 *pkt; |
| 2823 | response_t *lptr; |
Saurav Kashyap | 6ac1f3b | 2014-02-26 04:15:10 -0500 | [diff] [blame^] | 2824 | uint16_t lreq_q_in = 0; |
| 2825 | uint16_t lreq_q_out = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2826 | |
Saurav Kashyap | 6ac1f3b | 2014-02-26 04:15:10 -0500 | [diff] [blame^] | 2827 | lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in); |
| 2828 | lreq_q_out = RD_REG_DWORD(rsp->rsp_q_out); |
| 2829 | |
| 2830 | while (lreq_q_in != lreq_q_out) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2831 | lptr = rsp->ring_ptr; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 2832 | memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr, |
| 2833 | sizeof(rsp->rsp_pkt)); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2834 | pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt; |
| 2835 | |
| 2836 | rsp->ring_index++; |
Saurav Kashyap | 6ac1f3b | 2014-02-26 04:15:10 -0500 | [diff] [blame^] | 2837 | lreq_q_out++; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2838 | if (rsp->ring_index == rsp->length) { |
Saurav Kashyap | 6ac1f3b | 2014-02-26 04:15:10 -0500 | [diff] [blame^] | 2839 | lreq_q_out = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2840 | rsp->ring_index = 0; |
| 2841 | rsp->ring_ptr = rsp->ring; |
| 2842 | } else { |
| 2843 | rsp->ring_ptr++; |
| 2844 | } |
| 2845 | |
| 2846 | if (pkt->entry_status != 0 && |
| 2847 | pkt->entry_type != IOCTL_IOSB_TYPE_FX00) { |
| 2848 | qlafx00_error_entry(vha, rsp, |
| 2849 | (struct sts_entry_fx00 *)pkt, pkt->entry_status, |
| 2850 | pkt->entry_type); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2851 | continue; |
| 2852 | } |
| 2853 | |
| 2854 | switch (pkt->entry_type) { |
| 2855 | case STATUS_TYPE_FX00: |
| 2856 | qlafx00_status_entry(vha, rsp, pkt); |
| 2857 | break; |
| 2858 | |
| 2859 | case STATUS_CONT_TYPE_FX00: |
| 2860 | qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
| 2861 | break; |
| 2862 | |
| 2863 | case MULTI_STATUS_TYPE_FX00: |
| 2864 | qlafx00_multistatus_entry(vha, rsp, pkt); |
| 2865 | break; |
| 2866 | |
| 2867 | case ABORT_IOCB_TYPE_FX00: |
| 2868 | qlafx00_abort_iocb_entry(vha, rsp->req, |
| 2869 | (struct abort_iocb_entry_fx00 *)pkt); |
| 2870 | break; |
| 2871 | |
| 2872 | case IOCTL_IOSB_TYPE_FX00: |
| 2873 | qlafx00_ioctl_iosb_entry(vha, rsp->req, |
| 2874 | (struct ioctl_iocb_entry_fx00 *)pkt); |
| 2875 | break; |
| 2876 | default: |
| 2877 | /* Type Not Supported. */ |
| 2878 | ql_dbg(ql_dbg_async, vha, 0x5081, |
| 2879 | "Received unknown response pkt type %x " |
| 2880 | "entry status=%x.\n", |
| 2881 | pkt->entry_type, pkt->entry_status); |
| 2882 | break; |
| 2883 | } |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2884 | } |
| 2885 | |
| 2886 | /* Adjust ring index */ |
| 2887 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); |
| 2888 | } |
| 2889 | |
| 2890 | /** |
| 2891 | * qlafx00_async_event() - Process aynchronous events. |
| 2892 | * @ha: SCSI driver HA context |
| 2893 | */ |
| 2894 | static void |
| 2895 | qlafx00_async_event(scsi_qla_host_t *vha) |
| 2896 | { |
| 2897 | struct qla_hw_data *ha = vha->hw; |
| 2898 | struct device_reg_fx00 __iomem *reg; |
| 2899 | int data_size = 1; |
| 2900 | |
| 2901 | reg = &ha->iobase->ispfx00; |
| 2902 | /* Setup to process RIO completion. */ |
| 2903 | switch (ha->aenmb[0]) { |
| 2904 | case QLAFX00_MBA_SYSTEM_ERR: /* System Error */ |
| 2905 | ql_log(ql_log_warn, vha, 0x5079, |
| 2906 | "ISP System Error - mbx1=%x\n", ha->aenmb[0]); |
| 2907 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2908 | break; |
| 2909 | |
| 2910 | case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */ |
| 2911 | ql_dbg(ql_dbg_async, vha, 0x5076, |
| 2912 | "Asynchronous FW shutdown requested.\n"); |
| 2913 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
| 2914 | qla2xxx_wake_dpc(vha); |
| 2915 | break; |
| 2916 | |
| 2917 | case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ |
Saurav Kashyap | 965c77a | 2014-02-26 04:15:03 -0500 | [diff] [blame] | 2918 | ha->aenmb[1] = RD_REG_DWORD(®->aenmailbox1); |
| 2919 | ha->aenmb[2] = RD_REG_DWORD(®->aenmailbox2); |
| 2920 | ha->aenmb[3] = RD_REG_DWORD(®->aenmailbox3); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2921 | ql_dbg(ql_dbg_async, vha, 0x5077, |
| 2922 | "Asynchronous port Update received " |
| 2923 | "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n", |
| 2924 | ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]); |
| 2925 | data_size = 4; |
| 2926 | break; |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 2927 | |
| 2928 | case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */ |
Armen Baloyan | 4881d09 | 2013-08-27 01:37:46 -0400 | [diff] [blame] | 2929 | ql_log(ql_log_info, vha, 0x5085, |
| 2930 | "Asynchronous over temperature event received " |
| 2931 | "aenmb[0]: %x\n", |
| 2932 | ha->aenmb[0]); |
| 2933 | break; |
| 2934 | |
| 2935 | case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */ |
| 2936 | ql_log(ql_log_info, vha, 0x5086, |
| 2937 | "Asynchronous normal temperature event received " |
| 2938 | "aenmb[0]: %x\n", |
| 2939 | ha->aenmb[0]); |
| 2940 | break; |
| 2941 | |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 2942 | case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */ |
| 2943 | ql_log(ql_log_info, vha, 0x5083, |
| 2944 | "Asynchronous critical temperature event received " |
| 2945 | "aenmb[0]: %x\n", |
| 2946 | ha->aenmb[0]); |
Armen Baloyan | 71e5600 | 2013-08-27 01:37:38 -0400 | [diff] [blame] | 2947 | break; |
| 2948 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2949 | default: |
| 2950 | ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); |
| 2951 | ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); |
| 2952 | ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); |
| 2953 | ha->aenmb[4] = RD_REG_WORD(®->aenmailbox4); |
| 2954 | ha->aenmb[5] = RD_REG_WORD(®->aenmailbox5); |
| 2955 | ha->aenmb[6] = RD_REG_WORD(®->aenmailbox6); |
| 2956 | ha->aenmb[7] = RD_REG_WORD(®->aenmailbox7); |
| 2957 | ql_dbg(ql_dbg_async, vha, 0x5078, |
| 2958 | "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n", |
| 2959 | ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3], |
| 2960 | ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]); |
| 2961 | break; |
| 2962 | } |
| 2963 | qlafx00_post_aenfx_work(vha, ha->aenmb[0], |
| 2964 | (uint32_t *)ha->aenmb, data_size); |
| 2965 | } |
| 2966 | |
| 2967 | /** |
| 2968 | * |
| 2969 | * qlafx00x_mbx_completion() - Process mailbox command completions. |
| 2970 | * @ha: SCSI driver HA context |
| 2971 | * @mb16: Mailbox16 register |
| 2972 | */ |
| 2973 | static void |
| 2974 | qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0) |
| 2975 | { |
| 2976 | uint16_t cnt; |
Saurav Kashyap | 965c77a | 2014-02-26 04:15:03 -0500 | [diff] [blame] | 2977 | uint32_t __iomem *wptr; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2978 | struct qla_hw_data *ha = vha->hw; |
| 2979 | struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; |
| 2980 | |
| 2981 | if (!ha->mcp32) |
| 2982 | ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n"); |
| 2983 | |
| 2984 | /* Load return mailbox registers. */ |
| 2985 | ha->flags.mbox_int = 1; |
| 2986 | ha->mailbox_out32[0] = mb0; |
Saurav Kashyap | 965c77a | 2014-02-26 04:15:03 -0500 | [diff] [blame] | 2987 | wptr = (uint32_t __iomem *)®->mailbox17; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2988 | |
| 2989 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { |
Saurav Kashyap | 965c77a | 2014-02-26 04:15:03 -0500 | [diff] [blame] | 2990 | ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 2991 | wptr++; |
| 2992 | } |
| 2993 | } |
| 2994 | |
| 2995 | /** |
| 2996 | * qlafx00_intr_handler() - Process interrupts for the ISPFX00. |
| 2997 | * @irq: |
| 2998 | * @dev_id: SCSI driver HA context |
| 2999 | * |
| 3000 | * Called by system whenever the host adapter generates an interrupt. |
| 3001 | * |
| 3002 | * Returns handled flag. |
| 3003 | */ |
| 3004 | irqreturn_t |
| 3005 | qlafx00_intr_handler(int irq, void *dev_id) |
| 3006 | { |
| 3007 | scsi_qla_host_t *vha; |
| 3008 | struct qla_hw_data *ha; |
| 3009 | struct device_reg_fx00 __iomem *reg; |
| 3010 | int status; |
| 3011 | unsigned long iter; |
| 3012 | uint32_t stat; |
| 3013 | uint32_t mb[8]; |
| 3014 | struct rsp_que *rsp; |
| 3015 | unsigned long flags; |
| 3016 | uint32_t clr_intr = 0; |
| 3017 | |
| 3018 | rsp = (struct rsp_que *) dev_id; |
| 3019 | if (!rsp) { |
| 3020 | ql_log(ql_log_info, NULL, 0x507d, |
| 3021 | "%s: NULL response queue pointer.\n", __func__); |
| 3022 | return IRQ_NONE; |
| 3023 | } |
| 3024 | |
| 3025 | ha = rsp->hw; |
| 3026 | reg = &ha->iobase->ispfx00; |
| 3027 | status = 0; |
| 3028 | |
| 3029 | if (unlikely(pci_channel_offline(ha->pdev))) |
| 3030 | return IRQ_HANDLED; |
| 3031 | |
| 3032 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 3033 | vha = pci_get_drvdata(ha->pdev); |
| 3034 | for (iter = 50; iter--; clr_intr = 0) { |
| 3035 | stat = QLAFX00_RD_INTR_REG(ha); |
Chad Dupuis | f3ddac1 | 2013-10-30 03:38:16 -0400 | [diff] [blame] | 3036 | if (qla2x00_check_reg_for_disconnect(vha, stat)) |
| 3037 | break; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3038 | if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) |
| 3039 | break; |
| 3040 | |
| 3041 | switch (stat & QLAFX00_HST_INT_STS_BITS) { |
| 3042 | case QLAFX00_INTR_MB_CMPLT: |
| 3043 | case QLAFX00_INTR_MB_RSP_CMPLT: |
| 3044 | case QLAFX00_INTR_MB_ASYNC_CMPLT: |
| 3045 | case QLAFX00_INTR_ALL_CMPLT: |
| 3046 | mb[0] = RD_REG_WORD(®->mailbox16); |
| 3047 | qlafx00_mbx_completion(vha, mb[0]); |
| 3048 | status |= MBX_INTERRUPT; |
| 3049 | clr_intr |= QLAFX00_INTR_MB_CMPLT; |
| 3050 | break; |
| 3051 | case QLAFX00_INTR_ASYNC_CMPLT: |
| 3052 | case QLAFX00_INTR_RSP_ASYNC_CMPLT: |
| 3053 | ha->aenmb[0] = RD_REG_WORD(®->aenmailbox0); |
| 3054 | qlafx00_async_event(vha); |
| 3055 | clr_intr |= QLAFX00_INTR_ASYNC_CMPLT; |
| 3056 | break; |
| 3057 | case QLAFX00_INTR_RSP_CMPLT: |
| 3058 | qlafx00_process_response_queue(vha, rsp); |
| 3059 | clr_intr |= QLAFX00_INTR_RSP_CMPLT; |
| 3060 | break; |
| 3061 | default: |
| 3062 | ql_dbg(ql_dbg_async, vha, 0x507a, |
| 3063 | "Unrecognized interrupt type (%d).\n", stat); |
| 3064 | break; |
| 3065 | } |
| 3066 | QLAFX00_CLR_INTR_REG(ha, clr_intr); |
| 3067 | QLAFX00_RD_INTR_REG(ha); |
| 3068 | } |
gurinder.shergill@hp.com | 3643983 | 2013-04-23 10:13:17 -0700 | [diff] [blame] | 3069 | |
| 3070 | qla2x00_handle_mbx_completion(ha, status); |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3071 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 3072 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3073 | return IRQ_HANDLED; |
| 3074 | } |
| 3075 | |
| 3076 | /** QLAFX00 specific IOCB implementation functions */ |
| 3077 | |
| 3078 | static inline cont_a64_entry_t * |
| 3079 | qlafx00_prep_cont_type1_iocb(struct req_que *req, |
| 3080 | cont_a64_entry_t *lcont_pkt) |
| 3081 | { |
| 3082 | cont_a64_entry_t *cont_pkt; |
| 3083 | |
| 3084 | /* Adjust ring index. */ |
| 3085 | req->ring_index++; |
| 3086 | if (req->ring_index == req->length) { |
| 3087 | req->ring_index = 0; |
| 3088 | req->ring_ptr = req->ring; |
| 3089 | } else { |
| 3090 | req->ring_ptr++; |
| 3091 | } |
| 3092 | |
| 3093 | cont_pkt = (cont_a64_entry_t *)req->ring_ptr; |
| 3094 | |
| 3095 | /* Load packet defaults. */ |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3096 | lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3097 | |
| 3098 | return cont_pkt; |
| 3099 | } |
| 3100 | |
| 3101 | static inline void |
| 3102 | qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt, |
| 3103 | uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt) |
| 3104 | { |
| 3105 | uint16_t avail_dsds; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3106 | __le32 *cur_dsd; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3107 | scsi_qla_host_t *vha; |
| 3108 | struct scsi_cmnd *cmd; |
| 3109 | struct scatterlist *sg; |
| 3110 | int i, cont; |
| 3111 | struct req_que *req; |
| 3112 | cont_a64_entry_t lcont_pkt; |
| 3113 | cont_a64_entry_t *cont_pkt; |
| 3114 | |
| 3115 | vha = sp->fcport->vha; |
| 3116 | req = vha->req; |
| 3117 | |
| 3118 | cmd = GET_CMD_SP(sp); |
| 3119 | cont = 0; |
| 3120 | cont_pkt = NULL; |
| 3121 | |
| 3122 | /* Update entry type to indicate Command Type 3 IOCB */ |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3123 | lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3124 | |
| 3125 | /* No data transfer */ |
| 3126 | if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) { |
| 3127 | lcmd_pkt->byte_count = __constant_cpu_to_le32(0); |
| 3128 | return; |
| 3129 | } |
| 3130 | |
| 3131 | /* Set transfer direction */ |
| 3132 | if (cmd->sc_data_direction == DMA_TO_DEVICE) { |
Armen Baloyan | 378c538 | 2013-04-25 01:29:18 -0400 | [diff] [blame] | 3133 | lcmd_pkt->cntrl_flags = TMF_WRITE_DATA; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3134 | vha->qla_stats.output_bytes += scsi_bufflen(cmd); |
| 3135 | } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) { |
Armen Baloyan | 378c538 | 2013-04-25 01:29:18 -0400 | [diff] [blame] | 3136 | lcmd_pkt->cntrl_flags = TMF_READ_DATA; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3137 | vha->qla_stats.input_bytes += scsi_bufflen(cmd); |
| 3138 | } |
| 3139 | |
| 3140 | /* One DSD is available in the Command Type 3 IOCB */ |
| 3141 | avail_dsds = 1; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3142 | cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3143 | |
| 3144 | /* Load data segments */ |
| 3145 | scsi_for_each_sg(cmd, sg, tot_dsds, i) { |
| 3146 | dma_addr_t sle_dma; |
| 3147 | |
| 3148 | /* Allocate additional continuation packets? */ |
| 3149 | if (avail_dsds == 0) { |
| 3150 | /* |
| 3151 | * Five DSDs are available in the Continuation |
| 3152 | * Type 1 IOCB. |
| 3153 | */ |
| 3154 | memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE); |
| 3155 | cont_pkt = |
| 3156 | qlafx00_prep_cont_type1_iocb(req, &lcont_pkt); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3157 | cur_dsd = (__le32 *)lcont_pkt.dseg_0_address; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3158 | avail_dsds = 5; |
| 3159 | cont = 1; |
| 3160 | } |
| 3161 | |
| 3162 | sle_dma = sg_dma_address(sg); |
| 3163 | *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); |
| 3164 | *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); |
| 3165 | *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); |
| 3166 | avail_dsds--; |
| 3167 | if (avail_dsds == 0 && cont == 1) { |
| 3168 | cont = 0; |
| 3169 | memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, |
| 3170 | REQUEST_ENTRY_SIZE); |
| 3171 | } |
| 3172 | |
| 3173 | } |
| 3174 | if (avail_dsds != 0 && cont == 1) { |
| 3175 | memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, |
| 3176 | REQUEST_ENTRY_SIZE); |
| 3177 | } |
| 3178 | } |
| 3179 | |
| 3180 | /** |
| 3181 | * qlafx00_start_scsi() - Send a SCSI command to the ISP |
| 3182 | * @sp: command to send to the ISP |
| 3183 | * |
| 3184 | * Returns non-zero if a failure occurred, else zero. |
| 3185 | */ |
| 3186 | int |
| 3187 | qlafx00_start_scsi(srb_t *sp) |
| 3188 | { |
| 3189 | int ret, nseg; |
| 3190 | unsigned long flags; |
| 3191 | uint32_t index; |
| 3192 | uint32_t handle; |
| 3193 | uint16_t cnt; |
| 3194 | uint16_t req_cnt; |
| 3195 | uint16_t tot_dsds; |
| 3196 | struct req_que *req = NULL; |
| 3197 | struct rsp_que *rsp = NULL; |
| 3198 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
| 3199 | struct scsi_qla_host *vha = sp->fcport->vha; |
| 3200 | struct qla_hw_data *ha = vha->hw; |
| 3201 | struct cmd_type_7_fx00 *cmd_pkt; |
| 3202 | struct cmd_type_7_fx00 lcmd_pkt; |
| 3203 | struct scsi_lun llun; |
| 3204 | char tag[2]; |
| 3205 | |
| 3206 | /* Setup device pointers. */ |
| 3207 | ret = 0; |
| 3208 | |
| 3209 | rsp = ha->rsp_q_map[0]; |
| 3210 | req = vha->req; |
| 3211 | |
| 3212 | /* So we know we haven't pci_map'ed anything yet */ |
| 3213 | tot_dsds = 0; |
| 3214 | |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3215 | /* Acquire ring specific lock */ |
| 3216 | spin_lock_irqsave(&ha->hardware_lock, flags); |
| 3217 | |
| 3218 | /* Check for room in outstanding command list. */ |
| 3219 | handle = req->current_outstanding_cmd; |
| 3220 | for (index = 1; index < req->num_outstanding_cmds; index++) { |
| 3221 | handle++; |
| 3222 | if (handle == req->num_outstanding_cmds) |
| 3223 | handle = 1; |
| 3224 | if (!req->outstanding_cmds[handle]) |
| 3225 | break; |
| 3226 | } |
| 3227 | if (index == req->num_outstanding_cmds) |
| 3228 | goto queuing_error; |
| 3229 | |
| 3230 | /* Map the sg table so we have an accurate count of sg entries needed */ |
| 3231 | if (scsi_sg_count(cmd)) { |
| 3232 | nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), |
| 3233 | scsi_sg_count(cmd), cmd->sc_data_direction); |
| 3234 | if (unlikely(!nseg)) |
| 3235 | goto queuing_error; |
| 3236 | } else |
| 3237 | nseg = 0; |
| 3238 | |
| 3239 | tot_dsds = nseg; |
| 3240 | req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); |
| 3241 | if (req->cnt < (req_cnt + 2)) { |
| 3242 | cnt = RD_REG_DWORD_RELAXED(req->req_q_out); |
| 3243 | |
| 3244 | if (req->ring_index < cnt) |
| 3245 | req->cnt = cnt - req->ring_index; |
| 3246 | else |
| 3247 | req->cnt = req->length - |
| 3248 | (req->ring_index - cnt); |
| 3249 | if (req->cnt < (req_cnt + 2)) |
| 3250 | goto queuing_error; |
| 3251 | } |
| 3252 | |
| 3253 | /* Build command packet. */ |
| 3254 | req->current_outstanding_cmd = handle; |
| 3255 | req->outstanding_cmds[handle] = sp; |
| 3256 | sp->handle = handle; |
| 3257 | cmd->host_scribble = (unsigned char *)(unsigned long)handle; |
| 3258 | req->cnt -= req_cnt; |
| 3259 | |
| 3260 | cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr; |
| 3261 | |
| 3262 | memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE); |
| 3263 | |
| 3264 | lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle); |
Armen Baloyan | d68b3e0 | 2014-02-26 04:15:09 -0500 | [diff] [blame] | 3265 | lcmd_pkt.reserved_0 = 0; |
| 3266 | lcmd_pkt.port_path_ctrl = 0; |
| 3267 | lcmd_pkt.reserved_1 = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3268 | lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds); |
| 3269 | lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id); |
| 3270 | |
| 3271 | int_to_scsilun(cmd->device->lun, &llun); |
| 3272 | host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun, |
| 3273 | sizeof(lcmd_pkt.lun)); |
| 3274 | |
| 3275 | /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */ |
| 3276 | if (scsi_populate_tag_msg(cmd, tag)) { |
| 3277 | switch (tag[0]) { |
| 3278 | case HEAD_OF_QUEUE_TAG: |
| 3279 | lcmd_pkt.task = TSK_HEAD_OF_QUEUE; |
| 3280 | break; |
| 3281 | case ORDERED_QUEUE_TAG: |
| 3282 | lcmd_pkt.task = TSK_ORDERED; |
| 3283 | break; |
| 3284 | } |
| 3285 | } |
| 3286 | |
| 3287 | /* Load SCSI command packet. */ |
| 3288 | host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb)); |
| 3289 | lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd)); |
| 3290 | |
| 3291 | /* Build IOCB segments */ |
| 3292 | qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt); |
| 3293 | |
| 3294 | /* Set total data segment count. */ |
| 3295 | lcmd_pkt.entry_count = (uint8_t)req_cnt; |
| 3296 | |
| 3297 | /* Specify response queue number where completion should happen */ |
| 3298 | lcmd_pkt.entry_status = (uint8_t) rsp->id; |
| 3299 | |
| 3300 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e, |
| 3301 | (uint8_t *)cmd->cmnd, cmd->cmd_len); |
| 3302 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032, |
| 3303 | (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE); |
| 3304 | |
| 3305 | memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE); |
| 3306 | wmb(); |
| 3307 | |
| 3308 | /* Adjust ring index. */ |
| 3309 | req->ring_index++; |
| 3310 | if (req->ring_index == req->length) { |
| 3311 | req->ring_index = 0; |
| 3312 | req->ring_ptr = req->ring; |
| 3313 | } else |
| 3314 | req->ring_ptr++; |
| 3315 | |
| 3316 | sp->flags |= SRB_DMA_VALID; |
| 3317 | |
| 3318 | /* Set chip new ring index. */ |
| 3319 | WRT_REG_DWORD(req->req_q_in, req->ring_index); |
| 3320 | QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); |
| 3321 | |
| 3322 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 3323 | return QLA_SUCCESS; |
| 3324 | |
| 3325 | queuing_error: |
| 3326 | if (tot_dsds) |
| 3327 | scsi_dma_unmap(cmd); |
| 3328 | |
| 3329 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 3330 | |
| 3331 | return QLA_FUNCTION_FAILED; |
| 3332 | } |
| 3333 | |
| 3334 | void |
| 3335 | qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb) |
| 3336 | { |
| 3337 | struct srb_iocb *fxio = &sp->u.iocb_cmd; |
| 3338 | scsi_qla_host_t *vha = sp->fcport->vha; |
| 3339 | struct req_que *req = vha->req; |
| 3340 | struct tsk_mgmt_entry_fx00 tm_iocb; |
| 3341 | struct scsi_lun llun; |
| 3342 | |
| 3343 | memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00)); |
| 3344 | tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00; |
| 3345 | tm_iocb.entry_count = 1; |
| 3346 | tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); |
Armen Baloyan | d68b3e0 | 2014-02-26 04:15:09 -0500 | [diff] [blame] | 3347 | tm_iocb.reserved_0 = 0; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3348 | tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id); |
| 3349 | tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3350 | if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) { |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3351 | int_to_scsilun(fxio->u.tmf.lun, &llun); |
| 3352 | host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun, |
| 3353 | sizeof(struct scsi_lun)); |
| 3354 | } |
| 3355 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3356 | memcpy((void *)ptm_iocb, &tm_iocb, |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3357 | sizeof(struct tsk_mgmt_entry_fx00)); |
| 3358 | wmb(); |
| 3359 | } |
| 3360 | |
| 3361 | void |
| 3362 | qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb) |
| 3363 | { |
| 3364 | struct srb_iocb *fxio = &sp->u.iocb_cmd; |
| 3365 | scsi_qla_host_t *vha = sp->fcport->vha; |
| 3366 | struct req_que *req = vha->req; |
| 3367 | struct abort_iocb_entry_fx00 abt_iocb; |
| 3368 | |
| 3369 | memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00)); |
| 3370 | abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00; |
| 3371 | abt_iocb.entry_count = 1; |
| 3372 | abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); |
| 3373 | abt_iocb.abort_handle = |
| 3374 | cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl)); |
| 3375 | abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id); |
| 3376 | abt_iocb.req_que_no = cpu_to_le16(req->id); |
| 3377 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3378 | memcpy((void *)pabt_iocb, &abt_iocb, |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3379 | sizeof(struct abort_iocb_entry_fx00)); |
| 3380 | wmb(); |
| 3381 | } |
| 3382 | |
| 3383 | void |
| 3384 | qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb) |
| 3385 | { |
| 3386 | struct srb_iocb *fxio = &sp->u.iocb_cmd; |
| 3387 | struct qla_mt_iocb_rqst_fx00 *piocb_rqst; |
| 3388 | struct fc_bsg_job *bsg_job; |
| 3389 | struct fxdisc_entry_fx00 fx_iocb; |
| 3390 | uint8_t entry_cnt = 1; |
| 3391 | |
| 3392 | memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00)); |
| 3393 | fx_iocb.entry_type = FX00_IOCB_TYPE; |
| 3394 | fx_iocb.handle = cpu_to_le32(sp->handle); |
| 3395 | fx_iocb.entry_count = entry_cnt; |
| 3396 | |
| 3397 | if (sp->type == SRB_FXIOCB_DCMD) { |
| 3398 | fx_iocb.func_num = |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3399 | sp->u.iocb_cmd.u.fxiocb.req_func_type; |
| 3400 | fx_iocb.adapid = fxio->u.fxiocb.adapter_id; |
| 3401 | fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi; |
| 3402 | fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0; |
| 3403 | fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1; |
| 3404 | fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3405 | |
| 3406 | if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { |
| 3407 | fx_iocb.req_dsdcnt = cpu_to_le16(1); |
| 3408 | fx_iocb.req_xfrcnt = |
| 3409 | cpu_to_le16(fxio->u.fxiocb.req_len); |
| 3410 | fx_iocb.dseg_rq_address[0] = |
| 3411 | cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle)); |
| 3412 | fx_iocb.dseg_rq_address[1] = |
| 3413 | cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle)); |
| 3414 | fx_iocb.dseg_rq_len = |
| 3415 | cpu_to_le32(fxio->u.fxiocb.req_len); |
| 3416 | } |
| 3417 | |
| 3418 | if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { |
| 3419 | fx_iocb.rsp_dsdcnt = cpu_to_le16(1); |
| 3420 | fx_iocb.rsp_xfrcnt = |
| 3421 | cpu_to_le16(fxio->u.fxiocb.rsp_len); |
| 3422 | fx_iocb.dseg_rsp_address[0] = |
| 3423 | cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle)); |
| 3424 | fx_iocb.dseg_rsp_address[1] = |
| 3425 | cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle)); |
| 3426 | fx_iocb.dseg_rsp_len = |
| 3427 | cpu_to_le32(fxio->u.fxiocb.rsp_len); |
| 3428 | } |
| 3429 | |
| 3430 | if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) { |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3431 | fx_iocb.dataword = fxio->u.fxiocb.req_data; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3432 | } |
| 3433 | fx_iocb.flags = fxio->u.fxiocb.flags; |
| 3434 | } else { |
| 3435 | struct scatterlist *sg; |
| 3436 | bsg_job = sp->u.bsg_job; |
| 3437 | piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *) |
| 3438 | &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1]; |
| 3439 | |
| 3440 | fx_iocb.func_num = piocb_rqst->func_type; |
| 3441 | fx_iocb.adapid = piocb_rqst->adapid; |
| 3442 | fx_iocb.adapid_hi = piocb_rqst->adapid_hi; |
| 3443 | fx_iocb.reserved_0 = piocb_rqst->reserved_0; |
| 3444 | fx_iocb.reserved_1 = piocb_rqst->reserved_1; |
| 3445 | fx_iocb.dataword_extra = piocb_rqst->dataword_extra; |
| 3446 | fx_iocb.dataword = piocb_rqst->dataword; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3447 | fx_iocb.req_xfrcnt = piocb_rqst->req_len; |
| 3448 | fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3449 | |
| 3450 | if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) { |
| 3451 | int avail_dsds, tot_dsds; |
| 3452 | cont_a64_entry_t lcont_pkt; |
| 3453 | cont_a64_entry_t *cont_pkt = NULL; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3454 | __le32 *cur_dsd; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3455 | int index = 0, cont = 0; |
| 3456 | |
| 3457 | fx_iocb.req_dsdcnt = |
| 3458 | cpu_to_le16(bsg_job->request_payload.sg_cnt); |
| 3459 | tot_dsds = |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3460 | bsg_job->request_payload.sg_cnt; |
| 3461 | cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0]; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3462 | avail_dsds = 1; |
| 3463 | for_each_sg(bsg_job->request_payload.sg_list, sg, |
| 3464 | tot_dsds, index) { |
| 3465 | dma_addr_t sle_dma; |
| 3466 | |
| 3467 | /* Allocate additional continuation packets? */ |
| 3468 | if (avail_dsds == 0) { |
| 3469 | /* |
| 3470 | * Five DSDs are available in the Cont. |
| 3471 | * Type 1 IOCB. |
| 3472 | */ |
| 3473 | memset(&lcont_pkt, 0, |
| 3474 | REQUEST_ENTRY_SIZE); |
| 3475 | cont_pkt = |
| 3476 | qlafx00_prep_cont_type1_iocb( |
| 3477 | sp->fcport->vha->req, |
| 3478 | &lcont_pkt); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3479 | cur_dsd = (__le32 *) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3480 | lcont_pkt.dseg_0_address; |
| 3481 | avail_dsds = 5; |
| 3482 | cont = 1; |
| 3483 | entry_cnt++; |
| 3484 | } |
| 3485 | |
| 3486 | sle_dma = sg_dma_address(sg); |
| 3487 | *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); |
| 3488 | *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); |
| 3489 | *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); |
| 3490 | avail_dsds--; |
| 3491 | |
| 3492 | if (avail_dsds == 0 && cont == 1) { |
| 3493 | cont = 0; |
| 3494 | memcpy_toio( |
| 3495 | (void __iomem *)cont_pkt, |
| 3496 | &lcont_pkt, REQUEST_ENTRY_SIZE); |
| 3497 | ql_dump_buffer( |
| 3498 | ql_dbg_user + ql_dbg_verbose, |
| 3499 | sp->fcport->vha, 0x3042, |
| 3500 | (uint8_t *)&lcont_pkt, |
| 3501 | REQUEST_ENTRY_SIZE); |
| 3502 | } |
| 3503 | } |
| 3504 | if (avail_dsds != 0 && cont == 1) { |
| 3505 | memcpy_toio((void __iomem *)cont_pkt, |
| 3506 | &lcont_pkt, REQUEST_ENTRY_SIZE); |
| 3507 | ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, |
| 3508 | sp->fcport->vha, 0x3043, |
| 3509 | (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); |
| 3510 | } |
| 3511 | } |
| 3512 | |
| 3513 | if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) { |
| 3514 | int avail_dsds, tot_dsds; |
| 3515 | cont_a64_entry_t lcont_pkt; |
| 3516 | cont_a64_entry_t *cont_pkt = NULL; |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3517 | __le32 *cur_dsd; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3518 | int index = 0, cont = 0; |
| 3519 | |
| 3520 | fx_iocb.rsp_dsdcnt = |
| 3521 | cpu_to_le16(bsg_job->reply_payload.sg_cnt); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3522 | tot_dsds = bsg_job->reply_payload.sg_cnt; |
| 3523 | cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0]; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3524 | avail_dsds = 1; |
| 3525 | |
| 3526 | for_each_sg(bsg_job->reply_payload.sg_list, sg, |
| 3527 | tot_dsds, index) { |
| 3528 | dma_addr_t sle_dma; |
| 3529 | |
| 3530 | /* Allocate additional continuation packets? */ |
| 3531 | if (avail_dsds == 0) { |
| 3532 | /* |
| 3533 | * Five DSDs are available in the Cont. |
| 3534 | * Type 1 IOCB. |
| 3535 | */ |
| 3536 | memset(&lcont_pkt, 0, |
| 3537 | REQUEST_ENTRY_SIZE); |
| 3538 | cont_pkt = |
| 3539 | qlafx00_prep_cont_type1_iocb( |
| 3540 | sp->fcport->vha->req, |
| 3541 | &lcont_pkt); |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3542 | cur_dsd = (__le32 *) |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3543 | lcont_pkt.dseg_0_address; |
| 3544 | avail_dsds = 5; |
| 3545 | cont = 1; |
| 3546 | entry_cnt++; |
| 3547 | } |
| 3548 | |
| 3549 | sle_dma = sg_dma_address(sg); |
| 3550 | *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); |
| 3551 | *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); |
| 3552 | *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); |
| 3553 | avail_dsds--; |
| 3554 | |
| 3555 | if (avail_dsds == 0 && cont == 1) { |
| 3556 | cont = 0; |
| 3557 | memcpy_toio((void __iomem *)cont_pkt, |
| 3558 | &lcont_pkt, |
| 3559 | REQUEST_ENTRY_SIZE); |
| 3560 | ql_dump_buffer( |
| 3561 | ql_dbg_user + ql_dbg_verbose, |
| 3562 | sp->fcport->vha, 0x3045, |
| 3563 | (uint8_t *)&lcont_pkt, |
| 3564 | REQUEST_ENTRY_SIZE); |
| 3565 | } |
| 3566 | } |
| 3567 | if (avail_dsds != 0 && cont == 1) { |
| 3568 | memcpy_toio((void __iomem *)cont_pkt, |
| 3569 | &lcont_pkt, REQUEST_ENTRY_SIZE); |
| 3570 | ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, |
| 3571 | sp->fcport->vha, 0x3046, |
| 3572 | (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); |
| 3573 | } |
| 3574 | } |
| 3575 | |
| 3576 | if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID) |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3577 | fx_iocb.dataword = piocb_rqst->dataword; |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3578 | fx_iocb.flags = piocb_rqst->flags; |
| 3579 | fx_iocb.entry_count = entry_cnt; |
| 3580 | } |
| 3581 | |
| 3582 | ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, |
| 3583 | sp->fcport->vha, 0x3047, |
| 3584 | (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00)); |
| 3585 | |
Saurav Kashyap | 1f8deef | 2013-06-25 11:27:21 -0400 | [diff] [blame] | 3586 | memcpy((void *)pfxiocb, &fx_iocb, |
Giridhar Malavali | 8ae6d9c | 2013-03-28 08:21:23 -0400 | [diff] [blame] | 3587 | sizeof(struct fxdisc_entry_fx00)); |
| 3588 | wmb(); |
| 3589 | } |