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Arnd Bergmanna0ae9c72007-06-13 02:30:17 +10001config PPC64
2 bool "64-bit kernel"
3 default n
4 help
5 This option selects whether a 32-bit or a 64-bit kernel
6 will be built.
7
8menu "Processor support"
9choice
10 prompt "Processor Type"
11 depends on PPC32
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100012 help
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020013 There are five families of 32 bit PowerPC chips supported.
14 The most common ones are the desktop and server CPUs (601, 603,
15 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
John Rigbye177edc2008-01-29 04:28:53 +110016 embedded 512x/52xx/82xx/83xx/86xx counterparts.
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020017 The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
18 (85xx) each form a family of their own that is not compatible
19 with the others.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100020
Arnd Bergmannb9fd3052007-06-18 01:06:52 +020021 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100022
Benjamin Herrenschmidt48c93112009-06-14 14:45:50 +000023config PPC_BOOK3S_32
John Rigbye177edc2008-01-29 04:28:53 +110024 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100025 select PPC_FPU
26
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100027config PPC_85xx
28 bool "Freescale 85xx"
29 select E500
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100030
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100031config PPC_8xx
32 bool "Freescale 8xx"
33 select FSL_SOC
34 select 8xx
Sylvain Munaut1088a202007-09-16 20:53:25 +100035 select PPC_LIB_RHEAP
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100036
37config 40x
38 bool "AMCC 40x"
39 select PPC_DCR_NATIVE
Benjamin Herrenschmidt9dae8af2007-12-21 15:39:26 +110040 select PPC_UDBG_16550
Stefan Roese93173ce2008-03-28 01:43:31 +110041 select 4xx_SOC
John Rigbyb5005632008-06-26 11:07:56 -060042 select PPC_PCI_CHOICE
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100043
44config 44x
Dave Kleikampe7f75ad2010-03-05 10:43:12 +000045 bool "AMCC 44x, 46x or 47x"
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100046 select PPC_DCR_NATIVE
Valentine Barshak1d5499b2007-10-18 22:55:13 +100047 select PPC_UDBG_16550
Stefan Roese93173ce2008-03-28 01:43:31 +110048 select 4xx_SOC
John Rigbyb5005632008-06-26 11:07:56 -060049 select PPC_PCI_CHOICE
Becky Bruce4ee70842008-09-24 11:01:24 -050050 select PHYS_64BIT
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100051
52config E200
53 bool "Freescale e200"
54
55endchoice
56
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +000057choice
58 prompt "Processor Type"
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +000059 depends on PPC64
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +000060 help
61 There are two families of 64 bit PowerPC chips supported.
62 The most common ones are the desktop and server CPUs
63 (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...)
64
65 The other are the "embedded" processors compliant with the
66 "Book 3E" variant of the architecture
67
68config PPC_BOOK3S_64
69 bool "Server processors"
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +000070 select PPC_FPU
Kumar Gala5adfd342011-07-13 05:00:41 +000071 select PPC_HAVE_PMU_SUPPORT
Becky Bruce41151e72011-06-28 09:54:48 +000072 select SYS_SUPPORTS_HUGETLBFS
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +000073
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +000074config PPC_BOOK3E_64
75 bool "Embedded processors"
76 select PPC_FPU # Make it a choice ?
Milton Miller1ece3552011-05-10 19:29:42 +000077 select PPC_SMP_MUXED_IPI
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +000078
79endchoice
80
Benjamin Herrenschmidt48c93112009-06-14 14:45:50 +000081config PPC_BOOK3S
82 def_bool y
83 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000084
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +000085config PPC_BOOK3E
86 def_bool y
87 depends on PPC_BOOK3E_64
88
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100089config POWER4_ONLY
90 bool "Optimize for POWER4"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +000091 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +100092 default n
93 ---help---
94 Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
95 The resulting binary will not work on POWER3 or RS64 processors
96 when compiled with binutils 2.15 or later.
97
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +000098config 6xx
99 def_bool y
100 depends on PPC32 && PPC_BOOK3S
Paul Mackerras73259272009-06-17 21:53:51 +1000101 select PPC_HAVE_PMU_SUPPORT
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +0000102
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000103config POWER3
104 bool
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000105 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000106 default y if !POWER4_ONLY
107
108config POWER4
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000109 depends on PPC64 && PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000110 def_bool y
111
Benjamin Herrenschmidt76b4eda2011-04-14 22:32:01 +0000112config PPC_A2
113 bool
114 depends on PPC_BOOK3E_64
115
Arnd Bergmann3164ccc2007-09-15 10:21:57 +1000116config TUNE_CELL
117 bool "Optimize for Cell Broadband Engine"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000118 depends on PPC64 && PPC_BOOK3S
Arnd Bergmann3164ccc2007-09-15 10:21:57 +1000119 help
120 Cause the compiler to optimize for the PPE of the Cell Broadband
121 Engine. This will make the code run considerably faster on Cell
122 but somewhat slower on other machines. This option only changes
123 the scheduling of instructions, not the selection of instructions
124 itself, so the resulting kernel will keep running on all other
125 machines. When building a kernel that is supposed to run only
126 on Cell, you should also select the POWER4_ONLY option.
127
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000128# this is temp to handle compat with arch=ppc
129config 8xx
130 bool
131
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000132config E500
Andy Fleming39aef682008-02-04 18:27:55 -0600133 select FSL_EMB_PERFMON
Kumar Gala4490c062010-10-08 08:32:11 -0500134 select PPC_FSL_BOOK3E
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000135 bool
136
Kumar Gala3dfa8772008-06-16 09:41:32 -0500137config PPC_E500MC
138 bool "e500mc Support"
139 select PPC_FPU
140 depends on E500
141
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000142config PPC_FPU
143 bool
144 default y if PPC64
145
Kumar Gala5753c082009-10-16 18:31:48 -0500146config FSL_EMB_PERFMON
147 bool "Freescale Embedded Perfmon"
148 depends on E500 || PPC_83xx
149 help
150 This is the Performance Monitor support found on the e500 core
151 and some e300 cores (c3 and c4). Select this only if your
152 core supports the Embedded Performance Monitor APU
153
Scott Wooda1110652010-02-25 18:09:45 -0600154config FSL_EMB_PERF_EVENT
155 bool
156 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
157 default y
158
159config FSL_EMB_PERF_EVENT_E500
160 bool
161 depends on FSL_EMB_PERF_EVENT && E500
162 default y
163
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000164config 4xx
165 bool
166 depends on 40x || 44x
167 default y
168
169config BOOKE
170 bool
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000171 depends on E200 || E500 || 44x || PPC_BOOK3E
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000172 default y
173
174config FSL_BOOKE
175 bool
Kumar Gala4490c062010-10-08 08:32:11 -0500176 depends on (E200 || E500) && PPC32
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000177 default y
178
Kumar Gala4490c062010-10-08 08:32:11 -0500179# this is for common code between PPC32 & PPC64 FSL BOOKE
180config PPC_FSL_BOOK3E
181 bool
182 select FSL_EMB_PERFMON
Milton Miller1ece3552011-05-10 19:29:42 +0000183 select PPC_SMP_MUXED_IPI
Becky Brucea475c8e2011-10-10 10:50:44 +0000184 select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
Kumar Gala4490c062010-10-08 08:32:11 -0500185 default y if FSL_BOOKE
Andy Fleming39aef682008-02-04 18:27:55 -0600186
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000187config PTE_64BIT
188 bool
Becky Bruce4ee70842008-09-24 11:01:24 -0500189 depends on 44x || E500 || PPC_86xx
190 default y if PHYS_64BIT
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000191
192config PHYS_64BIT
Becky Bruce4ee70842008-09-24 11:01:24 -0500193 bool 'Large physical address support' if E500 || PPC_86xx
194 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000195 ---help---
196 This option enables kernel support for larger than 32-bit physical
Becky Bruce4ee70842008-09-24 11:01:24 -0500197 addresses. This feature may not be available on all cores.
198
199 If you have more than 3.5GB of RAM or so, you also need to enable
200 SWIOTLB under Kernel Options for this to work. The actual number
201 is platform-dependent.
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000202
203 If in doubt, say N here.
204
205config ALTIVEC
206 bool "AltiVec Support"
Benjamin Herrenschmidt28794d32009-03-10 17:53:27 +0000207 depends on 6xx || POWER4
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000208 ---help---
209 This option enables kernel support for the Altivec extensions to the
210 PowerPC processor. The kernel currently supports saving and restoring
211 altivec registers, and turning on the 'altivec enable' bit so user
212 processes can execute altivec instructions.
213
214 This option is only usefully if you have a processor that supports
215 altivec (G4, otherwise known as 74xx series), but does not have
216 any affect on a non-altivec cpu (it does, however add code to the
217 kernel).
218
219 If in doubt, say Y here.
220
Michael Neuling96d5b522008-06-25 14:07:18 +1000221config VSX
222 bool "VSX Support"
223 depends on POWER4 && ALTIVEC && PPC_FPU
224 ---help---
225
226 This option enables kernel support for the Vector Scaler extensions
227 to the PowerPC processor. The kernel currently supports saving and
228 restoring VSX registers, and turning on the 'VSX enable' bit so user
229 processes can execute VSX instructions.
230
231 This option is only useful if you have a processor that supports
232 VSX (P7 and above), but does not have any affect on a non-VSX
233 CPUs (it does, however add code to the kernel).
234
235 If in doubt, say Y here.
236
Tseng-Hui (Frank) Lin851d2e22011-05-02 20:43:04 +0000237config PPC_ICSWX
238 bool "Support for PowerPC icswx coprocessor instruction"
Jimi Xenidisfac26ad2011-09-29 10:55:13 +0000239 depends on POWER4 || PPC_A2
Tseng-Hui (Frank) Lin851d2e22011-05-02 20:43:04 +0000240 default n
241 ---help---
242
243 This option enables kernel support for the PowerPC Initiate
244 Coprocessor Store Word (icswx) coprocessor instruction on POWER7
245 or newer processors.
246
247 This option is only useful if you have a processor that supports
248 the icswx coprocessor instruction. It does not have any effect
249 on processors without the icswx coprocessor instruction.
250
251 This option slightly increases kernel memory usage.
252
253 If in doubt, say N here.
254
Jimi Xenidis9d670282011-09-29 10:55:12 +0000255config PPC_ICSWX_PID
256 bool "icswx requires direct PID management"
257 depends on PPC_ICSWX && POWER4
258 default y
259 ---help---
Jimi Xenidisc3dcf532011-09-29 10:55:14 +0000260 The PID register in server is used explicitly for ICSWX. In
Masanari Iida6b2aac42012-04-14 00:14:11 +0900261 embedded systems PID management is done by the system.
Jimi Xenidis9d670282011-09-29 10:55:12 +0000262
Jimi Xenidisc3dcf532011-09-29 10:55:14 +0000263config PPC_ICSWX_USE_SIGILL
264 bool "Should a bad CT cause a SIGILL?"
265 depends on PPC_ICSWX
266 default n
267 ---help---
268 Should a bad CT used for "non-record form ICSWX" cause an
Masanari Iida6b2aac42012-04-14 00:14:11 +0900269 illegal instruction signal or should it be silent as
Jimi Xenidisc3dcf532011-09-29 10:55:14 +0000270 architected.
271
272 If in doubt, say N here.
273
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000274config SPE
275 bool "SPE Support"
Kumar Gala3dfa8772008-06-16 09:41:32 -0500276 depends on E200 || (E500 && !PPC_E500MC)
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000277 default y
278 ---help---
279 This option enables kernel support for the Signal Processing
280 Extensions (SPE) to the PowerPC processor. The kernel currently
281 supports saving and restoring SPE registers, and turning on the
282 'spe enable' bit so user processes can execute SPE instructions.
283
284 This option is only useful if you have a processor that supports
285 SPE (e500, otherwise known as 85xx series), but does not have any
286 effect on a non-spe cpu (it does, however add code to the kernel).
287
288 If in doubt, say Y here.
289
290config PPC_STD_MMU
Benjamin Herrenschmidt5b7c3c92009-06-02 21:17:37 +0000291 def_bool y
292 depends on PPC_BOOK3S
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000293
294config PPC_STD_MMU_32
295 def_bool y
296 depends on PPC_STD_MMU && PPC32
297
Benjamin Herrenschmidt5e696612008-12-18 19:13:24 +0000298config PPC_STD_MMU_64
299 def_bool y
300 depends on PPC_STD_MMU && PPC64
301
302config PPC_MMU_NOHASH
303 def_bool y
304 depends on !PPC_STD_MMU
305
Kumar Gala70fe3af2009-02-12 16:12:40 -0600306config PPC_BOOK3E_MMU
307 def_bool y
Benjamin Herrenschmidt2d27cfd2009-07-23 23:15:59 +0000308 depends on FSL_BOOKE || PPC_BOOK3E
Kumar Gala70fe3af2009-02-12 16:12:40 -0600309
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000310config PPC_MM_SLICES
311 bool
Becky Brucea475c8e2011-10-10 10:50:44 +0000312 default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES)
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000313 default n
314
315config VIRT_CPU_ACCOUNTING
316 bool "Deterministic task and CPU time accounting"
317 depends on PPC64
318 default y
319 help
320 Select this option to enable more accurate task and CPU time
321 accounting. This is done by reading a CPU counter on each
322 kernel entry and exit and on transitions within the kernel
323 between system, softirq and hardirq state, so there is a
324 small performance impact. This also enables accounting of
325 stolen time on logically-partitioned systems running on
326 IBM POWER5-based machines.
327
328 If in doubt, say Y here.
329
Paul Mackerras105988c2009-06-17 21:50:04 +1000330config PPC_HAVE_PMU_SUPPORT
331 bool
332
333config PPC_PERF_CTRS
334 def_bool y
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200335 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
Paul Mackerras105988c2009-06-17 21:50:04 +1000336 help
Ingo Molnarcdd6c482009-09-21 12:02:48 +0200337 This enables the powerpc-specific perf_event back-end.
Paul Mackerras105988c2009-06-17 21:50:04 +1000338
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000339config SMP
Dave Kleikampe7f75ad2010-03-05 10:43:12 +0000340 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000341 bool "Symmetric multi-processing support"
342 ---help---
343 This enables support for systems with more than one CPU. If you have
344 a system with only one CPU, say N. If you have a system with more
345 than one CPU, say Y. Note that the kernel does not currently
346 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
347 since they have inadequate hardware support for multiprocessor
348 operation.
349
350 If you say N here, the kernel will run on single and multiprocessor
351 machines, but will use only one CPU of a multiprocessor machine. If
352 you say Y here, the kernel will run on single-processor machines.
353 On a single-processor machine, the kernel will run faster if you say
354 N here.
355
356 If you don't know what to do here, say N.
357
358config NR_CPUS
Michael Neuling2d8ae632009-05-17 15:13:16 +0000359 int "Maximum number of CPUs (2-8192)"
360 range 2 8192
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000361 depends on SMP
362 default "32" if PPC64
363 default "4"
364
365config NOT_COHERENT_CACHE
366 bool
Albert Herranzb91a1432009-12-12 06:31:38 +0000367 depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON
Dave Kleikampe7f75ad2010-03-05 10:43:12 +0000368 default n if PPC_47x
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000369 default y
370
Robert P. J. Dayf8eb77d2007-07-18 08:21:29 +1000371config CHECK_CACHE_COHERENCY
Arnd Bergmanna0ae9c72007-06-13 02:30:17 +1000372 bool
373
374endmenu