| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 1 | config ARCH_TEGRA |
| 2 | bool "NVIDIA Tegra" if ARCH_MULTI_V7 |
| 3 | select ARCH_HAS_CPUFREQ |
| 4 | select ARCH_REQUIRE_GPIOLIB |
| Stephen Warren | 20984c4 | 2013-08-06 14:38:51 -0600 | [diff] [blame] | 5 | select ARM_GIC |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 6 | select CLKDEV_LOOKUP |
| 7 | select CLKSRC_MMIO |
| 8 | select CLKSRC_OF |
| 9 | select COMMON_CLK |
| Stephen Warren | 20984c4 | 2013-08-06 14:38:51 -0600 | [diff] [blame] | 10 | select CPU_V7 |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 11 | select GENERIC_CLOCKEVENTS |
| Stephen Boyd | 4c3ffff | 2013-02-27 15:28:14 -0800 | [diff] [blame] | 12 | select HAVE_ARM_SCU if SMP |
| 13 | select HAVE_ARM_TWD if LOCAL_TIMERS |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 14 | select HAVE_CLK |
| 15 | select HAVE_SMP |
| 16 | select MIGHT_HAVE_CACHE_L2X0 |
| Stephen Warren | 20984c4 | 2013-08-06 14:38:51 -0600 | [diff] [blame] | 17 | select PINCTRL |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 18 | select SOC_BUS |
| 19 | select SPARSE_IRQ |
| Stephen Warren | 20984c4 | 2013-08-06 14:38:51 -0600 | [diff] [blame] | 20 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
| 21 | select USB_ULPI if USB_PHY |
| 22 | select USB_ULPI_VIEWPORT if USB_PHY |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 23 | select USE_OF |
| Thierry Reding | d1523b5 | 2013-08-09 16:49:19 +0200 | [diff] [blame] | 24 | select MIGHT_HAVE_PCI |
| 25 | select ARCH_SUPPORTS_MSI |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 26 | help |
| 27 | This enables support for NVIDIA Tegra based systems. |
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 28 | |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 29 | menu "NVIDIA Tegra options" |
| 30 | depends on ARCH_TEGRA |
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 31 | |
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 32 | config ARCH_TEGRA_2x_SOC |
| Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 33 | bool "Enable support for Tegra20 family" |
| Joseph Lo | 1d32860 | 2013-01-16 17:33:55 +0000 | [diff] [blame] | 34 | select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP |
| Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 35 | select ARM_ERRATA_720789 |
| Stephen Warren | 45c9e59 | 2013-01-02 14:34:15 -0700 | [diff] [blame] | 36 | select ARM_ERRATA_754327 if SMP |
| Arnd Bergmann | 8f90cce | 2012-08-16 09:36:04 +0000 | [diff] [blame] | 37 | select ARM_ERRATA_764369 if SMP |
| Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 38 | select PINCTRL_TEGRA20 |
| Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 39 | select PL310_ERRATA_727915 if CACHE_L2X0 |
| 40 | select PL310_ERRATA_769419 if CACHE_L2X0 |
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 41 | help |
| 42 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
| 43 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
| 44 | |
| Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 45 | config ARCH_TEGRA_3x_SOC |
| 46 | bool "Enable support for Tegra30 family" |
| Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 47 | select ARM_ERRATA_754322 |
| Arnd Bergmann | 8f90cce | 2012-08-16 09:36:04 +0000 | [diff] [blame] | 48 | select ARM_ERRATA_764369 if SMP |
| Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 49 | select PINCTRL_TEGRA30 |
| 50 | select PL310_ERRATA_769419 if CACHE_L2X0 |
| Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 51 | help |
| 52 | Support for NVIDIA Tegra T30 processor family, based on the |
| 53 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 54 | |
| Hiroshi Doyu | 5c541b8 | 2013-01-24 01:10:26 +0000 | [diff] [blame] | 55 | config ARCH_TEGRA_114_SOC |
| 56 | bool "Enable support for Tegra114 family" |
| Mark Rutland | fb521a0 | 2013-03-20 13:57:38 +0000 | [diff] [blame] | 57 | select HAVE_ARM_ARCH_TIMER |
| Joseph Lo | f2bd77c | 2013-07-03 17:55:48 +0800 | [diff] [blame] | 58 | select ARM_ERRATA_798181 |
| Stephen Warren | 1d7e5c2 | 2013-02-07 14:43:24 -0700 | [diff] [blame] | 59 | select ARM_L1_CACHE_SHIFT_6 |
| Laxman Dewangan | 20fd480 | 2013-01-29 18:26:17 +0530 | [diff] [blame] | 60 | select PINCTRL_TEGRA114 |
| Hiroshi Doyu | 5c541b8 | 2013-01-24 01:10:26 +0000 | [diff] [blame] | 61 | help |
| 62 | Support for NVIDIA Tegra T114 processor family, based on the |
| 63 | ARM CortexA15MP CPU |
| 64 | |
| Hiroshi DOYU | 87d0bab | 2012-05-07 12:24:48 +0200 | [diff] [blame] | 65 | config TEGRA_AHB |
| 66 | bool "Enable AHB driver for NVIDIA Tegra SoCs" |
| 67 | default y |
| 68 | help |
| 69 | Adds AHB configuration functionality for NVIDIA Tegra SoCs, |
| 70 | which controls AHB bus master arbitration and some |
| Masanari Iida | e41e85c | 2012-11-30 16:44:39 +0900 | [diff] [blame] | 71 | performance parameters(priority, prefech size). |
| Hiroshi DOYU | 87d0bab | 2012-05-07 12:24:48 +0200 | [diff] [blame] | 72 | |
| Colin Cross | efdf72a | 2011-02-12 18:22:49 -0800 | [diff] [blame] | 73 | config TEGRA_EMC_SCALING_ENABLE |
| 74 | bool "Enable scaling the memory frequency" |
| Mark Brown | 3837686 | 2011-02-22 20:35:24 +0000 | [diff] [blame] | 75 | |
| Stephen Warren | 9002722 | 2012-09-26 13:08:59 -0600 | [diff] [blame] | 76 | endmenu |