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gerrit-public.fairphone.software / kernel / msm-4.9 / 8f90cce5a9b0ecf3cc6d3d3046cbfc19fc957dcb / . / arch / arm / mach-tegra / Kconfig
blob: b5f62ab04e847b913ff676a8bde84a5387e2c257 [file] [log] [blame]
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]1if ARCH_TEGRA
2
3comment "NVIDIA Tegra options"
4
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]5config ARCH_TEGRA_2x_SOC
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]6 bool "Enable support for Tegra20 family"
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]7 select CPU_V7
8 select ARM_GIC
Erik Gilling3c92db92010-03-15 19:40:06 -0700[diff] [blame]9 select ARCH_REQUIRE_GPIOLIB
Stephen Warrenf1f1ffa2012-02-01 14:04:48 -0700[diff] [blame]10 select PINCTRL
11 select PINCTRL_TEGRA20
Benoit Goby91525d02011-03-09 16:28:55 -0800[diff] [blame]12 select USB_ARCH_HAS_EHCI if USB_SUPPORT
Arnd Bergmann279b6582012-03-02 17:26:00 -0500[diff] [blame]13 select USB_ULPI if USB
Benoit Goby91525d02011-03-09 16:28:55 -0800[diff] [blame]14 select USB_ULPI_VIEWPORT if USB_SUPPORT
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]15 select ARM_ERRATA_720789
16 select ARM_ERRATA_742230
17 select ARM_ERRATA_751472
18 select ARM_ERRATA_754327
Arnd Bergmann8f90cce2012-08-16 09:36:04 +0000[diff] [blame^]19 select ARM_ERRATA_764369 if SMP
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]20 select PL310_ERRATA_727915 if CACHE_L2X0
21 select PL310_ERRATA_769419 if CACHE_L2X0
Arnd Bergmann013df382012-03-02 15:58:28 -0500[diff] [blame]22 select CPU_FREQ_TABLE if CPU_FREQ
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]23 help
24 Support for NVIDIA Tegra AP20 and T20 processors, based on the
25 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
26
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]27config ARCH_TEGRA_3x_SOC
28 bool "Enable support for Tegra30 family"
29 select CPU_V7
30 select ARM_GIC
31 select ARCH_REQUIRE_GPIOLIB
Stephen Warrenf1f1ffa2012-02-01 14:04:48 -0700[diff] [blame]32 select PINCTRL
33 select PINCTRL_TEGRA30
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]34 select USB_ARCH_HAS_EHCI if USB_SUPPORT
Arnd Bergmann279b6582012-03-02 17:26:00 -0500[diff] [blame]35 select USB_ULPI if USB
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]36 select USB_ULPI_VIEWPORT if USB_SUPPORT
37 select USE_OF
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]38 select ARM_ERRATA_743622
39 select ARM_ERRATA_751472
40 select ARM_ERRATA_754322
Arnd Bergmann8f90cce2012-08-16 09:36:04 +0000[diff] [blame^]41 select ARM_ERRATA_764369 if SMP
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]42 select PL310_ERRATA_769419 if CACHE_L2X0
Arnd Bergmann013df382012-03-02 15:58:28 -0500[diff] [blame]43 select CPU_FREQ_TABLE if CPU_FREQ
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]44 help
45 Support for NVIDIA Tegra T30 processor family, based on the
46 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]47
Mike Rapoport77ffc142010-09-27 11:26:33 +0200[diff] [blame]48config TEGRA_PCI
49 bool "PCI Express support"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]50 depends on ARCH_TEGRA_2x_SOC
Mike Rapoport77ffc142010-09-27 11:26:33 +0200[diff] [blame]51 select PCI
52
Hiroshi DOYU87d0bab2012-05-07 12:24:48 +0200[diff] [blame]53config TEGRA_AHB
54 bool "Enable AHB driver for NVIDIA Tegra SoCs"
55 default y
56 help
57 Adds AHB configuration functionality for NVIDIA Tegra SoCs,
58 which controls AHB bus master arbitration and some
59 perfomance parameters(priority, prefech size).
60
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]61comment "Tegra board type"
62
63config MACH_HARMONY
64 bool "Harmony board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]65 depends on ARCH_TEGRA_2x_SOC
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]66 help
67 Support for nVidia Harmony development platform
68
Marc Dietrich65b935a2011-03-07 21:01:31 +0100[diff] [blame]69config MACH_PAZ00
70 bool "Paz00 board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]71 depends on ARCH_TEGRA_2x_SOC
Marc Dietrich65b935a2011-03-07 21:01:31 +0100[diff] [blame]72 help
73 Support for the Toshiba AC100/Dynabook AZ netbook
74
Mike Rapoportcca414b2011-02-07 10:10:53 +0200[diff] [blame]75config MACH_TRIMSLICE
76 bool "TrimSlice board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]77 depends on ARCH_TEGRA_2x_SOC
Mike Rapoportcca414b2011-02-07 10:10:53 +0200[diff] [blame]78 select TEGRA_PCI
79 help
80 Support for CompuLab TrimSlice platform
81
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]82choice
Stephen Warren80881da2012-03-26 12:49:57 -0600[diff] [blame]83 prompt "Default low-level debug console UART"
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]84 default TEGRA_DEBUG_UART_NONE
85
86config TEGRA_DEBUG_UART_NONE
87 bool "None"
88
89config TEGRA_DEBUG_UARTA
90 bool "UART-A"
91
92config TEGRA_DEBUG_UARTB
93 bool "UART-B"
94
95config TEGRA_DEBUG_UARTC
96 bool "UART-C"
97
98config TEGRA_DEBUG_UARTD
99 bool "UART-D"
100
101config TEGRA_DEBUG_UARTE
102 bool "UART-E"
103
104endchoice
105
Stephen Warren80881da2012-03-26 12:49:57 -0600[diff] [blame]106choice
107 prompt "Automatic low-level debug console UART"
108 default TEGRA_DEBUG_UART_AUTO_NONE
109
110config TEGRA_DEBUG_UART_AUTO_NONE
111 bool "None"
112
113config TEGRA_DEBUG_UART_AUTO_ODMDATA
114 bool "Via ODMDATA"
115 help
116 Automatically determines which UART to use for low-level debug based
117 on the ODMDATA value. This value is part of the BCT, and is written
118 to the boot memory device using nvflash, or other flashing tool.
119 When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
120 0/1/2/3/4 are UART A/B/C/D/E.
121
122config TEGRA_DEBUG_UART_AUTO_SCRATCH
123 bool "Via UART scratch register"
124 help
125 Automatically determines which UART to use for low-level debug based
126 on the UART scratch register value. Some bootloaders put ASCII 'D'
127 in this register when they initialize their own console UART output.
128 Using this option allows the kernel to automatically pick the same
129 UART.
130
131endchoice
132
Colin Cross4de3a8f2010-04-05 13:16:42 -0700[diff] [blame]133config TEGRA_SYSTEM_DMA
134 bool "Enable system DMA driver for NVIDIA Tegra SoCs"
135 default y
136 help
137 Adds system DMA functionality for NVIDIA Tegra SoCs, used by
138 several Tegra device drivers
139
Colin Crossefdf72a2011-02-12 18:22:49 -0800[diff] [blame]140config TEGRA_EMC_SCALING_ENABLE
141 bool "Enable scaling the memory frequency"
Mark Brown38376862011-02-22 20:35:24 +0000[diff] [blame]142
143endif