Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel(R) Gigabit Ethernet Linux driver |
| 4 | Copyright(c) 2007 Intel Corporation. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/types.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/vmalloc.h> |
| 32 | #include <linux/pagemap.h> |
| 33 | #include <linux/netdevice.h> |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 34 | #include <linux/ipv6.h> |
| 35 | #include <net/checksum.h> |
| 36 | #include <net/ip6_checksum.h> |
| 37 | #include <linux/mii.h> |
| 38 | #include <linux/ethtool.h> |
| 39 | #include <linux/if_vlan.h> |
| 40 | #include <linux/pci.h> |
| 41 | #include <linux/delay.h> |
| 42 | #include <linux/interrupt.h> |
| 43 | #include <linux/if_ether.h> |
| 44 | |
| 45 | #include "igb.h" |
| 46 | |
| 47 | #define DRV_VERSION "1.0.8-k2" |
| 48 | char igb_driver_name[] = "igb"; |
| 49 | char igb_driver_version[] = DRV_VERSION; |
| 50 | static const char igb_driver_string[] = |
| 51 | "Intel(R) Gigabit Ethernet Network Driver"; |
| 52 | static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation."; |
| 53 | |
| 54 | |
| 55 | static const struct e1000_info *igb_info_tbl[] = { |
| 56 | [board_82575] = &e1000_82575_info, |
| 57 | }; |
| 58 | |
| 59 | static struct pci_device_id igb_pci_tbl[] = { |
| 60 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 }, |
| 61 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 }, |
| 62 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 }, |
| 63 | /* required last entry */ |
| 64 | {0, } |
| 65 | }; |
| 66 | |
| 67 | MODULE_DEVICE_TABLE(pci, igb_pci_tbl); |
| 68 | |
| 69 | void igb_reset(struct igb_adapter *); |
| 70 | static int igb_setup_all_tx_resources(struct igb_adapter *); |
| 71 | static int igb_setup_all_rx_resources(struct igb_adapter *); |
| 72 | static void igb_free_all_tx_resources(struct igb_adapter *); |
| 73 | static void igb_free_all_rx_resources(struct igb_adapter *); |
| 74 | static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *); |
| 75 | static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *); |
| 76 | void igb_update_stats(struct igb_adapter *); |
| 77 | static int igb_probe(struct pci_dev *, const struct pci_device_id *); |
| 78 | static void __devexit igb_remove(struct pci_dev *pdev); |
| 79 | static int igb_sw_init(struct igb_adapter *); |
| 80 | static int igb_open(struct net_device *); |
| 81 | static int igb_close(struct net_device *); |
| 82 | static void igb_configure_tx(struct igb_adapter *); |
| 83 | static void igb_configure_rx(struct igb_adapter *); |
| 84 | static void igb_setup_rctl(struct igb_adapter *); |
| 85 | static void igb_clean_all_tx_rings(struct igb_adapter *); |
| 86 | static void igb_clean_all_rx_rings(struct igb_adapter *); |
| 87 | static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *); |
| 88 | static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *); |
| 89 | static void igb_set_multi(struct net_device *); |
| 90 | static void igb_update_phy_info(unsigned long); |
| 91 | static void igb_watchdog(unsigned long); |
| 92 | static void igb_watchdog_task(struct work_struct *); |
| 93 | static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *, |
| 94 | struct igb_ring *); |
| 95 | static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *); |
| 96 | static struct net_device_stats *igb_get_stats(struct net_device *); |
| 97 | static int igb_change_mtu(struct net_device *, int); |
| 98 | static int igb_set_mac(struct net_device *, void *); |
| 99 | static irqreturn_t igb_intr(int irq, void *); |
| 100 | static irqreturn_t igb_intr_msi(int irq, void *); |
| 101 | static irqreturn_t igb_msix_other(int irq, void *); |
| 102 | static irqreturn_t igb_msix_rx(int irq, void *); |
| 103 | static irqreturn_t igb_msix_tx(int irq, void *); |
| 104 | static int igb_clean_rx_ring_msix(struct napi_struct *, int); |
| 105 | static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *); |
| 106 | static int igb_clean(struct napi_struct *, int); |
| 107 | static bool igb_clean_rx_irq_adv(struct igb_adapter *, |
| 108 | struct igb_ring *, int *, int); |
| 109 | static void igb_alloc_rx_buffers_adv(struct igb_adapter *, |
| 110 | struct igb_ring *, int); |
| 111 | static int igb_ioctl(struct net_device *, struct ifreq *, int cmd); |
| 112 | static void igb_tx_timeout(struct net_device *); |
| 113 | static void igb_reset_task(struct work_struct *); |
| 114 | static void igb_vlan_rx_register(struct net_device *, struct vlan_group *); |
| 115 | static void igb_vlan_rx_add_vid(struct net_device *, u16); |
| 116 | static void igb_vlan_rx_kill_vid(struct net_device *, u16); |
| 117 | static void igb_restore_vlan(struct igb_adapter *); |
| 118 | |
| 119 | static int igb_suspend(struct pci_dev *, pm_message_t); |
| 120 | #ifdef CONFIG_PM |
| 121 | static int igb_resume(struct pci_dev *); |
| 122 | #endif |
| 123 | static void igb_shutdown(struct pci_dev *); |
| 124 | |
| 125 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 126 | /* for netdump / net console */ |
| 127 | static void igb_netpoll(struct net_device *); |
| 128 | #endif |
| 129 | |
| 130 | static pci_ers_result_t igb_io_error_detected(struct pci_dev *, |
| 131 | pci_channel_state_t); |
| 132 | static pci_ers_result_t igb_io_slot_reset(struct pci_dev *); |
| 133 | static void igb_io_resume(struct pci_dev *); |
| 134 | |
| 135 | static struct pci_error_handlers igb_err_handler = { |
| 136 | .error_detected = igb_io_error_detected, |
| 137 | .slot_reset = igb_io_slot_reset, |
| 138 | .resume = igb_io_resume, |
| 139 | }; |
| 140 | |
| 141 | |
| 142 | static struct pci_driver igb_driver = { |
| 143 | .name = igb_driver_name, |
| 144 | .id_table = igb_pci_tbl, |
| 145 | .probe = igb_probe, |
| 146 | .remove = __devexit_p(igb_remove), |
| 147 | #ifdef CONFIG_PM |
| 148 | /* Power Managment Hooks */ |
| 149 | .suspend = igb_suspend, |
| 150 | .resume = igb_resume, |
| 151 | #endif |
| 152 | .shutdown = igb_shutdown, |
| 153 | .err_handler = &igb_err_handler |
| 154 | }; |
| 155 | |
| 156 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); |
| 157 | MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver"); |
| 158 | MODULE_LICENSE("GPL"); |
| 159 | MODULE_VERSION(DRV_VERSION); |
| 160 | |
| 161 | #ifdef DEBUG |
| 162 | /** |
| 163 | * igb_get_hw_dev_name - return device name string |
| 164 | * used by hardware layer to print debugging information |
| 165 | **/ |
| 166 | char *igb_get_hw_dev_name(struct e1000_hw *hw) |
| 167 | { |
| 168 | struct igb_adapter *adapter = hw->back; |
| 169 | return adapter->netdev->name; |
| 170 | } |
| 171 | #endif |
| 172 | |
| 173 | /** |
| 174 | * igb_init_module - Driver Registration Routine |
| 175 | * |
| 176 | * igb_init_module is the first routine called when the driver is |
| 177 | * loaded. All it does is register with the PCI subsystem. |
| 178 | **/ |
| 179 | static int __init igb_init_module(void) |
| 180 | { |
| 181 | int ret; |
| 182 | printk(KERN_INFO "%s - version %s\n", |
| 183 | igb_driver_string, igb_driver_version); |
| 184 | |
| 185 | printk(KERN_INFO "%s\n", igb_copyright); |
| 186 | |
| 187 | ret = pci_register_driver(&igb_driver); |
| 188 | return ret; |
| 189 | } |
| 190 | |
| 191 | module_init(igb_init_module); |
| 192 | |
| 193 | /** |
| 194 | * igb_exit_module - Driver Exit Cleanup Routine |
| 195 | * |
| 196 | * igb_exit_module is called just before the driver is removed |
| 197 | * from memory. |
| 198 | **/ |
| 199 | static void __exit igb_exit_module(void) |
| 200 | { |
| 201 | pci_unregister_driver(&igb_driver); |
| 202 | } |
| 203 | |
| 204 | module_exit(igb_exit_module); |
| 205 | |
| 206 | /** |
| 207 | * igb_alloc_queues - Allocate memory for all rings |
| 208 | * @adapter: board private structure to initialize |
| 209 | * |
| 210 | * We allocate one ring per queue at run-time since we don't know the |
| 211 | * number of queues at compile-time. |
| 212 | **/ |
| 213 | static int igb_alloc_queues(struct igb_adapter *adapter) |
| 214 | { |
| 215 | int i; |
| 216 | |
| 217 | adapter->tx_ring = kcalloc(adapter->num_tx_queues, |
| 218 | sizeof(struct igb_ring), GFP_KERNEL); |
| 219 | if (!adapter->tx_ring) |
| 220 | return -ENOMEM; |
| 221 | |
| 222 | adapter->rx_ring = kcalloc(adapter->num_rx_queues, |
| 223 | sizeof(struct igb_ring), GFP_KERNEL); |
| 224 | if (!adapter->rx_ring) { |
| 225 | kfree(adapter->tx_ring); |
| 226 | return -ENOMEM; |
| 227 | } |
| 228 | |
| 229 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 230 | struct igb_ring *ring = &(adapter->rx_ring[i]); |
| 231 | ring->adapter = adapter; |
| 232 | ring->itr_register = E1000_ITR; |
| 233 | |
| 234 | if (!ring->napi.poll) |
| 235 | netif_napi_add(adapter->netdev, &ring->napi, igb_clean, |
| 236 | adapter->napi.weight / |
| 237 | adapter->num_rx_queues); |
| 238 | } |
| 239 | return 0; |
| 240 | } |
| 241 | |
| 242 | #define IGB_N0_QUEUE -1 |
| 243 | static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue, |
| 244 | int tx_queue, int msix_vector) |
| 245 | { |
| 246 | u32 msixbm = 0; |
| 247 | struct e1000_hw *hw = &adapter->hw; |
| 248 | /* The 82575 assigns vectors using a bitmask, which matches the |
| 249 | bitmask for the EICR/EIMS/EIMC registers. To assign one |
| 250 | or more queues to a vector, we write the appropriate bits |
| 251 | into the MSIXBM register for that vector. */ |
| 252 | if (rx_queue > IGB_N0_QUEUE) { |
| 253 | msixbm = E1000_EICR_RX_QUEUE0 << rx_queue; |
| 254 | adapter->rx_ring[rx_queue].eims_value = msixbm; |
| 255 | } |
| 256 | if (tx_queue > IGB_N0_QUEUE) { |
| 257 | msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue; |
| 258 | adapter->tx_ring[tx_queue].eims_value = |
| 259 | E1000_EICR_TX_QUEUE0 << tx_queue; |
| 260 | } |
| 261 | array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); |
| 262 | } |
| 263 | |
| 264 | /** |
| 265 | * igb_configure_msix - Configure MSI-X hardware |
| 266 | * |
| 267 | * igb_configure_msix sets up the hardware to properly |
| 268 | * generate MSI-X interrupts. |
| 269 | **/ |
| 270 | static void igb_configure_msix(struct igb_adapter *adapter) |
| 271 | { |
| 272 | u32 tmp; |
| 273 | int i, vector = 0; |
| 274 | struct e1000_hw *hw = &adapter->hw; |
| 275 | |
| 276 | adapter->eims_enable_mask = 0; |
| 277 | |
| 278 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 279 | struct igb_ring *tx_ring = &adapter->tx_ring[i]; |
| 280 | igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++); |
| 281 | adapter->eims_enable_mask |= tx_ring->eims_value; |
| 282 | if (tx_ring->itr_val) |
| 283 | writel(1000000000 / (tx_ring->itr_val * 256), |
| 284 | hw->hw_addr + tx_ring->itr_register); |
| 285 | else |
| 286 | writel(1, hw->hw_addr + tx_ring->itr_register); |
| 287 | } |
| 288 | |
| 289 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 290 | struct igb_ring *rx_ring = &adapter->rx_ring[i]; |
| 291 | igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++); |
| 292 | adapter->eims_enable_mask |= rx_ring->eims_value; |
| 293 | if (rx_ring->itr_val) |
| 294 | writel(1000000000 / (rx_ring->itr_val * 256), |
| 295 | hw->hw_addr + rx_ring->itr_register); |
| 296 | else |
| 297 | writel(1, hw->hw_addr + rx_ring->itr_register); |
| 298 | } |
| 299 | |
| 300 | |
| 301 | /* set vector for other causes, i.e. link changes */ |
| 302 | array_wr32(E1000_MSIXBM(0), vector++, |
| 303 | E1000_EIMS_OTHER); |
| 304 | |
| 305 | /* disable IAM for ICR interrupt bits */ |
| 306 | wr32(E1000_IAM, 0); |
| 307 | |
| 308 | tmp = rd32(E1000_CTRL_EXT); |
| 309 | /* enable MSI-X PBA support*/ |
| 310 | tmp |= E1000_CTRL_EXT_PBA_CLR; |
| 311 | |
| 312 | /* Auto-Mask interrupts upon ICR read. */ |
| 313 | tmp |= E1000_CTRL_EXT_EIAME; |
| 314 | tmp |= E1000_CTRL_EXT_IRCA; |
| 315 | |
| 316 | wr32(E1000_CTRL_EXT, tmp); |
| 317 | adapter->eims_enable_mask |= E1000_EIMS_OTHER; |
| 318 | |
| 319 | wrfl(); |
| 320 | } |
| 321 | |
| 322 | /** |
| 323 | * igb_request_msix - Initialize MSI-X interrupts |
| 324 | * |
| 325 | * igb_request_msix allocates MSI-X vectors and requests interrupts from the |
| 326 | * kernel. |
| 327 | **/ |
| 328 | static int igb_request_msix(struct igb_adapter *adapter) |
| 329 | { |
| 330 | struct net_device *netdev = adapter->netdev; |
| 331 | int i, err = 0, vector = 0; |
| 332 | |
| 333 | vector = 0; |
| 334 | |
| 335 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 336 | struct igb_ring *ring = &(adapter->tx_ring[i]); |
| 337 | sprintf(ring->name, "%s-tx%d", netdev->name, i); |
| 338 | err = request_irq(adapter->msix_entries[vector].vector, |
| 339 | &igb_msix_tx, 0, ring->name, |
| 340 | &(adapter->tx_ring[i])); |
| 341 | if (err) |
| 342 | goto out; |
| 343 | ring->itr_register = E1000_EITR(0) + (vector << 2); |
| 344 | ring->itr_val = adapter->itr; |
| 345 | vector++; |
| 346 | } |
| 347 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 348 | struct igb_ring *ring = &(adapter->rx_ring[i]); |
| 349 | if (strlen(netdev->name) < (IFNAMSIZ - 5)) |
| 350 | sprintf(ring->name, "%s-rx%d", netdev->name, i); |
| 351 | else |
| 352 | memcpy(ring->name, netdev->name, IFNAMSIZ); |
| 353 | err = request_irq(adapter->msix_entries[vector].vector, |
| 354 | &igb_msix_rx, 0, ring->name, |
| 355 | &(adapter->rx_ring[i])); |
| 356 | if (err) |
| 357 | goto out; |
| 358 | ring->itr_register = E1000_EITR(0) + (vector << 2); |
| 359 | ring->itr_val = adapter->itr; |
| 360 | vector++; |
| 361 | } |
| 362 | |
| 363 | err = request_irq(adapter->msix_entries[vector].vector, |
| 364 | &igb_msix_other, 0, netdev->name, netdev); |
| 365 | if (err) |
| 366 | goto out; |
| 367 | |
| 368 | adapter->napi.poll = igb_clean_rx_ring_msix; |
| 369 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 370 | adapter->rx_ring[i].napi.poll = adapter->napi.poll; |
| 371 | igb_configure_msix(adapter); |
| 372 | return 0; |
| 373 | out: |
| 374 | return err; |
| 375 | } |
| 376 | |
| 377 | static void igb_reset_interrupt_capability(struct igb_adapter *adapter) |
| 378 | { |
| 379 | if (adapter->msix_entries) { |
| 380 | pci_disable_msix(adapter->pdev); |
| 381 | kfree(adapter->msix_entries); |
| 382 | adapter->msix_entries = NULL; |
| 383 | } else if (adapter->msi_enabled) |
| 384 | pci_disable_msi(adapter->pdev); |
| 385 | return; |
| 386 | } |
| 387 | |
| 388 | |
| 389 | /** |
| 390 | * igb_set_interrupt_capability - set MSI or MSI-X if supported |
| 391 | * |
| 392 | * Attempt to configure interrupts using the best available |
| 393 | * capabilities of the hardware and kernel. |
| 394 | **/ |
| 395 | static void igb_set_interrupt_capability(struct igb_adapter *adapter) |
| 396 | { |
| 397 | int err; |
| 398 | int numvecs, i; |
| 399 | |
| 400 | numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1; |
| 401 | adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry), |
| 402 | GFP_KERNEL); |
| 403 | if (!adapter->msix_entries) |
| 404 | goto msi_only; |
| 405 | |
| 406 | for (i = 0; i < numvecs; i++) |
| 407 | adapter->msix_entries[i].entry = i; |
| 408 | |
| 409 | err = pci_enable_msix(adapter->pdev, |
| 410 | adapter->msix_entries, |
| 411 | numvecs); |
| 412 | if (err == 0) |
| 413 | return; |
| 414 | |
| 415 | igb_reset_interrupt_capability(adapter); |
| 416 | |
| 417 | /* If we can't do MSI-X, try MSI */ |
| 418 | msi_only: |
| 419 | adapter->num_rx_queues = 1; |
| 420 | if (!pci_enable_msi(adapter->pdev)) |
| 421 | adapter->msi_enabled = 1; |
| 422 | return; |
| 423 | } |
| 424 | |
| 425 | /** |
| 426 | * igb_request_irq - initialize interrupts |
| 427 | * |
| 428 | * Attempts to configure interrupts using the best available |
| 429 | * capabilities of the hardware and kernel. |
| 430 | **/ |
| 431 | static int igb_request_irq(struct igb_adapter *adapter) |
| 432 | { |
| 433 | struct net_device *netdev = adapter->netdev; |
| 434 | struct e1000_hw *hw = &adapter->hw; |
| 435 | int err = 0; |
| 436 | |
| 437 | if (adapter->msix_entries) { |
| 438 | err = igb_request_msix(adapter); |
| 439 | if (!err) { |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 440 | /* enable IAM, auto-mask, |
Andy Gospodarek | 6cb5e57 | 2008-02-15 14:05:25 -0800 | [diff] [blame] | 441 | * DO NOT USE EIAM or IAM in legacy mode */ |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 442 | wr32(E1000_IAM, IMS_ENABLE_MASK); |
| 443 | goto request_done; |
| 444 | } |
| 445 | /* fall back to MSI */ |
| 446 | igb_reset_interrupt_capability(adapter); |
| 447 | if (!pci_enable_msi(adapter->pdev)) |
| 448 | adapter->msi_enabled = 1; |
| 449 | igb_free_all_tx_resources(adapter); |
| 450 | igb_free_all_rx_resources(adapter); |
| 451 | adapter->num_rx_queues = 1; |
| 452 | igb_alloc_queues(adapter); |
| 453 | } |
| 454 | if (adapter->msi_enabled) { |
| 455 | err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0, |
| 456 | netdev->name, netdev); |
| 457 | if (!err) |
| 458 | goto request_done; |
| 459 | /* fall back to legacy interrupts */ |
| 460 | igb_reset_interrupt_capability(adapter); |
| 461 | adapter->msi_enabled = 0; |
| 462 | } |
| 463 | |
| 464 | err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED, |
| 465 | netdev->name, netdev); |
| 466 | |
Andy Gospodarek | 6cb5e57 | 2008-02-15 14:05:25 -0800 | [diff] [blame] | 467 | if (err) |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 468 | dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n", |
| 469 | err); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 470 | |
| 471 | request_done: |
| 472 | return err; |
| 473 | } |
| 474 | |
| 475 | static void igb_free_irq(struct igb_adapter *adapter) |
| 476 | { |
| 477 | struct net_device *netdev = adapter->netdev; |
| 478 | |
| 479 | if (adapter->msix_entries) { |
| 480 | int vector = 0, i; |
| 481 | |
| 482 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 483 | free_irq(adapter->msix_entries[vector++].vector, |
| 484 | &(adapter->tx_ring[i])); |
| 485 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 486 | free_irq(adapter->msix_entries[vector++].vector, |
| 487 | &(adapter->rx_ring[i])); |
| 488 | |
| 489 | free_irq(adapter->msix_entries[vector++].vector, netdev); |
| 490 | return; |
| 491 | } |
| 492 | |
| 493 | free_irq(adapter->pdev->irq, netdev); |
| 494 | } |
| 495 | |
| 496 | /** |
| 497 | * igb_irq_disable - Mask off interrupt generation on the NIC |
| 498 | * @adapter: board private structure |
| 499 | **/ |
| 500 | static void igb_irq_disable(struct igb_adapter *adapter) |
| 501 | { |
| 502 | struct e1000_hw *hw = &adapter->hw; |
| 503 | |
| 504 | if (adapter->msix_entries) { |
| 505 | wr32(E1000_EIMC, ~0); |
| 506 | wr32(E1000_EIAC, 0); |
| 507 | } |
| 508 | wr32(E1000_IMC, ~0); |
| 509 | wrfl(); |
| 510 | synchronize_irq(adapter->pdev->irq); |
| 511 | } |
| 512 | |
| 513 | /** |
| 514 | * igb_irq_enable - Enable default interrupt generation settings |
| 515 | * @adapter: board private structure |
| 516 | **/ |
| 517 | static void igb_irq_enable(struct igb_adapter *adapter) |
| 518 | { |
| 519 | struct e1000_hw *hw = &adapter->hw; |
| 520 | |
| 521 | if (adapter->msix_entries) { |
| 522 | wr32(E1000_EIMS, |
| 523 | adapter->eims_enable_mask); |
| 524 | wr32(E1000_EIAC, |
| 525 | adapter->eims_enable_mask); |
| 526 | wr32(E1000_IMS, E1000_IMS_LSC); |
| 527 | } else |
| 528 | wr32(E1000_IMS, IMS_ENABLE_MASK); |
| 529 | } |
| 530 | |
| 531 | static void igb_update_mng_vlan(struct igb_adapter *adapter) |
| 532 | { |
| 533 | struct net_device *netdev = adapter->netdev; |
| 534 | u16 vid = adapter->hw.mng_cookie.vlan_id; |
| 535 | u16 old_vid = adapter->mng_vlan_id; |
| 536 | if (adapter->vlgrp) { |
| 537 | if (!vlan_group_get_device(adapter->vlgrp, vid)) { |
| 538 | if (adapter->hw.mng_cookie.status & |
| 539 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { |
| 540 | igb_vlan_rx_add_vid(netdev, vid); |
| 541 | adapter->mng_vlan_id = vid; |
| 542 | } else |
| 543 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; |
| 544 | |
| 545 | if ((old_vid != (u16)IGB_MNG_VLAN_NONE) && |
| 546 | (vid != old_vid) && |
| 547 | !vlan_group_get_device(adapter->vlgrp, old_vid)) |
| 548 | igb_vlan_rx_kill_vid(netdev, old_vid); |
| 549 | } else |
| 550 | adapter->mng_vlan_id = vid; |
| 551 | } |
| 552 | } |
| 553 | |
| 554 | /** |
| 555 | * igb_release_hw_control - release control of the h/w to f/w |
| 556 | * @adapter: address of board private structure |
| 557 | * |
| 558 | * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit. |
| 559 | * For ASF and Pass Through versions of f/w this means that the |
| 560 | * driver is no longer loaded. |
| 561 | * |
| 562 | **/ |
| 563 | static void igb_release_hw_control(struct igb_adapter *adapter) |
| 564 | { |
| 565 | struct e1000_hw *hw = &adapter->hw; |
| 566 | u32 ctrl_ext; |
| 567 | |
| 568 | /* Let firmware take over control of h/w */ |
| 569 | ctrl_ext = rd32(E1000_CTRL_EXT); |
| 570 | wr32(E1000_CTRL_EXT, |
| 571 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); |
| 572 | } |
| 573 | |
| 574 | |
| 575 | /** |
| 576 | * igb_get_hw_control - get control of the h/w from f/w |
| 577 | * @adapter: address of board private structure |
| 578 | * |
| 579 | * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit. |
| 580 | * For ASF and Pass Through versions of f/w this means that |
| 581 | * the driver is loaded. |
| 582 | * |
| 583 | **/ |
| 584 | static void igb_get_hw_control(struct igb_adapter *adapter) |
| 585 | { |
| 586 | struct e1000_hw *hw = &adapter->hw; |
| 587 | u32 ctrl_ext; |
| 588 | |
| 589 | /* Let firmware know the driver has taken over */ |
| 590 | ctrl_ext = rd32(E1000_CTRL_EXT); |
| 591 | wr32(E1000_CTRL_EXT, |
| 592 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); |
| 593 | } |
| 594 | |
| 595 | static void igb_init_manageability(struct igb_adapter *adapter) |
| 596 | { |
| 597 | struct e1000_hw *hw = &adapter->hw; |
| 598 | |
| 599 | if (adapter->en_mng_pt) { |
| 600 | u32 manc2h = rd32(E1000_MANC2H); |
| 601 | u32 manc = rd32(E1000_MANC); |
| 602 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 603 | /* enable receiving management packets to the host */ |
| 604 | /* this will probably generate destination unreachable messages |
| 605 | * from the host OS, but the packets will be handled on SMBUS */ |
| 606 | manc |= E1000_MANC_EN_MNG2HOST; |
| 607 | #define E1000_MNG2HOST_PORT_623 (1 << 5) |
| 608 | #define E1000_MNG2HOST_PORT_664 (1 << 6) |
| 609 | manc2h |= E1000_MNG2HOST_PORT_623; |
| 610 | manc2h |= E1000_MNG2HOST_PORT_664; |
| 611 | wr32(E1000_MANC2H, manc2h); |
| 612 | |
| 613 | wr32(E1000_MANC, manc); |
| 614 | } |
| 615 | } |
| 616 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 617 | /** |
| 618 | * igb_configure - configure the hardware for RX and TX |
| 619 | * @adapter: private board structure |
| 620 | **/ |
| 621 | static void igb_configure(struct igb_adapter *adapter) |
| 622 | { |
| 623 | struct net_device *netdev = adapter->netdev; |
| 624 | int i; |
| 625 | |
| 626 | igb_get_hw_control(adapter); |
| 627 | igb_set_multi(netdev); |
| 628 | |
| 629 | igb_restore_vlan(adapter); |
| 630 | igb_init_manageability(adapter); |
| 631 | |
| 632 | igb_configure_tx(adapter); |
| 633 | igb_setup_rctl(adapter); |
| 634 | igb_configure_rx(adapter); |
| 635 | /* call IGB_DESC_UNUSED which always leaves |
| 636 | * at least 1 descriptor unused to make sure |
| 637 | * next_to_use != next_to_clean */ |
| 638 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 639 | struct igb_ring *ring = &adapter->rx_ring[i]; |
| 640 | igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring)); |
| 641 | } |
| 642 | |
| 643 | |
| 644 | adapter->tx_queue_len = netdev->tx_queue_len; |
| 645 | } |
| 646 | |
| 647 | |
| 648 | /** |
| 649 | * igb_up - Open the interface and prepare it to handle traffic |
| 650 | * @adapter: board private structure |
| 651 | **/ |
| 652 | |
| 653 | int igb_up(struct igb_adapter *adapter) |
| 654 | { |
| 655 | struct e1000_hw *hw = &adapter->hw; |
| 656 | int i; |
| 657 | |
| 658 | /* hardware has been reset, we need to reload some things */ |
| 659 | igb_configure(adapter); |
| 660 | |
| 661 | clear_bit(__IGB_DOWN, &adapter->state); |
| 662 | |
| 663 | napi_enable(&adapter->napi); |
| 664 | |
| 665 | if (adapter->msix_entries) { |
| 666 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 667 | napi_enable(&adapter->rx_ring[i].napi); |
| 668 | igb_configure_msix(adapter); |
| 669 | } |
| 670 | |
| 671 | /* Clear any pending interrupts. */ |
| 672 | rd32(E1000_ICR); |
| 673 | igb_irq_enable(adapter); |
| 674 | |
| 675 | /* Fire a link change interrupt to start the watchdog. */ |
| 676 | wr32(E1000_ICS, E1000_ICS_LSC); |
| 677 | return 0; |
| 678 | } |
| 679 | |
| 680 | void igb_down(struct igb_adapter *adapter) |
| 681 | { |
| 682 | struct e1000_hw *hw = &adapter->hw; |
| 683 | struct net_device *netdev = adapter->netdev; |
| 684 | u32 tctl, rctl; |
| 685 | int i; |
| 686 | |
| 687 | /* signal that we're down so the interrupt handler does not |
| 688 | * reschedule our watchdog timer */ |
| 689 | set_bit(__IGB_DOWN, &adapter->state); |
| 690 | |
| 691 | /* disable receives in the hardware */ |
| 692 | rctl = rd32(E1000_RCTL); |
| 693 | wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); |
| 694 | /* flush and sleep below */ |
| 695 | |
| 696 | netif_stop_queue(netdev); |
| 697 | |
| 698 | /* disable transmits in the hardware */ |
| 699 | tctl = rd32(E1000_TCTL); |
| 700 | tctl &= ~E1000_TCTL_EN; |
| 701 | wr32(E1000_TCTL, tctl); |
| 702 | /* flush both disables and wait for them to finish */ |
| 703 | wrfl(); |
| 704 | msleep(10); |
| 705 | |
| 706 | napi_disable(&adapter->napi); |
| 707 | |
| 708 | if (adapter->msix_entries) |
| 709 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 710 | napi_disable(&adapter->rx_ring[i].napi); |
| 711 | igb_irq_disable(adapter); |
| 712 | |
| 713 | del_timer_sync(&adapter->watchdog_timer); |
| 714 | del_timer_sync(&adapter->phy_info_timer); |
| 715 | |
| 716 | netdev->tx_queue_len = adapter->tx_queue_len; |
| 717 | netif_carrier_off(netdev); |
| 718 | adapter->link_speed = 0; |
| 719 | adapter->link_duplex = 0; |
| 720 | |
| 721 | igb_reset(adapter); |
| 722 | igb_clean_all_tx_rings(adapter); |
| 723 | igb_clean_all_rx_rings(adapter); |
| 724 | } |
| 725 | |
| 726 | void igb_reinit_locked(struct igb_adapter *adapter) |
| 727 | { |
| 728 | WARN_ON(in_interrupt()); |
| 729 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) |
| 730 | msleep(1); |
| 731 | igb_down(adapter); |
| 732 | igb_up(adapter); |
| 733 | clear_bit(__IGB_RESETTING, &adapter->state); |
| 734 | } |
| 735 | |
| 736 | void igb_reset(struct igb_adapter *adapter) |
| 737 | { |
| 738 | struct e1000_hw *hw = &adapter->hw; |
| 739 | struct e1000_fc_info *fc = &adapter->hw.fc; |
| 740 | u32 pba = 0, tx_space, min_tx_space, min_rx_space; |
| 741 | u16 hwm; |
| 742 | |
| 743 | /* Repartition Pba for greater than 9k mtu |
| 744 | * To take effect CTRL.RST is required. |
| 745 | */ |
| 746 | pba = E1000_PBA_34K; |
| 747 | |
| 748 | if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { |
| 749 | /* adjust PBA for jumbo frames */ |
| 750 | wr32(E1000_PBA, pba); |
| 751 | |
| 752 | /* To maintain wire speed transmits, the Tx FIFO should be |
| 753 | * large enough to accommodate two full transmit packets, |
| 754 | * rounded up to the next 1KB and expressed in KB. Likewise, |
| 755 | * the Rx FIFO should be large enough to accommodate at least |
| 756 | * one full receive packet and is similarly rounded up and |
| 757 | * expressed in KB. */ |
| 758 | pba = rd32(E1000_PBA); |
| 759 | /* upper 16 bits has Tx packet buffer allocation size in KB */ |
| 760 | tx_space = pba >> 16; |
| 761 | /* lower 16 bits has Rx packet buffer allocation size in KB */ |
| 762 | pba &= 0xffff; |
| 763 | /* the tx fifo also stores 16 bytes of information about the tx |
| 764 | * but don't include ethernet FCS because hardware appends it */ |
| 765 | min_tx_space = (adapter->max_frame_size + |
| 766 | sizeof(struct e1000_tx_desc) - |
| 767 | ETH_FCS_LEN) * 2; |
| 768 | min_tx_space = ALIGN(min_tx_space, 1024); |
| 769 | min_tx_space >>= 10; |
| 770 | /* software strips receive CRC, so leave room for it */ |
| 771 | min_rx_space = adapter->max_frame_size; |
| 772 | min_rx_space = ALIGN(min_rx_space, 1024); |
| 773 | min_rx_space >>= 10; |
| 774 | |
| 775 | /* If current Tx allocation is less than the min Tx FIFO size, |
| 776 | * and the min Tx FIFO size is less than the current Rx FIFO |
| 777 | * allocation, take space away from current Rx allocation */ |
| 778 | if (tx_space < min_tx_space && |
| 779 | ((min_tx_space - tx_space) < pba)) { |
| 780 | pba = pba - (min_tx_space - tx_space); |
| 781 | |
| 782 | /* if short on rx space, rx wins and must trump tx |
| 783 | * adjustment */ |
| 784 | if (pba < min_rx_space) |
| 785 | pba = min_rx_space; |
| 786 | } |
| 787 | } |
| 788 | wr32(E1000_PBA, pba); |
| 789 | |
| 790 | /* flow control settings */ |
| 791 | /* The high water mark must be low enough to fit one full frame |
| 792 | * (or the size used for early receive) above it in the Rx FIFO. |
| 793 | * Set it to the lower of: |
| 794 | * - 90% of the Rx FIFO size, or |
| 795 | * - the full Rx FIFO size minus one full frame */ |
| 796 | hwm = min(((pba << 10) * 9 / 10), |
| 797 | ((pba << 10) - adapter->max_frame_size)); |
| 798 | |
| 799 | fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */ |
| 800 | fc->low_water = fc->high_water - 8; |
| 801 | fc->pause_time = 0xFFFF; |
| 802 | fc->send_xon = 1; |
| 803 | fc->type = fc->original_type; |
| 804 | |
| 805 | /* Allow time for pending master requests to run */ |
| 806 | adapter->hw.mac.ops.reset_hw(&adapter->hw); |
| 807 | wr32(E1000_WUC, 0); |
| 808 | |
| 809 | if (adapter->hw.mac.ops.init_hw(&adapter->hw)) |
| 810 | dev_err(&adapter->pdev->dev, "Hardware Error\n"); |
| 811 | |
| 812 | igb_update_mng_vlan(adapter); |
| 813 | |
| 814 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ |
| 815 | wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); |
| 816 | |
| 817 | igb_reset_adaptive(&adapter->hw); |
Bill Hayes | 68707ac | 2008-02-19 10:24:41 -0800 | [diff] [blame] | 818 | if (adapter->hw.phy.ops.get_phy_info) |
| 819 | adapter->hw.phy.ops.get_phy_info(&adapter->hw); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 820 | } |
| 821 | |
| 822 | /** |
| 823 | * igb_probe - Device Initialization Routine |
| 824 | * @pdev: PCI device information struct |
| 825 | * @ent: entry in igb_pci_tbl |
| 826 | * |
| 827 | * Returns 0 on success, negative on failure |
| 828 | * |
| 829 | * igb_probe initializes an adapter identified by a pci_dev structure. |
| 830 | * The OS initialization, configuring of the adapter private structure, |
| 831 | * and a hardware reset occur. |
| 832 | **/ |
| 833 | static int __devinit igb_probe(struct pci_dev *pdev, |
| 834 | const struct pci_device_id *ent) |
| 835 | { |
| 836 | struct net_device *netdev; |
| 837 | struct igb_adapter *adapter; |
| 838 | struct e1000_hw *hw; |
| 839 | const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; |
| 840 | unsigned long mmio_start, mmio_len; |
| 841 | static int cards_found; |
| 842 | int i, err, pci_using_dac; |
| 843 | u16 eeprom_data = 0; |
| 844 | u16 eeprom_apme_mask = IGB_EEPROM_APME; |
| 845 | u32 part_num; |
| 846 | |
| 847 | err = pci_enable_device(pdev); |
| 848 | if (err) |
| 849 | return err; |
| 850 | |
| 851 | pci_using_dac = 0; |
| 852 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); |
| 853 | if (!err) { |
| 854 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); |
| 855 | if (!err) |
| 856 | pci_using_dac = 1; |
| 857 | } else { |
| 858 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 859 | if (err) { |
| 860 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
| 861 | if (err) { |
| 862 | dev_err(&pdev->dev, "No usable DMA " |
| 863 | "configuration, aborting\n"); |
| 864 | goto err_dma; |
| 865 | } |
| 866 | } |
| 867 | } |
| 868 | |
| 869 | err = pci_request_regions(pdev, igb_driver_name); |
| 870 | if (err) |
| 871 | goto err_pci_reg; |
| 872 | |
| 873 | pci_set_master(pdev); |
| 874 | |
| 875 | err = -ENOMEM; |
| 876 | netdev = alloc_etherdev(sizeof(struct igb_adapter)); |
| 877 | if (!netdev) |
| 878 | goto err_alloc_etherdev; |
| 879 | |
| 880 | SET_NETDEV_DEV(netdev, &pdev->dev); |
| 881 | |
| 882 | pci_set_drvdata(pdev, netdev); |
| 883 | adapter = netdev_priv(netdev); |
| 884 | adapter->netdev = netdev; |
| 885 | adapter->pdev = pdev; |
| 886 | hw = &adapter->hw; |
| 887 | hw->back = adapter; |
| 888 | adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE; |
| 889 | |
| 890 | mmio_start = pci_resource_start(pdev, 0); |
| 891 | mmio_len = pci_resource_len(pdev, 0); |
| 892 | |
| 893 | err = -EIO; |
| 894 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); |
| 895 | if (!adapter->hw.hw_addr) |
| 896 | goto err_ioremap; |
| 897 | |
| 898 | netdev->open = &igb_open; |
| 899 | netdev->stop = &igb_close; |
| 900 | netdev->get_stats = &igb_get_stats; |
| 901 | netdev->set_multicast_list = &igb_set_multi; |
| 902 | netdev->set_mac_address = &igb_set_mac; |
| 903 | netdev->change_mtu = &igb_change_mtu; |
| 904 | netdev->do_ioctl = &igb_ioctl; |
| 905 | igb_set_ethtool_ops(netdev); |
| 906 | netdev->tx_timeout = &igb_tx_timeout; |
| 907 | netdev->watchdog_timeo = 5 * HZ; |
| 908 | netif_napi_add(netdev, &adapter->napi, igb_clean, 64); |
| 909 | netdev->vlan_rx_register = igb_vlan_rx_register; |
| 910 | netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid; |
| 911 | netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid; |
| 912 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 913 | netdev->poll_controller = igb_netpoll; |
| 914 | #endif |
| 915 | netdev->hard_start_xmit = &igb_xmit_frame_adv; |
| 916 | |
| 917 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); |
| 918 | |
| 919 | netdev->mem_start = mmio_start; |
| 920 | netdev->mem_end = mmio_start + mmio_len; |
| 921 | |
| 922 | adapter->bd_number = cards_found; |
| 923 | |
| 924 | /* PCI config space info */ |
| 925 | hw->vendor_id = pdev->vendor; |
| 926 | hw->device_id = pdev->device; |
| 927 | hw->revision_id = pdev->revision; |
| 928 | hw->subsystem_vendor_id = pdev->subsystem_vendor; |
| 929 | hw->subsystem_device_id = pdev->subsystem_device; |
| 930 | |
| 931 | /* setup the private structure */ |
| 932 | hw->back = adapter; |
| 933 | /* Copy the default MAC, PHY and NVM function pointers */ |
| 934 | memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); |
| 935 | memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); |
| 936 | memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); |
| 937 | /* Initialize skew-specific constants */ |
| 938 | err = ei->get_invariants(hw); |
| 939 | if (err) |
| 940 | goto err_hw_init; |
| 941 | |
| 942 | err = igb_sw_init(adapter); |
| 943 | if (err) |
| 944 | goto err_sw_init; |
| 945 | |
| 946 | igb_get_bus_info_pcie(hw); |
| 947 | |
| 948 | hw->phy.autoneg_wait_to_complete = false; |
| 949 | hw->mac.adaptive_ifs = true; |
| 950 | |
| 951 | /* Copper options */ |
| 952 | if (hw->phy.media_type == e1000_media_type_copper) { |
| 953 | hw->phy.mdix = AUTO_ALL_MODES; |
| 954 | hw->phy.disable_polarity_correction = false; |
| 955 | hw->phy.ms_type = e1000_ms_hw_default; |
| 956 | } |
| 957 | |
| 958 | if (igb_check_reset_block(hw)) |
| 959 | dev_info(&pdev->dev, |
| 960 | "PHY reset is blocked due to SOL/IDER session.\n"); |
| 961 | |
| 962 | netdev->features = NETIF_F_SG | |
| 963 | NETIF_F_HW_CSUM | |
| 964 | NETIF_F_HW_VLAN_TX | |
| 965 | NETIF_F_HW_VLAN_RX | |
| 966 | NETIF_F_HW_VLAN_FILTER; |
| 967 | |
| 968 | netdev->features |= NETIF_F_TSO; |
| 969 | |
| 970 | netdev->features |= NETIF_F_TSO6; |
| 971 | if (pci_using_dac) |
| 972 | netdev->features |= NETIF_F_HIGHDMA; |
| 973 | |
| 974 | netdev->features |= NETIF_F_LLTX; |
| 975 | adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw); |
| 976 | |
| 977 | /* before reading the NVM, reset the controller to put the device in a |
| 978 | * known good starting state */ |
| 979 | hw->mac.ops.reset_hw(hw); |
| 980 | |
| 981 | /* make sure the NVM is good */ |
| 982 | if (igb_validate_nvm_checksum(hw) < 0) { |
| 983 | dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); |
| 984 | err = -EIO; |
| 985 | goto err_eeprom; |
| 986 | } |
| 987 | |
| 988 | /* copy the MAC address out of the NVM */ |
| 989 | if (hw->mac.ops.read_mac_addr(hw)) |
| 990 | dev_err(&pdev->dev, "NVM Read Error\n"); |
| 991 | |
| 992 | memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); |
| 993 | memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len); |
| 994 | |
| 995 | if (!is_valid_ether_addr(netdev->perm_addr)) { |
| 996 | dev_err(&pdev->dev, "Invalid MAC Address\n"); |
| 997 | err = -EIO; |
| 998 | goto err_eeprom; |
| 999 | } |
| 1000 | |
| 1001 | init_timer(&adapter->watchdog_timer); |
| 1002 | adapter->watchdog_timer.function = &igb_watchdog; |
| 1003 | adapter->watchdog_timer.data = (unsigned long) adapter; |
| 1004 | |
| 1005 | init_timer(&adapter->phy_info_timer); |
| 1006 | adapter->phy_info_timer.function = &igb_update_phy_info; |
| 1007 | adapter->phy_info_timer.data = (unsigned long) adapter; |
| 1008 | |
| 1009 | INIT_WORK(&adapter->reset_task, igb_reset_task); |
| 1010 | INIT_WORK(&adapter->watchdog_task, igb_watchdog_task); |
| 1011 | |
| 1012 | /* Initialize link & ring properties that are user-changeable */ |
| 1013 | adapter->tx_ring->count = 256; |
| 1014 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 1015 | adapter->tx_ring[i].count = adapter->tx_ring->count; |
| 1016 | adapter->rx_ring->count = 256; |
| 1017 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1018 | adapter->rx_ring[i].count = adapter->rx_ring->count; |
| 1019 | |
| 1020 | adapter->fc_autoneg = true; |
| 1021 | hw->mac.autoneg = true; |
| 1022 | hw->phy.autoneg_advertised = 0x2f; |
| 1023 | |
| 1024 | hw->fc.original_type = e1000_fc_default; |
| 1025 | hw->fc.type = e1000_fc_default; |
| 1026 | |
| 1027 | adapter->itr_setting = 3; |
| 1028 | adapter->itr = IGB_START_ITR; |
| 1029 | |
| 1030 | igb_validate_mdi_setting(hw); |
| 1031 | |
| 1032 | adapter->rx_csum = 1; |
| 1033 | |
| 1034 | /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM, |
| 1035 | * enable the ACPI Magic Packet filter |
| 1036 | */ |
| 1037 | |
| 1038 | if (hw->bus.func == 0 || |
| 1039 | hw->device_id == E1000_DEV_ID_82575EB_COPPER) |
| 1040 | hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1, |
| 1041 | &eeprom_data); |
| 1042 | |
| 1043 | if (eeprom_data & eeprom_apme_mask) |
| 1044 | adapter->eeprom_wol |= E1000_WUFC_MAG; |
| 1045 | |
| 1046 | /* now that we have the eeprom settings, apply the special cases where |
| 1047 | * the eeprom may be wrong or the board simply won't support wake on |
| 1048 | * lan on a particular port */ |
| 1049 | switch (pdev->device) { |
| 1050 | case E1000_DEV_ID_82575GB_QUAD_COPPER: |
| 1051 | adapter->eeprom_wol = 0; |
| 1052 | break; |
| 1053 | case E1000_DEV_ID_82575EB_FIBER_SERDES: |
| 1054 | /* Wake events only supported on port A for dual fiber |
| 1055 | * regardless of eeprom setting */ |
| 1056 | if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) |
| 1057 | adapter->eeprom_wol = 0; |
| 1058 | break; |
| 1059 | } |
| 1060 | |
| 1061 | /* initialize the wol settings based on the eeprom settings */ |
| 1062 | adapter->wol = adapter->eeprom_wol; |
| 1063 | |
| 1064 | /* reset the hardware with the new settings */ |
| 1065 | igb_reset(adapter); |
| 1066 | |
| 1067 | /* let the f/w know that the h/w is now under the control of the |
| 1068 | * driver. */ |
| 1069 | igb_get_hw_control(adapter); |
| 1070 | |
| 1071 | /* tell the stack to leave us alone until igb_open() is called */ |
| 1072 | netif_carrier_off(netdev); |
| 1073 | netif_stop_queue(netdev); |
| 1074 | |
| 1075 | strcpy(netdev->name, "eth%d"); |
| 1076 | err = register_netdev(netdev); |
| 1077 | if (err) |
| 1078 | goto err_register; |
| 1079 | |
| 1080 | dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); |
| 1081 | /* print bus type/speed/width info */ |
| 1082 | dev_info(&pdev->dev, |
| 1083 | "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n", |
| 1084 | netdev->name, |
| 1085 | ((hw->bus.speed == e1000_bus_speed_2500) |
| 1086 | ? "2.5Gb/s" : "unknown"), |
| 1087 | ((hw->bus.width == e1000_bus_width_pcie_x4) |
| 1088 | ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1) |
| 1089 | ? "Width x1" : "unknown"), |
| 1090 | netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], |
| 1091 | netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]); |
| 1092 | |
| 1093 | igb_read_part_num(hw, &part_num); |
| 1094 | dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name, |
| 1095 | (part_num >> 8), (part_num & 0xff)); |
| 1096 | |
| 1097 | dev_info(&pdev->dev, |
| 1098 | "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n", |
| 1099 | adapter->msix_entries ? "MSI-X" : |
| 1100 | adapter->msi_enabled ? "MSI" : "legacy", |
| 1101 | adapter->num_rx_queues, adapter->num_tx_queues); |
| 1102 | |
| 1103 | cards_found++; |
| 1104 | return 0; |
| 1105 | |
| 1106 | err_register: |
| 1107 | igb_release_hw_control(adapter); |
| 1108 | err_eeprom: |
| 1109 | if (!igb_check_reset_block(hw)) |
| 1110 | hw->phy.ops.reset_phy(hw); |
| 1111 | |
| 1112 | if (hw->flash_address) |
| 1113 | iounmap(hw->flash_address); |
| 1114 | |
| 1115 | igb_remove_device(hw); |
| 1116 | kfree(adapter->tx_ring); |
| 1117 | kfree(adapter->rx_ring); |
| 1118 | err_sw_init: |
| 1119 | err_hw_init: |
| 1120 | iounmap(hw->hw_addr); |
| 1121 | err_ioremap: |
| 1122 | free_netdev(netdev); |
| 1123 | err_alloc_etherdev: |
| 1124 | pci_release_regions(pdev); |
| 1125 | err_pci_reg: |
| 1126 | err_dma: |
| 1127 | pci_disable_device(pdev); |
| 1128 | return err; |
| 1129 | } |
| 1130 | |
| 1131 | /** |
| 1132 | * igb_remove - Device Removal Routine |
| 1133 | * @pdev: PCI device information struct |
| 1134 | * |
| 1135 | * igb_remove is called by the PCI subsystem to alert the driver |
| 1136 | * that it should release a PCI device. The could be caused by a |
| 1137 | * Hot-Plug event, or because the driver is going to be removed from |
| 1138 | * memory. |
| 1139 | **/ |
| 1140 | static void __devexit igb_remove(struct pci_dev *pdev) |
| 1141 | { |
| 1142 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 1143 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 1144 | |
| 1145 | /* flush_scheduled work may reschedule our watchdog task, so |
| 1146 | * explicitly disable watchdog tasks from being rescheduled */ |
| 1147 | set_bit(__IGB_DOWN, &adapter->state); |
| 1148 | del_timer_sync(&adapter->watchdog_timer); |
| 1149 | del_timer_sync(&adapter->phy_info_timer); |
| 1150 | |
| 1151 | flush_scheduled_work(); |
| 1152 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 1153 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
| 1154 | * would have already happened in close and is redundant. */ |
| 1155 | igb_release_hw_control(adapter); |
| 1156 | |
| 1157 | unregister_netdev(netdev); |
| 1158 | |
| 1159 | if (!igb_check_reset_block(&adapter->hw)) |
| 1160 | adapter->hw.phy.ops.reset_phy(&adapter->hw); |
| 1161 | |
| 1162 | igb_remove_device(&adapter->hw); |
| 1163 | igb_reset_interrupt_capability(adapter); |
| 1164 | |
| 1165 | kfree(adapter->tx_ring); |
| 1166 | kfree(adapter->rx_ring); |
| 1167 | |
| 1168 | iounmap(adapter->hw.hw_addr); |
| 1169 | if (adapter->hw.flash_address) |
| 1170 | iounmap(adapter->hw.flash_address); |
| 1171 | pci_release_regions(pdev); |
| 1172 | |
| 1173 | free_netdev(netdev); |
| 1174 | |
| 1175 | pci_disable_device(pdev); |
| 1176 | } |
| 1177 | |
| 1178 | /** |
| 1179 | * igb_sw_init - Initialize general software structures (struct igb_adapter) |
| 1180 | * @adapter: board private structure to initialize |
| 1181 | * |
| 1182 | * igb_sw_init initializes the Adapter private data structure. |
| 1183 | * Fields are initialized based on PCI device information and |
| 1184 | * OS network device settings (MTU size). |
| 1185 | **/ |
| 1186 | static int __devinit igb_sw_init(struct igb_adapter *adapter) |
| 1187 | { |
| 1188 | struct e1000_hw *hw = &adapter->hw; |
| 1189 | struct net_device *netdev = adapter->netdev; |
| 1190 | struct pci_dev *pdev = adapter->pdev; |
| 1191 | |
| 1192 | pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word); |
| 1193 | |
| 1194 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
| 1195 | adapter->rx_ps_hdr_size = 0; /* disable packet split */ |
| 1196 | adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
| 1197 | adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; |
| 1198 | |
| 1199 | /* Number of supported queues. */ |
| 1200 | /* Having more queues than CPUs doesn't make sense. */ |
| 1201 | adapter->num_tx_queues = 1; |
| 1202 | adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus()); |
| 1203 | |
| 1204 | igb_set_interrupt_capability(adapter); |
| 1205 | |
| 1206 | if (igb_alloc_queues(adapter)) { |
| 1207 | dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); |
| 1208 | return -ENOMEM; |
| 1209 | } |
| 1210 | |
| 1211 | /* Explicitly disable IRQ since the NIC can be in any state. */ |
| 1212 | igb_irq_disable(adapter); |
| 1213 | |
| 1214 | set_bit(__IGB_DOWN, &adapter->state); |
| 1215 | return 0; |
| 1216 | } |
| 1217 | |
| 1218 | /** |
| 1219 | * igb_open - Called when a network interface is made active |
| 1220 | * @netdev: network interface device structure |
| 1221 | * |
| 1222 | * Returns 0 on success, negative value on failure |
| 1223 | * |
| 1224 | * The open entry point is called when a network interface is made |
| 1225 | * active by the system (IFF_UP). At this point all resources needed |
| 1226 | * for transmit and receive operations are allocated, the interrupt |
| 1227 | * handler is registered with the OS, the watchdog timer is started, |
| 1228 | * and the stack is notified that the interface is ready. |
| 1229 | **/ |
| 1230 | static int igb_open(struct net_device *netdev) |
| 1231 | { |
| 1232 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 1233 | struct e1000_hw *hw = &adapter->hw; |
| 1234 | int err; |
| 1235 | int i; |
| 1236 | |
| 1237 | /* disallow open during test */ |
| 1238 | if (test_bit(__IGB_TESTING, &adapter->state)) |
| 1239 | return -EBUSY; |
| 1240 | |
| 1241 | /* allocate transmit descriptors */ |
| 1242 | err = igb_setup_all_tx_resources(adapter); |
| 1243 | if (err) |
| 1244 | goto err_setup_tx; |
| 1245 | |
| 1246 | /* allocate receive descriptors */ |
| 1247 | err = igb_setup_all_rx_resources(adapter); |
| 1248 | if (err) |
| 1249 | goto err_setup_rx; |
| 1250 | |
| 1251 | /* e1000_power_up_phy(adapter); */ |
| 1252 | |
| 1253 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; |
| 1254 | if ((adapter->hw.mng_cookie.status & |
| 1255 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) |
| 1256 | igb_update_mng_vlan(adapter); |
| 1257 | |
| 1258 | /* before we allocate an interrupt, we must be ready to handle it. |
| 1259 | * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt |
| 1260 | * as soon as we call pci_request_irq, so we have to setup our |
| 1261 | * clean_rx handler before we do so. */ |
| 1262 | igb_configure(adapter); |
| 1263 | |
| 1264 | err = igb_request_irq(adapter); |
| 1265 | if (err) |
| 1266 | goto err_req_irq; |
| 1267 | |
| 1268 | /* From here on the code is the same as igb_up() */ |
| 1269 | clear_bit(__IGB_DOWN, &adapter->state); |
| 1270 | |
| 1271 | napi_enable(&adapter->napi); |
| 1272 | if (adapter->msix_entries) |
| 1273 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1274 | napi_enable(&adapter->rx_ring[i].napi); |
| 1275 | |
| 1276 | igb_irq_enable(adapter); |
| 1277 | |
| 1278 | /* Clear any pending interrupts. */ |
| 1279 | rd32(E1000_ICR); |
| 1280 | /* Fire a link status change interrupt to start the watchdog. */ |
| 1281 | wr32(E1000_ICS, E1000_ICS_LSC); |
| 1282 | |
| 1283 | return 0; |
| 1284 | |
| 1285 | err_req_irq: |
| 1286 | igb_release_hw_control(adapter); |
| 1287 | /* e1000_power_down_phy(adapter); */ |
| 1288 | igb_free_all_rx_resources(adapter); |
| 1289 | err_setup_rx: |
| 1290 | igb_free_all_tx_resources(adapter); |
| 1291 | err_setup_tx: |
| 1292 | igb_reset(adapter); |
| 1293 | |
| 1294 | return err; |
| 1295 | } |
| 1296 | |
| 1297 | /** |
| 1298 | * igb_close - Disables a network interface |
| 1299 | * @netdev: network interface device structure |
| 1300 | * |
| 1301 | * Returns 0, this is not allowed to fail |
| 1302 | * |
| 1303 | * The close entry point is called when an interface is de-activated |
| 1304 | * by the OS. The hardware is still under the driver's control, but |
| 1305 | * needs to be disabled. A global MAC reset is issued to stop the |
| 1306 | * hardware, and all transmit and receive resources are freed. |
| 1307 | **/ |
| 1308 | static int igb_close(struct net_device *netdev) |
| 1309 | { |
| 1310 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 1311 | |
| 1312 | WARN_ON(test_bit(__IGB_RESETTING, &adapter->state)); |
| 1313 | igb_down(adapter); |
| 1314 | |
| 1315 | igb_free_irq(adapter); |
| 1316 | |
| 1317 | igb_free_all_tx_resources(adapter); |
| 1318 | igb_free_all_rx_resources(adapter); |
| 1319 | |
| 1320 | /* kill manageability vlan ID if supported, but not if a vlan with |
| 1321 | * the same ID is registered on the host OS (let 8021q kill it) */ |
| 1322 | if ((adapter->hw.mng_cookie.status & |
| 1323 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && |
| 1324 | !(adapter->vlgrp && |
| 1325 | vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) |
| 1326 | igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
| 1327 | |
| 1328 | return 0; |
| 1329 | } |
| 1330 | |
| 1331 | /** |
| 1332 | * igb_setup_tx_resources - allocate Tx resources (Descriptors) |
| 1333 | * @adapter: board private structure |
| 1334 | * @tx_ring: tx descriptor ring (for a specific queue) to setup |
| 1335 | * |
| 1336 | * Return 0 on success, negative on failure |
| 1337 | **/ |
| 1338 | |
| 1339 | int igb_setup_tx_resources(struct igb_adapter *adapter, |
| 1340 | struct igb_ring *tx_ring) |
| 1341 | { |
| 1342 | struct pci_dev *pdev = adapter->pdev; |
| 1343 | int size; |
| 1344 | |
| 1345 | size = sizeof(struct igb_buffer) * tx_ring->count; |
| 1346 | tx_ring->buffer_info = vmalloc(size); |
| 1347 | if (!tx_ring->buffer_info) |
| 1348 | goto err; |
| 1349 | memset(tx_ring->buffer_info, 0, size); |
| 1350 | |
| 1351 | /* round up to nearest 4K */ |
| 1352 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc) |
| 1353 | + sizeof(u32); |
| 1354 | tx_ring->size = ALIGN(tx_ring->size, 4096); |
| 1355 | |
| 1356 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, |
| 1357 | &tx_ring->dma); |
| 1358 | |
| 1359 | if (!tx_ring->desc) |
| 1360 | goto err; |
| 1361 | |
| 1362 | tx_ring->adapter = adapter; |
| 1363 | tx_ring->next_to_use = 0; |
| 1364 | tx_ring->next_to_clean = 0; |
| 1365 | spin_lock_init(&tx_ring->tx_clean_lock); |
| 1366 | spin_lock_init(&tx_ring->tx_lock); |
| 1367 | return 0; |
| 1368 | |
| 1369 | err: |
| 1370 | vfree(tx_ring->buffer_info); |
| 1371 | dev_err(&adapter->pdev->dev, |
| 1372 | "Unable to allocate memory for the transmit descriptor ring\n"); |
| 1373 | return -ENOMEM; |
| 1374 | } |
| 1375 | |
| 1376 | /** |
| 1377 | * igb_setup_all_tx_resources - wrapper to allocate Tx resources |
| 1378 | * (Descriptors) for all queues |
| 1379 | * @adapter: board private structure |
| 1380 | * |
| 1381 | * Return 0 on success, negative on failure |
| 1382 | **/ |
| 1383 | static int igb_setup_all_tx_resources(struct igb_adapter *adapter) |
| 1384 | { |
| 1385 | int i, err = 0; |
| 1386 | |
| 1387 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 1388 | err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]); |
| 1389 | if (err) { |
| 1390 | dev_err(&adapter->pdev->dev, |
| 1391 | "Allocation for Tx Queue %u failed\n", i); |
| 1392 | for (i--; i >= 0; i--) |
| 1393 | igb_free_tx_resources(adapter, |
| 1394 | &adapter->tx_ring[i]); |
| 1395 | break; |
| 1396 | } |
| 1397 | } |
| 1398 | |
| 1399 | return err; |
| 1400 | } |
| 1401 | |
| 1402 | /** |
| 1403 | * igb_configure_tx - Configure transmit Unit after Reset |
| 1404 | * @adapter: board private structure |
| 1405 | * |
| 1406 | * Configure the Tx unit of the MAC after a reset. |
| 1407 | **/ |
| 1408 | static void igb_configure_tx(struct igb_adapter *adapter) |
| 1409 | { |
| 1410 | u64 tdba, tdwba; |
| 1411 | struct e1000_hw *hw = &adapter->hw; |
| 1412 | u32 tctl; |
| 1413 | u32 txdctl, txctrl; |
| 1414 | int i; |
| 1415 | |
| 1416 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 1417 | struct igb_ring *ring = &(adapter->tx_ring[i]); |
| 1418 | |
| 1419 | wr32(E1000_TDLEN(i), |
| 1420 | ring->count * sizeof(struct e1000_tx_desc)); |
| 1421 | tdba = ring->dma; |
| 1422 | wr32(E1000_TDBAL(i), |
| 1423 | tdba & 0x00000000ffffffffULL); |
| 1424 | wr32(E1000_TDBAH(i), tdba >> 32); |
| 1425 | |
| 1426 | tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc); |
| 1427 | tdwba |= 1; /* enable head wb */ |
| 1428 | wr32(E1000_TDWBAL(i), |
| 1429 | tdwba & 0x00000000ffffffffULL); |
| 1430 | wr32(E1000_TDWBAH(i), tdwba >> 32); |
| 1431 | |
| 1432 | ring->head = E1000_TDH(i); |
| 1433 | ring->tail = E1000_TDT(i); |
| 1434 | writel(0, hw->hw_addr + ring->tail); |
| 1435 | writel(0, hw->hw_addr + ring->head); |
| 1436 | txdctl = rd32(E1000_TXDCTL(i)); |
| 1437 | txdctl |= E1000_TXDCTL_QUEUE_ENABLE; |
| 1438 | wr32(E1000_TXDCTL(i), txdctl); |
| 1439 | |
| 1440 | /* Turn off Relaxed Ordering on head write-backs. The |
| 1441 | * writebacks MUST be delivered in order or it will |
| 1442 | * completely screw up our bookeeping. |
| 1443 | */ |
| 1444 | txctrl = rd32(E1000_DCA_TXCTRL(i)); |
| 1445 | txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN; |
| 1446 | wr32(E1000_DCA_TXCTRL(i), txctrl); |
| 1447 | } |
| 1448 | |
| 1449 | |
| 1450 | |
| 1451 | /* Use the default values for the Tx Inter Packet Gap (IPG) timer */ |
| 1452 | |
| 1453 | /* Program the Transmit Control Register */ |
| 1454 | |
| 1455 | tctl = rd32(E1000_TCTL); |
| 1456 | tctl &= ~E1000_TCTL_CT; |
| 1457 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | |
| 1458 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
| 1459 | |
| 1460 | igb_config_collision_dist(hw); |
| 1461 | |
| 1462 | /* Setup Transmit Descriptor Settings for eop descriptor */ |
| 1463 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS; |
| 1464 | |
| 1465 | /* Enable transmits */ |
| 1466 | tctl |= E1000_TCTL_EN; |
| 1467 | |
| 1468 | wr32(E1000_TCTL, tctl); |
| 1469 | } |
| 1470 | |
| 1471 | /** |
| 1472 | * igb_setup_rx_resources - allocate Rx resources (Descriptors) |
| 1473 | * @adapter: board private structure |
| 1474 | * @rx_ring: rx descriptor ring (for a specific queue) to setup |
| 1475 | * |
| 1476 | * Returns 0 on success, negative on failure |
| 1477 | **/ |
| 1478 | |
| 1479 | int igb_setup_rx_resources(struct igb_adapter *adapter, |
| 1480 | struct igb_ring *rx_ring) |
| 1481 | { |
| 1482 | struct pci_dev *pdev = adapter->pdev; |
| 1483 | int size, desc_len; |
| 1484 | |
| 1485 | size = sizeof(struct igb_buffer) * rx_ring->count; |
| 1486 | rx_ring->buffer_info = vmalloc(size); |
| 1487 | if (!rx_ring->buffer_info) |
| 1488 | goto err; |
| 1489 | memset(rx_ring->buffer_info, 0, size); |
| 1490 | |
| 1491 | desc_len = sizeof(union e1000_adv_rx_desc); |
| 1492 | |
| 1493 | /* Round up to nearest 4K */ |
| 1494 | rx_ring->size = rx_ring->count * desc_len; |
| 1495 | rx_ring->size = ALIGN(rx_ring->size, 4096); |
| 1496 | |
| 1497 | rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, |
| 1498 | &rx_ring->dma); |
| 1499 | |
| 1500 | if (!rx_ring->desc) |
| 1501 | goto err; |
| 1502 | |
| 1503 | rx_ring->next_to_clean = 0; |
| 1504 | rx_ring->next_to_use = 0; |
| 1505 | rx_ring->pending_skb = NULL; |
| 1506 | |
| 1507 | rx_ring->adapter = adapter; |
| 1508 | /* FIXME: do we want to setup ring->napi->poll here? */ |
| 1509 | rx_ring->napi.poll = adapter->napi.poll; |
| 1510 | |
| 1511 | return 0; |
| 1512 | |
| 1513 | err: |
| 1514 | vfree(rx_ring->buffer_info); |
| 1515 | dev_err(&adapter->pdev->dev, "Unable to allocate memory for " |
| 1516 | "the receive descriptor ring\n"); |
| 1517 | return -ENOMEM; |
| 1518 | } |
| 1519 | |
| 1520 | /** |
| 1521 | * igb_setup_all_rx_resources - wrapper to allocate Rx resources |
| 1522 | * (Descriptors) for all queues |
| 1523 | * @adapter: board private structure |
| 1524 | * |
| 1525 | * Return 0 on success, negative on failure |
| 1526 | **/ |
| 1527 | static int igb_setup_all_rx_resources(struct igb_adapter *adapter) |
| 1528 | { |
| 1529 | int i, err = 0; |
| 1530 | |
| 1531 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 1532 | err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]); |
| 1533 | if (err) { |
| 1534 | dev_err(&adapter->pdev->dev, |
| 1535 | "Allocation for Rx Queue %u failed\n", i); |
| 1536 | for (i--; i >= 0; i--) |
| 1537 | igb_free_rx_resources(adapter, |
| 1538 | &adapter->rx_ring[i]); |
| 1539 | break; |
| 1540 | } |
| 1541 | } |
| 1542 | |
| 1543 | return err; |
| 1544 | } |
| 1545 | |
| 1546 | /** |
| 1547 | * igb_setup_rctl - configure the receive control registers |
| 1548 | * @adapter: Board private structure |
| 1549 | **/ |
| 1550 | static void igb_setup_rctl(struct igb_adapter *adapter) |
| 1551 | { |
| 1552 | struct e1000_hw *hw = &adapter->hw; |
| 1553 | u32 rctl; |
| 1554 | u32 srrctl = 0; |
| 1555 | int i; |
| 1556 | |
| 1557 | rctl = rd32(E1000_RCTL); |
| 1558 | |
| 1559 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); |
| 1560 | |
| 1561 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | |
| 1562 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | |
| 1563 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); |
| 1564 | |
| 1565 | /* disable the stripping of CRC because it breaks |
| 1566 | * BMC firmware connected over SMBUS |
| 1567 | rctl |= E1000_RCTL_SECRC; |
| 1568 | */ |
| 1569 | |
| 1570 | rctl &= ~E1000_RCTL_SBP; |
| 1571 | |
| 1572 | if (adapter->netdev->mtu <= ETH_DATA_LEN) |
| 1573 | rctl &= ~E1000_RCTL_LPE; |
| 1574 | else |
| 1575 | rctl |= E1000_RCTL_LPE; |
| 1576 | if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) { |
| 1577 | /* Setup buffer sizes */ |
| 1578 | rctl &= ~E1000_RCTL_SZ_4096; |
| 1579 | rctl |= E1000_RCTL_BSEX; |
| 1580 | switch (adapter->rx_buffer_len) { |
| 1581 | case IGB_RXBUFFER_256: |
| 1582 | rctl |= E1000_RCTL_SZ_256; |
| 1583 | rctl &= ~E1000_RCTL_BSEX; |
| 1584 | break; |
| 1585 | case IGB_RXBUFFER_512: |
| 1586 | rctl |= E1000_RCTL_SZ_512; |
| 1587 | rctl &= ~E1000_RCTL_BSEX; |
| 1588 | break; |
| 1589 | case IGB_RXBUFFER_1024: |
| 1590 | rctl |= E1000_RCTL_SZ_1024; |
| 1591 | rctl &= ~E1000_RCTL_BSEX; |
| 1592 | break; |
| 1593 | case IGB_RXBUFFER_2048: |
| 1594 | default: |
| 1595 | rctl |= E1000_RCTL_SZ_2048; |
| 1596 | rctl &= ~E1000_RCTL_BSEX; |
| 1597 | break; |
| 1598 | case IGB_RXBUFFER_4096: |
| 1599 | rctl |= E1000_RCTL_SZ_4096; |
| 1600 | break; |
| 1601 | case IGB_RXBUFFER_8192: |
| 1602 | rctl |= E1000_RCTL_SZ_8192; |
| 1603 | break; |
| 1604 | case IGB_RXBUFFER_16384: |
| 1605 | rctl |= E1000_RCTL_SZ_16384; |
| 1606 | break; |
| 1607 | } |
| 1608 | } else { |
| 1609 | rctl &= ~E1000_RCTL_BSEX; |
| 1610 | srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT; |
| 1611 | } |
| 1612 | |
| 1613 | /* 82575 and greater support packet-split where the protocol |
| 1614 | * header is placed in skb->data and the packet data is |
| 1615 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. |
| 1616 | * In the case of a non-split, skb->data is linearly filled, |
| 1617 | * followed by the page buffers. Therefore, skb->data is |
| 1618 | * sized to hold the largest protocol header. |
| 1619 | */ |
| 1620 | /* allocations using alloc_page take too long for regular MTU |
| 1621 | * so only enable packet split for jumbo frames */ |
| 1622 | if (rctl & E1000_RCTL_LPE) { |
| 1623 | adapter->rx_ps_hdr_size = IGB_RXBUFFER_128; |
| 1624 | srrctl = adapter->rx_ps_hdr_size << |
| 1625 | E1000_SRRCTL_BSIZEHDRSIZE_SHIFT; |
| 1626 | /* buffer size is ALWAYS one page */ |
| 1627 | srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT; |
| 1628 | srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; |
| 1629 | } else { |
| 1630 | adapter->rx_ps_hdr_size = 0; |
| 1631 | srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF; |
| 1632 | } |
| 1633 | |
| 1634 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1635 | wr32(E1000_SRRCTL(i), srrctl); |
| 1636 | |
| 1637 | wr32(E1000_RCTL, rctl); |
| 1638 | } |
| 1639 | |
| 1640 | /** |
| 1641 | * igb_configure_rx - Configure receive Unit after Reset |
| 1642 | * @adapter: board private structure |
| 1643 | * |
| 1644 | * Configure the Rx unit of the MAC after a reset. |
| 1645 | **/ |
| 1646 | static void igb_configure_rx(struct igb_adapter *adapter) |
| 1647 | { |
| 1648 | u64 rdba; |
| 1649 | struct e1000_hw *hw = &adapter->hw; |
| 1650 | u32 rctl, rxcsum; |
| 1651 | u32 rxdctl; |
| 1652 | int i; |
| 1653 | |
| 1654 | /* disable receives while setting up the descriptors */ |
| 1655 | rctl = rd32(E1000_RCTL); |
| 1656 | wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); |
| 1657 | wrfl(); |
| 1658 | mdelay(10); |
| 1659 | |
| 1660 | if (adapter->itr_setting > 3) |
| 1661 | wr32(E1000_ITR, |
| 1662 | 1000000000 / (adapter->itr * 256)); |
| 1663 | |
| 1664 | /* Setup the HW Rx Head and Tail Descriptor Pointers and |
| 1665 | * the Base and Length of the Rx Descriptor Ring */ |
| 1666 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 1667 | struct igb_ring *ring = &(adapter->rx_ring[i]); |
| 1668 | rdba = ring->dma; |
| 1669 | wr32(E1000_RDBAL(i), |
| 1670 | rdba & 0x00000000ffffffffULL); |
| 1671 | wr32(E1000_RDBAH(i), rdba >> 32); |
| 1672 | wr32(E1000_RDLEN(i), |
| 1673 | ring->count * sizeof(union e1000_adv_rx_desc)); |
| 1674 | |
| 1675 | ring->head = E1000_RDH(i); |
| 1676 | ring->tail = E1000_RDT(i); |
| 1677 | writel(0, hw->hw_addr + ring->tail); |
| 1678 | writel(0, hw->hw_addr + ring->head); |
| 1679 | |
| 1680 | rxdctl = rd32(E1000_RXDCTL(i)); |
| 1681 | rxdctl |= E1000_RXDCTL_QUEUE_ENABLE; |
| 1682 | rxdctl &= 0xFFF00000; |
| 1683 | rxdctl |= IGB_RX_PTHRESH; |
| 1684 | rxdctl |= IGB_RX_HTHRESH << 8; |
| 1685 | rxdctl |= IGB_RX_WTHRESH << 16; |
| 1686 | wr32(E1000_RXDCTL(i), rxdctl); |
| 1687 | } |
| 1688 | |
| 1689 | if (adapter->num_rx_queues > 1) { |
| 1690 | u32 random[10]; |
| 1691 | u32 mrqc; |
| 1692 | u32 j, shift; |
| 1693 | union e1000_reta { |
| 1694 | u32 dword; |
| 1695 | u8 bytes[4]; |
| 1696 | } reta; |
| 1697 | |
| 1698 | get_random_bytes(&random[0], 40); |
| 1699 | |
| 1700 | shift = 6; |
| 1701 | for (j = 0; j < (32 * 4); j++) { |
| 1702 | reta.bytes[j & 3] = |
| 1703 | (j % adapter->num_rx_queues) << shift; |
| 1704 | if ((j & 3) == 3) |
| 1705 | writel(reta.dword, |
| 1706 | hw->hw_addr + E1000_RETA(0) + (j & ~3)); |
| 1707 | } |
| 1708 | mrqc = E1000_MRQC_ENABLE_RSS_4Q; |
| 1709 | |
| 1710 | /* Fill out hash function seeds */ |
| 1711 | for (j = 0; j < 10; j++) |
| 1712 | array_wr32(E1000_RSSRK(0), j, random[j]); |
| 1713 | |
| 1714 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 | |
| 1715 | E1000_MRQC_RSS_FIELD_IPV4_TCP); |
| 1716 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 | |
| 1717 | E1000_MRQC_RSS_FIELD_IPV6_TCP); |
| 1718 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP | |
| 1719 | E1000_MRQC_RSS_FIELD_IPV6_UDP); |
| 1720 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX | |
| 1721 | E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); |
| 1722 | |
| 1723 | |
| 1724 | wr32(E1000_MRQC, mrqc); |
| 1725 | |
| 1726 | /* Multiqueue and raw packet checksumming are mutually |
| 1727 | * exclusive. Note that this not the same as TCP/IP |
| 1728 | * checksumming, which works fine. */ |
| 1729 | rxcsum = rd32(E1000_RXCSUM); |
| 1730 | rxcsum |= E1000_RXCSUM_PCSD; |
| 1731 | wr32(E1000_RXCSUM, rxcsum); |
| 1732 | } else { |
| 1733 | /* Enable Receive Checksum Offload for TCP and UDP */ |
| 1734 | rxcsum = rd32(E1000_RXCSUM); |
| 1735 | if (adapter->rx_csum) { |
| 1736 | rxcsum |= E1000_RXCSUM_TUOFL; |
| 1737 | |
| 1738 | /* Enable IPv4 payload checksum for UDP fragments |
| 1739 | * Must be used in conjunction with packet-split. */ |
| 1740 | if (adapter->rx_ps_hdr_size) |
| 1741 | rxcsum |= E1000_RXCSUM_IPPCSE; |
| 1742 | } else { |
| 1743 | rxcsum &= ~E1000_RXCSUM_TUOFL; |
| 1744 | /* don't need to clear IPPCSE as it defaults to 0 */ |
| 1745 | } |
| 1746 | wr32(E1000_RXCSUM, rxcsum); |
| 1747 | } |
| 1748 | |
| 1749 | if (adapter->vlgrp) |
| 1750 | wr32(E1000_RLPML, |
| 1751 | adapter->max_frame_size + VLAN_TAG_SIZE); |
| 1752 | else |
| 1753 | wr32(E1000_RLPML, adapter->max_frame_size); |
| 1754 | |
| 1755 | /* Enable Receives */ |
| 1756 | wr32(E1000_RCTL, rctl); |
| 1757 | } |
| 1758 | |
| 1759 | /** |
| 1760 | * igb_free_tx_resources - Free Tx Resources per Queue |
| 1761 | * @adapter: board private structure |
| 1762 | * @tx_ring: Tx descriptor ring for a specific queue |
| 1763 | * |
| 1764 | * Free all transmit software resources |
| 1765 | **/ |
| 1766 | static void igb_free_tx_resources(struct igb_adapter *adapter, |
| 1767 | struct igb_ring *tx_ring) |
| 1768 | { |
| 1769 | struct pci_dev *pdev = adapter->pdev; |
| 1770 | |
| 1771 | igb_clean_tx_ring(adapter, tx_ring); |
| 1772 | |
| 1773 | vfree(tx_ring->buffer_info); |
| 1774 | tx_ring->buffer_info = NULL; |
| 1775 | |
| 1776 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); |
| 1777 | |
| 1778 | tx_ring->desc = NULL; |
| 1779 | } |
| 1780 | |
| 1781 | /** |
| 1782 | * igb_free_all_tx_resources - Free Tx Resources for All Queues |
| 1783 | * @adapter: board private structure |
| 1784 | * |
| 1785 | * Free all transmit software resources |
| 1786 | **/ |
| 1787 | static void igb_free_all_tx_resources(struct igb_adapter *adapter) |
| 1788 | { |
| 1789 | int i; |
| 1790 | |
| 1791 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 1792 | igb_free_tx_resources(adapter, &adapter->tx_ring[i]); |
| 1793 | } |
| 1794 | |
| 1795 | static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter, |
| 1796 | struct igb_buffer *buffer_info) |
| 1797 | { |
| 1798 | if (buffer_info->dma) { |
| 1799 | pci_unmap_page(adapter->pdev, |
| 1800 | buffer_info->dma, |
| 1801 | buffer_info->length, |
| 1802 | PCI_DMA_TODEVICE); |
| 1803 | buffer_info->dma = 0; |
| 1804 | } |
| 1805 | if (buffer_info->skb) { |
| 1806 | dev_kfree_skb_any(buffer_info->skb); |
| 1807 | buffer_info->skb = NULL; |
| 1808 | } |
| 1809 | buffer_info->time_stamp = 0; |
| 1810 | /* buffer_info must be completely set up in the transmit path */ |
| 1811 | } |
| 1812 | |
| 1813 | /** |
| 1814 | * igb_clean_tx_ring - Free Tx Buffers |
| 1815 | * @adapter: board private structure |
| 1816 | * @tx_ring: ring to be cleaned |
| 1817 | **/ |
| 1818 | static void igb_clean_tx_ring(struct igb_adapter *adapter, |
| 1819 | struct igb_ring *tx_ring) |
| 1820 | { |
| 1821 | struct igb_buffer *buffer_info; |
| 1822 | unsigned long size; |
| 1823 | unsigned int i; |
| 1824 | |
| 1825 | if (!tx_ring->buffer_info) |
| 1826 | return; |
| 1827 | /* Free all the Tx ring sk_buffs */ |
| 1828 | |
| 1829 | for (i = 0; i < tx_ring->count; i++) { |
| 1830 | buffer_info = &tx_ring->buffer_info[i]; |
| 1831 | igb_unmap_and_free_tx_resource(adapter, buffer_info); |
| 1832 | } |
| 1833 | |
| 1834 | size = sizeof(struct igb_buffer) * tx_ring->count; |
| 1835 | memset(tx_ring->buffer_info, 0, size); |
| 1836 | |
| 1837 | /* Zero out the descriptor ring */ |
| 1838 | |
| 1839 | memset(tx_ring->desc, 0, tx_ring->size); |
| 1840 | |
| 1841 | tx_ring->next_to_use = 0; |
| 1842 | tx_ring->next_to_clean = 0; |
| 1843 | |
| 1844 | writel(0, adapter->hw.hw_addr + tx_ring->head); |
| 1845 | writel(0, adapter->hw.hw_addr + tx_ring->tail); |
| 1846 | } |
| 1847 | |
| 1848 | /** |
| 1849 | * igb_clean_all_tx_rings - Free Tx Buffers for all queues |
| 1850 | * @adapter: board private structure |
| 1851 | **/ |
| 1852 | static void igb_clean_all_tx_rings(struct igb_adapter *adapter) |
| 1853 | { |
| 1854 | int i; |
| 1855 | |
| 1856 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 1857 | igb_clean_tx_ring(adapter, &adapter->tx_ring[i]); |
| 1858 | } |
| 1859 | |
| 1860 | /** |
| 1861 | * igb_free_rx_resources - Free Rx Resources |
| 1862 | * @adapter: board private structure |
| 1863 | * @rx_ring: ring to clean the resources from |
| 1864 | * |
| 1865 | * Free all receive software resources |
| 1866 | **/ |
| 1867 | static void igb_free_rx_resources(struct igb_adapter *adapter, |
| 1868 | struct igb_ring *rx_ring) |
| 1869 | { |
| 1870 | struct pci_dev *pdev = adapter->pdev; |
| 1871 | |
| 1872 | igb_clean_rx_ring(adapter, rx_ring); |
| 1873 | |
| 1874 | vfree(rx_ring->buffer_info); |
| 1875 | rx_ring->buffer_info = NULL; |
| 1876 | |
| 1877 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); |
| 1878 | |
| 1879 | rx_ring->desc = NULL; |
| 1880 | } |
| 1881 | |
| 1882 | /** |
| 1883 | * igb_free_all_rx_resources - Free Rx Resources for All Queues |
| 1884 | * @adapter: board private structure |
| 1885 | * |
| 1886 | * Free all receive software resources |
| 1887 | **/ |
| 1888 | static void igb_free_all_rx_resources(struct igb_adapter *adapter) |
| 1889 | { |
| 1890 | int i; |
| 1891 | |
| 1892 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1893 | igb_free_rx_resources(adapter, &adapter->rx_ring[i]); |
| 1894 | } |
| 1895 | |
| 1896 | /** |
| 1897 | * igb_clean_rx_ring - Free Rx Buffers per Queue |
| 1898 | * @adapter: board private structure |
| 1899 | * @rx_ring: ring to free buffers from |
| 1900 | **/ |
| 1901 | static void igb_clean_rx_ring(struct igb_adapter *adapter, |
| 1902 | struct igb_ring *rx_ring) |
| 1903 | { |
| 1904 | struct igb_buffer *buffer_info; |
| 1905 | struct pci_dev *pdev = adapter->pdev; |
| 1906 | unsigned long size; |
| 1907 | unsigned int i; |
| 1908 | |
| 1909 | if (!rx_ring->buffer_info) |
| 1910 | return; |
| 1911 | /* Free all the Rx ring sk_buffs */ |
| 1912 | for (i = 0; i < rx_ring->count; i++) { |
| 1913 | buffer_info = &rx_ring->buffer_info[i]; |
| 1914 | if (buffer_info->dma) { |
| 1915 | if (adapter->rx_ps_hdr_size) |
| 1916 | pci_unmap_single(pdev, buffer_info->dma, |
| 1917 | adapter->rx_ps_hdr_size, |
| 1918 | PCI_DMA_FROMDEVICE); |
| 1919 | else |
| 1920 | pci_unmap_single(pdev, buffer_info->dma, |
| 1921 | adapter->rx_buffer_len, |
| 1922 | PCI_DMA_FROMDEVICE); |
| 1923 | buffer_info->dma = 0; |
| 1924 | } |
| 1925 | |
| 1926 | if (buffer_info->skb) { |
| 1927 | dev_kfree_skb(buffer_info->skb); |
| 1928 | buffer_info->skb = NULL; |
| 1929 | } |
| 1930 | if (buffer_info->page) { |
| 1931 | pci_unmap_page(pdev, buffer_info->page_dma, |
| 1932 | PAGE_SIZE, PCI_DMA_FROMDEVICE); |
| 1933 | put_page(buffer_info->page); |
| 1934 | buffer_info->page = NULL; |
| 1935 | buffer_info->page_dma = 0; |
| 1936 | } |
| 1937 | } |
| 1938 | |
| 1939 | /* there also may be some cached data from a chained receive */ |
| 1940 | if (rx_ring->pending_skb) { |
| 1941 | dev_kfree_skb(rx_ring->pending_skb); |
| 1942 | rx_ring->pending_skb = NULL; |
| 1943 | } |
| 1944 | |
| 1945 | size = sizeof(struct igb_buffer) * rx_ring->count; |
| 1946 | memset(rx_ring->buffer_info, 0, size); |
| 1947 | |
| 1948 | /* Zero out the descriptor ring */ |
| 1949 | memset(rx_ring->desc, 0, rx_ring->size); |
| 1950 | |
| 1951 | rx_ring->next_to_clean = 0; |
| 1952 | rx_ring->next_to_use = 0; |
| 1953 | |
| 1954 | writel(0, adapter->hw.hw_addr + rx_ring->head); |
| 1955 | writel(0, adapter->hw.hw_addr + rx_ring->tail); |
| 1956 | } |
| 1957 | |
| 1958 | /** |
| 1959 | * igb_clean_all_rx_rings - Free Rx Buffers for all queues |
| 1960 | * @adapter: board private structure |
| 1961 | **/ |
| 1962 | static void igb_clean_all_rx_rings(struct igb_adapter *adapter) |
| 1963 | { |
| 1964 | int i; |
| 1965 | |
| 1966 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 1967 | igb_clean_rx_ring(adapter, &adapter->rx_ring[i]); |
| 1968 | } |
| 1969 | |
| 1970 | /** |
| 1971 | * igb_set_mac - Change the Ethernet Address of the NIC |
| 1972 | * @netdev: network interface device structure |
| 1973 | * @p: pointer to an address structure |
| 1974 | * |
| 1975 | * Returns 0 on success, negative on failure |
| 1976 | **/ |
| 1977 | static int igb_set_mac(struct net_device *netdev, void *p) |
| 1978 | { |
| 1979 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 1980 | struct sockaddr *addr = p; |
| 1981 | |
| 1982 | if (!is_valid_ether_addr(addr->sa_data)) |
| 1983 | return -EADDRNOTAVAIL; |
| 1984 | |
| 1985 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
| 1986 | memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); |
| 1987 | |
| 1988 | adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); |
| 1989 | |
| 1990 | return 0; |
| 1991 | } |
| 1992 | |
| 1993 | /** |
| 1994 | * igb_set_multi - Multicast and Promiscuous mode set |
| 1995 | * @netdev: network interface device structure |
| 1996 | * |
| 1997 | * The set_multi entry point is called whenever the multicast address |
| 1998 | * list or the network interface flags are updated. This routine is |
| 1999 | * responsible for configuring the hardware for proper multicast, |
| 2000 | * promiscuous mode, and all-multi behavior. |
| 2001 | **/ |
| 2002 | static void igb_set_multi(struct net_device *netdev) |
| 2003 | { |
| 2004 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2005 | struct e1000_hw *hw = &adapter->hw; |
| 2006 | struct e1000_mac_info *mac = &hw->mac; |
| 2007 | struct dev_mc_list *mc_ptr; |
| 2008 | u8 *mta_list; |
| 2009 | u32 rctl; |
| 2010 | int i; |
| 2011 | |
| 2012 | /* Check for Promiscuous and All Multicast modes */ |
| 2013 | |
| 2014 | rctl = rd32(E1000_RCTL); |
| 2015 | |
| 2016 | if (netdev->flags & IFF_PROMISC) |
| 2017 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); |
| 2018 | else if (netdev->flags & IFF_ALLMULTI) { |
| 2019 | rctl |= E1000_RCTL_MPE; |
| 2020 | rctl &= ~E1000_RCTL_UPE; |
| 2021 | } else |
| 2022 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); |
| 2023 | |
| 2024 | wr32(E1000_RCTL, rctl); |
| 2025 | |
| 2026 | if (!netdev->mc_count) { |
| 2027 | /* nothing to program, so clear mc list */ |
| 2028 | igb_update_mc_addr_list(hw, NULL, 0, 1, |
| 2029 | mac->rar_entry_count); |
| 2030 | return; |
| 2031 | } |
| 2032 | |
| 2033 | mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC); |
| 2034 | if (!mta_list) |
| 2035 | return; |
| 2036 | |
| 2037 | /* The shared function expects a packed array of only addresses. */ |
| 2038 | mc_ptr = netdev->mc_list; |
| 2039 | |
| 2040 | for (i = 0; i < netdev->mc_count; i++) { |
| 2041 | if (!mc_ptr) |
| 2042 | break; |
| 2043 | memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN); |
| 2044 | mc_ptr = mc_ptr->next; |
| 2045 | } |
| 2046 | igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count); |
| 2047 | kfree(mta_list); |
| 2048 | } |
| 2049 | |
| 2050 | /* Need to wait a few seconds after link up to get diagnostic information from |
| 2051 | * the phy */ |
| 2052 | static void igb_update_phy_info(unsigned long data) |
| 2053 | { |
| 2054 | struct igb_adapter *adapter = (struct igb_adapter *) data; |
Bill Hayes | 68707ac | 2008-02-19 10:24:41 -0800 | [diff] [blame] | 2055 | if (adapter->hw.phy.ops.get_phy_info) |
| 2056 | adapter->hw.phy.ops.get_phy_info(&adapter->hw); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 2057 | } |
| 2058 | |
| 2059 | /** |
| 2060 | * igb_watchdog - Timer Call-back |
| 2061 | * @data: pointer to adapter cast into an unsigned long |
| 2062 | **/ |
| 2063 | static void igb_watchdog(unsigned long data) |
| 2064 | { |
| 2065 | struct igb_adapter *adapter = (struct igb_adapter *)data; |
| 2066 | /* Do the rest outside of interrupt context */ |
| 2067 | schedule_work(&adapter->watchdog_task); |
| 2068 | } |
| 2069 | |
| 2070 | static void igb_watchdog_task(struct work_struct *work) |
| 2071 | { |
| 2072 | struct igb_adapter *adapter = container_of(work, |
| 2073 | struct igb_adapter, watchdog_task); |
| 2074 | struct e1000_hw *hw = &adapter->hw; |
| 2075 | |
| 2076 | struct net_device *netdev = adapter->netdev; |
| 2077 | struct igb_ring *tx_ring = adapter->tx_ring; |
| 2078 | struct e1000_mac_info *mac = &adapter->hw.mac; |
| 2079 | u32 link; |
| 2080 | s32 ret_val; |
| 2081 | |
| 2082 | if ((netif_carrier_ok(netdev)) && |
| 2083 | (rd32(E1000_STATUS) & E1000_STATUS_LU)) |
| 2084 | goto link_up; |
| 2085 | |
| 2086 | ret_val = hw->mac.ops.check_for_link(&adapter->hw); |
| 2087 | if ((ret_val == E1000_ERR_PHY) && |
| 2088 | (hw->phy.type == e1000_phy_igp_3) && |
| 2089 | (rd32(E1000_CTRL) & |
| 2090 | E1000_PHY_CTRL_GBE_DISABLE)) |
| 2091 | dev_info(&adapter->pdev->dev, |
| 2092 | "Gigabit has been disabled, downgrading speed\n"); |
| 2093 | |
| 2094 | if ((hw->phy.media_type == e1000_media_type_internal_serdes) && |
| 2095 | !(rd32(E1000_TXCW) & E1000_TXCW_ANE)) |
| 2096 | link = mac->serdes_has_link; |
| 2097 | else |
| 2098 | link = rd32(E1000_STATUS) & |
| 2099 | E1000_STATUS_LU; |
| 2100 | |
| 2101 | if (link) { |
| 2102 | if (!netif_carrier_ok(netdev)) { |
| 2103 | u32 ctrl; |
| 2104 | hw->mac.ops.get_speed_and_duplex(&adapter->hw, |
| 2105 | &adapter->link_speed, |
| 2106 | &adapter->link_duplex); |
| 2107 | |
| 2108 | ctrl = rd32(E1000_CTRL); |
| 2109 | dev_info(&adapter->pdev->dev, |
| 2110 | "NIC Link is Up %d Mbps %s, " |
| 2111 | "Flow Control: %s\n", |
| 2112 | adapter->link_speed, |
| 2113 | adapter->link_duplex == FULL_DUPLEX ? |
| 2114 | "Full Duplex" : "Half Duplex", |
| 2115 | ((ctrl & E1000_CTRL_TFCE) && (ctrl & |
| 2116 | E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & |
| 2117 | E1000_CTRL_RFCE) ? "RX" : ((ctrl & |
| 2118 | E1000_CTRL_TFCE) ? "TX" : "None"))); |
| 2119 | |
| 2120 | /* tweak tx_queue_len according to speed/duplex and |
| 2121 | * adjust the timeout factor */ |
| 2122 | netdev->tx_queue_len = adapter->tx_queue_len; |
| 2123 | adapter->tx_timeout_factor = 1; |
| 2124 | switch (adapter->link_speed) { |
| 2125 | case SPEED_10: |
| 2126 | netdev->tx_queue_len = 10; |
| 2127 | adapter->tx_timeout_factor = 14; |
| 2128 | break; |
| 2129 | case SPEED_100: |
| 2130 | netdev->tx_queue_len = 100; |
| 2131 | /* maybe add some timeout factor ? */ |
| 2132 | break; |
| 2133 | } |
| 2134 | |
| 2135 | netif_carrier_on(netdev); |
| 2136 | netif_wake_queue(netdev); |
| 2137 | |
| 2138 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 2139 | mod_timer(&adapter->phy_info_timer, |
| 2140 | round_jiffies(jiffies + 2 * HZ)); |
| 2141 | } |
| 2142 | } else { |
| 2143 | if (netif_carrier_ok(netdev)) { |
| 2144 | adapter->link_speed = 0; |
| 2145 | adapter->link_duplex = 0; |
| 2146 | dev_info(&adapter->pdev->dev, "NIC Link is Down\n"); |
| 2147 | netif_carrier_off(netdev); |
| 2148 | netif_stop_queue(netdev); |
| 2149 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 2150 | mod_timer(&adapter->phy_info_timer, |
| 2151 | round_jiffies(jiffies + 2 * HZ)); |
| 2152 | } |
| 2153 | } |
| 2154 | |
| 2155 | link_up: |
| 2156 | igb_update_stats(adapter); |
| 2157 | |
| 2158 | mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; |
| 2159 | adapter->tpt_old = adapter->stats.tpt; |
| 2160 | mac->collision_delta = adapter->stats.colc - adapter->colc_old; |
| 2161 | adapter->colc_old = adapter->stats.colc; |
| 2162 | |
| 2163 | adapter->gorc = adapter->stats.gorc - adapter->gorc_old; |
| 2164 | adapter->gorc_old = adapter->stats.gorc; |
| 2165 | adapter->gotc = adapter->stats.gotc - adapter->gotc_old; |
| 2166 | adapter->gotc_old = adapter->stats.gotc; |
| 2167 | |
| 2168 | igb_update_adaptive(&adapter->hw); |
| 2169 | |
| 2170 | if (!netif_carrier_ok(netdev)) { |
| 2171 | if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) { |
| 2172 | /* We've lost link, so the controller stops DMA, |
| 2173 | * but we've got queued Tx work that's never going |
| 2174 | * to get done, so reset controller to flush Tx. |
| 2175 | * (Do the reset outside of interrupt context). */ |
| 2176 | adapter->tx_timeout_count++; |
| 2177 | schedule_work(&adapter->reset_task); |
| 2178 | } |
| 2179 | } |
| 2180 | |
| 2181 | /* Cause software interrupt to ensure rx ring is cleaned */ |
| 2182 | wr32(E1000_ICS, E1000_ICS_RXDMT0); |
| 2183 | |
| 2184 | /* Force detection of hung controller every watchdog period */ |
| 2185 | tx_ring->detect_tx_hung = true; |
| 2186 | |
| 2187 | /* Reset the timer */ |
| 2188 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 2189 | mod_timer(&adapter->watchdog_timer, |
| 2190 | round_jiffies(jiffies + 2 * HZ)); |
| 2191 | } |
| 2192 | |
| 2193 | enum latency_range { |
| 2194 | lowest_latency = 0, |
| 2195 | low_latency = 1, |
| 2196 | bulk_latency = 2, |
| 2197 | latency_invalid = 255 |
| 2198 | }; |
| 2199 | |
| 2200 | |
| 2201 | static void igb_lower_rx_eitr(struct igb_adapter *adapter, |
| 2202 | struct igb_ring *rx_ring) |
| 2203 | { |
| 2204 | struct e1000_hw *hw = &adapter->hw; |
| 2205 | int new_val; |
| 2206 | |
| 2207 | new_val = rx_ring->itr_val / 2; |
| 2208 | if (new_val < IGB_MIN_DYN_ITR) |
| 2209 | new_val = IGB_MIN_DYN_ITR; |
| 2210 | |
| 2211 | if (new_val != rx_ring->itr_val) { |
| 2212 | rx_ring->itr_val = new_val; |
| 2213 | wr32(rx_ring->itr_register, |
| 2214 | 1000000000 / (new_val * 256)); |
| 2215 | } |
| 2216 | } |
| 2217 | |
| 2218 | static void igb_raise_rx_eitr(struct igb_adapter *adapter, |
| 2219 | struct igb_ring *rx_ring) |
| 2220 | { |
| 2221 | struct e1000_hw *hw = &adapter->hw; |
| 2222 | int new_val; |
| 2223 | |
| 2224 | new_val = rx_ring->itr_val * 2; |
| 2225 | if (new_val > IGB_MAX_DYN_ITR) |
| 2226 | new_val = IGB_MAX_DYN_ITR; |
| 2227 | |
| 2228 | if (new_val != rx_ring->itr_val) { |
| 2229 | rx_ring->itr_val = new_val; |
| 2230 | wr32(rx_ring->itr_register, |
| 2231 | 1000000000 / (new_val * 256)); |
| 2232 | } |
| 2233 | } |
| 2234 | |
| 2235 | /** |
| 2236 | * igb_update_itr - update the dynamic ITR value based on statistics |
| 2237 | * Stores a new ITR value based on packets and byte |
| 2238 | * counts during the last interrupt. The advantage of per interrupt |
| 2239 | * computation is faster updates and more accurate ITR for the current |
| 2240 | * traffic pattern. Constants in this function were computed |
| 2241 | * based on theoretical maximum wire speed and thresholds were set based |
| 2242 | * on testing data as well as attempting to minimize response time |
| 2243 | * while increasing bulk throughput. |
| 2244 | * this functionality is controlled by the InterruptThrottleRate module |
| 2245 | * parameter (see igb_param.c) |
| 2246 | * NOTE: These calculations are only valid when operating in a single- |
| 2247 | * queue environment. |
| 2248 | * @adapter: pointer to adapter |
| 2249 | * @itr_setting: current adapter->itr |
| 2250 | * @packets: the number of packets during this measurement interval |
| 2251 | * @bytes: the number of bytes during this measurement interval |
| 2252 | **/ |
| 2253 | static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting, |
| 2254 | int packets, int bytes) |
| 2255 | { |
| 2256 | unsigned int retval = itr_setting; |
| 2257 | |
| 2258 | if (packets == 0) |
| 2259 | goto update_itr_done; |
| 2260 | |
| 2261 | switch (itr_setting) { |
| 2262 | case lowest_latency: |
| 2263 | /* handle TSO and jumbo frames */ |
| 2264 | if (bytes/packets > 8000) |
| 2265 | retval = bulk_latency; |
| 2266 | else if ((packets < 5) && (bytes > 512)) |
| 2267 | retval = low_latency; |
| 2268 | break; |
| 2269 | case low_latency: /* 50 usec aka 20000 ints/s */ |
| 2270 | if (bytes > 10000) { |
| 2271 | /* this if handles the TSO accounting */ |
| 2272 | if (bytes/packets > 8000) { |
| 2273 | retval = bulk_latency; |
| 2274 | } else if ((packets < 10) || ((bytes/packets) > 1200)) { |
| 2275 | retval = bulk_latency; |
| 2276 | } else if ((packets > 35)) { |
| 2277 | retval = lowest_latency; |
| 2278 | } |
| 2279 | } else if (bytes/packets > 2000) { |
| 2280 | retval = bulk_latency; |
| 2281 | } else if (packets <= 2 && bytes < 512) { |
| 2282 | retval = lowest_latency; |
| 2283 | } |
| 2284 | break; |
| 2285 | case bulk_latency: /* 250 usec aka 4000 ints/s */ |
| 2286 | if (bytes > 25000) { |
| 2287 | if (packets > 35) |
| 2288 | retval = low_latency; |
| 2289 | } else if (bytes < 6000) { |
| 2290 | retval = low_latency; |
| 2291 | } |
| 2292 | break; |
| 2293 | } |
| 2294 | |
| 2295 | update_itr_done: |
| 2296 | return retval; |
| 2297 | } |
| 2298 | |
| 2299 | static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register, |
| 2300 | int rx_only) |
| 2301 | { |
| 2302 | u16 current_itr; |
| 2303 | u32 new_itr = adapter->itr; |
| 2304 | |
| 2305 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ |
| 2306 | if (adapter->link_speed != SPEED_1000) { |
| 2307 | current_itr = 0; |
| 2308 | new_itr = 4000; |
| 2309 | goto set_itr_now; |
| 2310 | } |
| 2311 | |
| 2312 | adapter->rx_itr = igb_update_itr(adapter, |
| 2313 | adapter->rx_itr, |
| 2314 | adapter->rx_ring->total_packets, |
| 2315 | adapter->rx_ring->total_bytes); |
| 2316 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ |
| 2317 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) |
| 2318 | adapter->rx_itr = low_latency; |
| 2319 | |
| 2320 | if (!rx_only) { |
| 2321 | adapter->tx_itr = igb_update_itr(adapter, |
| 2322 | adapter->tx_itr, |
| 2323 | adapter->tx_ring->total_packets, |
| 2324 | adapter->tx_ring->total_bytes); |
| 2325 | /* conservative mode (itr 3) eliminates the |
| 2326 | * lowest_latency setting */ |
| 2327 | if (adapter->itr_setting == 3 && |
| 2328 | adapter->tx_itr == lowest_latency) |
| 2329 | adapter->tx_itr = low_latency; |
| 2330 | |
| 2331 | current_itr = max(adapter->rx_itr, adapter->tx_itr); |
| 2332 | } else { |
| 2333 | current_itr = adapter->rx_itr; |
| 2334 | } |
| 2335 | |
| 2336 | switch (current_itr) { |
| 2337 | /* counts and packets in update_itr are dependent on these numbers */ |
| 2338 | case lowest_latency: |
| 2339 | new_itr = 70000; |
| 2340 | break; |
| 2341 | case low_latency: |
| 2342 | new_itr = 20000; /* aka hwitr = ~200 */ |
| 2343 | break; |
| 2344 | case bulk_latency: |
| 2345 | new_itr = 4000; |
| 2346 | break; |
| 2347 | default: |
| 2348 | break; |
| 2349 | } |
| 2350 | |
| 2351 | set_itr_now: |
| 2352 | if (new_itr != adapter->itr) { |
| 2353 | /* this attempts to bias the interrupt rate towards Bulk |
| 2354 | * by adding intermediate steps when interrupt rate is |
| 2355 | * increasing */ |
| 2356 | new_itr = new_itr > adapter->itr ? |
| 2357 | min(adapter->itr + (new_itr >> 2), new_itr) : |
| 2358 | new_itr; |
| 2359 | /* Don't write the value here; it resets the adapter's |
| 2360 | * internal timer, and causes us to delay far longer than |
| 2361 | * we should between interrupts. Instead, we write the ITR |
| 2362 | * value at the beginning of the next interrupt so the timing |
| 2363 | * ends up being correct. |
| 2364 | */ |
| 2365 | adapter->itr = new_itr; |
| 2366 | adapter->set_itr = 1; |
| 2367 | } |
| 2368 | |
| 2369 | return; |
| 2370 | } |
| 2371 | |
| 2372 | |
| 2373 | #define IGB_TX_FLAGS_CSUM 0x00000001 |
| 2374 | #define IGB_TX_FLAGS_VLAN 0x00000002 |
| 2375 | #define IGB_TX_FLAGS_TSO 0x00000004 |
| 2376 | #define IGB_TX_FLAGS_IPV4 0x00000008 |
| 2377 | #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000 |
| 2378 | #define IGB_TX_FLAGS_VLAN_SHIFT 16 |
| 2379 | |
| 2380 | static inline int igb_tso_adv(struct igb_adapter *adapter, |
| 2381 | struct igb_ring *tx_ring, |
| 2382 | struct sk_buff *skb, u32 tx_flags, u8 *hdr_len) |
| 2383 | { |
| 2384 | struct e1000_adv_tx_context_desc *context_desc; |
| 2385 | unsigned int i; |
| 2386 | int err; |
| 2387 | struct igb_buffer *buffer_info; |
| 2388 | u32 info = 0, tu_cmd = 0; |
| 2389 | u32 mss_l4len_idx, l4len; |
| 2390 | *hdr_len = 0; |
| 2391 | |
| 2392 | if (skb_header_cloned(skb)) { |
| 2393 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); |
| 2394 | if (err) |
| 2395 | return err; |
| 2396 | } |
| 2397 | |
| 2398 | l4len = tcp_hdrlen(skb); |
| 2399 | *hdr_len += l4len; |
| 2400 | |
| 2401 | if (skb->protocol == htons(ETH_P_IP)) { |
| 2402 | struct iphdr *iph = ip_hdr(skb); |
| 2403 | iph->tot_len = 0; |
| 2404 | iph->check = 0; |
| 2405 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
| 2406 | iph->daddr, 0, |
| 2407 | IPPROTO_TCP, |
| 2408 | 0); |
| 2409 | } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { |
| 2410 | ipv6_hdr(skb)->payload_len = 0; |
| 2411 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
| 2412 | &ipv6_hdr(skb)->daddr, |
| 2413 | 0, IPPROTO_TCP, 0); |
| 2414 | } |
| 2415 | |
| 2416 | i = tx_ring->next_to_use; |
| 2417 | |
| 2418 | buffer_info = &tx_ring->buffer_info[i]; |
| 2419 | context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i); |
| 2420 | /* VLAN MACLEN IPLEN */ |
| 2421 | if (tx_flags & IGB_TX_FLAGS_VLAN) |
| 2422 | info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK); |
| 2423 | info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT); |
| 2424 | *hdr_len += skb_network_offset(skb); |
| 2425 | info |= skb_network_header_len(skb); |
| 2426 | *hdr_len += skb_network_header_len(skb); |
| 2427 | context_desc->vlan_macip_lens = cpu_to_le32(info); |
| 2428 | |
| 2429 | /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ |
| 2430 | tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT); |
| 2431 | |
| 2432 | if (skb->protocol == htons(ETH_P_IP)) |
| 2433 | tu_cmd |= E1000_ADVTXD_TUCMD_IPV4; |
| 2434 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; |
| 2435 | |
| 2436 | context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd); |
| 2437 | |
| 2438 | /* MSS L4LEN IDX */ |
| 2439 | mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT); |
| 2440 | mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT); |
| 2441 | |
| 2442 | /* Context index must be unique per ring. Luckily, so is the interrupt |
| 2443 | * mask value. */ |
| 2444 | mss_l4len_idx |= tx_ring->eims_value >> 4; |
| 2445 | |
| 2446 | context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); |
| 2447 | context_desc->seqnum_seed = 0; |
| 2448 | |
| 2449 | buffer_info->time_stamp = jiffies; |
| 2450 | buffer_info->dma = 0; |
| 2451 | i++; |
| 2452 | if (i == tx_ring->count) |
| 2453 | i = 0; |
| 2454 | |
| 2455 | tx_ring->next_to_use = i; |
| 2456 | |
| 2457 | return true; |
| 2458 | } |
| 2459 | |
| 2460 | static inline bool igb_tx_csum_adv(struct igb_adapter *adapter, |
| 2461 | struct igb_ring *tx_ring, |
| 2462 | struct sk_buff *skb, u32 tx_flags) |
| 2463 | { |
| 2464 | struct e1000_adv_tx_context_desc *context_desc; |
| 2465 | unsigned int i; |
| 2466 | struct igb_buffer *buffer_info; |
| 2467 | u32 info = 0, tu_cmd = 0; |
| 2468 | |
| 2469 | if ((skb->ip_summed == CHECKSUM_PARTIAL) || |
| 2470 | (tx_flags & IGB_TX_FLAGS_VLAN)) { |
| 2471 | i = tx_ring->next_to_use; |
| 2472 | buffer_info = &tx_ring->buffer_info[i]; |
| 2473 | context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i); |
| 2474 | |
| 2475 | if (tx_flags & IGB_TX_FLAGS_VLAN) |
| 2476 | info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK); |
| 2477 | info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT); |
| 2478 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
| 2479 | info |= skb_network_header_len(skb); |
| 2480 | |
| 2481 | context_desc->vlan_macip_lens = cpu_to_le32(info); |
| 2482 | |
| 2483 | tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT); |
| 2484 | |
| 2485 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
Mitch Williams | 44b0cda | 2008-03-07 10:32:13 -0800 | [diff] [blame] | 2486 | switch (skb->protocol) { |
| 2487 | case __constant_htons(ETH_P_IP): |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 2488 | tu_cmd |= E1000_ADVTXD_TUCMD_IPV4; |
Mitch Williams | 44b0cda | 2008-03-07 10:32:13 -0800 | [diff] [blame] | 2489 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
| 2490 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; |
| 2491 | break; |
| 2492 | case __constant_htons(ETH_P_IPV6): |
| 2493 | /* XXX what about other V6 headers?? */ |
| 2494 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) |
| 2495 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; |
| 2496 | break; |
| 2497 | default: |
| 2498 | if (unlikely(net_ratelimit())) |
| 2499 | dev_warn(&adapter->pdev->dev, |
| 2500 | "partial checksum but proto=%x!\n", |
| 2501 | skb->protocol); |
| 2502 | break; |
| 2503 | } |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 2504 | } |
| 2505 | |
| 2506 | context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd); |
| 2507 | context_desc->seqnum_seed = 0; |
| 2508 | context_desc->mss_l4len_idx = |
| 2509 | cpu_to_le32(tx_ring->eims_value >> 4); |
| 2510 | |
| 2511 | buffer_info->time_stamp = jiffies; |
| 2512 | buffer_info->dma = 0; |
| 2513 | |
| 2514 | i++; |
| 2515 | if (i == tx_ring->count) |
| 2516 | i = 0; |
| 2517 | tx_ring->next_to_use = i; |
| 2518 | |
| 2519 | return true; |
| 2520 | } |
| 2521 | |
| 2522 | |
| 2523 | return false; |
| 2524 | } |
| 2525 | |
| 2526 | #define IGB_MAX_TXD_PWR 16 |
| 2527 | #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR) |
| 2528 | |
| 2529 | static inline int igb_tx_map_adv(struct igb_adapter *adapter, |
| 2530 | struct igb_ring *tx_ring, |
| 2531 | struct sk_buff *skb) |
| 2532 | { |
| 2533 | struct igb_buffer *buffer_info; |
| 2534 | unsigned int len = skb_headlen(skb); |
| 2535 | unsigned int count = 0, i; |
| 2536 | unsigned int f; |
| 2537 | |
| 2538 | i = tx_ring->next_to_use; |
| 2539 | |
| 2540 | buffer_info = &tx_ring->buffer_info[i]; |
| 2541 | BUG_ON(len >= IGB_MAX_DATA_PER_TXD); |
| 2542 | buffer_info->length = len; |
| 2543 | /* set time_stamp *before* dma to help avoid a possible race */ |
| 2544 | buffer_info->time_stamp = jiffies; |
| 2545 | buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len, |
| 2546 | PCI_DMA_TODEVICE); |
| 2547 | count++; |
| 2548 | i++; |
| 2549 | if (i == tx_ring->count) |
| 2550 | i = 0; |
| 2551 | |
| 2552 | for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) { |
| 2553 | struct skb_frag_struct *frag; |
| 2554 | |
| 2555 | frag = &skb_shinfo(skb)->frags[f]; |
| 2556 | len = frag->size; |
| 2557 | |
| 2558 | buffer_info = &tx_ring->buffer_info[i]; |
| 2559 | BUG_ON(len >= IGB_MAX_DATA_PER_TXD); |
| 2560 | buffer_info->length = len; |
| 2561 | buffer_info->time_stamp = jiffies; |
| 2562 | buffer_info->dma = pci_map_page(adapter->pdev, |
| 2563 | frag->page, |
| 2564 | frag->page_offset, |
| 2565 | len, |
| 2566 | PCI_DMA_TODEVICE); |
| 2567 | |
| 2568 | count++; |
| 2569 | i++; |
| 2570 | if (i == tx_ring->count) |
| 2571 | i = 0; |
| 2572 | } |
| 2573 | |
| 2574 | i = (i == 0) ? tx_ring->count - 1 : i - 1; |
| 2575 | tx_ring->buffer_info[i].skb = skb; |
| 2576 | |
| 2577 | return count; |
| 2578 | } |
| 2579 | |
| 2580 | static inline void igb_tx_queue_adv(struct igb_adapter *adapter, |
| 2581 | struct igb_ring *tx_ring, |
| 2582 | int tx_flags, int count, u32 paylen, |
| 2583 | u8 hdr_len) |
| 2584 | { |
| 2585 | union e1000_adv_tx_desc *tx_desc = NULL; |
| 2586 | struct igb_buffer *buffer_info; |
| 2587 | u32 olinfo_status = 0, cmd_type_len; |
| 2588 | unsigned int i; |
| 2589 | |
| 2590 | cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS | |
| 2591 | E1000_ADVTXD_DCMD_DEXT); |
| 2592 | |
| 2593 | if (tx_flags & IGB_TX_FLAGS_VLAN) |
| 2594 | cmd_type_len |= E1000_ADVTXD_DCMD_VLE; |
| 2595 | |
| 2596 | if (tx_flags & IGB_TX_FLAGS_TSO) { |
| 2597 | cmd_type_len |= E1000_ADVTXD_DCMD_TSE; |
| 2598 | |
| 2599 | /* insert tcp checksum */ |
| 2600 | olinfo_status |= E1000_TXD_POPTS_TXSM << 8; |
| 2601 | |
| 2602 | /* insert ip checksum */ |
| 2603 | if (tx_flags & IGB_TX_FLAGS_IPV4) |
| 2604 | olinfo_status |= E1000_TXD_POPTS_IXSM << 8; |
| 2605 | |
| 2606 | } else if (tx_flags & IGB_TX_FLAGS_CSUM) { |
| 2607 | olinfo_status |= E1000_TXD_POPTS_TXSM << 8; |
| 2608 | } |
| 2609 | |
| 2610 | if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO | |
| 2611 | IGB_TX_FLAGS_VLAN)) |
| 2612 | olinfo_status |= tx_ring->eims_value >> 4; |
| 2613 | |
| 2614 | olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT); |
| 2615 | |
| 2616 | i = tx_ring->next_to_use; |
| 2617 | while (count--) { |
| 2618 | buffer_info = &tx_ring->buffer_info[i]; |
| 2619 | tx_desc = E1000_TX_DESC_ADV(*tx_ring, i); |
| 2620 | tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); |
| 2621 | tx_desc->read.cmd_type_len = |
| 2622 | cpu_to_le32(cmd_type_len | buffer_info->length); |
| 2623 | tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); |
| 2624 | i++; |
| 2625 | if (i == tx_ring->count) |
| 2626 | i = 0; |
| 2627 | } |
| 2628 | |
| 2629 | tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd); |
| 2630 | /* Force memory writes to complete before letting h/w |
| 2631 | * know there are new descriptors to fetch. (Only |
| 2632 | * applicable for weak-ordered memory model archs, |
| 2633 | * such as IA-64). */ |
| 2634 | wmb(); |
| 2635 | |
| 2636 | tx_ring->next_to_use = i; |
| 2637 | writel(i, adapter->hw.hw_addr + tx_ring->tail); |
| 2638 | /* we need this if more than one processor can write to our tail |
| 2639 | * at a time, it syncronizes IO on IA64/Altix systems */ |
| 2640 | mmiowb(); |
| 2641 | } |
| 2642 | |
| 2643 | static int __igb_maybe_stop_tx(struct net_device *netdev, |
| 2644 | struct igb_ring *tx_ring, int size) |
| 2645 | { |
| 2646 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2647 | |
| 2648 | netif_stop_queue(netdev); |
| 2649 | /* Herbert's original patch had: |
| 2650 | * smp_mb__after_netif_stop_queue(); |
| 2651 | * but since that doesn't exist yet, just open code it. */ |
| 2652 | smp_mb(); |
| 2653 | |
| 2654 | /* We need to check again in a case another CPU has just |
| 2655 | * made room available. */ |
| 2656 | if (IGB_DESC_UNUSED(tx_ring) < size) |
| 2657 | return -EBUSY; |
| 2658 | |
| 2659 | /* A reprieve! */ |
| 2660 | netif_start_queue(netdev); |
| 2661 | ++adapter->restart_queue; |
| 2662 | return 0; |
| 2663 | } |
| 2664 | |
| 2665 | static int igb_maybe_stop_tx(struct net_device *netdev, |
| 2666 | struct igb_ring *tx_ring, int size) |
| 2667 | { |
| 2668 | if (IGB_DESC_UNUSED(tx_ring) >= size) |
| 2669 | return 0; |
| 2670 | return __igb_maybe_stop_tx(netdev, tx_ring, size); |
| 2671 | } |
| 2672 | |
| 2673 | #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1) |
| 2674 | |
| 2675 | static int igb_xmit_frame_ring_adv(struct sk_buff *skb, |
| 2676 | struct net_device *netdev, |
| 2677 | struct igb_ring *tx_ring) |
| 2678 | { |
| 2679 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2680 | unsigned int tx_flags = 0; |
| 2681 | unsigned int len; |
| 2682 | unsigned long irq_flags; |
| 2683 | u8 hdr_len = 0; |
| 2684 | int tso = 0; |
| 2685 | |
| 2686 | len = skb_headlen(skb); |
| 2687 | |
| 2688 | if (test_bit(__IGB_DOWN, &adapter->state)) { |
| 2689 | dev_kfree_skb_any(skb); |
| 2690 | return NETDEV_TX_OK; |
| 2691 | } |
| 2692 | |
| 2693 | if (skb->len <= 0) { |
| 2694 | dev_kfree_skb_any(skb); |
| 2695 | return NETDEV_TX_OK; |
| 2696 | } |
| 2697 | |
| 2698 | if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags)) |
| 2699 | /* Collision - tell upper layer to requeue */ |
| 2700 | return NETDEV_TX_LOCKED; |
| 2701 | |
| 2702 | /* need: 1 descriptor per page, |
| 2703 | * + 2 desc gap to keep tail from touching head, |
| 2704 | * + 1 desc for skb->data, |
| 2705 | * + 1 desc for context descriptor, |
| 2706 | * otherwise try next time */ |
| 2707 | if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) { |
| 2708 | /* this is a hard error */ |
| 2709 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); |
| 2710 | return NETDEV_TX_BUSY; |
| 2711 | } |
| 2712 | |
| 2713 | if (adapter->vlgrp && vlan_tx_tag_present(skb)) { |
| 2714 | tx_flags |= IGB_TX_FLAGS_VLAN; |
| 2715 | tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT); |
| 2716 | } |
| 2717 | |
| 2718 | tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags, |
| 2719 | &hdr_len) : 0; |
| 2720 | |
| 2721 | if (tso < 0) { |
| 2722 | dev_kfree_skb_any(skb); |
| 2723 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); |
| 2724 | return NETDEV_TX_OK; |
| 2725 | } |
| 2726 | |
| 2727 | if (tso) |
| 2728 | tx_flags |= IGB_TX_FLAGS_TSO; |
| 2729 | else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags)) |
| 2730 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
| 2731 | tx_flags |= IGB_TX_FLAGS_CSUM; |
| 2732 | |
| 2733 | if (skb->protocol == htons(ETH_P_IP)) |
| 2734 | tx_flags |= IGB_TX_FLAGS_IPV4; |
| 2735 | |
| 2736 | igb_tx_queue_adv(adapter, tx_ring, tx_flags, |
| 2737 | igb_tx_map_adv(adapter, tx_ring, skb), |
| 2738 | skb->len, hdr_len); |
| 2739 | |
| 2740 | netdev->trans_start = jiffies; |
| 2741 | |
| 2742 | /* Make sure there is space in the ring for the next send. */ |
| 2743 | igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4); |
| 2744 | |
| 2745 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); |
| 2746 | return NETDEV_TX_OK; |
| 2747 | } |
| 2748 | |
| 2749 | static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev) |
| 2750 | { |
| 2751 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2752 | struct igb_ring *tx_ring = &adapter->tx_ring[0]; |
| 2753 | |
| 2754 | /* This goes back to the question of how to logically map a tx queue |
| 2755 | * to a flow. Right now, performance is impacted slightly negatively |
| 2756 | * if using multiple tx queues. If the stack breaks away from a |
| 2757 | * single qdisc implementation, we can look at this again. */ |
| 2758 | return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring)); |
| 2759 | } |
| 2760 | |
| 2761 | /** |
| 2762 | * igb_tx_timeout - Respond to a Tx Hang |
| 2763 | * @netdev: network interface device structure |
| 2764 | **/ |
| 2765 | static void igb_tx_timeout(struct net_device *netdev) |
| 2766 | { |
| 2767 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2768 | struct e1000_hw *hw = &adapter->hw; |
| 2769 | |
| 2770 | /* Do the reset outside of interrupt context */ |
| 2771 | adapter->tx_timeout_count++; |
| 2772 | schedule_work(&adapter->reset_task); |
| 2773 | wr32(E1000_EICS, adapter->eims_enable_mask & |
| 2774 | ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER)); |
| 2775 | } |
| 2776 | |
| 2777 | static void igb_reset_task(struct work_struct *work) |
| 2778 | { |
| 2779 | struct igb_adapter *adapter; |
| 2780 | adapter = container_of(work, struct igb_adapter, reset_task); |
| 2781 | |
| 2782 | igb_reinit_locked(adapter); |
| 2783 | } |
| 2784 | |
| 2785 | /** |
| 2786 | * igb_get_stats - Get System Network Statistics |
| 2787 | * @netdev: network interface device structure |
| 2788 | * |
| 2789 | * Returns the address of the device statistics structure. |
| 2790 | * The statistics are actually updated from the timer callback. |
| 2791 | **/ |
| 2792 | static struct net_device_stats * |
| 2793 | igb_get_stats(struct net_device *netdev) |
| 2794 | { |
| 2795 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2796 | |
| 2797 | /* only return the current stats */ |
| 2798 | return &adapter->net_stats; |
| 2799 | } |
| 2800 | |
| 2801 | /** |
| 2802 | * igb_change_mtu - Change the Maximum Transfer Unit |
| 2803 | * @netdev: network interface device structure |
| 2804 | * @new_mtu: new value for maximum frame size |
| 2805 | * |
| 2806 | * Returns 0 on success, negative on failure |
| 2807 | **/ |
| 2808 | static int igb_change_mtu(struct net_device *netdev, int new_mtu) |
| 2809 | { |
| 2810 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 2811 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; |
| 2812 | |
| 2813 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || |
| 2814 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { |
| 2815 | dev_err(&adapter->pdev->dev, "Invalid MTU setting\n"); |
| 2816 | return -EINVAL; |
| 2817 | } |
| 2818 | |
| 2819 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
| 2820 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { |
| 2821 | dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n"); |
| 2822 | return -EINVAL; |
| 2823 | } |
| 2824 | |
| 2825 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) |
| 2826 | msleep(1); |
| 2827 | /* igb_down has a dependency on max_frame_size */ |
| 2828 | adapter->max_frame_size = max_frame; |
| 2829 | if (netif_running(netdev)) |
| 2830 | igb_down(adapter); |
| 2831 | |
| 2832 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN |
| 2833 | * means we reserve 2 more, this pushes us to allocate from the next |
| 2834 | * larger slab size. |
| 2835 | * i.e. RXBUFFER_2048 --> size-4096 slab |
| 2836 | */ |
| 2837 | |
| 2838 | if (max_frame <= IGB_RXBUFFER_256) |
| 2839 | adapter->rx_buffer_len = IGB_RXBUFFER_256; |
| 2840 | else if (max_frame <= IGB_RXBUFFER_512) |
| 2841 | adapter->rx_buffer_len = IGB_RXBUFFER_512; |
| 2842 | else if (max_frame <= IGB_RXBUFFER_1024) |
| 2843 | adapter->rx_buffer_len = IGB_RXBUFFER_1024; |
| 2844 | else if (max_frame <= IGB_RXBUFFER_2048) |
| 2845 | adapter->rx_buffer_len = IGB_RXBUFFER_2048; |
| 2846 | else |
| 2847 | adapter->rx_buffer_len = IGB_RXBUFFER_4096; |
| 2848 | /* adjust allocation if LPE protects us, and we aren't using SBP */ |
| 2849 | if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || |
| 2850 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)) |
| 2851 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; |
| 2852 | |
| 2853 | dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n", |
| 2854 | netdev->mtu, new_mtu); |
| 2855 | netdev->mtu = new_mtu; |
| 2856 | |
| 2857 | if (netif_running(netdev)) |
| 2858 | igb_up(adapter); |
| 2859 | else |
| 2860 | igb_reset(adapter); |
| 2861 | |
| 2862 | clear_bit(__IGB_RESETTING, &adapter->state); |
| 2863 | |
| 2864 | return 0; |
| 2865 | } |
| 2866 | |
| 2867 | /** |
| 2868 | * igb_update_stats - Update the board statistics counters |
| 2869 | * @adapter: board private structure |
| 2870 | **/ |
| 2871 | |
| 2872 | void igb_update_stats(struct igb_adapter *adapter) |
| 2873 | { |
| 2874 | struct e1000_hw *hw = &adapter->hw; |
| 2875 | struct pci_dev *pdev = adapter->pdev; |
| 2876 | u16 phy_tmp; |
| 2877 | |
| 2878 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF |
| 2879 | |
| 2880 | /* |
| 2881 | * Prevent stats update while adapter is being reset, or if the pci |
| 2882 | * connection is down. |
| 2883 | */ |
| 2884 | if (adapter->link_speed == 0) |
| 2885 | return; |
| 2886 | if (pci_channel_offline(pdev)) |
| 2887 | return; |
| 2888 | |
| 2889 | adapter->stats.crcerrs += rd32(E1000_CRCERRS); |
| 2890 | adapter->stats.gprc += rd32(E1000_GPRC); |
| 2891 | adapter->stats.gorc += rd32(E1000_GORCL); |
| 2892 | rd32(E1000_GORCH); /* clear GORCL */ |
| 2893 | adapter->stats.bprc += rd32(E1000_BPRC); |
| 2894 | adapter->stats.mprc += rd32(E1000_MPRC); |
| 2895 | adapter->stats.roc += rd32(E1000_ROC); |
| 2896 | |
| 2897 | adapter->stats.prc64 += rd32(E1000_PRC64); |
| 2898 | adapter->stats.prc127 += rd32(E1000_PRC127); |
| 2899 | adapter->stats.prc255 += rd32(E1000_PRC255); |
| 2900 | adapter->stats.prc511 += rd32(E1000_PRC511); |
| 2901 | adapter->stats.prc1023 += rd32(E1000_PRC1023); |
| 2902 | adapter->stats.prc1522 += rd32(E1000_PRC1522); |
| 2903 | adapter->stats.symerrs += rd32(E1000_SYMERRS); |
| 2904 | adapter->stats.sec += rd32(E1000_SEC); |
| 2905 | |
| 2906 | adapter->stats.mpc += rd32(E1000_MPC); |
| 2907 | adapter->stats.scc += rd32(E1000_SCC); |
| 2908 | adapter->stats.ecol += rd32(E1000_ECOL); |
| 2909 | adapter->stats.mcc += rd32(E1000_MCC); |
| 2910 | adapter->stats.latecol += rd32(E1000_LATECOL); |
| 2911 | adapter->stats.dc += rd32(E1000_DC); |
| 2912 | adapter->stats.rlec += rd32(E1000_RLEC); |
| 2913 | adapter->stats.xonrxc += rd32(E1000_XONRXC); |
| 2914 | adapter->stats.xontxc += rd32(E1000_XONTXC); |
| 2915 | adapter->stats.xoffrxc += rd32(E1000_XOFFRXC); |
| 2916 | adapter->stats.xofftxc += rd32(E1000_XOFFTXC); |
| 2917 | adapter->stats.fcruc += rd32(E1000_FCRUC); |
| 2918 | adapter->stats.gptc += rd32(E1000_GPTC); |
| 2919 | adapter->stats.gotc += rd32(E1000_GOTCL); |
| 2920 | rd32(E1000_GOTCH); /* clear GOTCL */ |
| 2921 | adapter->stats.rnbc += rd32(E1000_RNBC); |
| 2922 | adapter->stats.ruc += rd32(E1000_RUC); |
| 2923 | adapter->stats.rfc += rd32(E1000_RFC); |
| 2924 | adapter->stats.rjc += rd32(E1000_RJC); |
| 2925 | adapter->stats.tor += rd32(E1000_TORH); |
| 2926 | adapter->stats.tot += rd32(E1000_TOTH); |
| 2927 | adapter->stats.tpr += rd32(E1000_TPR); |
| 2928 | |
| 2929 | adapter->stats.ptc64 += rd32(E1000_PTC64); |
| 2930 | adapter->stats.ptc127 += rd32(E1000_PTC127); |
| 2931 | adapter->stats.ptc255 += rd32(E1000_PTC255); |
| 2932 | adapter->stats.ptc511 += rd32(E1000_PTC511); |
| 2933 | adapter->stats.ptc1023 += rd32(E1000_PTC1023); |
| 2934 | adapter->stats.ptc1522 += rd32(E1000_PTC1522); |
| 2935 | |
| 2936 | adapter->stats.mptc += rd32(E1000_MPTC); |
| 2937 | adapter->stats.bptc += rd32(E1000_BPTC); |
| 2938 | |
| 2939 | /* used for adaptive IFS */ |
| 2940 | |
| 2941 | hw->mac.tx_packet_delta = rd32(E1000_TPT); |
| 2942 | adapter->stats.tpt += hw->mac.tx_packet_delta; |
| 2943 | hw->mac.collision_delta = rd32(E1000_COLC); |
| 2944 | adapter->stats.colc += hw->mac.collision_delta; |
| 2945 | |
| 2946 | adapter->stats.algnerrc += rd32(E1000_ALGNERRC); |
| 2947 | adapter->stats.rxerrc += rd32(E1000_RXERRC); |
| 2948 | adapter->stats.tncrs += rd32(E1000_TNCRS); |
| 2949 | adapter->stats.tsctc += rd32(E1000_TSCTC); |
| 2950 | adapter->stats.tsctfc += rd32(E1000_TSCTFC); |
| 2951 | |
| 2952 | adapter->stats.iac += rd32(E1000_IAC); |
| 2953 | adapter->stats.icrxoc += rd32(E1000_ICRXOC); |
| 2954 | adapter->stats.icrxptc += rd32(E1000_ICRXPTC); |
| 2955 | adapter->stats.icrxatc += rd32(E1000_ICRXATC); |
| 2956 | adapter->stats.ictxptc += rd32(E1000_ICTXPTC); |
| 2957 | adapter->stats.ictxatc += rd32(E1000_ICTXATC); |
| 2958 | adapter->stats.ictxqec += rd32(E1000_ICTXQEC); |
| 2959 | adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC); |
| 2960 | adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC); |
| 2961 | |
| 2962 | /* Fill out the OS statistics structure */ |
| 2963 | adapter->net_stats.multicast = adapter->stats.mprc; |
| 2964 | adapter->net_stats.collisions = adapter->stats.colc; |
| 2965 | |
| 2966 | /* Rx Errors */ |
| 2967 | |
| 2968 | /* RLEC on some newer hardware can be incorrect so build |
| 2969 | * our own version based on RUC and ROC */ |
| 2970 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + |
| 2971 | adapter->stats.crcerrs + adapter->stats.algnerrc + |
| 2972 | adapter->stats.ruc + adapter->stats.roc + |
| 2973 | adapter->stats.cexterr; |
| 2974 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + |
| 2975 | adapter->stats.roc; |
| 2976 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; |
| 2977 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; |
| 2978 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; |
| 2979 | |
| 2980 | /* Tx Errors */ |
| 2981 | adapter->net_stats.tx_errors = adapter->stats.ecol + |
| 2982 | adapter->stats.latecol; |
| 2983 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; |
| 2984 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; |
| 2985 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; |
| 2986 | |
| 2987 | /* Tx Dropped needs to be maintained elsewhere */ |
| 2988 | |
| 2989 | /* Phy Stats */ |
| 2990 | if (hw->phy.media_type == e1000_media_type_copper) { |
| 2991 | if ((adapter->link_speed == SPEED_1000) && |
| 2992 | (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS, |
| 2993 | &phy_tmp))) { |
| 2994 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; |
| 2995 | adapter->phy_stats.idle_errors += phy_tmp; |
| 2996 | } |
| 2997 | } |
| 2998 | |
| 2999 | /* Management Stats */ |
| 3000 | adapter->stats.mgptc += rd32(E1000_MGTPTC); |
| 3001 | adapter->stats.mgprc += rd32(E1000_MGTPRC); |
| 3002 | adapter->stats.mgpdc += rd32(E1000_MGTPDC); |
| 3003 | } |
| 3004 | |
| 3005 | |
| 3006 | static irqreturn_t igb_msix_other(int irq, void *data) |
| 3007 | { |
| 3008 | struct net_device *netdev = data; |
| 3009 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3010 | struct e1000_hw *hw = &adapter->hw; |
| 3011 | u32 eicr; |
| 3012 | /* disable interrupts from the "other" bit, avoid re-entry */ |
| 3013 | wr32(E1000_EIMC, E1000_EIMS_OTHER); |
| 3014 | |
| 3015 | eicr = rd32(E1000_EICR); |
| 3016 | |
| 3017 | if (eicr & E1000_EIMS_OTHER) { |
| 3018 | u32 icr = rd32(E1000_ICR); |
| 3019 | /* reading ICR causes bit 31 of EICR to be cleared */ |
| 3020 | if (!(icr & E1000_ICR_LSC)) |
| 3021 | goto no_link_interrupt; |
| 3022 | hw->mac.get_link_status = 1; |
| 3023 | /* guard against interrupt when we're going down */ |
| 3024 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3025 | mod_timer(&adapter->watchdog_timer, jiffies + 1); |
| 3026 | } |
| 3027 | |
| 3028 | no_link_interrupt: |
| 3029 | wr32(E1000_IMS, E1000_IMS_LSC); |
| 3030 | wr32(E1000_EIMS, E1000_EIMS_OTHER); |
| 3031 | |
| 3032 | return IRQ_HANDLED; |
| 3033 | } |
| 3034 | |
| 3035 | static irqreturn_t igb_msix_tx(int irq, void *data) |
| 3036 | { |
| 3037 | struct igb_ring *tx_ring = data; |
| 3038 | struct igb_adapter *adapter = tx_ring->adapter; |
| 3039 | struct e1000_hw *hw = &adapter->hw; |
| 3040 | |
| 3041 | if (!tx_ring->itr_val) |
| 3042 | wr32(E1000_EIMC, tx_ring->eims_value); |
| 3043 | |
| 3044 | tx_ring->total_bytes = 0; |
| 3045 | tx_ring->total_packets = 0; |
| 3046 | if (!igb_clean_tx_irq(adapter, tx_ring)) |
| 3047 | /* Ring was not completely cleaned, so fire another interrupt */ |
| 3048 | wr32(E1000_EICS, tx_ring->eims_value); |
| 3049 | |
| 3050 | if (!tx_ring->itr_val) |
| 3051 | wr32(E1000_EIMS, tx_ring->eims_value); |
| 3052 | return IRQ_HANDLED; |
| 3053 | } |
| 3054 | |
| 3055 | static irqreturn_t igb_msix_rx(int irq, void *data) |
| 3056 | { |
| 3057 | struct igb_ring *rx_ring = data; |
| 3058 | struct igb_adapter *adapter = rx_ring->adapter; |
| 3059 | struct e1000_hw *hw = &adapter->hw; |
| 3060 | |
| 3061 | if (!rx_ring->itr_val) |
| 3062 | wr32(E1000_EIMC, rx_ring->eims_value); |
| 3063 | |
| 3064 | if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) { |
| 3065 | rx_ring->total_bytes = 0; |
| 3066 | rx_ring->total_packets = 0; |
| 3067 | rx_ring->no_itr_adjust = 0; |
| 3068 | __netif_rx_schedule(adapter->netdev, &rx_ring->napi); |
| 3069 | } else { |
| 3070 | if (!rx_ring->no_itr_adjust) { |
| 3071 | igb_lower_rx_eitr(adapter, rx_ring); |
| 3072 | rx_ring->no_itr_adjust = 1; |
| 3073 | } |
| 3074 | } |
| 3075 | |
| 3076 | return IRQ_HANDLED; |
| 3077 | } |
| 3078 | |
| 3079 | |
| 3080 | /** |
| 3081 | * igb_intr_msi - Interrupt Handler |
| 3082 | * @irq: interrupt number |
| 3083 | * @data: pointer to a network interface device structure |
| 3084 | **/ |
| 3085 | static irqreturn_t igb_intr_msi(int irq, void *data) |
| 3086 | { |
| 3087 | struct net_device *netdev = data; |
| 3088 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3089 | struct napi_struct *napi = &adapter->napi; |
| 3090 | struct e1000_hw *hw = &adapter->hw; |
| 3091 | /* read ICR disables interrupts using IAM */ |
| 3092 | u32 icr = rd32(E1000_ICR); |
| 3093 | |
| 3094 | /* Write the ITR value calculated at the end of the |
| 3095 | * previous interrupt. |
| 3096 | */ |
| 3097 | if (adapter->set_itr) { |
| 3098 | wr32(E1000_ITR, |
| 3099 | 1000000000 / (adapter->itr * 256)); |
| 3100 | adapter->set_itr = 0; |
| 3101 | } |
| 3102 | |
| 3103 | /* read ICR disables interrupts using IAM */ |
| 3104 | if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { |
| 3105 | hw->mac.get_link_status = 1; |
| 3106 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3107 | mod_timer(&adapter->watchdog_timer, jiffies + 1); |
| 3108 | } |
| 3109 | |
| 3110 | if (netif_rx_schedule_prep(netdev, napi)) { |
| 3111 | adapter->tx_ring->total_bytes = 0; |
| 3112 | adapter->tx_ring->total_packets = 0; |
| 3113 | adapter->rx_ring->total_bytes = 0; |
| 3114 | adapter->rx_ring->total_packets = 0; |
| 3115 | __netif_rx_schedule(netdev, napi); |
| 3116 | } |
| 3117 | |
| 3118 | return IRQ_HANDLED; |
| 3119 | } |
| 3120 | |
| 3121 | /** |
| 3122 | * igb_intr - Interrupt Handler |
| 3123 | * @irq: interrupt number |
| 3124 | * @data: pointer to a network interface device structure |
| 3125 | **/ |
| 3126 | static irqreturn_t igb_intr(int irq, void *data) |
| 3127 | { |
| 3128 | struct net_device *netdev = data; |
| 3129 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3130 | struct napi_struct *napi = &adapter->napi; |
| 3131 | struct e1000_hw *hw = &adapter->hw; |
| 3132 | /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No |
| 3133 | * need for the IMC write */ |
| 3134 | u32 icr = rd32(E1000_ICR); |
| 3135 | u32 eicr = 0; |
| 3136 | if (!icr) |
| 3137 | return IRQ_NONE; /* Not our interrupt */ |
| 3138 | |
| 3139 | /* Write the ITR value calculated at the end of the |
| 3140 | * previous interrupt. |
| 3141 | */ |
| 3142 | if (adapter->set_itr) { |
| 3143 | wr32(E1000_ITR, |
| 3144 | 1000000000 / (adapter->itr * 256)); |
| 3145 | adapter->set_itr = 0; |
| 3146 | } |
| 3147 | |
| 3148 | /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is |
| 3149 | * not set, then the adapter didn't send an interrupt */ |
| 3150 | if (!(icr & E1000_ICR_INT_ASSERTED)) |
| 3151 | return IRQ_NONE; |
| 3152 | |
| 3153 | eicr = rd32(E1000_EICR); |
| 3154 | |
| 3155 | if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { |
| 3156 | hw->mac.get_link_status = 1; |
| 3157 | /* guard against interrupt when we're going down */ |
| 3158 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3159 | mod_timer(&adapter->watchdog_timer, jiffies + 1); |
| 3160 | } |
| 3161 | |
| 3162 | if (netif_rx_schedule_prep(netdev, napi)) { |
| 3163 | adapter->tx_ring->total_bytes = 0; |
| 3164 | adapter->rx_ring->total_bytes = 0; |
| 3165 | adapter->tx_ring->total_packets = 0; |
| 3166 | adapter->rx_ring->total_packets = 0; |
| 3167 | __netif_rx_schedule(netdev, napi); |
| 3168 | } |
| 3169 | |
| 3170 | return IRQ_HANDLED; |
| 3171 | } |
| 3172 | |
| 3173 | /** |
| 3174 | * igb_clean - NAPI Rx polling callback |
| 3175 | * @adapter: board private structure |
| 3176 | **/ |
| 3177 | static int igb_clean(struct napi_struct *napi, int budget) |
| 3178 | { |
| 3179 | struct igb_adapter *adapter = container_of(napi, struct igb_adapter, |
| 3180 | napi); |
| 3181 | struct net_device *netdev = adapter->netdev; |
| 3182 | int tx_clean_complete = 1, work_done = 0; |
| 3183 | int i; |
| 3184 | |
| 3185 | /* Must NOT use netdev_priv macro here. */ |
| 3186 | adapter = netdev->priv; |
| 3187 | |
| 3188 | /* Keep link state information with original netdev */ |
| 3189 | if (!netif_carrier_ok(netdev)) |
| 3190 | goto quit_polling; |
| 3191 | |
| 3192 | /* igb_clean is called per-cpu. This lock protects tx_ring[i] from |
| 3193 | * being cleaned by multiple cpus simultaneously. A failure obtaining |
| 3194 | * the lock means tx_ring[i] is currently being cleaned anyway. */ |
| 3195 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 3196 | if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) { |
| 3197 | tx_clean_complete &= igb_clean_tx_irq(adapter, |
| 3198 | &adapter->tx_ring[i]); |
| 3199 | spin_unlock(&adapter->tx_ring[i].tx_clean_lock); |
| 3200 | } |
| 3201 | } |
| 3202 | |
| 3203 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 3204 | igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done, |
| 3205 | adapter->rx_ring[i].napi.weight); |
| 3206 | |
| 3207 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
| 3208 | if ((tx_clean_complete && (work_done < budget)) || |
| 3209 | !netif_running(netdev)) { |
| 3210 | quit_polling: |
| 3211 | if (adapter->itr_setting & 3) |
| 3212 | igb_set_itr(adapter, E1000_ITR, false); |
| 3213 | netif_rx_complete(netdev, napi); |
| 3214 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3215 | igb_irq_enable(adapter); |
| 3216 | return 0; |
| 3217 | } |
| 3218 | |
| 3219 | return 1; |
| 3220 | } |
| 3221 | |
| 3222 | static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget) |
| 3223 | { |
| 3224 | struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi); |
| 3225 | struct igb_adapter *adapter = rx_ring->adapter; |
| 3226 | struct e1000_hw *hw = &adapter->hw; |
| 3227 | struct net_device *netdev = adapter->netdev; |
| 3228 | int work_done = 0; |
| 3229 | |
| 3230 | /* Keep link state information with original netdev */ |
| 3231 | if (!netif_carrier_ok(netdev)) |
| 3232 | goto quit_polling; |
| 3233 | |
| 3234 | igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget); |
| 3235 | |
| 3236 | |
| 3237 | /* If not enough Rx work done, exit the polling mode */ |
| 3238 | if ((work_done == 0) || !netif_running(netdev)) { |
| 3239 | quit_polling: |
| 3240 | netif_rx_complete(netdev, napi); |
| 3241 | |
| 3242 | wr32(E1000_EIMS, rx_ring->eims_value); |
| 3243 | if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust && |
| 3244 | (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) { |
| 3245 | int mean_size = rx_ring->total_bytes / |
| 3246 | rx_ring->total_packets; |
| 3247 | if (mean_size < IGB_DYN_ITR_LENGTH_LOW) |
| 3248 | igb_raise_rx_eitr(adapter, rx_ring); |
| 3249 | else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH) |
| 3250 | igb_lower_rx_eitr(adapter, rx_ring); |
| 3251 | } |
| 3252 | return 0; |
| 3253 | } |
| 3254 | |
| 3255 | return 1; |
| 3256 | } |
Al Viro | 6d8126f | 2008-03-16 22:23:24 +0000 | [diff] [blame^] | 3257 | |
| 3258 | static inline u32 get_head(struct igb_ring *tx_ring) |
| 3259 | { |
| 3260 | void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count; |
| 3261 | return le32_to_cpu(*(volatile __le32 *)end); |
| 3262 | } |
| 3263 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3264 | /** |
| 3265 | * igb_clean_tx_irq - Reclaim resources after transmit completes |
| 3266 | * @adapter: board private structure |
| 3267 | * returns true if ring is completely cleaned |
| 3268 | **/ |
| 3269 | static bool igb_clean_tx_irq(struct igb_adapter *adapter, |
| 3270 | struct igb_ring *tx_ring) |
| 3271 | { |
| 3272 | struct net_device *netdev = adapter->netdev; |
| 3273 | struct e1000_hw *hw = &adapter->hw; |
| 3274 | struct e1000_tx_desc *tx_desc; |
| 3275 | struct igb_buffer *buffer_info; |
| 3276 | struct sk_buff *skb; |
| 3277 | unsigned int i; |
| 3278 | u32 head, oldhead; |
| 3279 | unsigned int count = 0; |
| 3280 | bool cleaned = false; |
| 3281 | bool retval = true; |
| 3282 | unsigned int total_bytes = 0, total_packets = 0; |
| 3283 | |
| 3284 | rmb(); |
Al Viro | 6d8126f | 2008-03-16 22:23:24 +0000 | [diff] [blame^] | 3285 | head = get_head(tx_ring); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3286 | i = tx_ring->next_to_clean; |
| 3287 | while (1) { |
| 3288 | while (i != head) { |
| 3289 | cleaned = true; |
| 3290 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
| 3291 | buffer_info = &tx_ring->buffer_info[i]; |
| 3292 | skb = buffer_info->skb; |
| 3293 | |
| 3294 | if (skb) { |
| 3295 | unsigned int segs, bytecount; |
| 3296 | /* gso_segs is currently only valid for tcp */ |
| 3297 | segs = skb_shinfo(skb)->gso_segs ?: 1; |
| 3298 | /* multiply data chunks by size of headers */ |
| 3299 | bytecount = ((segs - 1) * skb_headlen(skb)) + |
| 3300 | skb->len; |
| 3301 | total_packets += segs; |
| 3302 | total_bytes += bytecount; |
| 3303 | } |
| 3304 | |
| 3305 | igb_unmap_and_free_tx_resource(adapter, buffer_info); |
| 3306 | tx_desc->upper.data = 0; |
| 3307 | |
| 3308 | i++; |
| 3309 | if (i == tx_ring->count) |
| 3310 | i = 0; |
| 3311 | |
| 3312 | count++; |
| 3313 | if (count == IGB_MAX_TX_CLEAN) { |
| 3314 | retval = false; |
| 3315 | goto done_cleaning; |
| 3316 | } |
| 3317 | } |
| 3318 | oldhead = head; |
| 3319 | rmb(); |
Al Viro | 6d8126f | 2008-03-16 22:23:24 +0000 | [diff] [blame^] | 3320 | head = get_head(tx_ring); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3321 | if (head == oldhead) |
| 3322 | goto done_cleaning; |
| 3323 | } /* while (1) */ |
| 3324 | |
| 3325 | done_cleaning: |
| 3326 | tx_ring->next_to_clean = i; |
| 3327 | |
| 3328 | if (unlikely(cleaned && |
| 3329 | netif_carrier_ok(netdev) && |
| 3330 | IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) { |
| 3331 | /* Make sure that anybody stopping the queue after this |
| 3332 | * sees the new next_to_clean. |
| 3333 | */ |
| 3334 | smp_mb(); |
| 3335 | if (netif_queue_stopped(netdev) && |
| 3336 | !(test_bit(__IGB_DOWN, &adapter->state))) { |
| 3337 | netif_wake_queue(netdev); |
| 3338 | ++adapter->restart_queue; |
| 3339 | } |
| 3340 | } |
| 3341 | |
| 3342 | if (tx_ring->detect_tx_hung) { |
| 3343 | /* Detect a transmit hang in hardware, this serializes the |
| 3344 | * check with the clearing of time_stamp and movement of i */ |
| 3345 | tx_ring->detect_tx_hung = false; |
| 3346 | if (tx_ring->buffer_info[i].time_stamp && |
| 3347 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp + |
| 3348 | (adapter->tx_timeout_factor * HZ)) |
| 3349 | && !(rd32(E1000_STATUS) & |
| 3350 | E1000_STATUS_TXOFF)) { |
| 3351 | |
| 3352 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
| 3353 | /* detected Tx unit hang */ |
| 3354 | dev_err(&adapter->pdev->dev, |
| 3355 | "Detected Tx Unit Hang\n" |
| 3356 | " Tx Queue <%lu>\n" |
| 3357 | " TDH <%x>\n" |
| 3358 | " TDT <%x>\n" |
| 3359 | " next_to_use <%x>\n" |
| 3360 | " next_to_clean <%x>\n" |
| 3361 | " head (WB) <%x>\n" |
| 3362 | "buffer_info[next_to_clean]\n" |
| 3363 | " time_stamp <%lx>\n" |
| 3364 | " jiffies <%lx>\n" |
| 3365 | " desc.status <%x>\n", |
| 3366 | (unsigned long)((tx_ring - adapter->tx_ring) / |
| 3367 | sizeof(struct igb_ring)), |
| 3368 | readl(adapter->hw.hw_addr + tx_ring->head), |
| 3369 | readl(adapter->hw.hw_addr + tx_ring->tail), |
| 3370 | tx_ring->next_to_use, |
| 3371 | tx_ring->next_to_clean, |
| 3372 | head, |
| 3373 | tx_ring->buffer_info[i].time_stamp, |
| 3374 | jiffies, |
| 3375 | tx_desc->upper.fields.status); |
| 3376 | netif_stop_queue(netdev); |
| 3377 | } |
| 3378 | } |
| 3379 | tx_ring->total_bytes += total_bytes; |
| 3380 | tx_ring->total_packets += total_packets; |
| 3381 | adapter->net_stats.tx_bytes += total_bytes; |
| 3382 | adapter->net_stats.tx_packets += total_packets; |
| 3383 | return retval; |
| 3384 | } |
| 3385 | |
| 3386 | |
| 3387 | /** |
| 3388 | * igb_receive_skb - helper function to handle rx indications |
| 3389 | * @adapter: board private structure |
| 3390 | * @status: descriptor status field as written by hardware |
| 3391 | * @vlan: descriptor vlan field as written by hardware (no le/be conversion) |
| 3392 | * @skb: pointer to sk_buff to be indicated to stack |
| 3393 | **/ |
Al Viro | 6d8126f | 2008-03-16 22:23:24 +0000 | [diff] [blame^] | 3394 | static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan, |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3395 | struct sk_buff *skb) |
| 3396 | { |
| 3397 | if (adapter->vlgrp && (status & E1000_RXD_STAT_VP)) |
| 3398 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
| 3399 | le16_to_cpu(vlan) & |
| 3400 | E1000_RXD_SPC_VLAN_MASK); |
| 3401 | else |
| 3402 | netif_receive_skb(skb); |
| 3403 | } |
| 3404 | |
| 3405 | |
| 3406 | static inline void igb_rx_checksum_adv(struct igb_adapter *adapter, |
| 3407 | u32 status_err, struct sk_buff *skb) |
| 3408 | { |
| 3409 | skb->ip_summed = CHECKSUM_NONE; |
| 3410 | |
| 3411 | /* Ignore Checksum bit is set or checksum is disabled through ethtool */ |
| 3412 | if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum) |
| 3413 | return; |
| 3414 | /* TCP/UDP checksum error bit is set */ |
| 3415 | if (status_err & |
| 3416 | (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) { |
| 3417 | /* let the stack verify checksum errors */ |
| 3418 | adapter->hw_csum_err++; |
| 3419 | return; |
| 3420 | } |
| 3421 | /* It must be a TCP or UDP packet with a valid checksum */ |
| 3422 | if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)) |
| 3423 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 3424 | |
| 3425 | adapter->hw_csum_good++; |
| 3426 | } |
| 3427 | |
| 3428 | static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter, |
| 3429 | struct igb_ring *rx_ring, |
| 3430 | int *work_done, int budget) |
| 3431 | { |
| 3432 | struct net_device *netdev = adapter->netdev; |
| 3433 | struct pci_dev *pdev = adapter->pdev; |
| 3434 | union e1000_adv_rx_desc *rx_desc , *next_rxd; |
| 3435 | struct igb_buffer *buffer_info , *next_buffer; |
| 3436 | struct sk_buff *skb; |
| 3437 | unsigned int i, j; |
| 3438 | u32 length, hlen, staterr; |
| 3439 | bool cleaned = false; |
| 3440 | int cleaned_count = 0; |
| 3441 | unsigned int total_bytes = 0, total_packets = 0; |
| 3442 | |
| 3443 | i = rx_ring->next_to_clean; |
| 3444 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); |
| 3445 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); |
| 3446 | |
| 3447 | while (staterr & E1000_RXD_STAT_DD) { |
| 3448 | if (*work_done >= budget) |
| 3449 | break; |
| 3450 | (*work_done)++; |
| 3451 | buffer_info = &rx_ring->buffer_info[i]; |
| 3452 | |
| 3453 | /* HW will not DMA in data larger than the given buffer, even |
| 3454 | * if it parses the (NFS, of course) header to be larger. In |
| 3455 | * that case, it fills the header buffer and spills the rest |
| 3456 | * into the page. |
| 3457 | */ |
Al Viro | 7deb07b | 2008-03-16 22:43:06 +0000 | [diff] [blame] | 3458 | hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) & |
| 3459 | E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3460 | if (hlen > adapter->rx_ps_hdr_size) |
| 3461 | hlen = adapter->rx_ps_hdr_size; |
| 3462 | |
| 3463 | length = le16_to_cpu(rx_desc->wb.upper.length); |
| 3464 | cleaned = true; |
| 3465 | cleaned_count++; |
| 3466 | |
| 3467 | if (rx_ring->pending_skb != NULL) { |
| 3468 | skb = rx_ring->pending_skb; |
| 3469 | rx_ring->pending_skb = NULL; |
| 3470 | j = rx_ring->pending_skb_page; |
| 3471 | } else { |
| 3472 | skb = buffer_info->skb; |
| 3473 | prefetch(skb->data - NET_IP_ALIGN); |
| 3474 | buffer_info->skb = NULL; |
| 3475 | if (hlen) { |
| 3476 | pci_unmap_single(pdev, buffer_info->dma, |
| 3477 | adapter->rx_ps_hdr_size + |
| 3478 | NET_IP_ALIGN, |
| 3479 | PCI_DMA_FROMDEVICE); |
| 3480 | skb_put(skb, hlen); |
| 3481 | } else { |
| 3482 | pci_unmap_single(pdev, buffer_info->dma, |
| 3483 | adapter->rx_buffer_len + |
| 3484 | NET_IP_ALIGN, |
| 3485 | PCI_DMA_FROMDEVICE); |
| 3486 | skb_put(skb, length); |
| 3487 | goto send_up; |
| 3488 | } |
| 3489 | j = 0; |
| 3490 | } |
| 3491 | |
| 3492 | while (length) { |
| 3493 | pci_unmap_page(pdev, buffer_info->page_dma, |
| 3494 | PAGE_SIZE, PCI_DMA_FROMDEVICE); |
| 3495 | buffer_info->page_dma = 0; |
| 3496 | skb_fill_page_desc(skb, j, buffer_info->page, |
| 3497 | 0, length); |
| 3498 | buffer_info->page = NULL; |
| 3499 | |
| 3500 | skb->len += length; |
| 3501 | skb->data_len += length; |
| 3502 | skb->truesize += length; |
| 3503 | rx_desc->wb.upper.status_error = 0; |
| 3504 | if (staterr & E1000_RXD_STAT_EOP) |
| 3505 | break; |
| 3506 | |
| 3507 | j++; |
| 3508 | cleaned_count++; |
| 3509 | i++; |
| 3510 | if (i == rx_ring->count) |
| 3511 | i = 0; |
| 3512 | |
| 3513 | buffer_info = &rx_ring->buffer_info[i]; |
| 3514 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); |
| 3515 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); |
| 3516 | length = le16_to_cpu(rx_desc->wb.upper.length); |
| 3517 | if (!(staterr & E1000_RXD_STAT_DD)) { |
| 3518 | rx_ring->pending_skb = skb; |
| 3519 | rx_ring->pending_skb_page = j; |
| 3520 | goto out; |
| 3521 | } |
| 3522 | } |
| 3523 | send_up: |
| 3524 | pskb_trim(skb, skb->len - 4); |
| 3525 | i++; |
| 3526 | if (i == rx_ring->count) |
| 3527 | i = 0; |
| 3528 | next_rxd = E1000_RX_DESC_ADV(*rx_ring, i); |
| 3529 | prefetch(next_rxd); |
| 3530 | next_buffer = &rx_ring->buffer_info[i]; |
| 3531 | |
| 3532 | if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { |
| 3533 | dev_kfree_skb_irq(skb); |
| 3534 | goto next_desc; |
| 3535 | } |
| 3536 | rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT); |
| 3537 | |
| 3538 | total_bytes += skb->len; |
| 3539 | total_packets++; |
| 3540 | |
| 3541 | igb_rx_checksum_adv(adapter, staterr, skb); |
| 3542 | |
| 3543 | skb->protocol = eth_type_trans(skb, netdev); |
| 3544 | |
| 3545 | igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb); |
| 3546 | |
| 3547 | netdev->last_rx = jiffies; |
| 3548 | |
| 3549 | next_desc: |
| 3550 | rx_desc->wb.upper.status_error = 0; |
| 3551 | |
| 3552 | /* return some buffers to hardware, one at a time is too slow */ |
| 3553 | if (cleaned_count >= IGB_RX_BUFFER_WRITE) { |
| 3554 | igb_alloc_rx_buffers_adv(adapter, rx_ring, |
| 3555 | cleaned_count); |
| 3556 | cleaned_count = 0; |
| 3557 | } |
| 3558 | |
| 3559 | /* use prefetched values */ |
| 3560 | rx_desc = next_rxd; |
| 3561 | buffer_info = next_buffer; |
| 3562 | |
| 3563 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); |
| 3564 | } |
| 3565 | out: |
| 3566 | rx_ring->next_to_clean = i; |
| 3567 | cleaned_count = IGB_DESC_UNUSED(rx_ring); |
| 3568 | |
| 3569 | if (cleaned_count) |
| 3570 | igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count); |
| 3571 | |
| 3572 | rx_ring->total_packets += total_packets; |
| 3573 | rx_ring->total_bytes += total_bytes; |
| 3574 | rx_ring->rx_stats.packets += total_packets; |
| 3575 | rx_ring->rx_stats.bytes += total_bytes; |
| 3576 | adapter->net_stats.rx_bytes += total_bytes; |
| 3577 | adapter->net_stats.rx_packets += total_packets; |
| 3578 | return cleaned; |
| 3579 | } |
| 3580 | |
| 3581 | |
| 3582 | /** |
| 3583 | * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split |
| 3584 | * @adapter: address of board private structure |
| 3585 | **/ |
| 3586 | static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter, |
| 3587 | struct igb_ring *rx_ring, |
| 3588 | int cleaned_count) |
| 3589 | { |
| 3590 | struct net_device *netdev = adapter->netdev; |
| 3591 | struct pci_dev *pdev = adapter->pdev; |
| 3592 | union e1000_adv_rx_desc *rx_desc; |
| 3593 | struct igb_buffer *buffer_info; |
| 3594 | struct sk_buff *skb; |
| 3595 | unsigned int i; |
| 3596 | |
| 3597 | i = rx_ring->next_to_use; |
| 3598 | buffer_info = &rx_ring->buffer_info[i]; |
| 3599 | |
| 3600 | while (cleaned_count--) { |
| 3601 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); |
| 3602 | |
| 3603 | if (adapter->rx_ps_hdr_size && !buffer_info->page) { |
| 3604 | buffer_info->page = alloc_page(GFP_ATOMIC); |
| 3605 | if (!buffer_info->page) { |
| 3606 | adapter->alloc_rx_buff_failed++; |
| 3607 | goto no_buffers; |
| 3608 | } |
| 3609 | buffer_info->page_dma = |
| 3610 | pci_map_page(pdev, |
| 3611 | buffer_info->page, |
| 3612 | 0, PAGE_SIZE, |
| 3613 | PCI_DMA_FROMDEVICE); |
| 3614 | } |
| 3615 | |
| 3616 | if (!buffer_info->skb) { |
| 3617 | int bufsz; |
| 3618 | |
| 3619 | if (adapter->rx_ps_hdr_size) |
| 3620 | bufsz = adapter->rx_ps_hdr_size; |
| 3621 | else |
| 3622 | bufsz = adapter->rx_buffer_len; |
| 3623 | bufsz += NET_IP_ALIGN; |
| 3624 | skb = netdev_alloc_skb(netdev, bufsz); |
| 3625 | |
| 3626 | if (!skb) { |
| 3627 | adapter->alloc_rx_buff_failed++; |
| 3628 | goto no_buffers; |
| 3629 | } |
| 3630 | |
| 3631 | /* Make buffer alignment 2 beyond a 16 byte boundary |
| 3632 | * this will result in a 16 byte aligned IP header after |
| 3633 | * the 14 byte MAC header is removed |
| 3634 | */ |
| 3635 | skb_reserve(skb, NET_IP_ALIGN); |
| 3636 | |
| 3637 | buffer_info->skb = skb; |
| 3638 | buffer_info->dma = pci_map_single(pdev, skb->data, |
| 3639 | bufsz, |
| 3640 | PCI_DMA_FROMDEVICE); |
| 3641 | |
| 3642 | } |
| 3643 | /* Refresh the desc even if buffer_addrs didn't change because |
| 3644 | * each write-back erases this info. */ |
| 3645 | if (adapter->rx_ps_hdr_size) { |
| 3646 | rx_desc->read.pkt_addr = |
| 3647 | cpu_to_le64(buffer_info->page_dma); |
| 3648 | rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma); |
| 3649 | } else { |
| 3650 | rx_desc->read.pkt_addr = |
| 3651 | cpu_to_le64(buffer_info->dma); |
| 3652 | rx_desc->read.hdr_addr = 0; |
| 3653 | } |
| 3654 | |
| 3655 | i++; |
| 3656 | if (i == rx_ring->count) |
| 3657 | i = 0; |
| 3658 | buffer_info = &rx_ring->buffer_info[i]; |
| 3659 | } |
| 3660 | |
| 3661 | no_buffers: |
| 3662 | if (rx_ring->next_to_use != i) { |
| 3663 | rx_ring->next_to_use = i; |
| 3664 | if (i == 0) |
| 3665 | i = (rx_ring->count - 1); |
| 3666 | else |
| 3667 | i--; |
| 3668 | |
| 3669 | /* Force memory writes to complete before letting h/w |
| 3670 | * know there are new descriptors to fetch. (Only |
| 3671 | * applicable for weak-ordered memory model archs, |
| 3672 | * such as IA-64). */ |
| 3673 | wmb(); |
| 3674 | writel(i, adapter->hw.hw_addr + rx_ring->tail); |
| 3675 | } |
| 3676 | } |
| 3677 | |
| 3678 | /** |
| 3679 | * igb_mii_ioctl - |
| 3680 | * @netdev: |
| 3681 | * @ifreq: |
| 3682 | * @cmd: |
| 3683 | **/ |
| 3684 | static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) |
| 3685 | { |
| 3686 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3687 | struct mii_ioctl_data *data = if_mii(ifr); |
| 3688 | |
| 3689 | if (adapter->hw.phy.media_type != e1000_media_type_copper) |
| 3690 | return -EOPNOTSUPP; |
| 3691 | |
| 3692 | switch (cmd) { |
| 3693 | case SIOCGMIIPHY: |
| 3694 | data->phy_id = adapter->hw.phy.addr; |
| 3695 | break; |
| 3696 | case SIOCGMIIREG: |
| 3697 | if (!capable(CAP_NET_ADMIN)) |
| 3698 | return -EPERM; |
| 3699 | if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw, |
| 3700 | data->reg_num |
| 3701 | & 0x1F, &data->val_out)) |
| 3702 | return -EIO; |
| 3703 | break; |
| 3704 | case SIOCSMIIREG: |
| 3705 | default: |
| 3706 | return -EOPNOTSUPP; |
| 3707 | } |
| 3708 | return 0; |
| 3709 | } |
| 3710 | |
| 3711 | /** |
| 3712 | * igb_ioctl - |
| 3713 | * @netdev: |
| 3714 | * @ifreq: |
| 3715 | * @cmd: |
| 3716 | **/ |
| 3717 | static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) |
| 3718 | { |
| 3719 | switch (cmd) { |
| 3720 | case SIOCGMIIPHY: |
| 3721 | case SIOCGMIIREG: |
| 3722 | case SIOCSMIIREG: |
| 3723 | return igb_mii_ioctl(netdev, ifr, cmd); |
| 3724 | default: |
| 3725 | return -EOPNOTSUPP; |
| 3726 | } |
| 3727 | } |
| 3728 | |
| 3729 | static void igb_vlan_rx_register(struct net_device *netdev, |
| 3730 | struct vlan_group *grp) |
| 3731 | { |
| 3732 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3733 | struct e1000_hw *hw = &adapter->hw; |
| 3734 | u32 ctrl, rctl; |
| 3735 | |
| 3736 | igb_irq_disable(adapter); |
| 3737 | adapter->vlgrp = grp; |
| 3738 | |
| 3739 | if (grp) { |
| 3740 | /* enable VLAN tag insert/strip */ |
| 3741 | ctrl = rd32(E1000_CTRL); |
| 3742 | ctrl |= E1000_CTRL_VME; |
| 3743 | wr32(E1000_CTRL, ctrl); |
| 3744 | |
| 3745 | /* enable VLAN receive filtering */ |
| 3746 | rctl = rd32(E1000_RCTL); |
| 3747 | rctl |= E1000_RCTL_VFE; |
| 3748 | rctl &= ~E1000_RCTL_CFIEN; |
| 3749 | wr32(E1000_RCTL, rctl); |
| 3750 | igb_update_mng_vlan(adapter); |
| 3751 | wr32(E1000_RLPML, |
| 3752 | adapter->max_frame_size + VLAN_TAG_SIZE); |
| 3753 | } else { |
| 3754 | /* disable VLAN tag insert/strip */ |
| 3755 | ctrl = rd32(E1000_CTRL); |
| 3756 | ctrl &= ~E1000_CTRL_VME; |
| 3757 | wr32(E1000_CTRL, ctrl); |
| 3758 | |
| 3759 | /* disable VLAN filtering */ |
| 3760 | rctl = rd32(E1000_RCTL); |
| 3761 | rctl &= ~E1000_RCTL_VFE; |
| 3762 | wr32(E1000_RCTL, rctl); |
| 3763 | if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) { |
| 3764 | igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); |
| 3765 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; |
| 3766 | } |
| 3767 | wr32(E1000_RLPML, |
| 3768 | adapter->max_frame_size); |
| 3769 | } |
| 3770 | |
| 3771 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3772 | igb_irq_enable(adapter); |
| 3773 | } |
| 3774 | |
| 3775 | static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid) |
| 3776 | { |
| 3777 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3778 | struct e1000_hw *hw = &adapter->hw; |
| 3779 | u32 vfta, index; |
| 3780 | |
| 3781 | if ((adapter->hw.mng_cookie.status & |
| 3782 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && |
| 3783 | (vid == adapter->mng_vlan_id)) |
| 3784 | return; |
| 3785 | /* add VID to filter table */ |
| 3786 | index = (vid >> 5) & 0x7F; |
| 3787 | vfta = array_rd32(E1000_VFTA, index); |
| 3788 | vfta |= (1 << (vid & 0x1F)); |
| 3789 | igb_write_vfta(&adapter->hw, index, vfta); |
| 3790 | } |
| 3791 | |
| 3792 | static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) |
| 3793 | { |
| 3794 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3795 | struct e1000_hw *hw = &adapter->hw; |
| 3796 | u32 vfta, index; |
| 3797 | |
| 3798 | igb_irq_disable(adapter); |
| 3799 | vlan_group_set_device(adapter->vlgrp, vid, NULL); |
| 3800 | |
| 3801 | if (!test_bit(__IGB_DOWN, &adapter->state)) |
| 3802 | igb_irq_enable(adapter); |
| 3803 | |
| 3804 | if ((adapter->hw.mng_cookie.status & |
| 3805 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && |
| 3806 | (vid == adapter->mng_vlan_id)) { |
| 3807 | /* release control to f/w */ |
| 3808 | igb_release_hw_control(adapter); |
| 3809 | return; |
| 3810 | } |
| 3811 | |
| 3812 | /* remove VID from filter table */ |
| 3813 | index = (vid >> 5) & 0x7F; |
| 3814 | vfta = array_rd32(E1000_VFTA, index); |
| 3815 | vfta &= ~(1 << (vid & 0x1F)); |
| 3816 | igb_write_vfta(&adapter->hw, index, vfta); |
| 3817 | } |
| 3818 | |
| 3819 | static void igb_restore_vlan(struct igb_adapter *adapter) |
| 3820 | { |
| 3821 | igb_vlan_rx_register(adapter->netdev, adapter->vlgrp); |
| 3822 | |
| 3823 | if (adapter->vlgrp) { |
| 3824 | u16 vid; |
| 3825 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { |
| 3826 | if (!vlan_group_get_device(adapter->vlgrp, vid)) |
| 3827 | continue; |
| 3828 | igb_vlan_rx_add_vid(adapter->netdev, vid); |
| 3829 | } |
| 3830 | } |
| 3831 | } |
| 3832 | |
| 3833 | int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx) |
| 3834 | { |
| 3835 | struct e1000_mac_info *mac = &adapter->hw.mac; |
| 3836 | |
| 3837 | mac->autoneg = 0; |
| 3838 | |
| 3839 | /* Fiber NICs only allow 1000 gbps Full duplex */ |
| 3840 | if ((adapter->hw.phy.media_type == e1000_media_type_fiber) && |
| 3841 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { |
| 3842 | dev_err(&adapter->pdev->dev, |
| 3843 | "Unsupported Speed/Duplex configuration\n"); |
| 3844 | return -EINVAL; |
| 3845 | } |
| 3846 | |
| 3847 | switch (spddplx) { |
| 3848 | case SPEED_10 + DUPLEX_HALF: |
| 3849 | mac->forced_speed_duplex = ADVERTISE_10_HALF; |
| 3850 | break; |
| 3851 | case SPEED_10 + DUPLEX_FULL: |
| 3852 | mac->forced_speed_duplex = ADVERTISE_10_FULL; |
| 3853 | break; |
| 3854 | case SPEED_100 + DUPLEX_HALF: |
| 3855 | mac->forced_speed_duplex = ADVERTISE_100_HALF; |
| 3856 | break; |
| 3857 | case SPEED_100 + DUPLEX_FULL: |
| 3858 | mac->forced_speed_duplex = ADVERTISE_100_FULL; |
| 3859 | break; |
| 3860 | case SPEED_1000 + DUPLEX_FULL: |
| 3861 | mac->autoneg = 1; |
| 3862 | adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; |
| 3863 | break; |
| 3864 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ |
| 3865 | default: |
| 3866 | dev_err(&adapter->pdev->dev, |
| 3867 | "Unsupported Speed/Duplex configuration\n"); |
| 3868 | return -EINVAL; |
| 3869 | } |
| 3870 | return 0; |
| 3871 | } |
| 3872 | |
| 3873 | |
| 3874 | static int igb_suspend(struct pci_dev *pdev, pm_message_t state) |
| 3875 | { |
| 3876 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3877 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3878 | struct e1000_hw *hw = &adapter->hw; |
| 3879 | u32 ctrl, ctrl_ext, rctl, status; |
| 3880 | u32 wufc = adapter->wol; |
| 3881 | #ifdef CONFIG_PM |
| 3882 | int retval = 0; |
| 3883 | #endif |
| 3884 | |
| 3885 | netif_device_detach(netdev); |
| 3886 | |
| 3887 | if (netif_running(netdev)) { |
| 3888 | WARN_ON(test_bit(__IGB_RESETTING, &adapter->state)); |
| 3889 | igb_down(adapter); |
| 3890 | igb_free_irq(adapter); |
| 3891 | } |
| 3892 | |
| 3893 | #ifdef CONFIG_PM |
| 3894 | retval = pci_save_state(pdev); |
| 3895 | if (retval) |
| 3896 | return retval; |
| 3897 | #endif |
| 3898 | |
| 3899 | status = rd32(E1000_STATUS); |
| 3900 | if (status & E1000_STATUS_LU) |
| 3901 | wufc &= ~E1000_WUFC_LNKC; |
| 3902 | |
| 3903 | if (wufc) { |
| 3904 | igb_setup_rctl(adapter); |
| 3905 | igb_set_multi(netdev); |
| 3906 | |
| 3907 | /* turn on all-multi mode if wake on multicast is enabled */ |
| 3908 | if (wufc & E1000_WUFC_MC) { |
| 3909 | rctl = rd32(E1000_RCTL); |
| 3910 | rctl |= E1000_RCTL_MPE; |
| 3911 | wr32(E1000_RCTL, rctl); |
| 3912 | } |
| 3913 | |
| 3914 | ctrl = rd32(E1000_CTRL); |
| 3915 | /* advertise wake from D3Cold */ |
| 3916 | #define E1000_CTRL_ADVD3WUC 0x00100000 |
| 3917 | /* phy power management enable */ |
| 3918 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 |
| 3919 | ctrl |= E1000_CTRL_ADVD3WUC; |
| 3920 | wr32(E1000_CTRL, ctrl); |
| 3921 | |
| 3922 | if (adapter->hw.phy.media_type == e1000_media_type_fiber || |
| 3923 | adapter->hw.phy.media_type == |
| 3924 | e1000_media_type_internal_serdes) { |
| 3925 | /* keep the laser running in D3 */ |
| 3926 | ctrl_ext = rd32(E1000_CTRL_EXT); |
| 3927 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; |
| 3928 | wr32(E1000_CTRL_EXT, ctrl_ext); |
| 3929 | } |
| 3930 | |
| 3931 | /* Allow time for pending master requests to run */ |
| 3932 | igb_disable_pcie_master(&adapter->hw); |
| 3933 | |
| 3934 | wr32(E1000_WUC, E1000_WUC_PME_EN); |
| 3935 | wr32(E1000_WUFC, wufc); |
| 3936 | pci_enable_wake(pdev, PCI_D3hot, 1); |
| 3937 | pci_enable_wake(pdev, PCI_D3cold, 1); |
| 3938 | } else { |
| 3939 | wr32(E1000_WUC, 0); |
| 3940 | wr32(E1000_WUFC, 0); |
| 3941 | pci_enable_wake(pdev, PCI_D3hot, 0); |
| 3942 | pci_enable_wake(pdev, PCI_D3cold, 0); |
| 3943 | } |
| 3944 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 3945 | /* make sure adapter isn't asleep if manageability is enabled */ |
| 3946 | if (adapter->en_mng_pt) { |
| 3947 | pci_enable_wake(pdev, PCI_D3hot, 1); |
| 3948 | pci_enable_wake(pdev, PCI_D3cold, 1); |
| 3949 | } |
| 3950 | |
| 3951 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
| 3952 | * would have already happened in close and is redundant. */ |
| 3953 | igb_release_hw_control(adapter); |
| 3954 | |
| 3955 | pci_disable_device(pdev); |
| 3956 | |
| 3957 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
| 3958 | |
| 3959 | return 0; |
| 3960 | } |
| 3961 | |
| 3962 | #ifdef CONFIG_PM |
| 3963 | static int igb_resume(struct pci_dev *pdev) |
| 3964 | { |
| 3965 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 3966 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 3967 | struct e1000_hw *hw = &adapter->hw; |
| 3968 | u32 err; |
| 3969 | |
| 3970 | pci_set_power_state(pdev, PCI_D0); |
| 3971 | pci_restore_state(pdev); |
| 3972 | err = pci_enable_device(pdev); |
| 3973 | if (err) { |
| 3974 | dev_err(&pdev->dev, |
| 3975 | "igb: Cannot enable PCI device from suspend\n"); |
| 3976 | return err; |
| 3977 | } |
| 3978 | pci_set_master(pdev); |
| 3979 | |
| 3980 | pci_enable_wake(pdev, PCI_D3hot, 0); |
| 3981 | pci_enable_wake(pdev, PCI_D3cold, 0); |
| 3982 | |
| 3983 | if (netif_running(netdev)) { |
| 3984 | err = igb_request_irq(adapter); |
| 3985 | if (err) |
| 3986 | return err; |
| 3987 | } |
| 3988 | |
| 3989 | /* e1000_power_up_phy(adapter); */ |
| 3990 | |
| 3991 | igb_reset(adapter); |
| 3992 | wr32(E1000_WUS, ~0); |
| 3993 | |
| 3994 | igb_init_manageability(adapter); |
| 3995 | |
| 3996 | if (netif_running(netdev)) |
| 3997 | igb_up(adapter); |
| 3998 | |
| 3999 | netif_device_attach(netdev); |
| 4000 | |
| 4001 | /* let the f/w know that the h/w is now under the control of the |
| 4002 | * driver. */ |
| 4003 | igb_get_hw_control(adapter); |
| 4004 | |
| 4005 | return 0; |
| 4006 | } |
| 4007 | #endif |
| 4008 | |
| 4009 | static void igb_shutdown(struct pci_dev *pdev) |
| 4010 | { |
| 4011 | igb_suspend(pdev, PMSG_SUSPEND); |
| 4012 | } |
| 4013 | |
| 4014 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 4015 | /* |
| 4016 | * Polling 'interrupt' - used by things like netconsole to send skbs |
| 4017 | * without having to re-enable interrupts. It's not called while |
| 4018 | * the interrupt routine is executing. |
| 4019 | */ |
| 4020 | static void igb_netpoll(struct net_device *netdev) |
| 4021 | { |
| 4022 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4023 | int i; |
| 4024 | int work_done = 0; |
| 4025 | |
| 4026 | igb_irq_disable(adapter); |
| 4027 | for (i = 0; i < adapter->num_tx_queues; i++) |
| 4028 | igb_clean_tx_irq(adapter, &adapter->tx_ring[i]); |
| 4029 | |
| 4030 | for (i = 0; i < adapter->num_rx_queues; i++) |
| 4031 | igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], |
| 4032 | &work_done, |
| 4033 | adapter->rx_ring[i].napi.weight); |
| 4034 | |
| 4035 | igb_irq_enable(adapter); |
| 4036 | } |
| 4037 | #endif /* CONFIG_NET_POLL_CONTROLLER */ |
| 4038 | |
| 4039 | /** |
| 4040 | * igb_io_error_detected - called when PCI error is detected |
| 4041 | * @pdev: Pointer to PCI device |
| 4042 | * @state: The current pci connection state |
| 4043 | * |
| 4044 | * This function is called after a PCI bus error affecting |
| 4045 | * this device has been detected. |
| 4046 | */ |
| 4047 | static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev, |
| 4048 | pci_channel_state_t state) |
| 4049 | { |
| 4050 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 4051 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4052 | |
| 4053 | netif_device_detach(netdev); |
| 4054 | |
| 4055 | if (netif_running(netdev)) |
| 4056 | igb_down(adapter); |
| 4057 | pci_disable_device(pdev); |
| 4058 | |
| 4059 | /* Request a slot slot reset. */ |
| 4060 | return PCI_ERS_RESULT_NEED_RESET; |
| 4061 | } |
| 4062 | |
| 4063 | /** |
| 4064 | * igb_io_slot_reset - called after the pci bus has been reset. |
| 4065 | * @pdev: Pointer to PCI device |
| 4066 | * |
| 4067 | * Restart the card from scratch, as if from a cold-boot. Implementation |
| 4068 | * resembles the first-half of the igb_resume routine. |
| 4069 | */ |
| 4070 | static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev) |
| 4071 | { |
| 4072 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 4073 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4074 | struct e1000_hw *hw = &adapter->hw; |
| 4075 | |
| 4076 | if (pci_enable_device(pdev)) { |
| 4077 | dev_err(&pdev->dev, |
| 4078 | "Cannot re-enable PCI device after reset.\n"); |
| 4079 | return PCI_ERS_RESULT_DISCONNECT; |
| 4080 | } |
| 4081 | pci_set_master(pdev); |
| 4082 | |
| 4083 | pci_enable_wake(pdev, PCI_D3hot, 0); |
| 4084 | pci_enable_wake(pdev, PCI_D3cold, 0); |
| 4085 | |
| 4086 | igb_reset(adapter); |
| 4087 | wr32(E1000_WUS, ~0); |
| 4088 | |
| 4089 | return PCI_ERS_RESULT_RECOVERED; |
| 4090 | } |
| 4091 | |
| 4092 | /** |
| 4093 | * igb_io_resume - called when traffic can start flowing again. |
| 4094 | * @pdev: Pointer to PCI device |
| 4095 | * |
| 4096 | * This callback is called when the error recovery driver tells us that |
| 4097 | * its OK to resume normal operation. Implementation resembles the |
| 4098 | * second-half of the igb_resume routine. |
| 4099 | */ |
| 4100 | static void igb_io_resume(struct pci_dev *pdev) |
| 4101 | { |
| 4102 | struct net_device *netdev = pci_get_drvdata(pdev); |
| 4103 | struct igb_adapter *adapter = netdev_priv(netdev); |
| 4104 | |
| 4105 | igb_init_manageability(adapter); |
| 4106 | |
| 4107 | if (netif_running(netdev)) { |
| 4108 | if (igb_up(adapter)) { |
| 4109 | dev_err(&pdev->dev, "igb_up failed after reset\n"); |
| 4110 | return; |
| 4111 | } |
| 4112 | } |
| 4113 | |
| 4114 | netif_device_attach(netdev); |
| 4115 | |
| 4116 | /* let the f/w know that the h/w is now under the control of the |
| 4117 | * driver. */ |
| 4118 | igb_get_hw_control(adapter); |
| 4119 | |
| 4120 | } |
| 4121 | |
| 4122 | /* igb_main.c */ |