blob: 05826d20a7923a47d06a7affb196f6388c6f1d70 [file] [log] [blame]
Ralf Baechledbee90b2006-02-02 14:31:16 +00001#include <asm/asm-offsets.h>
David Daney7b1c0d22012-07-19 09:11:14 +02002#include <asm/thread_info.h>
David Daney485172b2012-08-14 11:08:01 -07003
Ralf Baechlebef9ae32012-12-28 15:15:25 +01004#define PAGE_SIZE _PAGE_SIZE
5
David Daney485172b2012-08-14 11:08:01 -07006/*
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
9 */
10#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <asm-generic/vmlinux.lds.h>
13
Ralf Baechle41c594a2006-04-05 09:45:45 +010014#undef mips
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#define mips mips
16OUTPUT_ARCH(mips)
17ENTRY(kernel_entry)
Ralf Baechle603bb992007-10-14 22:49:01 +010018PHDRS {
19 text PT_LOAD FLAGS(7); /* RWX */
20 note PT_NOTE FLAGS(4); /* R__ */
21}
Sam Ravnborg51b563f2009-09-20 12:28:22 +020022
Manuel Laussd71789b2009-09-24 21:44:24 +020023#ifdef CONFIG_32BIT
24 #ifdef CONFIG_CPU_LITTLE_ENDIAN
Ralf Baechle70342282013-01-22 12:59:30 +010025 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020026 #else
Ralf Baechle70342282013-01-22 12:59:30 +010027 jiffies = jiffies_64 + 4;
Manuel Laussd71789b2009-09-24 21:44:24 +020028 #endif
29#else
Ralf Baechle70342282013-01-22 12:59:30 +010030 jiffies = jiffies_64;
Manuel Laussd71789b2009-09-24 21:44:24 +020031#endif
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020032
Linus Torvalds1da177e2005-04-16 15:20:36 -070033SECTIONS
34{
35#ifdef CONFIG_BOOT_ELF64
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020036 /* Read-only sections, merged into text segment: */
37 /* . = 0xc000000000000000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020039 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
40 /* . = 0xc00000000001c000; */
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020042 /* Set the vaddr for the text segment to a value
43 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
44 * >= 0xa800 0000 0030 0000 otherwise
45 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020047 /* . = 0xa800000000300000; */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020048 . = 0xffffffff80300000;
Linus Torvalds1da177e2005-04-16 15:20:36 -070049#endif
Sam Ravnborg51b563f2009-09-20 12:28:22 +020050 . = VMLINUX_LOAD_ADDRESS;
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020051 /* read-only */
52 _text = .; /* Text and read-only data */
53 .text : {
54 TEXT_TEXT
55 SCHED_TEXT
56 LOCK_TEXT
Ralf Baechlef70fd1b2007-10-14 22:50:05 +010057 KPROBES_TEXT
Wu Zhangjin8f99a162009-11-20 20:34:33 +080058 IRQENTRY_TEXT
Atsushi Nemoto6b3766a2008-08-05 23:45:14 +090059 *(.text.*)
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020060 *(.fixup)
61 *(.gnu.warning)
Ralf Baechle603bb992007-10-14 22:49:01 +010062 } :text = 0
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020063 _etext = .; /* End of text section */
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040065 EXCEPTION_TABLE(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -070066
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020067 /* Exception table for data bus errors */
68 __dbe_table : {
69 __start___dbe_table = .;
70 *(__dbe_table)
71 __stop___dbe_table = .;
72 }
Ralf Baechle603bb992007-10-14 22:49:01 +010073
74 NOTES :text :note
75 .dummy : { *(.dummy) } :text
76
Steven Rostedta2d063a2011-05-19 21:34:58 -040077 _sdata = .; /* Start of data section */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020078 RODATA
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020080 /* writeable */
81 .data : { /* Data */
Franck Bui-Huu16be2432007-10-18 23:12:32 +020082 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
David Daney7b1c0d22012-07-19 09:11:14 +020084 INIT_TASK_DATA(THREAD_SIZE)
Nelson Elhage6eb10bc2009-07-31 16:58:19 -040085 NOSAVE_DATA
86 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Catalin Marinasf8bec752011-03-29 11:40:06 +010087 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
Franck Bui-Huu16be2432007-10-18 23:12:32 +020088 DATA_DATA
89 CONSTRUCTORS
Sam Ravnborg0f5c9062007-09-15 23:35:53 +020090 }
91 _gp = . + 0x8000;
92 .lit8 : {
93 *(.lit8)
94 }
95 .lit4 : {
96 *(.lit4)
97 }
98 /* We want the small data sections together, so single-instruction offsets
99 can access them all, and initialized data all before uninitialized, so
100 we can shorten the on-disk segment size. */
101 .sdata : {
102 *(.sdata)
103 }
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200104 _edata = .; /* End of data section */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200106 /* will be freed after init */
Nelson Elhagea0b54e22009-07-31 16:58:18 -0400107 . = ALIGN(PAGE_SIZE); /* Init code and data */
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200108 __init_begin = .;
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400109 INIT_TEXT_SECTION(PAGE_SIZE)
110 INIT_DATA_SECTION(16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Gabor Juhos487d70d2010-11-23 16:06:25 +0100112 . = ALIGN(4);
113 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
114 __mips_machines_start = .;
115 *(.mips.machines.init)
116 __mips_machines_end = .;
117 }
118
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200119 /* .exit.text is discarded at runtime, not link time, to deal with
120 * references from .rodata
121 */
122 .exit.text : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100123 EXIT_TEXT
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200124 }
125 .exit.data : {
Sam Ravnborg01ba2bd2008-01-20 14:15:03 +0100126 EXIT_DATA
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200127 }
Nelson Elhage6eb10bc2009-07-31 16:58:19 -0400128
Tejun Heo0415b00d12011-03-24 18:50:09 +0100129 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
David Daney485172b2012-08-14 11:08:01 -0700130 /*
131 * Align to 64K in attempt to eliminate holes before the
132 * .bss..swapper_pg_dir section at the start of .bss. This
133 * also satisfies PAGE_SIZE alignment as the largest page size
134 * allowed is 64K.
135 */
136 . = ALIGN(0x10000);
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200137 __init_end = .;
138 /* freed after init ends here */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
David Daney485172b2012-08-14 11:08:01 -0700140 /*
141 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
Ralf Baechle70342282013-01-22 12:59:30 +0100142 * gets that alignment. .sbss should be empty, so there will be
David Daney485172b2012-08-14 11:08:01 -0700143 * no holes after __init_end. */
144 BSS_SECTION(0, 0x10000, 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200146 _end = . ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200148 /* These mark the ABI of the kernel for debuggers. */
149 .mdebug.abi32 : {
150 KEEP(*(.mdebug.abi32))
151 }
152 .mdebug.abi64 : {
153 KEEP(*(.mdebug.abi64))
154 }
Daniel Jacobowitz6c769882007-08-03 11:43:01 -0400155
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200156 /* This is the MIPS specific mdebug section. */
157 .mdebug : {
158 *(.mdebug)
159 }
Atsushi Nemoto78665aa2006-05-11 00:41:26 +0900160
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200161 STABS_DEBUG
162 DWARF_DEBUG
Atsushi Nemoto04b6b3b2006-05-10 15:36:04 +0900163
Sam Ravnborg0f5c9062007-09-15 23:35:53 +0200164 /* These must appear regardless of . */
165 .gptab.sdata : {
166 *(.gptab.data)
167 *(.gptab.sdata)
168 }
169 .gptab.sbss : {
170 *(.gptab.bss)
171 *(.gptab.sbss)
172 }
Tejun Heo023bf6f2009-07-09 11:27:40 +0900173
174 /* Sections to be discarded */
175 DISCARDS
176 /DISCARD/ : {
177 /* ABI crap starts here */
178 *(.MIPS.options)
179 *(.options)
180 *(.pdr)
181 *(.reginfo)
182 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183}