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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090038#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039
40#include "libata.h"
41
Tejun Heo624d5c52008-03-25 22:16:41 +090042const struct ata_port_operations ata_sff_port_ops = {
43 .inherits = &ata_base_port_ops,
44
Tejun Heo9363c382008-04-07 22:47:16 +090045 .qc_prep = ata_sff_qc_prep,
46 .qc_issue = ata_sff_qc_issue,
Tejun Heo624d5c52008-03-25 22:16:41 +090047
Tejun Heo9363c382008-04-07 22:47:16 +090048 .freeze = ata_sff_freeze,
49 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090050 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090051 .softreset = ata_sff_softreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090052 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090053 .error_handler = ata_sff_error_handler,
54 .post_internal_cmd = ata_sff_post_internal_cmd,
Tejun Heo624d5c52008-03-25 22:16:41 +090055
Tejun Heo5682ed32008-04-07 22:47:16 +090056 .sff_dev_select = ata_sff_dev_select,
57 .sff_check_status = ata_sff_check_status,
58 .sff_tf_load = ata_sff_tf_load,
59 .sff_tf_read = ata_sff_tf_read,
60 .sff_exec_command = ata_sff_exec_command,
61 .sff_data_xfer = ata_sff_data_xfer,
62 .sff_irq_on = ata_sff_irq_on,
Tejun Heo288623a2008-04-07 22:47:17 +090063 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo624d5c52008-03-25 22:16:41 +090064
65 .port_start = ata_sff_port_start,
66};
67
68const struct ata_port_operations ata_bmdma_port_ops = {
69 .inherits = &ata_sff_port_ops,
70
Tejun Heo9363c382008-04-07 22:47:16 +090071 .mode_filter = ata_bmdma_mode_filter,
Tejun Heo624d5c52008-03-25 22:16:41 +090072
73 .bmdma_setup = ata_bmdma_setup,
74 .bmdma_start = ata_bmdma_start,
75 .bmdma_stop = ata_bmdma_stop,
76 .bmdma_status = ata_bmdma_status,
Tejun Heo624d5c52008-03-25 22:16:41 +090077};
78
79/**
80 * ata_fill_sg - Fill PCI IDE PRD table
81 * @qc: Metadata associated with taskfile to be transferred
82 *
83 * Fill PCI IDE PRD (scatter-gather) table with segments
84 * associated with the current disk command.
85 *
86 * LOCKING:
87 * spin_lock_irqsave(host lock)
88 *
89 */
90static void ata_fill_sg(struct ata_queued_cmd *qc)
91{
92 struct ata_port *ap = qc->ap;
93 struct scatterlist *sg;
94 unsigned int si, pi;
95
96 pi = 0;
97 for_each_sg(qc->sg, sg, qc->n_elem, si) {
98 u32 addr, offset;
99 u32 sg_len, len;
100
101 /* determine if physical DMA addr spans 64K boundary.
102 * Note h/w doesn't support 64-bit, so we unconditionally
103 * truncate dma_addr_t to u32.
104 */
105 addr = (u32) sg_dma_address(sg);
106 sg_len = sg_dma_len(sg);
107
108 while (sg_len) {
109 offset = addr & 0xffff;
110 len = sg_len;
111 if ((offset + sg_len) > 0x10000)
112 len = 0x10000 - offset;
113
114 ap->prd[pi].addr = cpu_to_le32(addr);
115 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
116 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
117
118 pi++;
119 sg_len -= len;
120 addr += len;
121 }
122 }
123
124 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
125}
126
127/**
128 * ata_fill_sg_dumb - Fill PCI IDE PRD table
129 * @qc: Metadata associated with taskfile to be transferred
130 *
131 * Fill PCI IDE PRD (scatter-gather) table with segments
132 * associated with the current disk command. Perform the fill
133 * so that we avoid writing any length 64K records for
134 * controllers that don't follow the spec.
135 *
136 * LOCKING:
137 * spin_lock_irqsave(host lock)
138 *
139 */
140static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
141{
142 struct ata_port *ap = qc->ap;
143 struct scatterlist *sg;
144 unsigned int si, pi;
145
146 pi = 0;
147 for_each_sg(qc->sg, sg, qc->n_elem, si) {
148 u32 addr, offset;
149 u32 sg_len, len, blen;
150
151 /* determine if physical DMA addr spans 64K boundary.
152 * Note h/w doesn't support 64-bit, so we unconditionally
153 * truncate dma_addr_t to u32.
154 */
155 addr = (u32) sg_dma_address(sg);
156 sg_len = sg_dma_len(sg);
157
158 while (sg_len) {
159 offset = addr & 0xffff;
160 len = sg_len;
161 if ((offset + sg_len) > 0x10000)
162 len = 0x10000 - offset;
163
164 blen = len & 0xffff;
165 ap->prd[pi].addr = cpu_to_le32(addr);
166 if (blen == 0) {
167 /* Some PATA chipsets like the CS5530 can't
168 cope with 0x0000 meaning 64K as the spec says */
169 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
170 blen = 0x8000;
171 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
172 }
173 ap->prd[pi].flags_len = cpu_to_le32(blen);
174 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
175
176 pi++;
177 sg_len -= len;
178 addr += len;
179 }
180 }
181
182 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
183}
184
185/**
Tejun Heo9363c382008-04-07 22:47:16 +0900186 * ata_sff_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900187 * @qc: Metadata associated with taskfile to be prepared
188 *
189 * Prepare ATA taskfile for submission.
190 *
191 * LOCKING:
192 * spin_lock_irqsave(host lock)
193 */
Tejun Heo9363c382008-04-07 22:47:16 +0900194void ata_sff_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900195{
196 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
197 return;
198
199 ata_fill_sg(qc);
200}
201
202/**
Tejun Heo9363c382008-04-07 22:47:16 +0900203 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900204 * @qc: Metadata associated with taskfile to be prepared
205 *
206 * Prepare ATA taskfile for submission.
207 *
208 * LOCKING:
209 * spin_lock_irqsave(host lock)
210 */
Tejun Heo9363c382008-04-07 22:47:16 +0900211void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900212{
213 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
214 return;
215
216 ata_fill_sg_dumb(qc);
217}
218
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500219/**
Tejun Heo9363c382008-04-07 22:47:16 +0900220 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +0900221 * @ap: port where the device is
222 *
223 * Reads ATA taskfile status register for currently-selected device
224 * and return its value. This also clears pending interrupts
225 * from this device
226 *
227 * LOCKING:
228 * Inherited from caller.
229 */
Tejun Heo9363c382008-04-07 22:47:16 +0900230u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900231{
232 return ioread8(ap->ioaddr.status_addr);
233}
234
235/**
Tejun Heo9363c382008-04-07 22:47:16 +0900236 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +0900237 * @ap: port where the device is
238 *
239 * Reads ATA taskfile alternate status register for
240 * currently-selected device and return its value.
241 *
242 * Note: may NOT be used as the check_altstatus() entry in
243 * ata_port_operations.
244 *
245 * LOCKING:
246 * Inherited from caller.
247 */
Tejun Heo9363c382008-04-07 22:47:16 +0900248u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900249{
Tejun Heo5682ed32008-04-07 22:47:16 +0900250 if (ap->ops->sff_check_altstatus)
251 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900252
253 return ioread8(ap->ioaddr.altstatus_addr);
254}
255
256/**
Tejun Heo9363c382008-04-07 22:47:16 +0900257 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900258 * @ap: port containing status register to be polled
259 * @tmout_pat: impatience timeout
260 * @tmout: overall timeout
261 *
262 * Sleep until ATA Status register bit BSY clears,
263 * or a timeout occurs.
264 *
265 * LOCKING:
266 * Kernel thread context (may sleep).
267 *
268 * RETURNS:
269 * 0 on success, -errno otherwise.
270 */
Tejun Heo9363c382008-04-07 22:47:16 +0900271int ata_sff_busy_sleep(struct ata_port *ap,
272 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900273{
274 unsigned long timer_start, timeout;
275 u8 status;
276
Tejun Heo9363c382008-04-07 22:47:16 +0900277 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900278 timer_start = jiffies;
279 timeout = timer_start + tmout_pat;
280 while (status != 0xff && (status & ATA_BUSY) &&
281 time_before(jiffies, timeout)) {
282 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900283 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900284 }
285
286 if (status != 0xff && (status & ATA_BUSY))
287 ata_port_printk(ap, KERN_WARNING,
288 "port is slow to respond, please be patient "
289 "(Status 0x%x)\n", status);
290
291 timeout = timer_start + tmout;
292 while (status != 0xff && (status & ATA_BUSY) &&
293 time_before(jiffies, timeout)) {
294 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900295 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900296 }
297
298 if (status == 0xff)
299 return -ENODEV;
300
301 if (status & ATA_BUSY) {
302 ata_port_printk(ap, KERN_ERR, "port failed to respond "
303 "(%lu secs, Status 0x%x)\n",
304 tmout / HZ, status);
305 return -EBUSY;
306 }
307
308 return 0;
309}
310
311/**
Tejun Heo9363c382008-04-07 22:47:16 +0900312 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900313 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900314 * @deadline: deadline jiffies for the operation
315 *
316 * Sleep until ATA Status register bit BSY clears, or timeout
317 * occurs.
318 *
319 * LOCKING:
320 * Kernel thread context (may sleep).
321 *
322 * RETURNS:
323 * 0 on success, -errno otherwise.
324 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900325int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900326{
Tejun Heo705e76b2008-04-07 22:47:19 +0900327 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +0900328 unsigned long start = jiffies;
Tejun Heo705e76b2008-04-07 22:47:19 +0900329 unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT;
Tejun Heo624d5c52008-03-25 22:16:41 +0900330 int warned = 0;
331
Tejun Heo705e76b2008-04-07 22:47:19 +0900332 if (time_after(nodev_deadline, deadline))
333 nodev_deadline = deadline;
334
Tejun Heo624d5c52008-03-25 22:16:41 +0900335 while (1) {
Tejun Heo5682ed32008-04-07 22:47:16 +0900336 u8 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900337 unsigned long now = jiffies;
338
339 if (!(status & ATA_BUSY))
340 return 0;
Tejun Heo705e76b2008-04-07 22:47:19 +0900341
342 /* No device status could be transient. Ignore it if
343 * link is online. Also, some SATA devices take a
344 * long time to clear 0xff after reset. For example,
345 * HHD424020F7SV00 iVDR needs >= 800ms while Quantum
346 * GoVault needs even more than that. Wait for
347 * ATA_TMOUT_FF_WAIT on -ENODEV if link isn't offline.
348 *
349 * Note that some PATA controllers (pata_ali) explode
350 * if status register is read more than once when
351 * there's no device attached.
352 */
353 if (status == 0xff) {
354 if (ata_link_online(link))
355 status = ATA_BUSY;
356 else if ((link->ap->flags & ATA_FLAG_SATA) &&
357 !ata_link_offline(link) &&
358 time_before(now, nodev_deadline))
359 status = ATA_BUSY;
360 if (status == 0xff)
361 return -ENODEV;
362 }
363
Tejun Heo624d5c52008-03-25 22:16:41 +0900364 if (time_after(now, deadline))
365 return -EBUSY;
366
367 if (!warned && time_after(now, start + 5 * HZ) &&
368 (deadline - now > 3 * HZ)) {
Tejun Heo705e76b2008-04-07 22:47:19 +0900369 ata_link_printk(link, KERN_WARNING,
370 "link is slow to respond, please be patient "
Tejun Heo624d5c52008-03-25 22:16:41 +0900371 "(Status 0x%x)\n", status);
372 warned = 1;
373 }
374
375 msleep(50);
376 }
377}
378
379/**
Tejun Heo9363c382008-04-07 22:47:16 +0900380 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900381 * @ap: ATA channel to manipulate
382 * @device: ATA device (numbered from zero) to select
383 *
384 * Use the method defined in the ATA specification to
385 * make either device 0, or device 1, active on the
386 * ATA channel. Works with both PIO and MMIO.
387 *
388 * May be used as the dev_select() entry in ata_port_operations.
389 *
390 * LOCKING:
391 * caller.
392 */
Tejun Heo9363c382008-04-07 22:47:16 +0900393void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900394{
395 u8 tmp;
396
397 if (device == 0)
398 tmp = ATA_DEVICE_OBS;
399 else
400 tmp = ATA_DEVICE_OBS | ATA_DEV1;
401
402 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900403 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900404}
405
406/**
407 * ata_dev_select - Select device 0/1 on ATA bus
408 * @ap: ATA channel to manipulate
409 * @device: ATA device (numbered from zero) to select
410 * @wait: non-zero to wait for Status register BSY bit to clear
411 * @can_sleep: non-zero if context allows sleeping
412 *
413 * Use the method defined in the ATA specification to
414 * make either device 0, or device 1, active on the
415 * ATA channel.
416 *
Tejun Heo9363c382008-04-07 22:47:16 +0900417 * This is a high-level version of ata_sff_dev_select(), which
418 * additionally provides the services of inserting the proper
419 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900420 *
421 * LOCKING:
422 * caller.
423 */
424void ata_dev_select(struct ata_port *ap, unsigned int device,
425 unsigned int wait, unsigned int can_sleep)
426{
427 if (ata_msg_probe(ap))
428 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
429 "device %u, wait %u\n", device, wait);
430
431 if (wait)
432 ata_wait_idle(ap);
433
Tejun Heo5682ed32008-04-07 22:47:16 +0900434 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900435
436 if (wait) {
437 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
438 msleep(150);
439 ata_wait_idle(ap);
440 }
441}
442
443/**
Tejun Heo9363c382008-04-07 22:47:16 +0900444 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900445 * @ap: Port on which interrupts are enabled.
446 *
447 * Enable interrupts on a legacy IDE device using MMIO or PIO,
448 * wait for idle, clear any pending interrupts.
449 *
450 * LOCKING:
451 * Inherited from caller.
452 */
Tejun Heo9363c382008-04-07 22:47:16 +0900453u8 ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900454{
455 struct ata_ioports *ioaddr = &ap->ioaddr;
456 u8 tmp;
457
458 ap->ctl &= ~ATA_NIEN;
459 ap->last_ctl = ap->ctl;
460
Tejun Heof659f0e42008-03-06 13:12:54 +0900461 if (ioaddr->ctl_addr)
462 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +0900463 tmp = ata_wait_idle(ap);
464
Tejun Heo5682ed32008-04-07 22:47:16 +0900465 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900466
467 return tmp;
468}
469
470/**
Tejun Heo9363c382008-04-07 22:47:16 +0900471 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900472 * @ap: Port associated with this ATA transaction.
473 *
474 * Clear interrupt and error flags in DMA status register.
475 *
476 * May be used as the irq_clear() entry in ata_port_operations.
477 *
478 * LOCKING:
479 * spin_lock_irqsave(host lock)
480 */
Tejun Heo9363c382008-04-07 22:47:16 +0900481void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900482{
483 void __iomem *mmio = ap->ioaddr.bmdma_addr;
484
485 if (!mmio)
486 return;
487
488 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
489}
490
491/**
Tejun Heo9363c382008-04-07 22:47:16 +0900492 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500493 * @ap: Port to which output is sent
494 * @tf: ATA taskfile register set
495 *
496 * Outputs ATA taskfile to standard ATA host controller.
497 *
498 * LOCKING:
499 * Inherited from caller.
500 */
Tejun Heo9363c382008-04-07 22:47:16 +0900501void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500502{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900503 struct ata_ioports *ioaddr = &ap->ioaddr;
504 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
505
506 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900507 if (ioaddr->ctl_addr)
508 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900509 ap->last_ctl = tf->ctl;
510 ata_wait_idle(ap);
511 }
512
513 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900514 WARN_ON(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900515 iowrite8(tf->hob_feature, ioaddr->feature_addr);
516 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
517 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
518 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
519 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
520 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
521 tf->hob_feature,
522 tf->hob_nsect,
523 tf->hob_lbal,
524 tf->hob_lbam,
525 tf->hob_lbah);
526 }
527
528 if (is_addr) {
529 iowrite8(tf->feature, ioaddr->feature_addr);
530 iowrite8(tf->nsect, ioaddr->nsect_addr);
531 iowrite8(tf->lbal, ioaddr->lbal_addr);
532 iowrite8(tf->lbam, ioaddr->lbam_addr);
533 iowrite8(tf->lbah, ioaddr->lbah_addr);
534 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
535 tf->feature,
536 tf->nsect,
537 tf->lbal,
538 tf->lbam,
539 tf->lbah);
540 }
541
542 if (tf->flags & ATA_TFLAG_DEVICE) {
543 iowrite8(tf->device, ioaddr->device_addr);
544 VPRINTK("device 0x%X\n", tf->device);
545 }
546
547 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500548}
549
550/**
Tejun Heo9363c382008-04-07 22:47:16 +0900551 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500552 * @ap: Port from which input is read
553 * @tf: ATA taskfile register set for storing input
554 *
555 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000556 * into @tf. Assumes the device has a fully SFF compliant task file
557 * layout and behaviour. If you device does not (eg has a different
558 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500559 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500560 * LOCKING:
561 * Inherited from caller.
562 */
Tejun Heo9363c382008-04-07 22:47:16 +0900563void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500564{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900565 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500566
Tejun Heo9363c382008-04-07 22:47:16 +0900567 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900568 tf->feature = ioread8(ioaddr->error_addr);
569 tf->nsect = ioread8(ioaddr->nsect_addr);
570 tf->lbal = ioread8(ioaddr->lbal_addr);
571 tf->lbam = ioread8(ioaddr->lbam_addr);
572 tf->lbah = ioread8(ioaddr->lbah_addr);
573 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500574
Tejun Heo0d5ff562007-02-01 15:06:36 +0900575 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900576 if (likely(ioaddr->ctl_addr)) {
577 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
578 tf->hob_feature = ioread8(ioaddr->error_addr);
579 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
580 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
581 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
582 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
583 iowrite8(tf->ctl, ioaddr->ctl_addr);
584 ap->last_ctl = tf->ctl;
585 } else
586 WARN_ON(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900587 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500588}
589
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500590/**
Tejun Heo9363c382008-04-07 22:47:16 +0900591 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900592 * @ap: port to which command is being issued
593 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500594 *
Tejun Heo272f7882008-03-25 22:16:40 +0900595 * Issues ATA command, with proper synchronization with interrupt
596 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500597 *
598 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400599 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500600 */
Tejun Heo9363c382008-04-07 22:47:16 +0900601void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500602{
Tejun Heo272f7882008-03-25 22:16:40 +0900603 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500604
Tejun Heo272f7882008-03-25 22:16:40 +0900605 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900606 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500607}
608
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900609/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900610 * ata_tf_to_host - issue ATA taskfile to host controller
611 * @ap: port to which command is being issued
612 * @tf: ATA taskfile register set
613 *
614 * Issues ATA taskfile register set to ATA host controller,
615 * with proper synchronization with interrupt handler and
616 * other threads.
617 *
618 * LOCKING:
619 * spin_lock_irqsave(host lock)
620 */
621static inline void ata_tf_to_host(struct ata_port *ap,
622 const struct ata_taskfile *tf)
623{
Tejun Heo5682ed32008-04-07 22:47:16 +0900624 ap->ops->sff_tf_load(ap, tf);
625 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900626}
627
628/**
Tejun Heo9363c382008-04-07 22:47:16 +0900629 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900630 * @dev: device to target
631 * @buf: data buffer
632 * @buflen: buffer length
633 * @rw: read/write
634 *
635 * Transfer data from/to the device data register by PIO.
636 *
637 * LOCKING:
638 * Inherited from caller.
639 *
640 * RETURNS:
641 * Bytes consumed.
642 */
Tejun Heo9363c382008-04-07 22:47:16 +0900643unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
644 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900645{
646 struct ata_port *ap = dev->link->ap;
647 void __iomem *data_addr = ap->ioaddr.data_addr;
648 unsigned int words = buflen >> 1;
649
650 /* Transfer multiple of 2 bytes */
651 if (rw == READ)
652 ioread16_rep(data_addr, buf, words);
653 else
654 iowrite16_rep(data_addr, buf, words);
655
656 /* Transfer trailing 1 byte, if any. */
657 if (unlikely(buflen & 0x01)) {
658 __le16 align_buf[1] = { 0 };
659 unsigned char *trailing_buf = buf + buflen - 1;
660
661 if (rw == READ) {
662 align_buf[0] = cpu_to_le16(ioread16(data_addr));
663 memcpy(trailing_buf, align_buf, 1);
664 } else {
665 memcpy(align_buf, trailing_buf, 1);
666 iowrite16(le16_to_cpu(align_buf[0]), data_addr);
667 }
668 words++;
669 }
670
671 return words << 1;
672}
673
674/**
Tejun Heo9363c382008-04-07 22:47:16 +0900675 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900676 * @dev: device to target
677 * @buf: data buffer
678 * @buflen: buffer length
679 * @rw: read/write
680 *
681 * Transfer data from/to the device data register by PIO. Do the
682 * transfer with interrupts disabled.
683 *
684 * LOCKING:
685 * Inherited from caller.
686 *
687 * RETURNS:
688 * Bytes consumed.
689 */
Tejun Heo9363c382008-04-07 22:47:16 +0900690unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
691 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900692{
693 unsigned long flags;
694 unsigned int consumed;
695
696 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900697 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900698 local_irq_restore(flags);
699
700 return consumed;
701}
702
703/**
704 * ata_pio_sector - Transfer a sector of data.
705 * @qc: Command on going
706 *
707 * Transfer qc->sect_size bytes of data from/to the ATA device.
708 *
709 * LOCKING:
710 * Inherited from caller.
711 */
712static void ata_pio_sector(struct ata_queued_cmd *qc)
713{
714 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
715 struct ata_port *ap = qc->ap;
716 struct page *page;
717 unsigned int offset;
718 unsigned char *buf;
719
720 if (qc->curbytes == qc->nbytes - qc->sect_size)
721 ap->hsm_task_state = HSM_ST_LAST;
722
723 page = sg_page(qc->cursg);
724 offset = qc->cursg->offset + qc->cursg_ofs;
725
726 /* get the current page and offset */
727 page = nth_page(page, (offset >> PAGE_SHIFT));
728 offset %= PAGE_SIZE;
729
730 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
731
732 if (PageHighMem(page)) {
733 unsigned long flags;
734
735 /* FIXME: use a bounce buffer */
736 local_irq_save(flags);
737 buf = kmap_atomic(page, KM_IRQ0);
738
739 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900740 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
741 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900742
743 kunmap_atomic(buf, KM_IRQ0);
744 local_irq_restore(flags);
745 } else {
746 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900747 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
748 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900749 }
750
751 qc->curbytes += qc->sect_size;
752 qc->cursg_ofs += qc->sect_size;
753
754 if (qc->cursg_ofs == qc->cursg->length) {
755 qc->cursg = sg_next(qc->cursg);
756 qc->cursg_ofs = 0;
757 }
758}
759
760/**
761 * ata_pio_sectors - Transfer one or many sectors.
762 * @qc: Command on going
763 *
764 * Transfer one or many sectors of data from/to the
765 * ATA device for the DRQ request.
766 *
767 * LOCKING:
768 * Inherited from caller.
769 */
770static void ata_pio_sectors(struct ata_queued_cmd *qc)
771{
772 if (is_multi_taskfile(&qc->tf)) {
773 /* READ/WRITE MULTIPLE */
774 unsigned int nsect;
775
776 WARN_ON(qc->dev->multi_count == 0);
777
778 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
779 qc->dev->multi_count);
780 while (nsect--)
781 ata_pio_sector(qc);
782 } else
783 ata_pio_sector(qc);
784
Tejun Heo9363c382008-04-07 22:47:16 +0900785 ata_sff_altstatus(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900786}
787
788/**
789 * atapi_send_cdb - Write CDB bytes to hardware
790 * @ap: Port to which ATAPI device is attached.
791 * @qc: Taskfile currently active
792 *
793 * When device has indicated its readiness to accept
794 * a CDB, this function is called. Send the CDB.
795 *
796 * LOCKING:
797 * caller.
798 */
799static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
800{
801 /* send SCSI cdb */
802 DPRINTK("send cdb\n");
803 WARN_ON(qc->dev->cdb_len < 12);
804
Tejun Heo5682ed32008-04-07 22:47:16 +0900805 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Tejun Heo9363c382008-04-07 22:47:16 +0900806 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900807
808 switch (qc->tf.protocol) {
809 case ATAPI_PROT_PIO:
810 ap->hsm_task_state = HSM_ST;
811 break;
812 case ATAPI_PROT_NODATA:
813 ap->hsm_task_state = HSM_ST_LAST;
814 break;
815 case ATAPI_PROT_DMA:
816 ap->hsm_task_state = HSM_ST_LAST;
817 /* initiate bmdma */
818 ap->ops->bmdma_start(qc);
819 break;
820 }
821}
822
823/**
824 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
825 * @qc: Command on going
826 * @bytes: number of bytes
827 *
828 * Transfer Transfer data from/to the ATAPI device.
829 *
830 * LOCKING:
831 * Inherited from caller.
832 *
833 */
834static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
835{
836 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
837 struct ata_port *ap = qc->ap;
838 struct ata_device *dev = qc->dev;
839 struct ata_eh_info *ehi = &dev->link->eh_info;
840 struct scatterlist *sg;
841 struct page *page;
842 unsigned char *buf;
843 unsigned int offset, count, consumed;
844
845next_sg:
846 sg = qc->cursg;
847 if (unlikely(!sg)) {
848 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
849 "buf=%u cur=%u bytes=%u",
850 qc->nbytes, qc->curbytes, bytes);
851 return -1;
852 }
853
854 page = sg_page(sg);
855 offset = sg->offset + qc->cursg_ofs;
856
857 /* get the current page and offset */
858 page = nth_page(page, (offset >> PAGE_SHIFT));
859 offset %= PAGE_SIZE;
860
861 /* don't overrun current sg */
862 count = min(sg->length - qc->cursg_ofs, bytes);
863
864 /* don't cross page boundaries */
865 count = min(count, (unsigned int)PAGE_SIZE - offset);
866
867 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
868
869 if (PageHighMem(page)) {
870 unsigned long flags;
871
872 /* FIXME: use bounce buffer */
873 local_irq_save(flags);
874 buf = kmap_atomic(page, KM_IRQ0);
875
876 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900877 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900878
879 kunmap_atomic(buf, KM_IRQ0);
880 local_irq_restore(flags);
881 } else {
882 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900883 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900884 }
885
886 bytes -= min(bytes, consumed);
887 qc->curbytes += count;
888 qc->cursg_ofs += count;
889
890 if (qc->cursg_ofs == sg->length) {
891 qc->cursg = sg_next(qc->cursg);
892 qc->cursg_ofs = 0;
893 }
894
895 /* consumed can be larger than count only for the last transfer */
896 WARN_ON(qc->cursg && count != consumed);
897
898 if (bytes)
899 goto next_sg;
900 return 0;
901}
902
903/**
904 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
905 * @qc: Command on going
906 *
907 * Transfer Transfer data from/to the ATAPI device.
908 *
909 * LOCKING:
910 * Inherited from caller.
911 */
912static void atapi_pio_bytes(struct ata_queued_cmd *qc)
913{
914 struct ata_port *ap = qc->ap;
915 struct ata_device *dev = qc->dev;
916 struct ata_eh_info *ehi = &dev->link->eh_info;
917 unsigned int ireason, bc_lo, bc_hi, bytes;
918 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
919
920 /* Abuse qc->result_tf for temp storage of intermediate TF
921 * here to save some kernel stack usage.
922 * For normal completion, qc->result_tf is not relevant. For
923 * error, qc->result_tf is later overwritten by ata_qc_complete().
924 * So, the correctness of qc->result_tf is not affected.
925 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900926 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900927 ireason = qc->result_tf.nsect;
928 bc_lo = qc->result_tf.lbam;
929 bc_hi = qc->result_tf.lbah;
930 bytes = (bc_hi << 8) | bc_lo;
931
932 /* shall be cleared to zero, indicating xfer of data */
933 if (unlikely(ireason & (1 << 0)))
934 goto atapi_check;
935
936 /* make sure transfer direction matches expected */
937 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
938 if (unlikely(do_write != i_write))
939 goto atapi_check;
940
941 if (unlikely(!bytes))
942 goto atapi_check;
943
944 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
945
946 if (unlikely(__atapi_pio_bytes(qc, bytes)))
947 goto err_out;
Tejun Heo9363c382008-04-07 22:47:16 +0900948 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900949
950 return;
951
952 atapi_check:
953 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
954 ireason, bytes);
955 err_out:
956 qc->err_mask |= AC_ERR_HSM;
957 ap->hsm_task_state = HSM_ST_ERR;
958}
959
960/**
961 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
962 * @ap: the target ata_port
963 * @qc: qc on going
964 *
965 * RETURNS:
966 * 1 if ok in workqueue, 0 otherwise.
967 */
968static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
969{
970 if (qc->tf.flags & ATA_TFLAG_POLLING)
971 return 1;
972
973 if (ap->hsm_task_state == HSM_ST_FIRST) {
974 if (qc->tf.protocol == ATA_PROT_PIO &&
975 (qc->tf.flags & ATA_TFLAG_WRITE))
976 return 1;
977
978 if (ata_is_atapi(qc->tf.protocol) &&
979 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
980 return 1;
981 }
982
983 return 0;
984}
985
986/**
987 * ata_hsm_qc_complete - finish a qc running on standard HSM
988 * @qc: Command to complete
989 * @in_wq: 1 if called from workqueue, 0 otherwise
990 *
991 * Finish @qc which is running on standard HSM.
992 *
993 * LOCKING:
994 * If @in_wq is zero, spin_lock_irqsave(host lock).
995 * Otherwise, none on entry and grabs host lock.
996 */
997static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
998{
999 struct ata_port *ap = qc->ap;
1000 unsigned long flags;
1001
1002 if (ap->ops->error_handler) {
1003 if (in_wq) {
1004 spin_lock_irqsave(ap->lock, flags);
1005
1006 /* EH might have kicked in while host lock is
1007 * released.
1008 */
1009 qc = ata_qc_from_tag(ap, qc->tag);
1010 if (qc) {
1011 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001012 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001013 ata_qc_complete(qc);
1014 } else
1015 ata_port_freeze(ap);
1016 }
1017
1018 spin_unlock_irqrestore(ap->lock, flags);
1019 } else {
1020 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1021 ata_qc_complete(qc);
1022 else
1023 ata_port_freeze(ap);
1024 }
1025 } else {
1026 if (in_wq) {
1027 spin_lock_irqsave(ap->lock, flags);
Tejun Heo5682ed32008-04-07 22:47:16 +09001028 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001029 ata_qc_complete(qc);
1030 spin_unlock_irqrestore(ap->lock, flags);
1031 } else
1032 ata_qc_complete(qc);
1033 }
1034}
1035
1036/**
Tejun Heo9363c382008-04-07 22:47:16 +09001037 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001038 * @ap: the target ata_port
1039 * @qc: qc on going
1040 * @status: current device status
1041 * @in_wq: 1 if called from workqueue, 0 otherwise
1042 *
1043 * RETURNS:
1044 * 1 when poll next status needed, 0 otherwise.
1045 */
Tejun Heo9363c382008-04-07 22:47:16 +09001046int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1047 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001048{
1049 unsigned long flags = 0;
1050 int poll_next;
1051
1052 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
1053
Tejun Heo9363c382008-04-07 22:47:16 +09001054 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001055 * like DMA polling into the workqueue. Notice that
1056 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1057 */
1058 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
1059
1060fsm_start:
1061 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1062 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1063
1064 switch (ap->hsm_task_state) {
1065 case HSM_ST_FIRST:
1066 /* Send first data block or PACKET CDB */
1067
1068 /* If polling, we will stay in the work queue after
1069 * sending the data. Otherwise, interrupt handler
1070 * takes over after sending the data.
1071 */
1072 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1073
1074 /* check device status */
1075 if (unlikely((status & ATA_DRQ) == 0)) {
1076 /* handle BSY=0, DRQ=0 as error */
1077 if (likely(status & (ATA_ERR | ATA_DF)))
1078 /* device stops HSM for abort/error */
1079 qc->err_mask |= AC_ERR_DEV;
1080 else
1081 /* HSM violation. Let EH handle this */
1082 qc->err_mask |= AC_ERR_HSM;
1083
1084 ap->hsm_task_state = HSM_ST_ERR;
1085 goto fsm_start;
1086 }
1087
1088 /* Device should not ask for data transfer (DRQ=1)
1089 * when it finds something wrong.
1090 * We ignore DRQ here and stop the HSM by
1091 * changing hsm_task_state to HSM_ST_ERR and
1092 * let the EH abort the command or reset the device.
1093 */
1094 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1095 /* Some ATAPI tape drives forget to clear the ERR bit
1096 * when doing the next command (mostly request sense).
1097 * We ignore ERR here to workaround and proceed sending
1098 * the CDB.
1099 */
1100 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
1101 ata_port_printk(ap, KERN_WARNING,
1102 "DRQ=1 with device error, "
1103 "dev_stat 0x%X\n", status);
1104 qc->err_mask |= AC_ERR_HSM;
1105 ap->hsm_task_state = HSM_ST_ERR;
1106 goto fsm_start;
1107 }
1108 }
1109
1110 /* Send the CDB (atapi) or the first data block (ata pio out).
1111 * During the state transition, interrupt handler shouldn't
1112 * be invoked before the data transfer is complete and
1113 * hsm_task_state is changed. Hence, the following locking.
1114 */
1115 if (in_wq)
1116 spin_lock_irqsave(ap->lock, flags);
1117
1118 if (qc->tf.protocol == ATA_PROT_PIO) {
1119 /* PIO data out protocol.
1120 * send first data block.
1121 */
1122
1123 /* ata_pio_sectors() might change the state
1124 * to HSM_ST_LAST. so, the state is changed here
1125 * before ata_pio_sectors().
1126 */
1127 ap->hsm_task_state = HSM_ST;
1128 ata_pio_sectors(qc);
1129 } else
1130 /* send CDB */
1131 atapi_send_cdb(ap, qc);
1132
1133 if (in_wq)
1134 spin_unlock_irqrestore(ap->lock, flags);
1135
1136 /* if polling, ata_pio_task() handles the rest.
1137 * otherwise, interrupt handler takes over from here.
1138 */
1139 break;
1140
1141 case HSM_ST:
1142 /* complete command or read/write the data register */
1143 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1144 /* ATAPI PIO protocol */
1145 if ((status & ATA_DRQ) == 0) {
1146 /* No more data to transfer or device error.
1147 * Device error will be tagged in HSM_ST_LAST.
1148 */
1149 ap->hsm_task_state = HSM_ST_LAST;
1150 goto fsm_start;
1151 }
1152
1153 /* Device should not ask for data transfer (DRQ=1)
1154 * when it finds something wrong.
1155 * We ignore DRQ here and stop the HSM by
1156 * changing hsm_task_state to HSM_ST_ERR and
1157 * let the EH abort the command or reset the device.
1158 */
1159 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1160 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
1161 "device error, dev_stat 0x%X\n",
1162 status);
1163 qc->err_mask |= AC_ERR_HSM;
1164 ap->hsm_task_state = HSM_ST_ERR;
1165 goto fsm_start;
1166 }
1167
1168 atapi_pio_bytes(qc);
1169
1170 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1171 /* bad ireason reported by device */
1172 goto fsm_start;
1173
1174 } else {
1175 /* ATA PIO protocol */
1176 if (unlikely((status & ATA_DRQ) == 0)) {
1177 /* handle BSY=0, DRQ=0 as error */
1178 if (likely(status & (ATA_ERR | ATA_DF)))
1179 /* device stops HSM for abort/error */
1180 qc->err_mask |= AC_ERR_DEV;
1181 else
1182 /* HSM violation. Let EH handle this.
1183 * Phantom devices also trigger this
1184 * condition. Mark hint.
1185 */
1186 qc->err_mask |= AC_ERR_HSM |
1187 AC_ERR_NODEV_HINT;
1188
1189 ap->hsm_task_state = HSM_ST_ERR;
1190 goto fsm_start;
1191 }
1192
1193 /* For PIO reads, some devices may ask for
1194 * data transfer (DRQ=1) alone with ERR=1.
1195 * We respect DRQ here and transfer one
1196 * block of junk data before changing the
1197 * hsm_task_state to HSM_ST_ERR.
1198 *
1199 * For PIO writes, ERR=1 DRQ=1 doesn't make
1200 * sense since the data block has been
1201 * transferred to the device.
1202 */
1203 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1204 /* data might be corrputed */
1205 qc->err_mask |= AC_ERR_DEV;
1206
1207 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1208 ata_pio_sectors(qc);
1209 status = ata_wait_idle(ap);
1210 }
1211
1212 if (status & (ATA_BUSY | ATA_DRQ))
1213 qc->err_mask |= AC_ERR_HSM;
1214
1215 /* ata_pio_sectors() might change the
1216 * state to HSM_ST_LAST. so, the state
1217 * is changed after ata_pio_sectors().
1218 */
1219 ap->hsm_task_state = HSM_ST_ERR;
1220 goto fsm_start;
1221 }
1222
1223 ata_pio_sectors(qc);
1224
1225 if (ap->hsm_task_state == HSM_ST_LAST &&
1226 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1227 /* all data read */
1228 status = ata_wait_idle(ap);
1229 goto fsm_start;
1230 }
1231 }
1232
1233 poll_next = 1;
1234 break;
1235
1236 case HSM_ST_LAST:
1237 if (unlikely(!ata_ok(status))) {
1238 qc->err_mask |= __ac_err_mask(status);
1239 ap->hsm_task_state = HSM_ST_ERR;
1240 goto fsm_start;
1241 }
1242
1243 /* no more data to transfer */
1244 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1245 ap->print_id, qc->dev->devno, status);
1246
1247 WARN_ON(qc->err_mask);
1248
1249 ap->hsm_task_state = HSM_ST_IDLE;
1250
1251 /* complete taskfile transaction */
1252 ata_hsm_qc_complete(qc, in_wq);
1253
1254 poll_next = 0;
1255 break;
1256
1257 case HSM_ST_ERR:
1258 /* make sure qc->err_mask is available to
1259 * know what's wrong and recover
1260 */
1261 WARN_ON(qc->err_mask == 0);
1262
1263 ap->hsm_task_state = HSM_ST_IDLE;
1264
1265 /* complete taskfile transaction */
1266 ata_hsm_qc_complete(qc, in_wq);
1267
1268 poll_next = 0;
1269 break;
1270 default:
1271 poll_next = 0;
1272 BUG();
1273 }
1274
1275 return poll_next;
1276}
1277
1278void ata_pio_task(struct work_struct *work)
1279{
1280 struct ata_port *ap =
1281 container_of(work, struct ata_port, port_task.work);
1282 struct ata_queued_cmd *qc = ap->port_task_data;
1283 u8 status;
1284 int poll_next;
1285
1286fsm_start:
1287 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
1288
1289 /*
1290 * This is purely heuristic. This is a fast path.
1291 * Sometimes when we enter, BSY will be cleared in
1292 * a chk-status or two. If not, the drive is probably seeking
1293 * or something. Snooze for a couple msecs, then
1294 * chk-status again. If still busy, queue delayed work.
1295 */
Tejun Heo9363c382008-04-07 22:47:16 +09001296 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001297 if (status & ATA_BUSY) {
1298 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001299 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001300 if (status & ATA_BUSY) {
1301 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1302 return;
1303 }
1304 }
1305
1306 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001307 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001308
1309 /* another command or interrupt handler
1310 * may be running at this point.
1311 */
1312 if (poll_next)
1313 goto fsm_start;
1314}
1315
1316/**
Tejun Heo9363c382008-04-07 22:47:16 +09001317 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
Tejun Heo624d5c52008-03-25 22:16:41 +09001318 * @qc: command to issue to device
1319 *
1320 * Using various libata functions and hooks, this function
1321 * starts an ATA command. ATA commands are grouped into
1322 * classes called "protocols", and issuing each type of protocol
1323 * is slightly different.
1324 *
1325 * May be used as the qc_issue() entry in ata_port_operations.
1326 *
1327 * LOCKING:
1328 * spin_lock_irqsave(host lock)
1329 *
1330 * RETURNS:
1331 * Zero on success, AC_ERR_* mask on failure
1332 */
Tejun Heo9363c382008-04-07 22:47:16 +09001333unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001334{
1335 struct ata_port *ap = qc->ap;
1336
1337 /* Use polling pio if the LLD doesn't handle
1338 * interrupt driven pio and atapi CDB interrupt.
1339 */
1340 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1341 switch (qc->tf.protocol) {
1342 case ATA_PROT_PIO:
1343 case ATA_PROT_NODATA:
1344 case ATAPI_PROT_PIO:
1345 case ATAPI_PROT_NODATA:
1346 qc->tf.flags |= ATA_TFLAG_POLLING;
1347 break;
1348 case ATAPI_PROT_DMA:
1349 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1350 /* see ata_dma_blacklisted() */
1351 BUG();
1352 break;
1353 default:
1354 break;
1355 }
1356 }
1357
1358 /* select the device */
1359 ata_dev_select(ap, qc->dev->devno, 1, 0);
1360
1361 /* start the command */
1362 switch (qc->tf.protocol) {
1363 case ATA_PROT_NODATA:
1364 if (qc->tf.flags & ATA_TFLAG_POLLING)
1365 ata_qc_set_polling(qc);
1366
1367 ata_tf_to_host(ap, &qc->tf);
1368 ap->hsm_task_state = HSM_ST_LAST;
1369
1370 if (qc->tf.flags & ATA_TFLAG_POLLING)
1371 ata_pio_queue_task(ap, qc, 0);
1372
1373 break;
1374
1375 case ATA_PROT_DMA:
1376 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1377
Tejun Heo5682ed32008-04-07 22:47:16 +09001378 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001379 ap->ops->bmdma_setup(qc); /* set up bmdma */
1380 ap->ops->bmdma_start(qc); /* initiate bmdma */
1381 ap->hsm_task_state = HSM_ST_LAST;
1382 break;
1383
1384 case ATA_PROT_PIO:
1385 if (qc->tf.flags & ATA_TFLAG_POLLING)
1386 ata_qc_set_polling(qc);
1387
1388 ata_tf_to_host(ap, &qc->tf);
1389
1390 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1391 /* PIO data out protocol */
1392 ap->hsm_task_state = HSM_ST_FIRST;
1393 ata_pio_queue_task(ap, qc, 0);
1394
1395 /* always send first data block using
1396 * the ata_pio_task() codepath.
1397 */
1398 } else {
1399 /* PIO data in protocol */
1400 ap->hsm_task_state = HSM_ST;
1401
1402 if (qc->tf.flags & ATA_TFLAG_POLLING)
1403 ata_pio_queue_task(ap, qc, 0);
1404
1405 /* if polling, ata_pio_task() handles the rest.
1406 * otherwise, interrupt handler takes over from here.
1407 */
1408 }
1409
1410 break;
1411
1412 case ATAPI_PROT_PIO:
1413 case ATAPI_PROT_NODATA:
1414 if (qc->tf.flags & ATA_TFLAG_POLLING)
1415 ata_qc_set_polling(qc);
1416
1417 ata_tf_to_host(ap, &qc->tf);
1418
1419 ap->hsm_task_state = HSM_ST_FIRST;
1420
1421 /* send cdb by polling if no cdb interrupt */
1422 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1423 (qc->tf.flags & ATA_TFLAG_POLLING))
1424 ata_pio_queue_task(ap, qc, 0);
1425 break;
1426
1427 case ATAPI_PROT_DMA:
1428 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1429
Tejun Heo5682ed32008-04-07 22:47:16 +09001430 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001431 ap->ops->bmdma_setup(qc); /* set up bmdma */
1432 ap->hsm_task_state = HSM_ST_FIRST;
1433
1434 /* send cdb by polling if no cdb interrupt */
1435 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1436 ata_pio_queue_task(ap, qc, 0);
1437 break;
1438
1439 default:
1440 WARN_ON(1);
1441 return AC_ERR_SYSTEM;
1442 }
1443
1444 return 0;
1445}
1446
1447/**
Tejun Heo9363c382008-04-07 22:47:16 +09001448 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001449 * @ap: Port on which interrupt arrived (possibly...)
1450 * @qc: Taskfile currently active in engine
1451 *
1452 * Handle host interrupt for given queued command. Currently,
1453 * only DMA interrupts are handled. All other commands are
1454 * handled via polling with interrupts disabled (nIEN bit).
1455 *
1456 * LOCKING:
1457 * spin_lock_irqsave(host lock)
1458 *
1459 * RETURNS:
1460 * One if interrupt was handled, zero if not (shared irq).
1461 */
Tejun Heo9363c382008-04-07 22:47:16 +09001462inline unsigned int ata_sff_host_intr(struct ata_port *ap,
1463 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001464{
1465 struct ata_eh_info *ehi = &ap->link.eh_info;
1466 u8 status, host_stat = 0;
1467
1468 VPRINTK("ata%u: protocol %d task_state %d\n",
1469 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1470
1471 /* Check whether we are expecting interrupt in this state */
1472 switch (ap->hsm_task_state) {
1473 case HSM_ST_FIRST:
1474 /* Some pre-ATAPI-4 devices assert INTRQ
1475 * at this state when ready to receive CDB.
1476 */
1477
1478 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1479 * The flag was turned on only for atapi devices. No
1480 * need to check ata_is_atapi(qc->tf.protocol) again.
1481 */
1482 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1483 goto idle_irq;
1484 break;
1485 case HSM_ST_LAST:
1486 if (qc->tf.protocol == ATA_PROT_DMA ||
1487 qc->tf.protocol == ATAPI_PROT_DMA) {
1488 /* check status of DMA engine */
1489 host_stat = ap->ops->bmdma_status(ap);
1490 VPRINTK("ata%u: host_stat 0x%X\n",
1491 ap->print_id, host_stat);
1492
1493 /* if it's not our irq... */
1494 if (!(host_stat & ATA_DMA_INTR))
1495 goto idle_irq;
1496
1497 /* before we do anything else, clear DMA-Start bit */
1498 ap->ops->bmdma_stop(qc);
1499
1500 if (unlikely(host_stat & ATA_DMA_ERR)) {
1501 /* error when transfering data to/from memory */
1502 qc->err_mask |= AC_ERR_HOST_BUS;
1503 ap->hsm_task_state = HSM_ST_ERR;
1504 }
1505 }
1506 break;
1507 case HSM_ST:
1508 break;
1509 default:
1510 goto idle_irq;
1511 }
1512
1513 /* check altstatus */
Tejun Heo9363c382008-04-07 22:47:16 +09001514 status = ata_sff_altstatus(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001515 if (status & ATA_BUSY)
1516 goto idle_irq;
1517
1518 /* check main status, clearing INTRQ */
Tejun Heo5682ed32008-04-07 22:47:16 +09001519 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001520 if (unlikely(status & ATA_BUSY))
1521 goto idle_irq;
1522
1523 /* ack bmdma irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001524 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001525
Tejun Heo9363c382008-04-07 22:47:16 +09001526 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001527
1528 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1529 qc->tf.protocol == ATAPI_PROT_DMA))
1530 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1531
1532 return 1; /* irq handled */
1533
1534idle_irq:
1535 ap->stats.idle_irq++;
1536
1537#ifdef ATA_IRQ_TRAP
1538 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001539 ap->ops->sff_check_status(ap);
1540 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001541 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1542 return 1;
1543 }
1544#endif
1545 return 0; /* irq not handled */
1546}
1547
1548/**
Tejun Heo9363c382008-04-07 22:47:16 +09001549 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001550 * @irq: irq line (unused)
1551 * @dev_instance: pointer to our ata_host information structure
1552 *
1553 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001554 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001555 *
1556 * LOCKING:
1557 * Obtains host lock during operation.
1558 *
1559 * RETURNS:
1560 * IRQ_NONE or IRQ_HANDLED.
1561 */
Tejun Heo9363c382008-04-07 22:47:16 +09001562irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001563{
1564 struct ata_host *host = dev_instance;
1565 unsigned int i;
1566 unsigned int handled = 0;
1567 unsigned long flags;
1568
1569 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1570 spin_lock_irqsave(&host->lock, flags);
1571
1572 for (i = 0; i < host->n_ports; i++) {
1573 struct ata_port *ap;
1574
1575 ap = host->ports[i];
1576 if (ap &&
1577 !(ap->flags & ATA_FLAG_DISABLED)) {
1578 struct ata_queued_cmd *qc;
1579
1580 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1581 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
1582 (qc->flags & ATA_QCFLAG_ACTIVE))
Tejun Heo9363c382008-04-07 22:47:16 +09001583 handled |= ata_sff_host_intr(ap, qc);
Tejun Heo624d5c52008-03-25 22:16:41 +09001584 }
1585 }
1586
1587 spin_unlock_irqrestore(&host->lock, flags);
1588
1589 return IRQ_RETVAL(handled);
1590}
1591
1592/**
Tejun Heo9363c382008-04-07 22:47:16 +09001593 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001594 * @ap: port to freeze
1595 *
1596 * Freeze BMDMA controller port.
1597 *
1598 * LOCKING:
1599 * Inherited from caller.
1600 */
Tejun Heo9363c382008-04-07 22:47:16 +09001601void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001602{
1603 struct ata_ioports *ioaddr = &ap->ioaddr;
1604
1605 ap->ctl |= ATA_NIEN;
1606 ap->last_ctl = ap->ctl;
1607
Tejun Heof659f0e42008-03-06 13:12:54 +09001608 if (ioaddr->ctl_addr)
1609 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001610
1611 /* Under certain circumstances, some controllers raise IRQ on
1612 * ATA_NIEN manipulation. Also, many controllers fail to mask
1613 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1614 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001615 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001616
Tejun Heo5682ed32008-04-07 22:47:16 +09001617 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001618}
1619
1620/**
Tejun Heo9363c382008-04-07 22:47:16 +09001621 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001622 * @ap: port to thaw
1623 *
Tejun Heo9363c382008-04-07 22:47:16 +09001624 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001625 *
1626 * LOCKING:
1627 * Inherited from caller.
1628 */
Tejun Heo9363c382008-04-07 22:47:16 +09001629void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001630{
1631 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001632 ap->ops->sff_check_status(ap);
1633 ap->ops->sff_irq_clear(ap);
1634 ap->ops->sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001635}
1636
1637/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001638 * ata_sff_prereset - prepare SFF link for reset
1639 * @link: SFF link to be reset
1640 * @deadline: deadline jiffies for the operation
1641 *
1642 * SFF link @link is about to be reset. Initialize it. It first
1643 * calls ata_std_prereset() and wait for !BSY if the port is
1644 * being softreset.
1645 *
1646 * LOCKING:
1647 * Kernel thread context (may sleep)
1648 *
1649 * RETURNS:
1650 * 0 on success, -errno otherwise.
1651 */
1652int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1653{
Tejun Heo0aa11132008-04-07 22:47:18 +09001654 struct ata_eh_context *ehc = &link->eh_context;
1655 int rc;
1656
1657 rc = ata_std_prereset(link, deadline);
1658 if (rc)
1659 return rc;
1660
1661 /* if we're about to do hardreset, nothing more to do */
1662 if (ehc->i.action & ATA_EH_HARDRESET)
1663 return 0;
1664
1665 /* wait for !BSY if we don't know that no device is attached */
1666 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001667 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001668 if (rc && rc != -ENODEV) {
1669 ata_link_printk(link, KERN_WARNING, "device not ready "
1670 "(errno=%d), forcing hardreset\n", rc);
1671 ehc->i.action |= ATA_EH_HARDRESET;
1672 }
1673 }
1674
1675 return 0;
1676}
1677
1678/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001679 * ata_devchk - PATA device presence detection
1680 * @ap: ATA channel to examine
1681 * @device: Device to examine (starting at zero)
1682 *
1683 * This technique was originally described in
1684 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1685 * later found its way into the ATA/ATAPI spec.
1686 *
1687 * Write a pattern to the ATA shadow registers,
1688 * and if a device is present, it will respond by
1689 * correctly storing and echoing back the
1690 * ATA shadow register contents.
1691 *
1692 * LOCKING:
1693 * caller.
1694 */
1695static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1696{
1697 struct ata_ioports *ioaddr = &ap->ioaddr;
1698 u8 nsect, lbal;
1699
Tejun Heo5682ed32008-04-07 22:47:16 +09001700 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001701
1702 iowrite8(0x55, ioaddr->nsect_addr);
1703 iowrite8(0xaa, ioaddr->lbal_addr);
1704
1705 iowrite8(0xaa, ioaddr->nsect_addr);
1706 iowrite8(0x55, ioaddr->lbal_addr);
1707
1708 iowrite8(0x55, ioaddr->nsect_addr);
1709 iowrite8(0xaa, ioaddr->lbal_addr);
1710
1711 nsect = ioread8(ioaddr->nsect_addr);
1712 lbal = ioread8(ioaddr->lbal_addr);
1713
1714 if ((nsect == 0x55) && (lbal == 0xaa))
1715 return 1; /* we found a device */
1716
1717 return 0; /* nothing found */
1718}
1719
1720/**
Tejun Heo9363c382008-04-07 22:47:16 +09001721 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001722 * @dev: ATA device to classify (starting at zero)
1723 * @present: device seems present
1724 * @r_err: Value of error register on completion
1725 *
1726 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1727 * an ATA/ATAPI-defined set of values is placed in the ATA
1728 * shadow registers, indicating the results of device detection
1729 * and diagnostics.
1730 *
1731 * Select the ATA device, and read the values from the ATA shadow
1732 * registers. Then parse according to the Error register value,
1733 * and the spec-defined values examined by ata_dev_classify().
1734 *
1735 * LOCKING:
1736 * caller.
1737 *
1738 * RETURNS:
1739 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1740 */
Tejun Heo9363c382008-04-07 22:47:16 +09001741unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001742 u8 *r_err)
1743{
1744 struct ata_port *ap = dev->link->ap;
1745 struct ata_taskfile tf;
1746 unsigned int class;
1747 u8 err;
1748
Tejun Heo5682ed32008-04-07 22:47:16 +09001749 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001750
1751 memset(&tf, 0, sizeof(tf));
1752
Tejun Heo5682ed32008-04-07 22:47:16 +09001753 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001754 err = tf.feature;
1755 if (r_err)
1756 *r_err = err;
1757
1758 /* see if device passed diags: continue and warn later */
1759 if (err == 0)
1760 /* diagnostic fail : do nothing _YET_ */
1761 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1762 else if (err == 1)
1763 /* do nothing */ ;
1764 else if ((dev->devno == 0) && (err == 0x81))
1765 /* do nothing */ ;
1766 else
1767 return ATA_DEV_NONE;
1768
1769 /* determine if device is ATA or ATAPI */
1770 class = ata_dev_classify(&tf);
1771
1772 if (class == ATA_DEV_UNKNOWN) {
1773 /* If the device failed diagnostic, it's likely to
1774 * have reported incorrect device signature too.
1775 * Assume ATA device if the device seems present but
1776 * device signature is invalid with diagnostic
1777 * failure.
1778 */
1779 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1780 class = ATA_DEV_ATA;
1781 else
1782 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001783 } else if ((class == ATA_DEV_ATA) &&
1784 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001785 class = ATA_DEV_NONE;
1786
1787 return class;
1788}
1789
Tejun Heo705e76b2008-04-07 22:47:19 +09001790/**
1791 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1792 * @link: SFF link which is just reset
1793 * @devmask: mask of present devices
1794 * @deadline: deadline jiffies for the operation
1795 *
1796 * Wait devices attached to SFF @link to become ready after
1797 * reset. It contains preceding 150ms wait to avoid accessing TF
1798 * status register too early.
1799 *
1800 * LOCKING:
1801 * Kernel thread context (may sleep).
1802 *
1803 * RETURNS:
1804 * 0 on success, -ENODEV if some or all of devices in @devmask
1805 * don't seem to exist. -errno on other errors.
1806 */
1807int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1808 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001809{
Tejun Heo705e76b2008-04-07 22:47:19 +09001810 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001811 struct ata_ioports *ioaddr = &ap->ioaddr;
1812 unsigned int dev0 = devmask & (1 << 0);
1813 unsigned int dev1 = devmask & (1 << 1);
1814 int rc, ret = 0;
1815
Tejun Heo705e76b2008-04-07 22:47:19 +09001816 msleep(ATA_WAIT_AFTER_RESET_MSECS);
1817
1818 /* always check readiness of the master device */
1819 rc = ata_sff_wait_ready(link, deadline);
1820 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1821 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001822 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001823 if (rc)
1824 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001825
1826 /* if device 1 was found in ata_devchk, wait for register
1827 * access briefly, then wait for BSY to clear.
1828 */
1829 if (dev1) {
1830 int i;
1831
Tejun Heo5682ed32008-04-07 22:47:16 +09001832 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001833
1834 /* Wait for register access. Some ATAPI devices fail
1835 * to set nsect/lbal after reset, so don't waste too
1836 * much time on it. We're gonna wait for !BSY anyway.
1837 */
1838 for (i = 0; i < 2; i++) {
1839 u8 nsect, lbal;
1840
1841 nsect = ioread8(ioaddr->nsect_addr);
1842 lbal = ioread8(ioaddr->lbal_addr);
1843 if ((nsect == 1) && (lbal == 1))
1844 break;
1845 msleep(50); /* give drive a breather */
1846 }
1847
Tejun Heo705e76b2008-04-07 22:47:19 +09001848 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001849 if (rc) {
1850 if (rc != -ENODEV)
1851 return rc;
1852 ret = rc;
1853 }
1854 }
1855
1856 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001857 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001858 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001859 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001860 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001861 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001862
1863 return ret;
1864}
1865
Tejun Heo624d5c52008-03-25 22:16:41 +09001866static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1867 unsigned long deadline)
1868{
1869 struct ata_ioports *ioaddr = &ap->ioaddr;
1870
1871 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
1872
1873 /* software reset. causes dev0 to be selected */
1874 iowrite8(ap->ctl, ioaddr->ctl_addr);
1875 udelay(20); /* FIXME: flush */
1876 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1877 udelay(20); /* FIXME: flush */
1878 iowrite8(ap->ctl, ioaddr->ctl_addr);
1879
Tejun Heo705e76b2008-04-07 22:47:19 +09001880 /* wait the port to become ready */
1881 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001882}
1883
1884/**
Tejun Heo9363c382008-04-07 22:47:16 +09001885 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09001886 * @link: ATA link to reset
1887 * @classes: resulting classes of attached devices
1888 * @deadline: deadline jiffies for the operation
1889 *
1890 * Reset host port using ATA SRST.
1891 *
1892 * LOCKING:
1893 * Kernel thread context (may sleep)
1894 *
1895 * RETURNS:
1896 * 0 on success, -errno otherwise.
1897 */
Tejun Heo9363c382008-04-07 22:47:16 +09001898int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09001899 unsigned long deadline)
1900{
1901 struct ata_port *ap = link->ap;
1902 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1903 unsigned int devmask = 0;
1904 int rc;
1905 u8 err;
1906
1907 DPRINTK("ENTER\n");
1908
1909 if (ata_link_offline(link)) {
1910 classes[0] = ATA_DEV_NONE;
1911 goto out;
1912 }
1913
1914 /* determine if device 0/1 are present */
1915 if (ata_devchk(ap, 0))
1916 devmask |= (1 << 0);
1917 if (slave_possible && ata_devchk(ap, 1))
1918 devmask |= (1 << 1);
1919
1920 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09001921 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001922
1923 /* issue bus reset */
1924 DPRINTK("about to softreset, devmask=%x\n", devmask);
1925 rc = ata_bus_softreset(ap, devmask, deadline);
1926 /* if link is occupied, -ENODEV too is an error */
1927 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
1928 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
1929 return rc;
1930 }
1931
1932 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09001933 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09001934 devmask & (1 << 0), &err);
1935 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09001936 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09001937 devmask & (1 << 1), &err);
1938
1939 out:
1940 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
1941 return 0;
1942}
1943
1944/**
Tejun Heo9363c382008-04-07 22:47:16 +09001945 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09001946 * @link: link to reset
1947 * @class: resulting class of attached device
1948 * @deadline: deadline jiffies for the operation
1949 *
1950 * SATA phy-reset host port using DET bits of SControl register,
1951 * wait for !BSY and classify the attached device.
1952 *
1953 * LOCKING:
1954 * Kernel thread context (may sleep)
1955 *
1956 * RETURNS:
1957 * 0 on success, -errno otherwise.
1958 */
Tejun Heo9363c382008-04-07 22:47:16 +09001959int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09001960 unsigned long deadline)
1961{
1962 struct ata_port *ap = link->ap;
1963 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
1964 int rc;
1965
1966 DPRINTK("ENTER\n");
1967
1968 /* do hardreset */
1969 rc = sata_link_hardreset(link, timing, deadline);
1970 if (rc) {
1971 ata_link_printk(link, KERN_ERR,
1972 "COMRESET failed (errno=%d)\n", rc);
1973 return rc;
1974 }
1975
1976 /* TODO: phy layer with polling, timeouts, etc. */
1977 if (ata_link_offline(link)) {
1978 *class = ATA_DEV_NONE;
1979 DPRINTK("EXIT, link offline\n");
1980 return 0;
1981 }
1982
Tejun Heo624d5c52008-03-25 22:16:41 +09001983 /* If PMP is supported, we have to do follow-up SRST. Note
1984 * that some PMPs don't send D2H Reg FIS after hardreset at
1985 * all if the first port is empty. Wait for it just for a
1986 * second and request follow-up SRST.
1987 */
1988 if (ap->flags & ATA_FLAG_PMP) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001989 ata_sff_wait_after_reset(link, 1, jiffies + HZ);
Tejun Heo624d5c52008-03-25 22:16:41 +09001990 return -EAGAIN;
1991 }
1992
Tejun Heo705e76b2008-04-07 22:47:19 +09001993 /* wait for the link to become online */
1994 rc = ata_sff_wait_after_reset(link, 1, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001995 /* link occupied, -ENODEV too is an error */
1996 if (rc) {
1997 ata_link_printk(link, KERN_ERR,
1998 "COMRESET failed (errno=%d)\n", rc);
1999 return rc;
2000 }
2001
Tejun Heo9363c382008-04-07 22:47:16 +09002002 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002003
2004 DPRINTK("EXIT, class=%u\n", *class);
2005 return 0;
2006}
2007
2008/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002009 * ata_sff_postreset - SFF postreset callback
2010 * @link: the target SFF ata_link
2011 * @classes: classes of attached devices
2012 *
2013 * This function is invoked after a successful reset. It first
2014 * calls ata_std_postreset() and performs SFF specific postreset
2015 * processing.
2016 *
2017 * LOCKING:
2018 * Kernel thread context (may sleep)
2019 */
2020void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2021{
2022 struct ata_port *ap = link->ap;
2023
2024 ata_std_postreset(link, classes);
2025
2026 /* is double-select really necessary? */
2027 if (classes[0] != ATA_DEV_NONE)
2028 ap->ops->sff_dev_select(ap, 1);
2029 if (classes[1] != ATA_DEV_NONE)
2030 ap->ops->sff_dev_select(ap, 0);
2031
2032 /* bail out if no device is present */
2033 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2034 DPRINTK("EXIT, no device\n");
2035 return;
2036 }
2037
2038 /* set up device control */
2039 if (ap->ioaddr.ctl_addr)
2040 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
2041}
2042
2043/**
Tejun Heo9363c382008-04-07 22:47:16 +09002044 * ata_sff_error_handler - Stock error handler for BMDMA controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002045 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002046 *
Tejun Heo9363c382008-04-07 22:47:16 +09002047 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002048 * PATA and SATA controllers. Many controllers should be able to
2049 * use this EH as-is or with some added handling before and
2050 * after.
2051 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002052 * LOCKING:
2053 * Kernel thread context (may sleep)
2054 */
Tejun Heo9363c382008-04-07 22:47:16 +09002055void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002056{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002057 ata_reset_fn_t softreset = ap->ops->softreset;
2058 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002059 struct ata_queued_cmd *qc;
2060 unsigned long flags;
2061 int thaw = 0;
2062
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002063 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002064 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2065 qc = NULL;
2066
2067 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -04002068 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002069
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002070 ap->hsm_task_state = HSM_ST_IDLE;
2071
Tejun Heoed82f962008-03-25 21:34:39 +09002072 if (ap->ioaddr.bmdma_addr &&
2073 qc && (qc->tf.protocol == ATA_PROT_DMA ||
Tejun Heo0dc36882007-12-18 16:34:43 -05002074 qc->tf.protocol == ATAPI_PROT_DMA)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002075 u8 host_stat;
2076
Robert Hancockfbbb2622006-10-27 19:08:41 -07002077 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002078
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002079 /* BMDMA controllers indicate host bus error by
2080 * setting DMA_ERR bit and timing out. As it wasn't
2081 * really a timeout event, adjust error mask and
2082 * cancel frozen state.
2083 */
Alan18d90de2007-01-24 11:42:38 +00002084 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002085 qc->err_mask = AC_ERR_HOST_BUS;
2086 thaw = 1;
2087 }
2088
2089 ap->ops->bmdma_stop(qc);
2090 }
2091
Tejun Heo9363c382008-04-07 22:47:16 +09002092 ata_sff_altstatus(ap);
Tejun Heo5682ed32008-04-07 22:47:16 +09002093 ap->ops->sff_check_status(ap);
2094 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002095
Jeff Garzikba6a1302006-06-22 23:46:10 -04002096 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002097
2098 if (thaw)
2099 ata_eh_thaw_port(ap);
2100
2101 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002102
Tejun Heo9363c382008-04-07 22:47:16 +09002103 /* ata_sff_softreset and sata_sff_hardreset are inherited to
Tejun Heoa1efdab2008-03-25 12:22:50 +09002104 * all SFF drivers from ata_sff_port_ops. Ignore softreset if
2105 * ctl isn't accessible. Ignore hardreset if SCR access isn't
2106 * available.
2107 */
Tejun Heo9363c382008-04-07 22:47:16 +09002108 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002109 softreset = NULL;
Tejun Heo9363c382008-04-07 22:47:16 +09002110 if (hardreset == sata_sff_hardreset && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002111 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002112
Tejun Heoa1efdab2008-03-25 12:22:50 +09002113 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2114 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002115}
2116
2117/**
Tejun Heo9363c382008-04-07 22:47:16 +09002118 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002119 * @qc: internal command to clean up
2120 *
2121 * LOCKING:
2122 * Kernel thread context (may sleep)
2123 */
Tejun Heo9363c382008-04-07 22:47:16 +09002124void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002125{
Alan61dd08c2007-01-25 15:09:05 +00002126 if (qc->ap->ioaddr.bmdma_addr)
2127 ata_bmdma_stop(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002128}
2129
Alan Coxd92e74d2007-06-07 16:19:15 +01002130/**
2131 * ata_sff_port_start - Set port up for dma.
2132 * @ap: Port to initialize
2133 *
2134 * Called just after data structures for each port are
2135 * initialized. Allocates space for PRD table if the device
2136 * is DMA capable SFF.
2137 *
2138 * May be used as the port_start() entry in ata_port_operations.
2139 *
2140 * LOCKING:
2141 * Inherited from caller.
2142 */
Alan Coxd92e74d2007-06-07 16:19:15 +01002143int ata_sff_port_start(struct ata_port *ap)
2144{
2145 if (ap->ioaddr.bmdma_addr)
2146 return ata_port_start(ap);
2147 return 0;
2148}
2149
Tejun Heo272f7882008-03-25 22:16:40 +09002150/**
Tejun Heo9363c382008-04-07 22:47:16 +09002151 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002152 * @ioaddr: IO address structure to be initialized
2153 *
2154 * Utility function which initializes data_addr, error_addr,
2155 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2156 * device_addr, status_addr, and command_addr to standard offsets
2157 * relative to cmd_addr.
2158 *
2159 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2160 */
Tejun Heo9363c382008-04-07 22:47:16 +09002161void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002162{
2163 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2164 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2165 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2166 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2167 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2168 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2169 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2170 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2171 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2172 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2173}
2174
Tejun Heo9363c382008-04-07 22:47:16 +09002175unsigned long ata_bmdma_mode_filter(struct ata_device *adev,
2176 unsigned long xfer_mask)
Tejun Heo071ce342008-03-25 22:16:42 +09002177{
2178 /* Filter out DMA modes if the device has been configured by
2179 the BIOS as PIO only */
2180
2181 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
2182 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2183 return xfer_mask;
2184}
2185
Tejun Heo624d5c52008-03-25 22:16:41 +09002186/**
Tejun Heo272f7882008-03-25 22:16:40 +09002187 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2188 * @qc: Info associated with this ATA transaction.
2189 *
2190 * LOCKING:
2191 * spin_lock_irqsave(host lock)
2192 */
2193void ata_bmdma_setup(struct ata_queued_cmd *qc)
2194{
2195 struct ata_port *ap = qc->ap;
2196 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2197 u8 dmactl;
2198
2199 /* load PRD table addr. */
2200 mb(); /* make sure PRD table writes are visible to controller */
2201 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2202
2203 /* specify data direction, triple-check start bit is clear */
2204 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2205 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2206 if (!rw)
2207 dmactl |= ATA_DMA_WR;
2208 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2209
2210 /* issue r/w command */
Tejun Heo5682ed32008-04-07 22:47:16 +09002211 ap->ops->sff_exec_command(ap, &qc->tf);
Tejun Heo272f7882008-03-25 22:16:40 +09002212}
2213
2214/**
2215 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2216 * @qc: Info associated with this ATA transaction.
2217 *
2218 * LOCKING:
2219 * spin_lock_irqsave(host lock)
2220 */
2221void ata_bmdma_start(struct ata_queued_cmd *qc)
2222{
2223 struct ata_port *ap = qc->ap;
2224 u8 dmactl;
2225
2226 /* start host DMA transaction */
2227 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2228 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2229
2230 /* Strictly, one may wish to issue an ioread8() here, to
2231 * flush the mmio write. However, control also passes
2232 * to the hardware at this point, and it will interrupt
2233 * us when we are to resume control. So, in effect,
2234 * we don't care when the mmio write flushes.
2235 * Further, a read of the DMA status register _immediately_
2236 * following the write may not be what certain flaky hardware
2237 * is expected, so I think it is best to not add a readb()
2238 * without first all the MMIO ATA cards/mobos.
2239 * Or maybe I'm just being paranoid.
2240 *
2241 * FIXME: The posting of this write means I/O starts are
2242 * unneccessarily delayed for MMIO
2243 */
2244}
2245
2246/**
2247 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2248 * @qc: Command we are ending DMA for
2249 *
2250 * Clears the ATA_DMA_START flag in the dma control register
2251 *
2252 * May be used as the bmdma_stop() entry in ata_port_operations.
2253 *
2254 * LOCKING:
2255 * spin_lock_irqsave(host lock)
2256 */
2257void ata_bmdma_stop(struct ata_queued_cmd *qc)
2258{
2259 struct ata_port *ap = qc->ap;
2260 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2261
2262 /* clear start/stop bit */
2263 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2264 mmio + ATA_DMA_CMD);
2265
2266 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
Tejun Heo9363c382008-04-07 22:47:16 +09002267 ata_sff_altstatus(ap); /* dummy read */
Tejun Heo272f7882008-03-25 22:16:40 +09002268}
2269
2270/**
2271 * ata_bmdma_status - Read PCI IDE BMDMA status
2272 * @ap: Port associated with this ATA transaction.
2273 *
2274 * Read and return BMDMA status register.
2275 *
2276 * May be used as the bmdma_status() entry in ata_port_operations.
2277 *
2278 * LOCKING:
2279 * spin_lock_irqsave(host lock)
2280 */
2281u8 ata_bmdma_status(struct ata_port *ap)
2282{
2283 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2284}
2285
2286/**
Tejun Heo624d5c52008-03-25 22:16:41 +09002287 * ata_bus_reset - reset host port and associated ATA channel
2288 * @ap: port to reset
2289 *
2290 * This is typically the first time we actually start issuing
2291 * commands to the ATA channel. We wait for BSY to clear, then
2292 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2293 * result. Determine what devices, if any, are on the channel
2294 * by looking at the device 0/1 error register. Look at the signature
2295 * stored in each device's taskfile registers, to determine if
2296 * the device is ATA or ATAPI.
2297 *
2298 * LOCKING:
2299 * PCI/etc. bus probe sem.
2300 * Obtains host lock.
2301 *
2302 * SIDE EFFECTS:
2303 * Sets ATA_FLAG_DISABLED if bus reset fails.
2304 *
2305 * DEPRECATED:
2306 * This function is only for drivers which still use old EH and
2307 * will be removed soon.
Tejun Heo272f7882008-03-25 22:16:40 +09002308 */
Tejun Heo624d5c52008-03-25 22:16:41 +09002309void ata_bus_reset(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +09002310{
Tejun Heo624d5c52008-03-25 22:16:41 +09002311 struct ata_device *device = ap->link.device;
2312 struct ata_ioports *ioaddr = &ap->ioaddr;
2313 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2314 u8 err;
2315 unsigned int dev0, dev1 = 0, devmask = 0;
2316 int rc;
2317
2318 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2319
2320 /* determine if device 0/1 are present */
2321 if (ap->flags & ATA_FLAG_SATA_RESET)
2322 dev0 = 1;
2323 else {
2324 dev0 = ata_devchk(ap, 0);
2325 if (slave_possible)
2326 dev1 = ata_devchk(ap, 1);
2327 }
2328
2329 if (dev0)
2330 devmask |= (1 << 0);
2331 if (dev1)
2332 devmask |= (1 << 1);
2333
2334 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002335 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002336
2337 /* issue bus reset */
2338 if (ap->flags & ATA_FLAG_SRST) {
2339 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
2340 if (rc && rc != -ENODEV)
2341 goto err_out;
2342 }
2343
2344 /*
2345 * determine by signature whether we have ATA or ATAPI devices
2346 */
Tejun Heo9363c382008-04-07 22:47:16 +09002347 device[0].class = ata_sff_dev_classify(&device[0], dev0, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002348 if ((slave_possible) && (err != 0x81))
Tejun Heo9363c382008-04-07 22:47:16 +09002349 device[1].class = ata_sff_dev_classify(&device[1], dev1, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002350
2351 /* is double-select really necessary? */
2352 if (device[1].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002353 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002354 if (device[0].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002355 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002356
2357 /* if no devices were detected, disable this port */
2358 if ((device[0].class == ATA_DEV_NONE) &&
2359 (device[1].class == ATA_DEV_NONE))
2360 goto err_out;
2361
2362 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2363 /* set up device control for ATA_FLAG_SATA_RESET */
2364 iowrite8(ap->ctl, ioaddr->ctl_addr);
2365 }
2366
2367 DPRINTK("EXIT\n");
2368 return;
2369
2370err_out:
2371 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2372 ata_port_disable(ap);
2373
2374 DPRINTK("EXIT\n");
Tejun Heo272f7882008-03-25 22:16:40 +09002375}
2376
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002377#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002378
Tejun Heo272f7882008-03-25 22:16:40 +09002379/**
Tejun Heo9363c382008-04-07 22:47:16 +09002380 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
Tejun Heo272f7882008-03-25 22:16:40 +09002381 * @pdev: PCI device
2382 *
2383 * Some PCI ATA devices report simplex mode but in fact can be told to
2384 * enter non simplex mode. This implements the necessary logic to
2385 * perform the task on such devices. Calling it on other devices will
2386 * have -undefined- behaviour.
2387 */
Tejun Heo9363c382008-04-07 22:47:16 +09002388int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
Alan4112e162007-01-08 12:10:05 +00002389{
Tejun Heo272f7882008-03-25 22:16:40 +09002390 unsigned long bmdma = pci_resource_start(pdev, 4);
2391 u8 simplex;
Jeff Garzika84471f2007-02-26 05:51:33 -05002392
Tejun Heo272f7882008-03-25 22:16:40 +09002393 if (bmdma == 0)
2394 return -ENOENT;
2395
2396 simplex = inb(bmdma + 0x02);
2397 outb(simplex & 0x60, bmdma + 0x02);
2398 simplex = inb(bmdma + 0x02);
2399 if (simplex & 0x80)
2400 return -EOPNOTSUPP;
2401 return 0;
2402}
2403
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002404/**
Tejun Heo9363c382008-04-07 22:47:16 +09002405 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
Tejun Heo0f834de2007-04-17 23:44:07 +09002406 * @host: target ATA host
2407 *
2408 * Acquire PCI BMDMA resources and initialize @host accordingly.
2409 *
2410 * LOCKING:
2411 * Inherited from calling layer (may sleep).
2412 *
2413 * RETURNS:
2414 * 0 on success, -errno otherwise.
2415 */
Tejun Heo9363c382008-04-07 22:47:16 +09002416int ata_pci_bmdma_init(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002417{
Tejun Heo0f834de2007-04-17 23:44:07 +09002418 struct device *gdev = host->dev;
2419 struct pci_dev *pdev = to_pci_dev(gdev);
2420 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002421
Alan Cox6fdc99a2007-07-26 18:41:30 +01002422 /* No BAR4 allocation: No DMA */
2423 if (pci_resource_start(pdev, 4) == 0)
2424 return 0;
2425
Tejun Heo0f834de2007-04-17 23:44:07 +09002426 /* TODO: If we get no DMA mask we should fall back to PIO */
2427 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
2428 if (rc)
2429 return rc;
2430 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
2431 if (rc)
2432 return rc;
2433
2434 /* request and iomap DMA region */
Tejun Heo35a10a82008-01-04 18:42:21 +09002435 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
Tejun Heo0f834de2007-04-17 23:44:07 +09002436 if (rc) {
2437 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
2438 return -ENOMEM;
2439 }
2440 host->iomap = pcim_iomap_table(pdev);
2441
Tejun Heo1626aeb2007-05-04 12:43:58 +02002442 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +09002443 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +09002444 void __iomem *bmdma = host->iomap[4] + 8 * i;
2445
2446 if (ata_port_is_dummy(ap))
2447 continue;
2448
Tejun Heo21b0ad42007-04-17 23:44:07 +09002449 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +09002450 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
2451 (ioread8(bmdma + 2) & 0x80))
2452 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heocbcdd872007-08-18 13:14:55 +09002453
2454 ata_port_desc(ap, "bmdma 0x%llx",
2455 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
Tejun Heo0d5ff562007-02-01 15:06:36 +09002456 }
2457
Tejun Heo0f834de2007-04-17 23:44:07 +09002458 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002459}
2460
Tejun Heo272f7882008-03-25 22:16:40 +09002461static int ata_resources_present(struct pci_dev *pdev, int port)
2462{
2463 int i;
2464
2465 /* Check the PCI resources for this channel are enabled */
2466 port = port * 2;
2467 for (i = 0; i < 2; i ++) {
2468 if (pci_resource_start(pdev, port + i) == 0 ||
2469 pci_resource_len(pdev, port + i) == 0)
2470 return 0;
2471 }
2472 return 1;
2473}
2474
Tejun Heod491b272007-04-17 23:44:07 +09002475/**
Tejun Heo9363c382008-04-07 22:47:16 +09002476 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002477 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002478 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002479 * Acquire native PCI ATA resources for @host and initialize the
2480 * first two ports of @host accordingly. Ports marked dummy are
2481 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002482 *
Tejun Heod583bc12007-07-04 18:02:07 +09002483 * Note that native PCI resources are valid even for legacy hosts
2484 * as we fix up pdev resources array early in boot, so this
2485 * function can be used for both native and legacy SFF hosts.
2486 *
Tejun Heod491b272007-04-17 23:44:07 +09002487 * LOCKING:
2488 * Inherited from calling layer (may sleep).
2489 *
2490 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002491 * 0 if at least one port is initialized, -ENODEV if no port is
2492 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002493 */
Tejun Heo9363c382008-04-07 22:47:16 +09002494int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002495{
2496 struct device *gdev = host->dev;
2497 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002498 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002499 int i, rc;
2500
Tejun Heod491b272007-04-17 23:44:07 +09002501 /* request, iomap BARs and init port addresses accordingly */
2502 for (i = 0; i < 2; i++) {
2503 struct ata_port *ap = host->ports[i];
2504 int base = i * 2;
2505 void __iomem * const *iomap;
2506
Tejun Heo1626aeb2007-05-04 12:43:58 +02002507 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002508 continue;
2509
Tejun Heo1626aeb2007-05-04 12:43:58 +02002510 /* Discard disabled ports. Some controllers show
2511 * their unused channels this way. Disabled ports are
2512 * made dummy.
2513 */
2514 if (!ata_resources_present(pdev, i)) {
2515 ap->ops = &ata_dummy_port_ops;
2516 continue;
2517 }
2518
Tejun Heo35a10a82008-01-04 18:42:21 +09002519 rc = pcim_iomap_regions(pdev, 0x3 << base,
2520 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002521 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002522 dev_printk(KERN_WARNING, gdev,
2523 "failed to request/iomap BARs for port %d "
2524 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002525 if (rc == -EBUSY)
2526 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002527 ap->ops = &ata_dummy_port_ops;
2528 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002529 }
2530 host->iomap = iomap = pcim_iomap_table(pdev);
2531
2532 ap->ioaddr.cmd_addr = iomap[base];
2533 ap->ioaddr.altstatus_addr =
2534 ap->ioaddr.ctl_addr = (void __iomem *)
2535 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002536 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002537
Tejun Heocbcdd872007-08-18 13:14:55 +09002538 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2539 (unsigned long long)pci_resource_start(pdev, base),
2540 (unsigned long long)pci_resource_start(pdev, base + 1));
2541
Tejun Heo1626aeb2007-05-04 12:43:58 +02002542 mask |= 1 << i;
2543 }
2544
2545 if (!mask) {
2546 dev_printk(KERN_ERR, gdev, "no available native port\n");
2547 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002548 }
2549
2550 return 0;
2551}
2552
Tejun Heo21b0ad42007-04-17 23:44:07 +09002553/**
Tejun Heo9363c382008-04-07 22:47:16 +09002554 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002555 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002556 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002557 * @r_host: out argument for the initialized ATA host
2558 *
2559 * Helper to allocate ATA host for @pdev, acquire all native PCI
2560 * resources and initialize it accordingly in one go.
2561 *
2562 * LOCKING:
2563 * Inherited from calling layer (may sleep).
2564 *
2565 * RETURNS:
2566 * 0 on success, -errno otherwise.
2567 */
Tejun Heo9363c382008-04-07 22:47:16 +09002568int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Tejun Heod583bc12007-07-04 18:02:07 +09002569 const struct ata_port_info * const * ppi,
2570 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002571{
2572 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002573 int rc;
2574
2575 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2576 return -ENOMEM;
2577
2578 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2579 if (!host) {
2580 dev_printk(KERN_ERR, &pdev->dev,
2581 "failed to allocate ATA host\n");
2582 rc = -ENOMEM;
2583 goto err_out;
2584 }
2585
Tejun Heo9363c382008-04-07 22:47:16 +09002586 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002587 if (rc)
2588 goto err_out;
2589
2590 /* init DMA related stuff */
Tejun Heo9363c382008-04-07 22:47:16 +09002591 rc = ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002592 if (rc)
2593 goto err_bmdma;
2594
2595 devres_remove_group(&pdev->dev, NULL);
2596 *r_host = host;
2597 return 0;
2598
2599 err_bmdma:
2600 /* This is necessary because PCI and iomap resources are
2601 * merged and releasing the top group won't release the
2602 * acquired resources if some of those have been acquired
2603 * before entering this function.
2604 */
2605 pcim_iounmap_regions(pdev, 0xf);
2606 err_out:
2607 devres_release_group(&pdev->dev, NULL);
2608 return rc;
2609}
2610
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002611/**
Tejun Heo9363c382008-04-07 22:47:16 +09002612 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002613 * @host: target SFF ATA host
2614 * @irq_handler: irq_handler used when requesting IRQ(s)
2615 * @sht: scsi_host_template to use when registering the host
2616 *
2617 * This is the counterpart of ata_host_activate() for SFF ATA
2618 * hosts. This separate helper is necessary because SFF hosts
2619 * use two separate interrupts in legacy mode.
2620 *
2621 * LOCKING:
2622 * Inherited from calling layer (may sleep).
2623 *
2624 * RETURNS:
2625 * 0 on success, -errno otherwise.
2626 */
Tejun Heo9363c382008-04-07 22:47:16 +09002627int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002628 irq_handler_t irq_handler,
2629 struct scsi_host_template *sht)
2630{
2631 struct device *dev = host->dev;
2632 struct pci_dev *pdev = to_pci_dev(dev);
2633 const char *drv_name = dev_driver_string(host->dev);
2634 int legacy_mode = 0, rc;
2635
2636 rc = ata_host_start(host);
2637 if (rc)
2638 return rc;
2639
2640 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2641 u8 tmp8, mask;
2642
2643 /* TODO: What if one channel is in native mode ... */
2644 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2645 mask = (1 << 2) | (1 << 0);
2646 if ((tmp8 & mask) != mask)
2647 legacy_mode = 1;
2648#if defined(CONFIG_NO_ATA_LEGACY)
2649 /* Some platforms with PCI limits cannot address compat
2650 port space. In that case we punt if their firmware has
2651 left a device in compatibility mode */
2652 if (legacy_mode) {
2653 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2654 return -EOPNOTSUPP;
2655 }
2656#endif
2657 }
2658
2659 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2660 return -ENOMEM;
2661
2662 if (!legacy_mode && pdev->irq) {
2663 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2664 IRQF_SHARED, drv_name, host);
2665 if (rc)
2666 goto out;
2667
2668 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
2669 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
2670 } else if (legacy_mode) {
2671 if (!ata_port_is_dummy(host->ports[0])) {
2672 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2673 irq_handler, IRQF_SHARED,
2674 drv_name, host);
2675 if (rc)
2676 goto out;
2677
2678 ata_port_desc(host->ports[0], "irq %d",
2679 ATA_PRIMARY_IRQ(pdev));
2680 }
2681
2682 if (!ata_port_is_dummy(host->ports[1])) {
2683 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2684 irq_handler, IRQF_SHARED,
2685 drv_name, host);
2686 if (rc)
2687 goto out;
2688
2689 ata_port_desc(host->ports[1], "irq %d",
2690 ATA_SECONDARY_IRQ(pdev));
2691 }
2692 }
2693
2694 rc = ata_host_register(host, sht);
2695 out:
2696 if (rc == 0)
2697 devres_remove_group(dev, NULL);
2698 else
2699 devres_release_group(dev, NULL);
2700
2701 return rc;
2702}
2703
2704/**
Tejun Heo9363c382008-04-07 22:47:16 +09002705 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002706 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002707 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002708 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002709 * @host_priv: host private_data
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002710 *
2711 * This is a helper function which can be called from a driver's
2712 * xxx_init_one() probe function if the hardware uses traditional
2713 * IDE taskfile registers.
2714 *
2715 * This function calls pci_enable_device(), reserves its register
2716 * regions, sets the dma mask, enables bus master mode, and calls
2717 * ata_device_add()
2718 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002719 * ASSUMPTION:
2720 * Nobody makes a single channel controller that appears solely as
2721 * the secondary legacy port on PCI.
2722 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002723 * LOCKING:
2724 * Inherited from PCI layer (may sleep).
2725 *
2726 * RETURNS:
2727 * Zero on success, negative on errno-based value on error.
2728 */
Tejun Heo9363c382008-04-07 22:47:16 +09002729int ata_pci_sff_init_one(struct pci_dev *pdev,
2730 const struct ata_port_info * const * ppi,
2731 struct scsi_host_template *sht, void *host_priv)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002732{
Tejun Heof0d36ef2007-01-20 16:00:28 +09002733 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002734 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09002735 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002736 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002737
2738 DPRINTK("ENTER\n");
2739
Tejun Heo1626aeb2007-05-04 12:43:58 +02002740 /* look up the first valid port_info */
2741 for (i = 0; i < 2 && ppi[i]; i++) {
2742 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
2743 pi = ppi[i];
2744 break;
2745 }
2746 }
2747
2748 if (!pi) {
2749 dev_printk(KERN_ERR, &pdev->dev,
2750 "no valid port_info specified\n");
2751 return -EINVAL;
2752 }
2753
Tejun Heof0d36ef2007-01-20 16:00:28 +09002754 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2755 return -ENOMEM;
2756
Tejun Heof0d36ef2007-01-20 16:00:28 +09002757 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002758 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002759 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002760
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002761 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09002762 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09002763 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002764 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09002765 host->private_data = host_priv;
Tejun Heod491b272007-04-17 23:44:07 +09002766
Tejun Heod491b272007-04-17 23:44:07 +09002767 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09002768 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002769 out:
2770 if (rc == 0)
2771 devres_remove_group(&pdev->dev, NULL);
2772 else
2773 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09002774
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002775 return rc;
2776}
2777
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002778#endif /* CONFIG_PCI */
2779
Tejun Heo624d5c52008-03-25 22:16:41 +09002780EXPORT_SYMBOL_GPL(ata_sff_port_ops);
2781EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
Tejun Heo9363c382008-04-07 22:47:16 +09002782EXPORT_SYMBOL_GPL(ata_sff_qc_prep);
2783EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep);
2784EXPORT_SYMBOL_GPL(ata_sff_dev_select);
2785EXPORT_SYMBOL_GPL(ata_sff_check_status);
2786EXPORT_SYMBOL_GPL(ata_sff_altstatus);
2787EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
2788EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
2789EXPORT_SYMBOL_GPL(ata_sff_tf_load);
2790EXPORT_SYMBOL_GPL(ata_sff_tf_read);
2791EXPORT_SYMBOL_GPL(ata_sff_exec_command);
2792EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
2793EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
2794EXPORT_SYMBOL_GPL(ata_sff_irq_on);
2795EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
2796EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
2797EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
2798EXPORT_SYMBOL_GPL(ata_sff_host_intr);
2799EXPORT_SYMBOL_GPL(ata_sff_interrupt);
2800EXPORT_SYMBOL_GPL(ata_sff_freeze);
2801EXPORT_SYMBOL_GPL(ata_sff_thaw);
2802EXPORT_SYMBOL_GPL(ata_sff_prereset);
2803EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
2804EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
2805EXPORT_SYMBOL_GPL(ata_sff_softreset);
2806EXPORT_SYMBOL_GPL(sata_sff_hardreset);
2807EXPORT_SYMBOL_GPL(ata_sff_postreset);
2808EXPORT_SYMBOL_GPL(ata_sff_error_handler);
2809EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
Tejun Heo624d5c52008-03-25 22:16:41 +09002810EXPORT_SYMBOL_GPL(ata_sff_port_start);
Tejun Heo9363c382008-04-07 22:47:16 +09002811EXPORT_SYMBOL_GPL(ata_sff_std_ports);
2812EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter);
Tejun Heo624d5c52008-03-25 22:16:41 +09002813EXPORT_SYMBOL_GPL(ata_bmdma_setup);
2814EXPORT_SYMBOL_GPL(ata_bmdma_start);
2815EXPORT_SYMBOL_GPL(ata_bmdma_stop);
2816EXPORT_SYMBOL_GPL(ata_bmdma_status);
2817EXPORT_SYMBOL_GPL(ata_bus_reset);
2818#ifdef CONFIG_PCI
Tejun Heo9363c382008-04-07 22:47:16 +09002819EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
2820EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
2821EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
2822EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
2823EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
2824EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Tejun Heo624d5c52008-03-25 22:16:41 +09002825#endif /* CONFIG_PCI */