Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-sa1100/assabet.c |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * |
| 6 | * This file contains all Assabet-specific tweaks. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/init.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/ioport.h> |
| 17 | #include <linux/serial_core.h> |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 18 | #include <linux/mfd/ucb1x00.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <linux/mtd/mtd.h> |
| 20 | #include <linux/mtd/partitions.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/mm.h> |
Bryan Wu | 18775a7 | 2012-03-14 02:22:03 +0800 | [diff] [blame] | 23 | #include <linux/leds.h> |
| 24 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 26 | #include <video/sa1100fb.h> |
| 27 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <asm/mach-types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <asm/setup.h> |
| 31 | #include <asm/page.h> |
Russell King | 74945c8 | 2006-03-16 14:44:36 +0000 | [diff] [blame] | 32 | #include <asm/pgtable-hwdef.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <asm/pgtable.h> |
| 34 | #include <asm/tlbflush.h> |
| 35 | |
| 36 | #include <asm/mach/arch.h> |
| 37 | #include <asm/mach/flash.h> |
| 38 | #include <asm/mach/irda.h> |
| 39 | #include <asm/mach/map.h> |
| 40 | #include <asm/mach/serial_sa1100.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 41 | #include <mach/assabet.h> |
Arnd Bergmann | a1fd844 | 2012-08-24 15:17:38 +0200 | [diff] [blame] | 42 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
Rob Herring | f314f33 | 2012-02-24 00:06:51 +0100 | [diff] [blame] | 43 | #include <mach/irqs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | |
| 45 | #include "generic.h" |
| 46 | |
| 47 | #define ASSABET_BCR_DB1110 \ |
Russell King | 7186fb9 | 2012-01-21 21:17:06 +0000 | [diff] [blame] | 48 | (ASSABET_BCR_SPK_OFF | \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ |
| 50 | ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ |
| 51 | ASSABET_BCR_IRDA_MD0) |
| 52 | |
| 53 | #define ASSABET_BCR_DB1111 \ |
Russell King | 7186fb9 | 2012-01-21 21:17:06 +0000 | [diff] [blame] | 54 | (ASSABET_BCR_SPK_OFF | \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ |
| 56 | ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ |
| 57 | ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \ |
| 58 | ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST) |
| 59 | |
| 60 | unsigned long SCR_value = ASSABET_SCR_INIT; |
| 61 | EXPORT_SYMBOL(SCR_value); |
| 62 | |
| 63 | static unsigned long BCR_value = ASSABET_BCR_DB1110; |
| 64 | |
| 65 | void ASSABET_BCR_frob(unsigned int mask, unsigned int val) |
| 66 | { |
| 67 | unsigned long flags; |
| 68 | |
| 69 | local_irq_save(flags); |
| 70 | BCR_value = (BCR_value & ~mask) | val; |
| 71 | ASSABET_BCR = BCR_value; |
| 72 | local_irq_restore(flags); |
| 73 | } |
| 74 | |
| 75 | EXPORT_SYMBOL(ASSABET_BCR_frob); |
| 76 | |
Russell King | 6ed3e2a | 2012-01-22 19:23:33 +0000 | [diff] [blame] | 77 | static void assabet_ucb1x00_reset(enum ucb1x00_reset state) |
| 78 | { |
| 79 | if (state == UCB_RST_PROBE) |
| 80 | ASSABET_BCR_set(ASSABET_BCR_CODEC_RST); |
| 81 | } |
| 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
| 84 | /* |
| 85 | * Assabet flash support code. |
| 86 | */ |
| 87 | |
| 88 | #ifdef ASSABET_REV_4 |
| 89 | /* |
| 90 | * Phase 4 Assabet has two 28F160B3 flash parts in bank 0: |
| 91 | */ |
| 92 | static struct mtd_partition assabet_partitions[] = { |
| 93 | { |
| 94 | .name = "bootloader", |
| 95 | .size = 0x00020000, |
| 96 | .offset = 0, |
| 97 | .mask_flags = MTD_WRITEABLE, |
| 98 | }, { |
| 99 | .name = "bootloader params", |
| 100 | .size = 0x00020000, |
| 101 | .offset = MTDPART_OFS_APPEND, |
| 102 | .mask_flags = MTD_WRITEABLE, |
| 103 | }, { |
| 104 | .name = "jffs", |
| 105 | .size = MTDPART_SIZ_FULL, |
| 106 | .offset = MTDPART_OFS_APPEND, |
| 107 | } |
| 108 | }; |
| 109 | #else |
| 110 | /* |
| 111 | * Phase 5 Assabet has two 28F128J3A flash parts in bank 0: |
| 112 | */ |
| 113 | static struct mtd_partition assabet_partitions[] = { |
| 114 | { |
| 115 | .name = "bootloader", |
| 116 | .size = 0x00040000, |
| 117 | .offset = 0, |
| 118 | .mask_flags = MTD_WRITEABLE, |
| 119 | }, { |
| 120 | .name = "bootloader params", |
| 121 | .size = 0x00040000, |
| 122 | .offset = MTDPART_OFS_APPEND, |
| 123 | .mask_flags = MTD_WRITEABLE, |
| 124 | }, { |
| 125 | .name = "jffs", |
| 126 | .size = MTDPART_SIZ_FULL, |
| 127 | .offset = MTDPART_OFS_APPEND, |
| 128 | } |
| 129 | }; |
| 130 | #endif |
| 131 | |
| 132 | static struct flash_platform_data assabet_flash_data = { |
| 133 | .map_name = "cfi_probe", |
| 134 | .parts = assabet_partitions, |
| 135 | .nr_parts = ARRAY_SIZE(assabet_partitions), |
| 136 | }; |
| 137 | |
| 138 | static struct resource assabet_flash_resources[] = { |
Russell King | a181099 | 2012-01-12 10:25:29 +0000 | [diff] [blame] | 139 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), |
| 140 | DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | |
| 144 | /* |
| 145 | * Assabet IrDA support code. |
| 146 | */ |
| 147 | |
| 148 | static int assabet_irda_set_power(struct device *dev, unsigned int state) |
| 149 | { |
| 150 | static unsigned int bcr_state[4] = { |
| 151 | ASSABET_BCR_IRDA_MD0, |
| 152 | ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, |
| 153 | ASSABET_BCR_IRDA_MD1, |
| 154 | 0 |
| 155 | }; |
| 156 | |
| 157 | if (state < 4) { |
| 158 | state = bcr_state[state]; |
| 159 | ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1| |
| 160 | ASSABET_BCR_IRDA_MD0)); |
| 161 | ASSABET_BCR_set(state); |
| 162 | } |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | static void assabet_irda_set_speed(struct device *dev, unsigned int speed) |
| 167 | { |
| 168 | if (speed < 4000000) |
| 169 | ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); |
| 170 | else |
| 171 | ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); |
| 172 | } |
| 173 | |
| 174 | static struct irda_platform_data assabet_irda_data = { |
| 175 | .set_power = assabet_irda_set_power, |
| 176 | .set_speed = assabet_irda_set_speed, |
| 177 | }; |
| 178 | |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 179 | static struct ucb1x00_plat_data assabet_ucb1x00_data = { |
Russell King | 6ed3e2a | 2012-01-22 19:23:33 +0000 | [diff] [blame] | 180 | .reset = assabet_ucb1x00_reset, |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 181 | .gpio_base = -1, |
| 182 | }; |
| 183 | |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 184 | static struct mcp_plat_data assabet_mcp_data = { |
| 185 | .mccr0 = MCCR0_ADM, |
| 186 | .sclk_rate = 11981000, |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 187 | .codec_pdata = &assabet_ucb1x00_data, |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 188 | }; |
| 189 | |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 190 | static void assabet_lcd_set_visual(u32 visual) |
| 191 | { |
| 192 | u_int is_true_color = visual == FB_VISUAL_TRUECOLOR; |
| 193 | |
| 194 | if (machine_is_assabet()) { |
| 195 | #if 1 // phase 4 or newer Assabet's |
| 196 | if (is_true_color) |
| 197 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 198 | else |
| 199 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 200 | #else |
| 201 | // older Assabet's |
| 202 | if (is_true_color) |
| 203 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 204 | else |
| 205 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 206 | #endif |
| 207 | } |
| 208 | } |
| 209 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 210 | #ifndef ASSABET_PAL_VIDEO |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 211 | static void assabet_lcd_backlight_power(int on) |
| 212 | { |
| 213 | if (on) |
| 214 | ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON); |
| 215 | else |
| 216 | ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); |
| 217 | } |
| 218 | |
| 219 | /* |
| 220 | * Turn on/off the backlight. When turning the backlight on, we wait |
| 221 | * 500us after turning it on so we don't cause the supplies to droop |
| 222 | * when we enable the LCD controller (and cause a hard reset.) |
| 223 | */ |
| 224 | static void assabet_lcd_power(int on) |
| 225 | { |
| 226 | if (on) { |
| 227 | ASSABET_BCR_set(ASSABET_BCR_LCD_ON); |
| 228 | udelay(500); |
| 229 | } else |
| 230 | ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); |
| 231 | } |
| 232 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 233 | /* |
| 234 | * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually |
| 235 | * takes an RGB666 signal, but we provide it with an RGB565 signal |
| 236 | * instead (def_rgb_16). |
| 237 | */ |
| 238 | static struct sa1100fb_mach_info lq039q2ds54_info = { |
| 239 | .pixclock = 171521, .bpp = 16, |
| 240 | .xres = 320, .yres = 240, |
| 241 | |
| 242 | .hsync_len = 5, .vsync_len = 1, |
| 243 | .left_margin = 61, .upper_margin = 3, |
| 244 | .right_margin = 9, .lower_margin = 0, |
| 245 | |
| 246 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 247 | |
| 248 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 249 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 250 | |
| 251 | .backlight_power = assabet_lcd_backlight_power, |
| 252 | .lcd_power = assabet_lcd_power, |
| 253 | .set_visual = assabet_lcd_set_visual, |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 254 | }; |
| 255 | #else |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 256 | static void assabet_pal_backlight_power(int on) |
| 257 | { |
| 258 | ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); |
| 259 | } |
| 260 | |
| 261 | static void assabet_pal_power(int on) |
| 262 | { |
| 263 | ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); |
| 264 | } |
| 265 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 266 | static struct sa1100fb_mach_info pal_info = { |
| 267 | .pixclock = 67797, .bpp = 16, |
| 268 | .xres = 640, .yres = 512, |
| 269 | |
| 270 | .hsync_len = 64, .vsync_len = 6, |
| 271 | .left_margin = 125, .upper_margin = 70, |
| 272 | .right_margin = 115, .lower_margin = 36, |
| 273 | |
| 274 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 275 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 276 | |
| 277 | .backlight_power = assabet_pal_backlight_power, |
| 278 | .lcd_power = assabet_pal_power, |
| 279 | .set_visual = assabet_lcd_set_visual, |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 280 | }; |
| 281 | #endif |
| 282 | |
Russell King | bab50a3 | 2012-01-26 11:50:23 +0000 | [diff] [blame] | 283 | #ifdef CONFIG_ASSABET_NEPONSET |
| 284 | static struct resource neponset_resources[] = { |
| 285 | DEFINE_RES_MEM(0x10000000, 0x08000000), |
| 286 | DEFINE_RES_MEM(0x18000000, 0x04000000), |
| 287 | DEFINE_RES_MEM(0x40000000, SZ_8K), |
| 288 | DEFINE_RES_IRQ(IRQ_GPIO25), |
| 289 | }; |
| 290 | #endif |
| 291 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | static void __init assabet_init(void) |
| 293 | { |
| 294 | /* |
| 295 | * Ensure that the power supply is in "high power" mode. |
| 296 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | GPSR = GPIO_GPIO16; |
Russell King | 4f592e6 | 2012-01-24 09:23:19 +0000 | [diff] [blame] | 298 | GPDR |= GPIO_GPIO16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | |
| 300 | /* |
| 301 | * Ensure that these pins are set as outputs and are driving |
| 302 | * logic 0. This ensures that we won't inadvertently toggle |
| 303 | * the WS latch in the CPLD, and we don't float causing |
| 304 | * excessive power drain. --rmk |
| 305 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; |
Russell King | 4f592e6 | 2012-01-24 09:23:19 +0000 | [diff] [blame] | 307 | GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | |
| 309 | /* |
Russell King | 49e01e3 | 2012-01-24 09:25:57 +0000 | [diff] [blame] | 310 | * Also set GPIO27 as an output; this is used to clock UART3 |
| 311 | * via the FPGA and as otherwise has no pullups or pulldowns, |
| 312 | * so stop it floating. |
| 313 | */ |
| 314 | GPCR = GPIO_GPIO27; |
| 315 | GPDR |= GPIO_GPIO27; |
| 316 | |
| 317 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | * Set up registers for sleep mode. |
| 319 | */ |
| 320 | PWER = PWER_GPIO0; |
| 321 | PGSR = 0; |
| 322 | PCFR = 0; |
| 323 | PSDR = 0; |
| 324 | PPDR |= PPC_TXD3 | PPC_TXD1; |
| 325 | PPSR |= PPC_TXD3 | PPC_TXD1; |
| 326 | |
Russell King | e36e26a | 2012-01-20 22:24:07 +0000 | [diff] [blame] | 327 | sa11x0_ppc_configure_mcp(); |
| 328 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | if (machine_has_neponset()) { |
| 330 | /* |
| 331 | * Angel sets this, but other bootloaders may not. |
| 332 | * |
| 333 | * This must precede any driver calls to BCR_set() |
| 334 | * or BCR_clear(). |
| 335 | */ |
| 336 | ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111; |
| 337 | |
| 338 | #ifndef CONFIG_ASSABET_NEPONSET |
| 339 | printk( "Warning: Neponset detected but full support " |
| 340 | "hasn't been configured in the kernel\n" ); |
Russell King | bab50a3 | 2012-01-26 11:50:23 +0000 | [diff] [blame] | 341 | #else |
| 342 | platform_device_register_simple("neponset", 0, |
| 343 | neponset_resources, ARRAY_SIZE(neponset_resources)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | #endif |
| 345 | } |
| 346 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 347 | #ifndef ASSABET_PAL_VIDEO |
| 348 | sa11x0_register_lcd(&lq039q2ds54_info); |
| 349 | #else |
| 350 | sa11x0_register_lcd(&pal_video); |
| 351 | #endif |
Russell King | 7a5b4e1 | 2009-10-06 14:55:53 +0100 | [diff] [blame] | 352 | sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, |
| 353 | ARRAY_SIZE(assabet_flash_resources)); |
| 354 | sa11x0_register_irda(&assabet_irda_data); |
| 355 | sa11x0_register_mcp(&assabet_mcp_data); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | /* |
| 359 | * On Assabet, we must probe for the Neponset board _before_ |
| 360 | * paging_init() has occurred to actually determine the amount |
| 361 | * of RAM available. To do so, we map the appropriate IO section |
| 362 | * in the page table here in order to access GPIO registers. |
| 363 | */ |
| 364 | static void __init map_sa1100_gpio_regs( void ) |
| 365 | { |
| 366 | unsigned long phys = __PREG(GPLR) & PMD_MASK; |
Russell King | 3169663 | 2012-06-06 11:42:36 +0100 | [diff] [blame] | 367 | unsigned long virt = (unsigned long)io_p2v(phys); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); |
| 369 | pmd_t *pmd; |
| 370 | |
Russell King | a61c233 | 2012-01-14 16:10:53 +0000 | [diff] [blame] | 371 | pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | *pmd = __pmd(phys | prot); |
| 373 | flush_pmd_entry(pmd); |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * Read System Configuration "Register" |
| 378 | * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board |
| 379 | * User's Guide", section 4.4.1) |
| 380 | * |
| 381 | * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S |
| 382 | * to set up the serial port for decompression status messages. We |
| 383 | * repeat it here because the kernel may not be loaded as a zImage, and |
| 384 | * also because it's a hassle to communicate the SCR value to the kernel |
| 385 | * from the decompressor. |
| 386 | * |
| 387 | * Note that IRQs are guaranteed to be disabled. |
| 388 | */ |
| 389 | static void __init get_assabet_scr(void) |
| 390 | { |
Arnd Bergmann | c6e9fbb | 2012-04-30 12:41:21 +0000 | [diff] [blame] | 391 | unsigned long uninitialized_var(scr), i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 392 | |
| 393 | GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ |
| 394 | GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ |
| 395 | GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ |
Russell King | 2f3eca8 | 2005-11-21 17:01:13 +0000 | [diff] [blame] | 396 | for(i = 100; i--; ) /* Read GPIO 9:2 */ |
| 397 | scr = GPLR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 398 | GPDR |= 0x3fc; /* restore correct pin direction */ |
| 399 | scr &= 0x3fc; /* save as system configuration byte. */ |
| 400 | SCR_value = scr; |
| 401 | } |
| 402 | |
| 403 | static void __init |
Russell King | 0744a3e | 2010-12-20 10:37:50 +0000 | [diff] [blame] | 404 | fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | { |
| 406 | /* This must be done before any call to machine_has_neponset() */ |
| 407 | map_sa1100_gpio_regs(); |
| 408 | get_assabet_scr(); |
| 409 | |
| 410 | if (machine_has_neponset()) |
| 411 | printk("Neponset expansion board detected\n"); |
| 412 | } |
| 413 | |
| 414 | |
| 415 | static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate) |
| 416 | { |
| 417 | if (port->mapbase == _Ser1UTCR0) { |
| 418 | if (state) |
| 419 | ASSABET_BCR_clear(ASSABET_BCR_RS232EN | |
| 420 | ASSABET_BCR_COM_RTS | |
| 421 | ASSABET_BCR_COM_DTR); |
| 422 | else |
| 423 | ASSABET_BCR_set(ASSABET_BCR_RS232EN | |
| 424 | ASSABET_BCR_COM_RTS | |
| 425 | ASSABET_BCR_COM_DTR); |
| 426 | } |
| 427 | } |
| 428 | |
| 429 | /* |
| 430 | * Assabet uses COM_RTS and COM_DTR for both UART1 (com port) |
| 431 | * and UART3 (radio module). We only handle them for UART1 here. |
| 432 | */ |
| 433 | static void assabet_set_mctrl(struct uart_port *port, u_int mctrl) |
| 434 | { |
| 435 | if (port->mapbase == _Ser1UTCR0) { |
| 436 | u_int set = 0, clear = 0; |
| 437 | |
| 438 | if (mctrl & TIOCM_RTS) |
| 439 | clear |= ASSABET_BCR_COM_RTS; |
| 440 | else |
| 441 | set |= ASSABET_BCR_COM_RTS; |
| 442 | |
| 443 | if (mctrl & TIOCM_DTR) |
| 444 | clear |= ASSABET_BCR_COM_DTR; |
| 445 | else |
| 446 | set |= ASSABET_BCR_COM_DTR; |
| 447 | |
| 448 | ASSABET_BCR_clear(clear); |
| 449 | ASSABET_BCR_set(set); |
| 450 | } |
| 451 | } |
| 452 | |
| 453 | static u_int assabet_get_mctrl(struct uart_port *port) |
| 454 | { |
| 455 | u_int ret = 0; |
| 456 | u_int bsr = ASSABET_BSR; |
| 457 | |
| 458 | /* need 2 reads to read current value */ |
| 459 | bsr = ASSABET_BSR; |
| 460 | |
| 461 | if (port->mapbase == _Ser1UTCR0) { |
| 462 | if (bsr & ASSABET_BSR_COM_DCD) |
| 463 | ret |= TIOCM_CD; |
| 464 | if (bsr & ASSABET_BSR_COM_CTS) |
| 465 | ret |= TIOCM_CTS; |
| 466 | if (bsr & ASSABET_BSR_COM_DSR) |
| 467 | ret |= TIOCM_DSR; |
| 468 | } else if (port->mapbase == _Ser3UTCR0) { |
| 469 | if (bsr & ASSABET_BSR_RAD_DCD) |
| 470 | ret |= TIOCM_CD; |
| 471 | if (bsr & ASSABET_BSR_RAD_CTS) |
| 472 | ret |= TIOCM_CTS; |
| 473 | if (bsr & ASSABET_BSR_RAD_DSR) |
| 474 | ret |= TIOCM_DSR; |
| 475 | if (bsr & ASSABET_BSR_RAD_RI) |
| 476 | ret |= TIOCM_RI; |
| 477 | } else { |
| 478 | ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; |
| 479 | } |
| 480 | |
| 481 | return ret; |
| 482 | } |
| 483 | |
| 484 | static struct sa1100_port_fns assabet_port_fns __initdata = { |
| 485 | .set_mctrl = assabet_set_mctrl, |
| 486 | .get_mctrl = assabet_get_mctrl, |
| 487 | .pm = assabet_uart_pm, |
| 488 | }; |
| 489 | |
| 490 | static struct map_desc assabet_io_desc[] __initdata = { |
Deepak Saxena | 92519d8 | 2005-10-28 15:19:04 +0100 | [diff] [blame] | 491 | { /* Board Control Register */ |
| 492 | .virtual = 0xf1000000, |
| 493 | .pfn = __phys_to_pfn(0x12000000), |
| 494 | .length = 0x00100000, |
| 495 | .type = MT_DEVICE |
| 496 | }, { /* MQ200 */ |
| 497 | .virtual = 0xf2800000, |
| 498 | .pfn = __phys_to_pfn(0x4b800000), |
| 499 | .length = 0x00800000, |
| 500 | .type = MT_DEVICE |
| 501 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | }; |
| 503 | |
| 504 | static void __init assabet_map_io(void) |
| 505 | { |
| 506 | sa1100_map_io(); |
| 507 | iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc)); |
| 508 | |
| 509 | /* |
| 510 | * Set SUS bit in SDCR0 so serial port 1 functions. |
| 511 | * Its called GPCLKR0 in my SA1110 manual. |
| 512 | */ |
| 513 | Ser1SDCR0 |= SDCR0_SUS; |
| 514 | |
Russell King | 374da9d | 2012-03-25 23:54:16 +0100 | [diff] [blame] | 515 | if (!machine_has_neponset()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | sa1100_register_uart_fns(&assabet_port_fns); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | |
| 518 | /* |
| 519 | * When Neponset is attached, the first UART should be |
| 520 | * UART3. That's what Angel is doing and many documents |
| 521 | * are stating this. |
| 522 | * |
| 523 | * We do the Neponset mapping even if Neponset support |
| 524 | * isn't compiled in so the user will still get something on |
| 525 | * the expected physical serial port. |
| 526 | * |
| 527 | * We no longer do this; not all boot loaders support it, |
| 528 | * and UART3 appears to be somewhat unreliable with blob. |
| 529 | */ |
| 530 | sa1100_register_uart(0, 1); |
| 531 | sa1100_register_uart(2, 3); |
| 532 | } |
| 533 | |
Bryan Wu | 18775a7 | 2012-03-14 02:22:03 +0800 | [diff] [blame] | 534 | /* LEDs */ |
| 535 | #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) |
| 536 | struct assabet_led { |
| 537 | struct led_classdev cdev; |
| 538 | u32 mask; |
| 539 | }; |
| 540 | |
| 541 | /* |
| 542 | * The triggers lines up below will only be used if the |
| 543 | * LED triggers are compiled in. |
| 544 | */ |
| 545 | static const struct { |
| 546 | const char *name; |
| 547 | const char *trigger; |
| 548 | } assabet_leds[] = { |
| 549 | { "assabet:red", "cpu0",}, |
| 550 | { "assabet:green", "heartbeat", }, |
| 551 | }; |
| 552 | |
| 553 | /* |
| 554 | * The LED control in Assabet is reversed: |
| 555 | * - setting bit means turn off LED |
| 556 | * - clearing bit means turn on LED |
| 557 | */ |
| 558 | static void assabet_led_set(struct led_classdev *cdev, |
| 559 | enum led_brightness b) |
| 560 | { |
| 561 | struct assabet_led *led = container_of(cdev, |
| 562 | struct assabet_led, cdev); |
| 563 | |
| 564 | if (b != LED_OFF) |
| 565 | ASSABET_BCR_clear(led->mask); |
| 566 | else |
| 567 | ASSABET_BCR_set(led->mask); |
| 568 | } |
| 569 | |
| 570 | static enum led_brightness assabet_led_get(struct led_classdev *cdev) |
| 571 | { |
| 572 | struct assabet_led *led = container_of(cdev, |
| 573 | struct assabet_led, cdev); |
| 574 | |
| 575 | return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL; |
| 576 | } |
| 577 | |
| 578 | static int __init assabet_leds_init(void) |
| 579 | { |
| 580 | int i; |
| 581 | |
| 582 | if (!machine_is_assabet()) |
| 583 | return -ENODEV; |
| 584 | |
| 585 | for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) { |
| 586 | struct assabet_led *led; |
| 587 | |
| 588 | led = kzalloc(sizeof(*led), GFP_KERNEL); |
| 589 | if (!led) |
| 590 | break; |
| 591 | |
| 592 | led->cdev.name = assabet_leds[i].name; |
| 593 | led->cdev.brightness_set = assabet_led_set; |
| 594 | led->cdev.brightness_get = assabet_led_get; |
| 595 | led->cdev.default_trigger = assabet_leds[i].trigger; |
| 596 | |
| 597 | if (!i) |
| 598 | led->mask = ASSABET_BCR_LED_RED; |
| 599 | else |
| 600 | led->mask = ASSABET_BCR_LED_GREEN; |
| 601 | |
| 602 | if (led_classdev_register(NULL, &led->cdev) < 0) { |
| 603 | kfree(led); |
| 604 | break; |
| 605 | } |
| 606 | } |
| 607 | |
| 608 | return 0; |
| 609 | } |
| 610 | |
| 611 | /* |
| 612 | * Since we may have triggers on any subsystem, defer registration |
| 613 | * until after subsystem_init. |
| 614 | */ |
| 615 | fs_initcall(assabet_leds_init); |
| 616 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | |
| 618 | MACHINE_START(ASSABET, "Intel-Assabet") |
Nicolas Pitre | 17f4425 | 2011-07-05 22:38:17 -0400 | [diff] [blame] | 619 | .atag_offset = 0x100, |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 620 | .fixup = fixup_assabet, |
| 621 | .map_io = assabet_map_io, |
Rob Herring | f314f33 | 2012-02-24 00:06:51 +0100 | [diff] [blame] | 622 | .nr_irqs = SA1100_NR_IRQS, |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 623 | .init_irq = sa1100_init_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | .timer = &sa1100_timer, |
| 625 | .init_machine = assabet_init, |
Shawn Guo | 7fea1ba | 2012-04-26 21:22:45 +0800 | [diff] [blame] | 626 | .init_late = sa11x0_init_late, |
Nicolas Pitre | e9107ab | 2011-07-05 22:28:09 -0400 | [diff] [blame] | 627 | #ifdef CONFIG_SA1111 |
| 628 | .dma_zone_size = SZ_1M, |
| 629 | #endif |
Russell King | d9ca583 | 2011-11-05 10:28:50 +0000 | [diff] [blame] | 630 | .restart = sa11x0_restart, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | MACHINE_END |