blob: 92d1b2e312d4076af8ceaef762f75744585d6da0 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Tomas Winkler82b9a122008-03-04 18:09:30 -080049#include "iwl-3945-core.h"
Zhu Yib481de92007-09-25 17:54:57 -070050#include "iwl-3945.h"
51#include "iwl-helpers.h"
52
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080053#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080054u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070055#endif
56
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080057static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080059
Zhu Yib481de92007-09-25 17:54:57 -070060/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080067static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080070static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080071int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
Ron Rindjunskydfe7d452008-04-15 16:01:45 -070073int iwl3945_param_queues_num = IWL39_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070074
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION \
81"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080083#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070084#define VD "d"
85#else
86#define VD
87#endif
88
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080089#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070090#define VS "s"
91#else
92#define VS
93#endif
94
Reinette Chatreb9e0b442008-02-08 16:39:11 -080095#define IWLWIFI_VERSION "1.2.26k" VD VS
Reinette Chatreeb7ae892008-03-11 16:17:17 -070096#define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
Zhu Yib481de92007-09-25 17:54:57 -070097#define DRV_VERSION IWLWIFI_VERSION
98
Zhu Yib481de92007-09-25 17:54:57 -070099
100MODULE_DESCRIPTION(DRV_DESCRIPTION);
101MODULE_VERSION(DRV_VERSION);
102MODULE_AUTHOR(DRV_COPYRIGHT);
103MODULE_LICENSE("GPL");
104
Johannes Berg8318d782008-01-24 19:38:38 +0100105static const struct ieee80211_supported_band *iwl3945_get_band(
106 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700107{
Johannes Berg8318d782008-01-24 19:38:38 +0100108 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700109}
110
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800111static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700112{
113 /* Single white space is for Linksys APs */
114 if (essid_len == 1 && essid[0] == ' ')
115 return 1;
116
117 /* Otherwise, if the entire essid is 0, we assume it is hidden */
118 while (essid_len) {
119 essid_len--;
120 if (essid[essid_len] != '\0')
121 return 0;
122 }
123
124 return 1;
125}
126
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800127static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700128{
129 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
130 const char *s = essid;
131 char *d = escaped;
132
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800133 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700134 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
135 return escaped;
136 }
137
138 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
139 while (essid_len--) {
140 if (*s == '\0') {
141 *d++ = '\\';
142 *d++ = '0';
143 s++;
144 } else
145 *d++ = *s++;
146 }
147 *d = '\0';
148 return escaped;
149}
150
Zhu Yib481de92007-09-25 17:54:57 -0700151/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
152 * DMA services
153 *
154 * Theory of operation
155 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800156 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
157 * of buffer descriptors, each of which points to one or more data buffers for
158 * the device to read from or fill. Driver and device exchange status of each
159 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
160 * entries in each circular buffer, to protect against confusing empty and full
161 * queue states.
162 *
163 * The device reads or writes the data in the queues via the device's several
164 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700165 *
166 * For Tx queue, there are low mark and high mark limits. If, after queuing
167 * the packet for Tx, free space become < low mark, Tx queue stopped. When
168 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
169 * Tx queue resumed.
170 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800171 * The 3945 operates with six queues: One receive queue, one transmit queue
172 * (#4) for sending commands to the device firmware, and four transmit queues
173 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700174 ***************************************************/
175
Tomas Winklerc54b6792008-03-06 17:36:53 -0800176int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700177{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800178 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700179
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800180 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700181 s -= q->n_bd;
182
183 if (s <= 0)
184 s += q->n_window;
185 /* keep some reserve to not confuse empty and full situations */
186 s -= 2;
187 if (s < 0)
188 s = 0;
189 return s;
190}
191
Tomas Winklerc54b6792008-03-06 17:36:53 -0800192int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700193{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800194 return q->write_ptr > q->read_ptr ?
195 (i >= q->read_ptr && i < q->write_ptr) :
196 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700197}
198
Tomas Winklerc54b6792008-03-06 17:36:53 -0800199
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800200static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700201{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800202 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700203 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800204 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700205
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800206 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700207 return index & (q->n_window - 1);
208}
209
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800210/**
211 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
212 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800213static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700214 int count, int slots_num, u32 id)
215{
216 q->n_bd = count;
217 q->n_window = slots_num;
218 q->id = id;
219
Tomas Winklerc54b6792008-03-06 17:36:53 -0800220 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
221 * and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700222 BUG_ON(!is_power_of_2(count));
223
224 /* slots_num must be power-of-two size, otherwise
225 * get_cmd_index is broken. */
226 BUG_ON(!is_power_of_2(slots_num));
227
228 q->low_mark = q->n_window / 4;
229 if (q->low_mark < 4)
230 q->low_mark = 4;
231
232 q->high_mark = q->n_window / 8;
233 if (q->high_mark < 2)
234 q->high_mark = 2;
235
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800236 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700237
238 return 0;
239}
240
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800241/**
242 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
243 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800244static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
245 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700246{
247 struct pci_dev *dev = priv->pci_dev;
248
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800249 /* Driver private data, only for Tx (not command) queues,
250 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700251 if (id != IWL_CMD_QUEUE_NUM) {
252 txq->txb = kmalloc(sizeof(txq->txb[0]) *
253 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
254 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800255 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700256 "structures failed\n");
257 goto error;
258 }
259 } else
260 txq->txb = NULL;
261
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800262 /* Circular buffer of transmit frame descriptors (TFDs),
263 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700264 txq->bd = pci_alloc_consistent(dev,
265 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
266 &txq->q.dma_addr);
267
268 if (!txq->bd) {
269 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
270 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
271 goto error;
272 }
273 txq->q.id = id;
274
275 return 0;
276
277 error:
278 if (txq->txb) {
279 kfree(txq->txb);
280 txq->txb = NULL;
281 }
282
283 return -ENOMEM;
284}
285
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800286/**
287 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
288 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800289int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
290 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700291{
292 struct pci_dev *dev = priv->pci_dev;
293 int len;
294 int rc = 0;
295
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800296 /*
297 * Alloc buffer array for commands (Tx or other types of commands).
298 * For the command queue (#4), allocate command space + one big
299 * command for scan, since scan command is very huge; the system will
300 * not have two scans at the same time, so only one is needed.
301 * For data Tx queues (all other queues), no super-size command
302 * space is needed.
303 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800304 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700305 if (txq_id == IWL_CMD_QUEUE_NUM)
306 len += IWL_MAX_SCAN_SIZE;
307 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
308 if (!txq->cmd)
309 return -ENOMEM;
310
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800311 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800312 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700313 if (rc) {
314 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
315
316 return -ENOMEM;
317 }
318 txq->need_update = 0;
319
320 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Tomas Winklerc54b6792008-03-06 17:36:53 -0800321 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700322 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800323
324 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800325 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700326
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800327 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800328 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700329
330 return 0;
331}
332
333/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800334 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700335 * @txq: Transmit queue to deallocate.
336 *
337 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800338 * Free all buffers.
339 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700340 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800341void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700342{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800343 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700344 struct pci_dev *dev = priv->pci_dev;
345 int len;
346
347 if (q->n_bd == 0)
348 return;
349
350 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800351 for (; q->write_ptr != q->read_ptr;
Tomas Winklerc54b6792008-03-06 17:36:53 -0800352 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800353 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700354
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800355 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700356 if (q->id == IWL_CMD_QUEUE_NUM)
357 len += IWL_MAX_SCAN_SIZE;
358
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800359 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700360 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
361
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800362 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700363 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800364 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700365 txq->q.n_bd, txq->bd, txq->q.dma_addr);
366
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800367 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700368 if (txq->txb) {
369 kfree(txq->txb);
370 txq->txb = NULL;
371 }
372
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800373 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700374 memset(txq, 0, sizeof(*txq));
375}
376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800377const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700378
379/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800380 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700381 * the functionality provided here
382 */
383
384/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800385#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800386/**
387 * iwl3945_remove_station - Remove driver's knowledge of station.
388 *
389 * NOTE: This does not remove station from device's station table.
390 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800391static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700392{
393 int index = IWL_INVALID_STATION;
394 int i;
395 unsigned long flags;
396
397 spin_lock_irqsave(&priv->sta_lock, flags);
398
399 if (is_ap)
400 index = IWL_AP_ID;
401 else if (is_broadcast_ether_addr(addr))
402 index = priv->hw_setting.bcast_sta_id;
403 else
404 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
405 if (priv->stations[i].used &&
406 !compare_ether_addr(priv->stations[i].sta.sta.addr,
407 addr)) {
408 index = i;
409 break;
410 }
411
412 if (unlikely(index == IWL_INVALID_STATION))
413 goto out;
414
415 if (priv->stations[index].used) {
416 priv->stations[index].used = 0;
417 priv->num_stations--;
418 }
419
420 BUG_ON(priv->num_stations < 0);
421
422out:
423 spin_unlock_irqrestore(&priv->sta_lock, flags);
424 return 0;
425}
Zhu Yi556f8db2007-09-27 11:27:33 +0800426#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800427
428/**
429 * iwl3945_clear_stations_table - Clear the driver's station table
430 *
431 * NOTE: This does not clear or otherwise alter the device's station table.
432 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800433static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700434{
435 unsigned long flags;
436
437 spin_lock_irqsave(&priv->sta_lock, flags);
438
439 priv->num_stations = 0;
440 memset(priv->stations, 0, sizeof(priv->stations));
441
442 spin_unlock_irqrestore(&priv->sta_lock, flags);
443}
444
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800445/**
446 * iwl3945_add_station - Add station to station tables in driver and device
447 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800448u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700449{
450 int i;
451 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800452 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700453 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700454 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800455 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700456
457 spin_lock_irqsave(&priv->sta_lock, flags_spin);
458 if (is_ap)
459 index = IWL_AP_ID;
460 else if (is_broadcast_ether_addr(addr))
461 index = priv->hw_setting.bcast_sta_id;
462 else
463 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
464 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
465 addr)) {
466 index = i;
467 break;
468 }
469
470 if (!priv->stations[i].used &&
471 index == IWL_INVALID_STATION)
472 index = i;
473 }
474
Ian Schram01ebd062007-10-25 17:15:22 +0800475 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700476 since they have different meaning */
477 if (unlikely(index == IWL_INVALID_STATION)) {
478 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
479 return index;
480 }
481
482 if (priv->stations[index].used &&
483 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
484 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
485 return index;
486 }
487
Joe Perches0795af52007-10-03 17:59:30 -0700488 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700489 station = &priv->stations[index];
490 station->used = 1;
491 priv->num_stations++;
492
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800493 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800494 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700495 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
496 station->sta.mode = 0;
497 station->sta.sta.sta_id = index;
498 station->sta.station_flags = 0;
499
Johannes Berg8318d782008-01-24 19:38:38 +0100500 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800501 rate = IWL_RATE_6M_PLCP;
502 else
503 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800504
505 /* Turn on both antennas for the station... */
506 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800507 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800508 station->current_rate.rate_n_flags =
509 le16_to_cpu(station->sta.rate_n_flags);
510
Zhu Yib481de92007-09-25 17:54:57 -0700511 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800512
513 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800514 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700515 return index;
516
517}
518
519/*************** DRIVER STATUS FUNCTIONS *****/
520
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800521static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700522{
523 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
524 * set but EXIT_PENDING is not */
525 return test_bit(STATUS_READY, &priv->status) &&
526 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
527 !test_bit(STATUS_EXIT_PENDING, &priv->status);
528}
529
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800530static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700531{
532 return test_bit(STATUS_ALIVE, &priv->status);
533}
534
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800535static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700536{
537 return test_bit(STATUS_INIT, &priv->status);
538}
539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800540static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700541{
542 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
543 test_bit(STATUS_RF_KILL_SW, &priv->status);
544}
545
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800546static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700547{
548
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800549 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700550 return 0;
551
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800552 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700553}
554
555/*************** HOST COMMAND QUEUE FUNCTIONS *****/
556
557#define IWL_CMD(x) case x : return #x
558
559static const char *get_cmd_string(u8 cmd)
560{
561 switch (cmd) {
562 IWL_CMD(REPLY_ALIVE);
563 IWL_CMD(REPLY_ERROR);
564 IWL_CMD(REPLY_RXON);
565 IWL_CMD(REPLY_RXON_ASSOC);
566 IWL_CMD(REPLY_QOS_PARAM);
567 IWL_CMD(REPLY_RXON_TIMING);
568 IWL_CMD(REPLY_ADD_STA);
569 IWL_CMD(REPLY_REMOVE_STA);
570 IWL_CMD(REPLY_REMOVE_ALL_STA);
571 IWL_CMD(REPLY_3945_RX);
572 IWL_CMD(REPLY_TX);
573 IWL_CMD(REPLY_RATE_SCALE);
574 IWL_CMD(REPLY_LEDS_CMD);
575 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
576 IWL_CMD(RADAR_NOTIFICATION);
577 IWL_CMD(REPLY_QUIET_CMD);
578 IWL_CMD(REPLY_CHANNEL_SWITCH);
579 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
580 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
581 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
582 IWL_CMD(POWER_TABLE_CMD);
583 IWL_CMD(PM_SLEEP_NOTIFICATION);
584 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
585 IWL_CMD(REPLY_SCAN_CMD);
586 IWL_CMD(REPLY_SCAN_ABORT_CMD);
587 IWL_CMD(SCAN_START_NOTIFICATION);
588 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
589 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
590 IWL_CMD(BEACON_NOTIFICATION);
591 IWL_CMD(REPLY_TX_BEACON);
592 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
593 IWL_CMD(QUIET_NOTIFICATION);
594 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
595 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
596 IWL_CMD(REPLY_BT_CONFIG);
597 IWL_CMD(REPLY_STATISTICS_CMD);
598 IWL_CMD(STATISTICS_NOTIFICATION);
599 IWL_CMD(REPLY_CARD_STATE_CMD);
600 IWL_CMD(CARD_STATE_NOTIFICATION);
601 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
602 default:
603 return "UNKNOWN";
604
605 }
606}
607
608#define HOST_COMPLETE_TIMEOUT (HZ / 2)
609
610/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800611 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700612 * @priv: device private data point
613 * @cmd: a point to the ucode command structure
614 *
615 * The function returns < 0 values to indicate the operation is
616 * failed. On success, it turns the index (> 0) of command in the
617 * command queue.
618 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800619static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700620{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800621 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
622 struct iwl3945_queue *q = &txq->q;
623 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700624 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800625 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700626 u32 idx;
627 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
628 dma_addr_t phys_addr;
629 int pad;
630 u16 count;
631 int ret;
632 unsigned long flags;
633
634 /* If any of the command structures end up being larger than
635 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
636 * we will need to increase the size of the TFD entries */
637 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
638 !(cmd->meta.flags & CMD_SIZE_HUGE));
639
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800640
641 if (iwl3945_is_rfkill(priv)) {
642 IWL_DEBUG_INFO("Not sending command - RF KILL");
643 return -EIO;
644 }
645
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800646 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700647 IWL_ERROR("No space for Tx\n");
648 return -ENOSPC;
649 }
650
651 spin_lock_irqsave(&priv->hcmd_lock, flags);
652
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800653 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700654 memset(tfd, 0, sizeof(*tfd));
655
656 control_flags = (u32 *) tfd;
657
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800658 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700659 out_cmd = &txq->cmd[idx];
660
661 out_cmd->hdr.cmd = cmd->id;
662 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
663 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
664
665 /* At this point, the out_cmd now has all of the incoming cmd
666 * information */
667
668 out_cmd->hdr.flags = 0;
669 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800670 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700671 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
672 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
673
674 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800675 offsetof(struct iwl3945_cmd, hdr);
676 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700677
678 pad = U32_PAD(cmd->len);
679 count = TFD_CTL_COUNT_GET(*control_flags);
680 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
681
682 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
683 "%d bytes at %d[%d]:%d\n",
684 get_cmd_string(out_cmd->hdr.cmd),
685 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800686 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700687
688 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800689
690 /* Increment and update queue's write index */
Tomas Winklerc54b6792008-03-06 17:36:53 -0800691 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800692 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700693
694 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
695 return ret ? ret : idx;
696}
697
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800698static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700699{
700 int ret;
701
702 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
703
704 /* An asynchronous command can not expect an SKB to be set. */
705 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
706
707 /* An asynchronous command MUST have a callback. */
708 BUG_ON(!cmd->meta.u.callback);
709
710 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
711 return -EBUSY;
712
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800713 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700714 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800715 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700716 get_cmd_string(cmd->id), ret);
717 return ret;
718 }
719 return 0;
720}
721
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800722static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700723{
724 int cmd_idx;
725 int ret;
Zhu Yib481de92007-09-25 17:54:57 -0700726
727 BUG_ON(cmd->meta.flags & CMD_ASYNC);
728
729 /* A synchronous command can not have a callback set. */
730 BUG_ON(cmd->meta.u.callback != NULL);
731
Tomas Winklere5472972008-03-28 16:21:12 -0700732 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
Zhu Yib481de92007-09-25 17:54:57 -0700733 IWL_ERROR("Error sending %s: Already sending a host command\n",
734 get_cmd_string(cmd->id));
Tomas Winklere5472972008-03-28 16:21:12 -0700735 ret = -EBUSY;
736 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700737 }
738
739 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
740
741 if (cmd->meta.flags & CMD_WANT_SKB)
742 cmd->meta.source = &cmd->meta;
743
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800744 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700745 if (cmd_idx < 0) {
746 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800747 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700748 get_cmd_string(cmd->id), ret);
749 goto out;
750 }
751
752 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
753 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
754 HOST_COMPLETE_TIMEOUT);
755 if (!ret) {
756 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
757 IWL_ERROR("Error sending %s: time out after %dms.\n",
758 get_cmd_string(cmd->id),
759 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
760
761 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
762 ret = -ETIMEDOUT;
763 goto cancel;
764 }
765 }
766
767 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
768 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
769 get_cmd_string(cmd->id));
770 ret = -ECANCELED;
771 goto fail;
772 }
773 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
774 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
775 get_cmd_string(cmd->id));
776 ret = -EIO;
777 goto fail;
778 }
779 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
780 IWL_ERROR("Error: Response NULL in '%s'\n",
781 get_cmd_string(cmd->id));
782 ret = -EIO;
783 goto out;
784 }
785
786 ret = 0;
787 goto out;
788
789cancel:
790 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800791 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700792
793 /* Cancel the CMD_WANT_SKB flag for the cmd in the
794 * TX cmd queue. Otherwise in case the cmd comes
795 * in later, it will possibly set an invalid
796 * address (cmd->meta.source). */
797 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
798 qcmd->meta.flags &= ~CMD_WANT_SKB;
799 }
800fail:
801 if (cmd->meta.u.skb) {
802 dev_kfree_skb_any(cmd->meta.u.skb);
803 cmd->meta.u.skb = NULL;
804 }
805out:
Tomas Winklere5472972008-03-28 16:21:12 -0700806 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -0700807 return ret;
808}
809
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800810int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700811{
Zhu Yib481de92007-09-25 17:54:57 -0700812 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800813 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700814
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800815 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700816}
817
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800818int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700819{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800820 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700821 .id = id,
822 .len = len,
823 .data = data,
824 };
825
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800826 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700827}
828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800829static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700830{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800831 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700832 .id = id,
833 .len = sizeof(val),
834 .data = &val,
835 };
836
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800837 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700838}
839
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800840int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700841{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800842 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700843}
844
845/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800846 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100847 * @band: 2.4 or 5 GHz band
848 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700849
Johannes Berg8318d782008-01-24 19:38:38 +0100850 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700851 *
852 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100853 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700854 */
Johannes Berg8318d782008-01-24 19:38:38 +0100855static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
856 enum ieee80211_band band,
857 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700858{
Johannes Berg8318d782008-01-24 19:38:38 +0100859 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700860 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100861 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700862 return -EINVAL;
863 }
864
865 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100866 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700867 return 0;
868
869 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100870 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700871 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
872 else
873 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
874
Johannes Berg8318d782008-01-24 19:38:38 +0100875 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700876
Johannes Berg8318d782008-01-24 19:38:38 +0100877 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700878
879 return 0;
880}
881
882/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800883 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700884 *
885 * NOTE: This is really only useful during development and can eventually
886 * be #ifdef'd out once the driver is stable and folks aren't actively
887 * making changes
888 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800889static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700890{
891 int error = 0;
892 int counter = 1;
893
894 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
895 error |= le32_to_cpu(rxon->flags &
896 (RXON_FLG_TGJ_NARROW_BAND_MSK |
897 RXON_FLG_RADAR_DETECT_MSK));
898 if (error)
899 IWL_WARNING("check 24G fields %d | %d\n",
900 counter++, error);
901 } else {
902 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
903 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
904 if (error)
905 IWL_WARNING("check 52 fields %d | %d\n",
906 counter++, error);
907 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
908 if (error)
909 IWL_WARNING("check 52 CCK %d | %d\n",
910 counter++, error);
911 }
912 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
913 if (error)
914 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
915
916 /* make sure basic rates 6Mbps and 1Mbps are supported */
917 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
918 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
919 if (error)
920 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
921
922 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
923 if (error)
924 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
925
926 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
927 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
928 if (error)
929 IWL_WARNING("check CCK and short slot %d | %d\n",
930 counter++, error);
931
932 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
933 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
934 if (error)
935 IWL_WARNING("check CCK & auto detect %d | %d\n",
936 counter++, error);
937
938 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
939 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
940 if (error)
941 IWL_WARNING("check TGG and auto detect %d | %d\n",
942 counter++, error);
943
944 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
945 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
946 RXON_FLG_ANT_A_MSK)) == 0);
947 if (error)
948 IWL_WARNING("check antenna %d %d\n", counter++, error);
949
950 if (error)
951 IWL_WARNING("Tuning to channel %d\n",
952 le16_to_cpu(rxon->channel));
953
954 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800955 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700956 return -1;
957 }
958 return 0;
959}
960
961/**
Ben Cahill9fbab512007-11-29 11:09:47 +0800962 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +0800963 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -0700964 *
Ben Cahill9fbab512007-11-29 11:09:47 +0800965 * If the RXON structure is changing enough to require a new tune,
966 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
967 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -0700968 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800969static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700970{
971
972 /* These items are only settable from the full RXON command */
973 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
974 compare_ether_addr(priv->staging_rxon.bssid_addr,
975 priv->active_rxon.bssid_addr) ||
976 compare_ether_addr(priv->staging_rxon.node_addr,
977 priv->active_rxon.node_addr) ||
978 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
979 priv->active_rxon.wlap_bssid_addr) ||
980 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
981 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
982 (priv->staging_rxon.air_propagation !=
983 priv->active_rxon.air_propagation) ||
984 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
985 return 1;
986
987 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
988 * be updated with the RXON_ASSOC command -- however only some
989 * flag transitions are allowed using RXON_ASSOC */
990
991 /* Check if we are not switching bands */
992 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
993 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
994 return 1;
995
996 /* Check if we are switching association toggle */
997 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
998 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
999 return 1;
1000
1001 return 0;
1002}
1003
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001004static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001005{
1006 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001007 struct iwl3945_rx_packet *res = NULL;
1008 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1009 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001010 .id = REPLY_RXON_ASSOC,
1011 .len = sizeof(rxon_assoc),
1012 .meta.flags = CMD_WANT_SKB,
1013 .data = &rxon_assoc,
1014 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001015 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1016 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001017
1018 if ((rxon1->flags == rxon2->flags) &&
1019 (rxon1->filter_flags == rxon2->filter_flags) &&
1020 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1021 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1022 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1023 return 0;
1024 }
1025
1026 rxon_assoc.flags = priv->staging_rxon.flags;
1027 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1028 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1029 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1030 rxon_assoc.reserved = 0;
1031
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001032 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001033 if (rc)
1034 return rc;
1035
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001036 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001037 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1038 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1039 rc = -EIO;
1040 }
1041
1042 priv->alloc_rxb_skb--;
1043 dev_kfree_skb_any(cmd.meta.u.skb);
1044
1045 return rc;
1046}
1047
1048/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001049 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001050 *
Ian Schram01ebd062007-10-25 17:15:22 +08001051 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001052 * the active_rxon structure is updated with the new data. This
1053 * function correctly transitions out of the RXON_ASSOC_MSK state if
1054 * a HW tune is required based on the RXON structure changes.
1055 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001056static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001057{
1058 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001060 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001061 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001062
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001063 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001064 return -1;
1065
1066 /* always get timestamp with Rx frame */
1067 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1068
1069 /* select antenna */
1070 priv->staging_rxon.flags &=
1071 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1072 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1073
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001074 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001075 if (rc) {
1076 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1077 return -EINVAL;
1078 }
1079
1080 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001081 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001082 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001083 if (!iwl3945_full_rxon_required(priv)) {
1084 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001085 if (rc) {
1086 IWL_ERROR("Error setting RXON_ASSOC "
1087 "configuration (%d).\n", rc);
1088 return rc;
1089 }
1090
1091 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1092
1093 return 0;
1094 }
1095
1096 /* If we are currently associated and the new config requires
1097 * an RXON_ASSOC and the new config wants the associated mask enabled,
1098 * we must clear the associated from the active configuration
1099 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001100 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001101 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1102 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1103 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1104
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001105 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1106 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001107 &priv->active_rxon);
1108
1109 /* If the mask clearing failed then we set
1110 * active_rxon back to what it was previously */
1111 if (rc) {
1112 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1113 IWL_ERROR("Error clearing ASSOC_MSK on current "
1114 "configuration (%d).\n", rc);
1115 return rc;
1116 }
Zhu Yib481de92007-09-25 17:54:57 -07001117 }
1118
1119 IWL_DEBUG_INFO("Sending RXON\n"
1120 "* with%s RXON_FILTER_ASSOC_MSK\n"
1121 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001122 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001123 ((priv->staging_rxon.filter_flags &
1124 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1125 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001126 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001127
1128 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001129 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1130 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001131 if (rc) {
1132 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1133 return rc;
1134 }
1135
1136 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1137
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001138 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001139
Zhu Yib481de92007-09-25 17:54:57 -07001140 /* If we issue a new RXON command which required a tune then we must
1141 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001142 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001143 if (rc) {
1144 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1145 return rc;
1146 }
1147
1148 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001149 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001150 IWL_INVALID_STATION) {
1151 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1152 return -EIO;
1153 }
1154
1155 /* If we have set the ASSOC_MSK and we are in BSS mode then
1156 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001157 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001158 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001159 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001160 == IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding AP address for transmit.\n");
1162 return -EIO;
1163 }
1164
Johannes Berg8318d782008-01-24 19:38:38 +01001165 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001166 rc = iwl3945_init_hw_rate_table(priv);
1167 if (rc) {
1168 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1169 return -EIO;
1170 }
1171
1172 return 0;
1173}
1174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001175static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001176{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001177 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001178 .flags = 3,
1179 .lead_time = 0xAA,
1180 .max_kill = 1,
1181 .kill_ack_mask = 0,
1182 .kill_cts_mask = 0,
1183 };
1184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001185 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1186 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001187}
1188
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001189static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001190{
1191 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001192 struct iwl3945_rx_packet *res;
1193 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001194 .id = REPLY_SCAN_ABORT_CMD,
1195 .meta.flags = CMD_WANT_SKB,
1196 };
1197
1198 /* If there isn't a scan actively going on in the hardware
1199 * then we are in between scan bands and not actually
1200 * actively scanning, so don't send the abort command */
1201 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1202 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1203 return 0;
1204 }
1205
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001206 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001207 if (rc) {
1208 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1209 return rc;
1210 }
1211
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001212 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001213 if (res->u.status != CAN_ABORT_STATUS) {
1214 /* The scan abort will return 1 for success or
1215 * 2 for "failure". A failure condition can be
1216 * due to simply not being in an active scan which
1217 * can occur if we send the scan abort before we
1218 * the microcode has notified us that a scan is
1219 * completed. */
1220 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1221 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1222 clear_bit(STATUS_SCAN_HW, &priv->status);
1223 }
1224
1225 dev_kfree_skb_any(cmd.meta.u.skb);
1226
1227 return rc;
1228}
1229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001230static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1231 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001232 struct sk_buff *skb)
1233{
1234 return 1;
1235}
1236
1237/*
1238 * CARD_STATE_CMD
1239 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001240 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001241 *
1242 * When in the 'enable' state the card operates as normal.
1243 * When in the 'disable' state, the card enters into a low power mode.
1244 * When in the 'halt' state, the card is shut down and must be fully
1245 * restarted to come back on.
1246 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001247static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001248{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001249 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001250 .id = REPLY_CARD_STATE_CMD,
1251 .len = sizeof(u32),
1252 .data = &flags,
1253 .meta.flags = meta_flag,
1254 };
1255
1256 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001257 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001260}
1261
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001262static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1263 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001264{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001265 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001266
1267 if (!skb) {
1268 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1269 return 1;
1270 }
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001273 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1274 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1275 res->hdr.flags);
1276 return 1;
1277 }
1278
1279 switch (res->u.add_sta.status) {
1280 case ADD_STA_SUCCESS_MSK:
1281 break;
1282 default:
1283 break;
1284 }
1285
1286 /* We didn't cache the SKB; let the caller free it */
1287 return 1;
1288}
1289
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001290int iwl3945_send_add_station(struct iwl3945_priv *priv,
1291 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001292{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001293 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001294 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001295 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001296 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001297 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001298 .meta.flags = flags,
1299 .data = sta,
1300 };
1301
1302 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001304 else
1305 cmd.meta.flags |= CMD_WANT_SKB;
1306
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001307 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001308
1309 if (rc || (flags & CMD_ASYNC))
1310 return rc;
1311
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001312 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001313 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1314 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1315 res->hdr.flags);
1316 rc = -EIO;
1317 }
1318
1319 if (rc == 0) {
1320 switch (res->u.add_sta.status) {
1321 case ADD_STA_SUCCESS_MSK:
1322 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1323 break;
1324 default:
1325 rc = -EIO;
1326 IWL_WARNING("REPLY_ADD_STA failed\n");
1327 break;
1328 }
1329 }
1330
1331 priv->alloc_rxb_skb--;
1332 dev_kfree_skb_any(cmd.meta.u.skb);
1333
1334 return rc;
1335}
1336
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001337static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001338 struct ieee80211_key_conf *keyconf,
1339 u8 sta_id)
1340{
1341 unsigned long flags;
1342 __le16 key_flags = 0;
1343
1344 switch (keyconf->alg) {
1345 case ALG_CCMP:
1346 key_flags |= STA_KEY_FLG_CCMP;
1347 key_flags |= cpu_to_le16(
1348 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1349 key_flags &= ~STA_KEY_FLG_INVALID;
1350 break;
1351 case ALG_TKIP:
1352 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001353 default:
1354 return -EINVAL;
1355 }
1356 spin_lock_irqsave(&priv->sta_lock, flags);
1357 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1358 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1359 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1360 keyconf->keylen);
1361
1362 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1363 keyconf->keylen);
1364 priv->stations[sta_id].sta.key.key_flags = key_flags;
1365 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1366 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1367
1368 spin_unlock_irqrestore(&priv->sta_lock, flags);
1369
1370 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001371 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001372 return 0;
1373}
1374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001375static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001376{
1377 unsigned long flags;
1378
1379 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001380 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1381 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001382 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1383 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1384 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1385 spin_unlock_irqrestore(&priv->sta_lock, flags);
1386
1387 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001388 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001389 return 0;
1390}
1391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001392static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001393{
1394 struct list_head *element;
1395
1396 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1397 priv->frames_count);
1398
1399 while (!list_empty(&priv->free_frames)) {
1400 element = priv->free_frames.next;
1401 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001402 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001403 priv->frames_count--;
1404 }
1405
1406 if (priv->frames_count) {
1407 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1408 priv->frames_count);
1409 priv->frames_count = 0;
1410 }
1411}
1412
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001413static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001414{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001415 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001416 struct list_head *element;
1417 if (list_empty(&priv->free_frames)) {
1418 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1419 if (!frame) {
1420 IWL_ERROR("Could not allocate frame!\n");
1421 return NULL;
1422 }
1423
1424 priv->frames_count++;
1425 return frame;
1426 }
1427
1428 element = priv->free_frames.next;
1429 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001430 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001431}
1432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001433static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001434{
1435 memset(frame, 0, sizeof(*frame));
1436 list_add(&frame->list, &priv->free_frames);
1437}
1438
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001439unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001440 struct ieee80211_hdr *hdr,
1441 const u8 *dest, int left)
1442{
1443
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001444 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001445 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1446 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1447 return 0;
1448
1449 if (priv->ibss_beacon->len > left)
1450 return 0;
1451
1452 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1453
1454 return priv->ibss_beacon->len;
1455}
1456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001457static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001458{
1459 u8 i;
1460
1461 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001462 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001463 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001464 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001465 }
1466
1467 return IWL_RATE_INVALID;
1468}
1469
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001470static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001471{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001473 unsigned int frame_size;
1474 int rc;
1475 u8 rate;
1476
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001477 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001478
1479 if (!frame) {
1480 IWL_ERROR("Could not obtain free frame buffer for beacon "
1481 "command.\n");
1482 return -ENOMEM;
1483 }
1484
1485 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001486 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001487 0xFF0);
1488 if (rate == IWL_INVALID_RATE)
1489 rate = IWL_RATE_6M_PLCP;
1490 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001491 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001492 if (rate == IWL_INVALID_RATE)
1493 rate = IWL_RATE_1M_PLCP;
1494 }
1495
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001496 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001497
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001498 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001499 &frame->u.cmd[0]);
1500
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001502
1503 return rc;
1504}
1505
1506/******************************************************************************
1507 *
1508 * EEPROM related functions
1509 *
1510 ******************************************************************************/
1511
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001512static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001513{
1514 memcpy(mac, priv->eeprom.mac_address, 6);
1515}
1516
Reinette Chatre74a3a252008-01-23 10:15:19 -08001517/*
1518 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1519 * embedded controller) as EEPROM reader; each read is a series of pulses
1520 * to/from the EEPROM chip, not a single event, so even reads could conflict
1521 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1522 * simply claims ownership, which should be safe when this function is called
1523 * (i.e. before loading uCode!).
1524 */
1525static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1526{
1527 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1528 return 0;
1529}
1530
Zhu Yib481de92007-09-25 17:54:57 -07001531/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001532 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001533 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001534 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001535 *
1536 * NOTE: This routine uses the non-debug IO access functions.
1537 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001538int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001539{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001540 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001541 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001542 u32 r;
1543 int sz = sizeof(priv->eeprom);
1544 int rc;
1545 int i;
1546 u16 addr;
1547
1548 /* The EEPROM structure has several padding buffers within it
1549 * and when adding new EEPROM maps is subject to programmer errors
1550 * which may be very difficult to identify without explicitly
1551 * checking the resulting size of the eeprom map. */
1552 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1553
1554 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1555 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1556 return -ENOENT;
1557 }
1558
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001559 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001560 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001561 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001562 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001563 return -ENOENT;
1564 }
1565
1566 /* eeprom is an array of 16bit values */
1567 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001568 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1569 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001570
1571 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1572 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001573 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001574 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1575 break;
1576 udelay(IWL_EEPROM_ACCESS_DELAY);
1577 }
1578
1579 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1580 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1581 return -ETIMEDOUT;
1582 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001583 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001584 }
1585
1586 return 0;
1587}
1588
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001589static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001590{
1591 if (priv->hw_setting.shared_virt)
1592 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001593 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001594 priv->hw_setting.shared_virt,
1595 priv->hw_setting.shared_phys);
1596}
1597
1598/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001600 *
1601 * return : set the bit for each supported rate insert in ie
1602 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001603static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001604 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001605{
1606 u16 ret_rates = 0, bit;
1607 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001608 u8 *cnt = ie;
1609 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001610
1611 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1612 if (bit & supported_rate) {
1613 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001614 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001615 ((bit & basic_rate) ? 0x80 : 0x00);
1616 (*cnt)++;
1617 (*left)--;
1618 if ((*left <= 0) ||
1619 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001620 break;
1621 }
1622 }
1623
1624 return ret_rates;
1625}
1626
1627/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001628 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001629 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001630static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001631 struct ieee80211_mgmt *frame,
1632 int left, int is_direct)
1633{
1634 int len = 0;
1635 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001636 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001637
1638 /* Make sure there is enough space for the probe request,
1639 * two mandatory IEs and the data */
1640 left -= 24;
1641 if (left < 0)
1642 return 0;
1643 len += 24;
1644
1645 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001646 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001647 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001648 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001649 frame->seq_ctrl = 0;
1650
1651 /* fill in our indirect SSID IE */
1652 /* ...next IE... */
1653
1654 left -= 2;
1655 if (left < 0)
1656 return 0;
1657 len += 2;
1658 pos = &(frame->u.probe_req.variable[0]);
1659 *pos++ = WLAN_EID_SSID;
1660 *pos++ = 0;
1661
1662 /* fill in our direct SSID IE... */
1663 if (is_direct) {
1664 /* ...next IE... */
1665 left -= 2 + priv->essid_len;
1666 if (left < 0)
1667 return 0;
1668 /* ... fill it in... */
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = priv->essid_len;
1671 memcpy(pos, priv->essid, priv->essid_len);
1672 pos += priv->essid_len;
1673 len += 2 + priv->essid_len;
1674 }
1675
1676 /* fill in supported rate */
1677 /* ...next IE... */
1678 left -= 2;
1679 if (left < 0)
1680 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001681
Zhu Yib481de92007-09-25 17:54:57 -07001682 /* ... fill it in... */
1683 *pos++ = WLAN_EID_SUPP_RATES;
1684 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001685
1686 priv->active_rate = priv->rates_mask;
1687 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001688 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1689
Tomas Winklerc7c46672007-10-18 02:04:15 +02001690 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001691 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001692 priv->active_rate_basic, &left);
1693 active_rates &= ~ret_rates;
1694
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001695 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001696 priv->active_rate_basic, &left);
1697 active_rates &= ~ret_rates;
1698
Zhu Yib481de92007-09-25 17:54:57 -07001699 len += 2 + *pos;
1700 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001701 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001702 goto fill_end;
1703
1704 /* fill in supported extended rate */
1705 /* ...next IE... */
1706 left -= 2;
1707 if (left < 0)
1708 return 0;
1709 /* ... fill it in... */
1710 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1711 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001712 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001713 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001714 if (*pos > 0)
1715 len += 2 + *pos;
1716
1717 fill_end:
1718 return (u16)len;
1719}
1720
1721/*
1722 * QoS support
1723*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001724static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1725 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001726{
1727
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001728 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1729 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001730}
1731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001732static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001733{
1734 u16 cw_min = 15;
1735 u16 cw_max = 1023;
1736 u8 aifs = 2;
1737 u8 is_legacy = 0;
1738 unsigned long flags;
1739 int i;
1740
1741 spin_lock_irqsave(&priv->lock, flags);
1742 priv->qos_data.qos_active = 0;
1743
1744 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1745 if (priv->qos_data.qos_enable)
1746 priv->qos_data.qos_active = 1;
1747 if (!(priv->active_rate & 0xfff0)) {
1748 cw_min = 31;
1749 is_legacy = 1;
1750 }
1751 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1752 if (priv->qos_data.qos_enable)
1753 priv->qos_data.qos_active = 1;
1754 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1755 cw_min = 31;
1756 is_legacy = 1;
1757 }
1758
1759 if (priv->qos_data.qos_active)
1760 aifs = 3;
1761
1762 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1763 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1764 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1765 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1766 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1767
1768 if (priv->qos_data.qos_active) {
1769 i = 1;
1770 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1771 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1772 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1773 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1774 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1775
1776 i = 2;
1777 priv->qos_data.def_qos_parm.ac[i].cw_min =
1778 cpu_to_le16((cw_min + 1) / 2 - 1);
1779 priv->qos_data.def_qos_parm.ac[i].cw_max =
1780 cpu_to_le16(cw_max);
1781 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1782 if (is_legacy)
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1784 cpu_to_le16(6016);
1785 else
1786 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1787 cpu_to_le16(3008);
1788 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1789
1790 i = 3;
1791 priv->qos_data.def_qos_parm.ac[i].cw_min =
1792 cpu_to_le16((cw_min + 1) / 4 - 1);
1793 priv->qos_data.def_qos_parm.ac[i].cw_max =
1794 cpu_to_le16((cw_max + 1) / 2 - 1);
1795 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1796 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1797 if (is_legacy)
1798 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1799 cpu_to_le16(3264);
1800 else
1801 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1802 cpu_to_le16(1504);
1803 } else {
1804 for (i = 1; i < 4; i++) {
1805 priv->qos_data.def_qos_parm.ac[i].cw_min =
1806 cpu_to_le16(cw_min);
1807 priv->qos_data.def_qos_parm.ac[i].cw_max =
1808 cpu_to_le16(cw_max);
1809 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1810 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1811 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1812 }
1813 }
1814 IWL_DEBUG_QOS("set QoS to default \n");
1815
1816 spin_unlock_irqrestore(&priv->lock, flags);
1817}
1818
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001819static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001820{
1821 unsigned long flags;
1822
Zhu Yib481de92007-09-25 17:54:57 -07001823 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1824 return;
1825
1826 if (!priv->qos_data.qos_enable)
1827 return;
1828
1829 spin_lock_irqsave(&priv->lock, flags);
1830 priv->qos_data.def_qos_parm.qos_flags = 0;
1831
1832 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1833 !priv->qos_data.qos_cap.q_AP.txop_request)
1834 priv->qos_data.def_qos_parm.qos_flags |=
1835 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1836
1837 if (priv->qos_data.qos_active)
1838 priv->qos_data.def_qos_parm.qos_flags |=
1839 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1840
1841 spin_unlock_irqrestore(&priv->lock, flags);
1842
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001843 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07001844 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1845 priv->qos_data.qos_active);
1846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001847 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001848 &(priv->qos_data.def_qos_parm));
1849 }
1850}
1851
Zhu Yib481de92007-09-25 17:54:57 -07001852/*
1853 * Power management (not Tx power!) functions
1854 */
1855#define MSEC_TO_USEC 1024
1856
1857#define NOSLP __constant_cpu_to_le32(0)
1858#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1859#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1860#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1861 __constant_cpu_to_le32(X1), \
1862 __constant_cpu_to_le32(X2), \
1863 __constant_cpu_to_le32(X3), \
1864 __constant_cpu_to_le32(X4)}
1865
1866
1867/* default power management (not Tx power) table values */
1868/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001869static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001870 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1871 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1872 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1873 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1874 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1875 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1876};
1877
1878/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1882 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1883 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1884 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1885 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1886 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1887 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1888 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1889 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1890};
1891
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001892int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001893{
1894 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001895 struct iwl3945_power_mgr *pow_data;
1896 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07001897 u16 pci_pm;
1898
1899 IWL_DEBUG_POWER("Initialize power \n");
1900
1901 pow_data = &(priv->power_data);
1902
1903 memset(pow_data, 0, sizeof(*pow_data));
1904
1905 pow_data->active_index = IWL_POWER_RANGE_0;
1906 pow_data->dtim_val = 0xffff;
1907
1908 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1909 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1910
1911 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1912 if (rc != 0)
1913 return 0;
1914 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001915 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001916
1917 IWL_DEBUG_POWER("adjust power command flags\n");
1918
1919 for (i = 0; i < IWL_POWER_AC; i++) {
1920 cmd = &pow_data->pwr_range_0[i].cmd;
1921
1922 if (pci_pm & 0x1)
1923 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1924 else
1925 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1926 }
1927 }
1928 return rc;
1929}
1930
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001931static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1932 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001933{
1934 int rc = 0, i;
1935 u8 skip;
1936 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001937 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07001938 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001939 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07001940
1941 if (mode > IWL_POWER_INDEX_5) {
1942 IWL_DEBUG_POWER("Error invalid power mode \n");
1943 return -1;
1944 }
1945 pow_data = &(priv->power_data);
1946
1947 if (pow_data->active_index == IWL_POWER_RANGE_0)
1948 range = &pow_data->pwr_range_0[0];
1949 else
1950 range = &pow_data->pwr_range_1[1];
1951
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001952 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07001953
1954#ifdef IWL_MAC80211_DISABLE
1955 if (priv->assoc_network != NULL) {
1956 unsigned long flags;
1957
1958 period = priv->assoc_network->tim.tim_period;
1959 }
1960#endif /*IWL_MAC80211_DISABLE */
1961 skip = range[mode].no_dtim;
1962
1963 if (period == 0) {
1964 period = 1;
1965 skip = 0;
1966 }
1967
1968 if (skip == 0) {
1969 max_sleep = period;
1970 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1971 } else {
1972 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1973 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1974 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1975 }
1976
1977 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1978 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1979 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1980 }
1981
1982 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1983 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1984 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1985 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1986 le32_to_cpu(cmd->sleep_interval[0]),
1987 le32_to_cpu(cmd->sleep_interval[1]),
1988 le32_to_cpu(cmd->sleep_interval[2]),
1989 le32_to_cpu(cmd->sleep_interval[3]),
1990 le32_to_cpu(cmd->sleep_interval[4]));
1991
1992 return rc;
1993}
1994
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001995static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001996{
John W. Linville9a62f732007-11-15 16:27:36 -05001997 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07001998 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001999 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002000
2001 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002002 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002003 * else user level */
2004 switch (mode) {
2005 case IWL_POWER_BATTERY:
2006 final_mode = IWL_POWER_INDEX_3;
2007 break;
2008 case IWL_POWER_AC:
2009 final_mode = IWL_POWER_MODE_CAM;
2010 break;
2011 default:
2012 final_mode = mode;
2013 break;
2014 }
2015
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002016 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002018 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002019
2020 if (final_mode == IWL_POWER_MODE_CAM)
2021 clear_bit(STATUS_POWER_PMI, &priv->status);
2022 else
2023 set_bit(STATUS_POWER_PMI, &priv->status);
2024
2025 return rc;
2026}
2027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002029{
2030 /* Filter incoming packets to determine if they are targeted toward
2031 * this network, discarding packets coming from ourselves */
2032 switch (priv->iw_mode) {
2033 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2034 /* packets from our adapter are dropped (echo) */
2035 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2036 return 0;
2037 /* {broad,multi}cast packets to our IBSS go through */
2038 if (is_multicast_ether_addr(header->addr1))
2039 return !compare_ether_addr(header->addr3, priv->bssid);
2040 /* packets to our adapter go through */
2041 return !compare_ether_addr(header->addr1, priv->mac_addr);
2042 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2043 /* packets from our adapter are dropped (echo) */
2044 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2045 return 0;
2046 /* {broad,multi}cast packets to our BSS go through */
2047 if (is_multicast_ether_addr(header->addr1))
2048 return !compare_ether_addr(header->addr2, priv->bssid);
2049 /* packets to our adapter go through */
2050 return !compare_ether_addr(header->addr1, priv->mac_addr);
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002051 default:
2052 return 1;
Zhu Yib481de92007-09-25 17:54:57 -07002053 }
2054
2055 return 1;
2056}
2057
Zhu Yib481de92007-09-25 17:54:57 -07002058/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002059 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002060 *
2061 * NOTE: priv->mutex is not required before calling this function
2062 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002063static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002064{
2065 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2066 clear_bit(STATUS_SCANNING, &priv->status);
2067 return 0;
2068 }
2069
2070 if (test_bit(STATUS_SCANNING, &priv->status)) {
2071 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2072 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2073 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2074 queue_work(priv->workqueue, &priv->abort_scan);
2075
2076 } else
2077 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2078
2079 return test_bit(STATUS_SCANNING, &priv->status);
2080 }
2081
2082 return 0;
2083}
2084
2085/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002086 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002087 * @ms: amount of time to wait (in milliseconds) for scan to abort
2088 *
2089 * NOTE: priv->mutex must be held before calling this function
2090 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002091static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002092{
2093 unsigned long now = jiffies;
2094 int ret;
2095
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002096 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002097 if (ret && ms) {
2098 mutex_unlock(&priv->mutex);
2099 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2100 test_bit(STATUS_SCANNING, &priv->status))
2101 msleep(1);
2102 mutex_lock(&priv->mutex);
2103
2104 return test_bit(STATUS_SCANNING, &priv->status);
2105 }
2106
2107 return ret;
2108}
2109
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002110static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002111{
2112 /* Reset ieee stats */
2113
2114 /* We don't reset the net_device_stats (ieee->stats) on
2115 * re-association */
2116
2117 priv->last_seq_num = -1;
2118 priv->last_frag_num = -1;
2119 priv->last_packet_time = 0;
2120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002121 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002122}
2123
2124#define MAX_UCODE_BEACON_INTERVAL 1024
2125#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2126
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002127static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002128{
2129 u16 new_val = 0;
2130 u16 beacon_factor = 0;
2131
2132 beacon_factor =
2133 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2134 / MAX_UCODE_BEACON_INTERVAL;
2135 new_val = beacon_val / beacon_factor;
2136
2137 return cpu_to_le16(new_val);
2138}
2139
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002140static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002141{
2142 u64 interval_tm_unit;
2143 u64 tsf, result;
2144 unsigned long flags;
2145 struct ieee80211_conf *conf = NULL;
2146 u16 beacon_int = 0;
2147
2148 conf = ieee80211_get_hw_conf(priv->hw);
2149
2150 spin_lock_irqsave(&priv->lock, flags);
2151 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2152 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2153
2154 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2155
2156 tsf = priv->timestamp1;
2157 tsf = ((tsf << 32) | priv->timestamp0);
2158
2159 beacon_int = priv->beacon_int;
2160 spin_unlock_irqrestore(&priv->lock, flags);
2161
2162 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2163 if (beacon_int == 0) {
2164 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2165 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2166 } else {
2167 priv->rxon_timing.beacon_interval =
2168 cpu_to_le16(beacon_int);
2169 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002170 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002171 le16_to_cpu(priv->rxon_timing.beacon_interval));
2172 }
2173
2174 priv->rxon_timing.atim_window = 0;
2175 } else {
2176 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002177 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002178 /* TODO: we need to get atim_window from upper stack
2179 * for now we set to 0 */
2180 priv->rxon_timing.atim_window = 0;
2181 }
2182
2183 interval_tm_unit =
2184 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2185 result = do_div(tsf, interval_tm_unit);
2186 priv->rxon_timing.beacon_init_val =
2187 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2188
2189 IWL_DEBUG_ASSOC
2190 ("beacon interval %d beacon timer %d beacon tim %d\n",
2191 le16_to_cpu(priv->rxon_timing.beacon_interval),
2192 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2193 le16_to_cpu(priv->rxon_timing.atim_window));
2194}
2195
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002196static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002197{
2198 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2199 IWL_ERROR("APs don't scan.\n");
2200 return 0;
2201 }
2202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002203 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002204 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2205 return -EIO;
2206 }
2207
2208 if (test_bit(STATUS_SCANNING, &priv->status)) {
2209 IWL_DEBUG_SCAN("Scan already in progress.\n");
2210 return -EAGAIN;
2211 }
2212
2213 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2214 IWL_DEBUG_SCAN("Scan request while abort pending. "
2215 "Queuing.\n");
2216 return -EAGAIN;
2217 }
2218
2219 IWL_DEBUG_INFO("Starting scan...\n");
Ron Rindjunsky66b50042008-06-25 16:46:31 +08002220 if (priv->cfg->sku & IWL_SKU_G)
2221 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
2222 if (priv->cfg->sku & IWL_SKU_A)
2223 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
Zhu Yib481de92007-09-25 17:54:57 -07002224 set_bit(STATUS_SCANNING, &priv->status);
2225 priv->scan_start = jiffies;
2226 priv->scan_pass_start = priv->scan_start;
2227
2228 queue_work(priv->workqueue, &priv->request_scan);
2229
2230 return 0;
2231}
2232
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002233static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002234{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002235 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002236
2237 if (hw_decrypt)
2238 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2239 else
2240 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2241
2242 return 0;
2243}
2244
Johannes Berg8318d782008-01-24 19:38:38 +01002245static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2246 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002247{
Johannes Berg8318d782008-01-24 19:38:38 +01002248 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002249 priv->staging_rxon.flags &=
2250 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2251 | RXON_FLG_CCK_MSK);
2252 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2253 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002254 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002255 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2256 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2257 else
2258 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2259
2260 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2261 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2262
2263 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2264 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2265 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2266 }
2267}
2268
2269/*
Ian Schram01ebd062007-10-25 17:15:22 +08002270 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002271 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002272static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002273{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002274 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002275
2276 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2277
2278 switch (priv->iw_mode) {
2279 case IEEE80211_IF_TYPE_AP:
2280 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2281 break;
2282
2283 case IEEE80211_IF_TYPE_STA:
2284 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2285 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2286 break;
2287
2288 case IEEE80211_IF_TYPE_IBSS:
2289 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2290 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2291 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2292 RXON_FILTER_ACCEPT_GRP_MSK;
2293 break;
2294
2295 case IEEE80211_IF_TYPE_MNTR:
2296 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2297 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2298 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2299 break;
Tomas Winkler69dc5d92008-03-25 16:33:41 -07002300 default:
2301 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2302 break;
Zhu Yib481de92007-09-25 17:54:57 -07002303 }
2304
2305#if 0
2306 /* TODO: Figure out when short_preamble would be set and cache from
2307 * that */
2308 if (!hw_to_local(priv->hw)->short_preamble)
2309 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2310 else
2311 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2312#endif
2313
Johannes Berg8318d782008-01-24 19:38:38 +01002314 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002315 le16_to_cpu(priv->staging_rxon.channel));
2316
2317 if (!ch_info)
2318 ch_info = &priv->channel_info[0];
2319
2320 /*
2321 * in some case A channels are all non IBSS
2322 * in this case force B/G channel
2323 */
2324 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2325 !(is_channel_ibss(ch_info)))
2326 ch_info = &priv->channel_info[0];
2327
2328 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2329 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002330 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002331 else
Johannes Berg8318d782008-01-24 19:38:38 +01002332 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002333
Johannes Berg8318d782008-01-24 19:38:38 +01002334 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002335
2336 priv->staging_rxon.ofdm_basic_rates =
2337 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2338 priv->staging_rxon.cck_basic_rates =
2339 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2340}
2341
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002342static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002343{
Zhu Yib481de92007-09-25 17:54:57 -07002344 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002345 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002346
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002347 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002348 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002349 le16_to_cpu(priv->staging_rxon.channel));
2350
2351 if (!ch_info || !is_channel_ibss(ch_info)) {
2352 IWL_ERROR("channel %d not IBSS channel\n",
2353 le16_to_cpu(priv->staging_rxon.channel));
2354 return -EINVAL;
2355 }
2356 }
2357
Zhu Yib481de92007-09-25 17:54:57 -07002358 priv->iw_mode = mode;
2359
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002360 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002361 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2362
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002363 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002364
Mohamed Abbasfde35712007-11-29 11:10:15 +08002365 /* dont commit rxon if rf-kill is on*/
2366 if (!iwl3945_is_ready_rf(priv))
2367 return -EAGAIN;
2368
2369 cancel_delayed_work(&priv->scan_check);
2370 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2371 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2372 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2373 return -EAGAIN;
2374 }
2375
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002376 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002377
2378 return 0;
2379}
2380
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002381static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Johannes Berge039fa42008-05-15 12:55:29 +02002382 struct ieee80211_tx_info *info,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002383 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002384 struct sk_buff *skb_frag,
2385 int last_frag)
2386{
Ivo van Doorn1c014422008-04-17 19:41:02 +02002387 struct iwl3945_hw_key *keyinfo =
Johannes Berge039fa42008-05-15 12:55:29 +02002388 &priv->stations[info->control.hw_key->hw_key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002389
2390 switch (keyinfo->alg) {
2391 case ALG_CCMP:
2392 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2393 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2394 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2395 break;
2396
2397 case ALG_TKIP:
2398#if 0
2399 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2400
2401 if (last_frag)
2402 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2403 8);
2404 else
2405 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2406#endif
2407 break;
2408
2409 case ALG_WEP:
2410 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
Johannes Berge039fa42008-05-15 12:55:29 +02002411 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
Zhu Yib481de92007-09-25 17:54:57 -07002412
2413 if (keyinfo->keylen == 13)
2414 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2415
2416 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2417
2418 IWL_DEBUG_TX("Configuring packet for WEP encryption "
Johannes Berge039fa42008-05-15 12:55:29 +02002419 "with key %d\n", info->control.hw_key->hw_key_idx);
Zhu Yib481de92007-09-25 17:54:57 -07002420 break;
2421
Zhu Yib481de92007-09-25 17:54:57 -07002422 default:
2423 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2424 break;
2425 }
2426}
2427
2428/*
2429 * handle build REPLY_TX command notification.
2430 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002431static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2432 struct iwl3945_cmd *cmd,
Johannes Berge039fa42008-05-15 12:55:29 +02002433 struct ieee80211_tx_info *info,
Zhu Yib481de92007-09-25 17:54:57 -07002434 struct ieee80211_hdr *hdr,
2435 int is_unicast, u8 std_id)
2436{
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002437 __le16 fc = hdr->frame_control;
Zhu Yib481de92007-09-25 17:54:57 -07002438 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2439
2440 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
Johannes Berge039fa42008-05-15 12:55:29 +02002441 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
Zhu Yib481de92007-09-25 17:54:57 -07002442 tx_flags |= TX_CMD_FLG_ACK_MSK;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002443 if (ieee80211_is_mgmt(fc))
Zhu Yib481de92007-09-25 17:54:57 -07002444 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002445 if (ieee80211_is_probe_resp(fc) &&
Zhu Yib481de92007-09-25 17:54:57 -07002446 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2447 tx_flags |= TX_CMD_FLG_TSF_MSK;
2448 } else {
2449 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2450 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2451 }
2452
2453 cmd->cmd.tx.sta_id = std_id;
Harvey Harrison8b7b1e02008-06-11 14:21:56 -07002454 if (ieee80211_has_morefrags(fc))
Zhu Yib481de92007-09-25 17:54:57 -07002455 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2456
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002457 if (ieee80211_is_data_qos(fc)) {
2458 u8 *qc = ieee80211_get_qos_ctl(hdr);
Tomas Winkler54dbb522008-05-15 13:54:06 +08002459 cmd->cmd.tx.tid_tspec = qc[0] & 0xf;
Zhu Yib481de92007-09-25 17:54:57 -07002460 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002461 } else {
Zhu Yib481de92007-09-25 17:54:57 -07002462 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002463 }
Zhu Yib481de92007-09-25 17:54:57 -07002464
Johannes Berge039fa42008-05-15 12:55:29 +02002465 if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
Zhu Yib481de92007-09-25 17:54:57 -07002466 tx_flags |= TX_CMD_FLG_RTS_MSK;
2467 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge039fa42008-05-15 12:55:29 +02002468 } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
Zhu Yib481de92007-09-25 17:54:57 -07002469 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2470 tx_flags |= TX_CMD_FLG_CTS_MSK;
2471 }
2472
2473 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2474 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2475
2476 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002477 if (ieee80211_is_mgmt(fc)) {
2478 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
Ian Schrambc434dd2007-10-25 17:15:29 +08002479 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002480 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002481 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002482 } else {
Zhu Yib481de92007-09-25 17:54:57 -07002483 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07002484#ifdef CONFIG_IWL3945_LEDS
2485 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2486#endif
2487 }
Zhu Yib481de92007-09-25 17:54:57 -07002488
2489 cmd->cmd.tx.driver_txop = 0;
2490 cmd->cmd.tx.tx_flags = tx_flags;
2491 cmd->cmd.tx.next_frame_len = 0;
2492}
2493
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002494/**
2495 * iwl3945_get_sta_id - Find station's index within station table
2496 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002497static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002498{
2499 int sta_id;
2500 u16 fc = le16_to_cpu(hdr->frame_control);
2501
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002502 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002503 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2504 is_multicast_ether_addr(hdr->addr1))
2505 return priv->hw_setting.bcast_sta_id;
2506
2507 switch (priv->iw_mode) {
2508
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002509 /* If we are a client station in a BSS network, use the special
2510 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002511 case IEEE80211_IF_TYPE_STA:
2512 return IWL_AP_ID;
2513
2514 /* If we are an AP, then find the station, or use BCAST */
2515 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002516 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002517 if (sta_id != IWL_INVALID_STATION)
2518 return sta_id;
2519 return priv->hw_setting.bcast_sta_id;
2520
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002521 /* If this frame is going out to an IBSS network, find the station,
2522 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002523 case IEEE80211_IF_TYPE_IBSS: {
2524 DECLARE_MAC_BUF(mac);
2525
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002526 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002527 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002528 if (sta_id != IWL_INVALID_STATION)
2529 return sta_id;
2530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002531 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002532
2533 if (sta_id != IWL_INVALID_STATION)
2534 return sta_id;
2535
Joe Perches0795af52007-10-03 17:59:30 -07002536 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002537 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002538 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002539 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002540 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002541 }
Zhu Yib481de92007-09-25 17:54:57 -07002542 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002543 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002544 return priv->hw_setting.bcast_sta_id;
2545 }
2546}
2547
2548/*
2549 * start REPLY_TX command process
2550 */
Johannes Berge039fa42008-05-15 12:55:29 +02002551static int iwl3945_tx_skb(struct iwl3945_priv *priv, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07002552{
2553 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Johannes Berge039fa42008-05-15 12:55:29 +02002554 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002555 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002556 u32 *control_flags;
Johannes Berge2530082008-05-17 00:57:14 +02002557 int txq_id = skb_get_queue_mapping(skb);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002558 struct iwl3945_tx_queue *txq = NULL;
2559 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002560 dma_addr_t phys_addr;
2561 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002562 struct iwl3945_cmd *out_cmd = NULL;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002563 u16 len, idx, len_org, hdr_len;
2564 u8 id;
2565 u8 unicast;
Zhu Yib481de92007-09-25 17:54:57 -07002566 u8 sta_id;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002567 u8 tid = 0;
Zhu Yib481de92007-09-25 17:54:57 -07002568 u16 seq_number = 0;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002569 __le16 fc;
Zhu Yib481de92007-09-25 17:54:57 -07002570 u8 wait_write_ptr = 0;
Tomas Winkler54dbb522008-05-15 13:54:06 +08002571 u8 *qc = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002572 unsigned long flags;
2573 int rc;
2574
2575 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002576 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002577 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2578 goto drop_unlock;
2579 }
2580
Johannes Berg32bfd352007-12-19 01:31:26 +01002581 if (!priv->vif) {
2582 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002583 goto drop_unlock;
2584 }
2585
Johannes Berge039fa42008-05-15 12:55:29 +02002586 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002587 IWL_ERROR("ERROR: No TX rate available.\n");
2588 goto drop_unlock;
2589 }
2590
2591 unicast = !is_multicast_ether_addr(hdr->addr1);
2592 id = 0;
2593
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002594 fc = hdr->frame_control;
Zhu Yib481de92007-09-25 17:54:57 -07002595
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002596#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002597 if (ieee80211_is_auth(fc))
2598 IWL_DEBUG_TX("Sending AUTH frame\n");
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002599 else if (ieee80211_is_assoc_req(fc))
Zhu Yib481de92007-09-25 17:54:57 -07002600 IWL_DEBUG_TX("Sending ASSOC frame\n");
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002601 else if (ieee80211_is_reassoc_req(fc))
Zhu Yib481de92007-09-25 17:54:57 -07002602 IWL_DEBUG_TX("Sending REASSOC frame\n");
2603#endif
2604
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002605 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002606 if ((!iwl3945_is_associated(priv) ||
2607 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002608 ieee80211_is_data(fc)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002609 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002610 goto drop_unlock;
2611 }
2612
2613 spin_unlock_irqrestore(&priv->lock, flags);
2614
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002615 hdr_len = ieee80211_get_hdrlen(le16_to_cpu(fc));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002616
2617 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002618 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002619 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002620 DECLARE_MAC_BUF(mac);
2621
2622 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2623 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002624 goto drop;
2625 }
2626
2627 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2628
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002629 if (ieee80211_is_data_qos(fc)) {
2630 qc = ieee80211_get_qos_ctl(hdr);
Tomas Winkler54dbb522008-05-15 13:54:06 +08002631 tid = qc[0] & 0xf;
Zhu Yib481de92007-09-25 17:54:57 -07002632 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2633 IEEE80211_SCTL_SEQ;
2634 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2635 (hdr->seq_ctrl &
2636 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2637 seq_number += 0x10;
2638 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002639
2640 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002641 txq = &priv->txq[txq_id];
2642 q = &txq->q;
2643
2644 spin_lock_irqsave(&priv->lock, flags);
2645
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002646 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002647 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002648 memset(tfd, 0, sizeof(*tfd));
2649 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002650 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002651
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002652 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002653 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002654 txq->txb[q->write_ptr].skb[0] = skb;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002655
2656 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002657 out_cmd = &txq->cmd[idx];
2658 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2659 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002660
2661 /*
2662 * Set up the Tx-command (not MAC!) header.
2663 * Store the chosen Tx queue and TFD index within the sequence field;
2664 * after Tx, uCode's Tx response will return this value so driver can
2665 * locate the frame within the tx queue and do post-tx processing.
2666 */
Zhu Yib481de92007-09-25 17:54:57 -07002667 out_cmd->hdr.cmd = REPLY_TX;
2668 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002669 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002670
2671 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002672 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2673
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002674 /*
2675 * Use the first empty entry in this queue's command buffer array
2676 * to contain the Tx command and MAC header concatenated together
2677 * (payload data will be in another buffer).
2678 * Size of this varies, due to varying MAC header length.
2679 * If end is not dword aligned, we'll have 2 extra bytes at the end
2680 * of the MAC header (device reads on dword boundaries).
2681 * We'll tell device about this padding later.
2682 */
Zhu Yib481de92007-09-25 17:54:57 -07002683 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002684 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002685
2686 len_org = len;
2687 len = (len + 3) & ~3;
2688
2689 if (len_org != len)
2690 len_org = 1;
2691 else
2692 len_org = 0;
2693
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002694 /* Physical address of this Tx command's header (not MAC header!),
2695 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002696 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2697 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002698
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002699 /* Add buffer containing Tx command and MAC(!) header to TFD's
2700 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002701 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002702
Johannes Berge039fa42008-05-15 12:55:29 +02002703 if (!(info->flags & IEEE80211_TX_CTL_DO_NOT_ENCRYPT))
2704 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002705
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002706 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2707 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002708 len = skb->len - hdr_len;
2709 if (len) {
2710 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2711 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002712 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002713 }
2714
Zhu Yib481de92007-09-25 17:54:57 -07002715 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002716 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002717 *control_flags = TFD_CTL_COUNT_SET(1);
2718 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002719 /* Else use 2 buffers.
2720 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002721 *control_flags = TFD_CTL_COUNT_SET(2) |
2722 TFD_CTL_PAD_SET(U32_PAD(len));
2723
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002724 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002725 len = (u16)skb->len;
2726 out_cmd->cmd.tx.len = cpu_to_le16(len);
2727
2728 /* TODO need this for burst mode later on */
Johannes Berge039fa42008-05-15 12:55:29 +02002729 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002730
2731 /* set is_hcca to 0; it probably will never be implemented */
Johannes Berge039fa42008-05-15 12:55:29 +02002732 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002733
2734 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2735 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2736
Harvey Harrison8b7b1e02008-06-11 14:21:56 -07002737 if (!ieee80211_has_morefrags(hdr->frame_control)) {
Zhu Yib481de92007-09-25 17:54:57 -07002738 txq->need_update = 1;
2739 if (qc) {
Zhu Yib481de92007-09-25 17:54:57 -07002740 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2741 }
2742 } else {
2743 wait_write_ptr = 1;
2744 txq->need_update = 0;
2745 }
2746
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002747 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002748 sizeof(out_cmd->cmd.tx));
2749
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002750 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002751 ieee80211_get_hdrlen(le16_to_cpu(fc)));
Zhu Yib481de92007-09-25 17:54:57 -07002752
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002753 /* Tell device the write index *just past* this latest filled TFD */
Tomas Winklerc54b6792008-03-06 17:36:53 -08002754 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002755 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002756 spin_unlock_irqrestore(&priv->lock, flags);
2757
2758 if (rc)
2759 return rc;
2760
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002761 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002762 && priv->mac80211_registered) {
2763 if (wait_write_ptr) {
2764 spin_lock_irqsave(&priv->lock, flags);
2765 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002766 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002767 spin_unlock_irqrestore(&priv->lock, flags);
2768 }
2769
Johannes Berge2530082008-05-17 00:57:14 +02002770 ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
Zhu Yib481de92007-09-25 17:54:57 -07002771 }
2772
2773 return 0;
2774
2775drop_unlock:
2776 spin_unlock_irqrestore(&priv->lock, flags);
2777drop:
2778 return -1;
2779}
2780
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002781static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002782{
Johannes Berg8318d782008-01-24 19:38:38 +01002783 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002784 struct ieee80211_rate *rate;
2785 int i;
2786
Johannes Berg8318d782008-01-24 19:38:38 +01002787 sband = iwl3945_get_band(priv, priv->band);
2788 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002789 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2790 return;
2791 }
Zhu Yib481de92007-09-25 17:54:57 -07002792
2793 priv->active_rate = 0;
2794 priv->active_rate_basic = 0;
2795
Johannes Berg8318d782008-01-24 19:38:38 +01002796 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2797 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07002798
Johannes Berg8318d782008-01-24 19:38:38 +01002799 for (i = 0; i < sband->n_bitrates; i++) {
2800 rate = &sband->bitrates[i];
2801 if ((rate->hw_value < IWL_RATE_COUNT) &&
2802 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2803 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2804 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2805 priv->active_rate |= (1 << rate->hw_value);
2806 }
Zhu Yib481de92007-09-25 17:54:57 -07002807 }
2808
2809 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2810 priv->active_rate, priv->active_rate_basic);
2811
2812 /*
2813 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2814 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2815 * OFDM
2816 */
2817 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2818 priv->staging_rxon.cck_basic_rates =
2819 ((priv->active_rate_basic &
2820 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2821 else
2822 priv->staging_rxon.cck_basic_rates =
2823 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2824
2825 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2826 priv->staging_rxon.ofdm_basic_rates =
2827 ((priv->active_rate_basic &
2828 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2829 IWL_FIRST_OFDM_RATE) & 0xFF;
2830 else
2831 priv->staging_rxon.ofdm_basic_rates =
2832 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2833}
2834
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002835static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07002836{
2837 unsigned long flags;
2838
2839 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2840 return;
2841
2842 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2843 disable_radio ? "OFF" : "ON");
2844
2845 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002846 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002847 /* FIXME: This is a workaround for AP */
2848 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2849 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002850 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07002851 CSR_UCODE_SW_BIT_RFKILL);
2852 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002853 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002854 set_bit(STATUS_RF_KILL_SW, &priv->status);
2855 }
2856 return;
2857 }
2858
2859 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002860 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07002861
2862 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2863 spin_unlock_irqrestore(&priv->lock, flags);
2864
2865 /* wake up ucode */
2866 msleep(10);
2867
2868 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002869 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2870 if (!iwl3945_grab_nic_access(priv))
2871 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002872 spin_unlock_irqrestore(&priv->lock, flags);
2873
2874 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2875 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2876 "disabled by HW switch\n");
2877 return;
2878 }
2879
Zhu Yi808e72a2008-06-12 09:47:17 +08002880 if (priv->is_open)
2881 queue_work(priv->workqueue, &priv->restart);
Zhu Yib481de92007-09-25 17:54:57 -07002882 return;
2883}
2884
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002885void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07002886 u32 decrypt_res, struct ieee80211_rx_status *stats)
2887{
2888 u16 fc =
2889 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2890
2891 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2892 return;
2893
2894 if (!(fc & IEEE80211_FCTL_PROTECTED))
2895 return;
2896
2897 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2898 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2899 case RX_RES_STATUS_SEC_TYPE_TKIP:
2900 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2901 RX_RES_STATUS_BAD_ICV_MIC)
2902 stats->flag |= RX_FLAG_MMIC_ERROR;
2903 case RX_RES_STATUS_SEC_TYPE_WEP:
2904 case RX_RES_STATUS_SEC_TYPE_CCMP:
2905 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2906 RX_RES_STATUS_DECRYPT_OK) {
2907 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2908 stats->flag |= RX_FLAG_DECRYPTED;
2909 }
2910 break;
2911
2912 default:
2913 break;
2914 }
2915}
2916
Zhu Yib481de92007-09-25 17:54:57 -07002917#define IWL_PACKET_RETRY_TIME HZ
2918
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002919int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002920{
2921 u16 sc = le16_to_cpu(header->seq_ctrl);
2922 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2923 u16 frag = sc & IEEE80211_SCTL_FRAG;
2924 u16 *last_seq, *last_frag;
2925 unsigned long *last_time;
2926
2927 switch (priv->iw_mode) {
2928 case IEEE80211_IF_TYPE_IBSS:{
2929 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002930 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002931 u8 *mac = header->addr2;
2932 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2933
2934 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002935 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07002936 if (!compare_ether_addr(entry->mac, mac))
2937 break;
2938 }
2939 if (p == &priv->ibss_mac_hash[index]) {
2940 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2941 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08002942 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07002943 return 0;
2944 }
2945 memcpy(entry->mac, mac, ETH_ALEN);
2946 entry->seq_num = seq;
2947 entry->frag_num = frag;
2948 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08002949 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07002950 return 0;
2951 }
2952 last_seq = &entry->seq_num;
2953 last_frag = &entry->frag_num;
2954 last_time = &entry->packet_time;
2955 break;
2956 }
2957 case IEEE80211_IF_TYPE_STA:
2958 last_seq = &priv->last_seq_num;
2959 last_frag = &priv->last_frag_num;
2960 last_time = &priv->last_packet_time;
2961 break;
2962 default:
2963 return 0;
2964 }
2965 if ((*last_seq == seq) &&
2966 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2967 if (*last_frag == frag)
2968 goto drop;
2969 if (*last_frag + 1 != frag)
2970 /* out-of-order fragment */
2971 goto drop;
2972 } else
2973 *last_seq = seq;
2974
2975 *last_frag = frag;
2976 *last_time = jiffies;
2977 return 0;
2978
2979 drop:
2980 return 1;
2981}
2982
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002983#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07002984
2985#include "iwl-spectrum.h"
2986
2987#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2988#define BEACON_TIME_MASK_HIGH 0xFF000000
2989#define TIME_UNIT 1024
2990
2991/*
2992 * extended beacon time format
2993 * time in usec will be changed into a 32-bit value in 8:24 format
2994 * the high 1 byte is the beacon counts
2995 * the lower 3 bytes is the time in usec within one beacon interval
2996 */
2997
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002998static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07002999{
3000 u32 quot;
3001 u32 rem;
3002 u32 interval = beacon_interval * 1024;
3003
3004 if (!interval || !usec)
3005 return 0;
3006
3007 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3008 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3009
3010 return (quot << 24) + rem;
3011}
3012
3013/* base is usually what we get from ucode with each received frame,
3014 * the same as HW timer counter counting down
3015 */
3016
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003017static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003018{
3019 u32 base_low = base & BEACON_TIME_MASK_LOW;
3020 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3021 u32 interval = beacon_interval * TIME_UNIT;
3022 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3023 (addon & BEACON_TIME_MASK_HIGH);
3024
3025 if (base_low > addon_low)
3026 res += base_low - addon_low;
3027 else if (base_low < addon_low) {
3028 res += interval + base_low - addon_low;
3029 res += (1 << 24);
3030 } else
3031 res += (1 << 24);
3032
3033 return cpu_to_le32(res);
3034}
3035
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003036static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003037 struct ieee80211_measurement_params *params,
3038 u8 type)
3039{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003040 struct iwl3945_spectrum_cmd spectrum;
3041 struct iwl3945_rx_packet *res;
3042 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003043 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3044 .data = (void *)&spectrum,
3045 .meta.flags = CMD_WANT_SKB,
3046 };
3047 u32 add_time = le64_to_cpu(params->start_time);
3048 int rc;
3049 int spectrum_resp_status;
3050 int duration = le16_to_cpu(params->duration);
3051
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003052 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003053 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003054 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003055 le64_to_cpu(params->start_time) - priv->last_tsf,
3056 le16_to_cpu(priv->rxon_timing.beacon_interval));
3057
3058 memset(&spectrum, 0, sizeof(spectrum));
3059
3060 spectrum.channel_count = cpu_to_le16(1);
3061 spectrum.flags =
3062 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3063 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3064 cmd.len = sizeof(spectrum);
3065 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3066
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003067 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003068 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003069 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003070 add_time,
3071 le16_to_cpu(priv->rxon_timing.beacon_interval));
3072 else
3073 spectrum.start_time = 0;
3074
3075 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3076 spectrum.channels[0].channel = params->channel;
3077 spectrum.channels[0].type = type;
3078 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3079 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3080 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3081
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003082 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003083 if (rc)
3084 return rc;
3085
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003086 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003087 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3088 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3089 rc = -EIO;
3090 }
3091
3092 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3093 switch (spectrum_resp_status) {
3094 case 0: /* Command will be handled */
3095 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003096 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3097 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003098 priv->measurement_status &= ~MEASUREMENT_READY;
3099 }
3100 priv->measurement_status |= MEASUREMENT_ACTIVE;
3101 rc = 0;
3102 break;
3103
3104 case 1: /* Command will not be handled */
3105 rc = -EAGAIN;
3106 break;
3107 }
3108
3109 dev_kfree_skb_any(cmd.meta.u.skb);
3110
3111 return rc;
3112}
3113#endif
3114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003115static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3116 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003117{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003118 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3119 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003120 struct delayed_work *pwork;
3121
3122 palive = &pkt->u.alive_frame;
3123
3124 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3125 "0x%01X 0x%01X\n",
3126 palive->is_valid, palive->ver_type,
3127 palive->ver_subtype);
3128
3129 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3130 IWL_DEBUG_INFO("Initialization Alive received.\n");
3131 memcpy(&priv->card_alive_init,
3132 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003133 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003134 pwork = &priv->init_alive_start;
3135 } else {
3136 IWL_DEBUG_INFO("Runtime Alive received.\n");
3137 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003138 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003139 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003140 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003141 }
3142
3143 /* We delay the ALIVE response by 5ms to
3144 * give the HW RF Kill time to activate... */
3145 if (palive->is_valid == UCODE_VALID_OK)
3146 queue_delayed_work(priv->workqueue, pwork,
3147 msecs_to_jiffies(5));
3148 else
3149 IWL_WARNING("uCode did not respond OK.\n");
3150}
3151
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003152static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3153 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003154{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003155 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003156
3157 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3158 return;
3159}
3160
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003161static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3162 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003163{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003164 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003165
3166 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3167 "seq 0x%04X ser 0x%08X\n",
3168 le32_to_cpu(pkt->u.err_resp.error_type),
3169 get_cmd_string(pkt->u.err_resp.cmd_id),
3170 pkt->u.err_resp.cmd_id,
3171 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3172 le32_to_cpu(pkt->u.err_resp.error_info));
3173}
3174
3175#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3176
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003177static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003178{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003179 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3180 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3181 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003182 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3183 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3184 rxon->channel = csa->channel;
3185 priv->staging_rxon.channel = csa->channel;
3186}
3187
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003188static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3189 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003190{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003191#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003192 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3193 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003194
3195 if (!report->state) {
3196 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3197 "Spectrum Measure Notification: Start\n");
3198 return;
3199 }
3200
3201 memcpy(&priv->measure_report, report, sizeof(*report));
3202 priv->measurement_status |= MEASUREMENT_READY;
3203#endif
3204}
3205
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003206static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3207 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003208{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003209#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003210 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3211 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003212 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3213 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3214#endif
3215}
3216
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003217static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3218 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003219{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003220 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003221 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3222 "notification for %s:\n",
3223 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003224 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003225}
3226
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003227static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003228{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003229 struct iwl3945_priv *priv =
3230 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003231 struct sk_buff *beacon;
3232
3233 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berge039fa42008-05-15 12:55:29 +02003234 beacon = ieee80211_beacon_get(priv->hw, priv->vif);
Zhu Yib481de92007-09-25 17:54:57 -07003235
3236 if (!beacon) {
3237 IWL_ERROR("update beacon failed\n");
3238 return;
3239 }
3240
3241 mutex_lock(&priv->mutex);
3242 /* new beacon skb is allocated every time; dispose previous.*/
3243 if (priv->ibss_beacon)
3244 dev_kfree_skb(priv->ibss_beacon);
3245
3246 priv->ibss_beacon = beacon;
3247 mutex_unlock(&priv->mutex);
3248
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003249 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003250}
3251
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003252static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3253 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003254{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003255#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003256 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3257 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003258 u8 rate = beacon->beacon_notify_hdr.rate;
3259
3260 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3261 "tsf %d %d rate %d\n",
3262 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3263 beacon->beacon_notify_hdr.failure_frame,
3264 le32_to_cpu(beacon->ibss_mgr_status),
3265 le32_to_cpu(beacon->high_tsf),
3266 le32_to_cpu(beacon->low_tsf), rate);
3267#endif
3268
3269 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3270 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3271 queue_work(priv->workqueue, &priv->beacon_update);
3272}
3273
3274/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003275static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3276 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003277{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003278#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003279 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3280 struct iwl3945_scanreq_notification *notif =
3281 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003282
3283 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3284#endif
3285}
3286
3287/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003288static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3289 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003290{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003291 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3292 struct iwl3945_scanstart_notification *notif =
3293 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003294 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3295 IWL_DEBUG_SCAN("Scan start: "
3296 "%d [802.11%s] "
3297 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3298 notif->channel,
3299 notif->band ? "bg" : "a",
3300 notif->tsf_high,
3301 notif->tsf_low, notif->status, notif->beacon_timer);
3302}
3303
3304/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003305static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3306 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003307{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003308 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3309 struct iwl3945_scanresults_notification *notif =
3310 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003311
3312 IWL_DEBUG_SCAN("Scan ch.res: "
3313 "%d [802.11%s] "
3314 "(TSF: 0x%08X:%08X) - %d "
3315 "elapsed=%lu usec (%dms since last)\n",
3316 notif->channel,
3317 notif->band ? "bg" : "a",
3318 le32_to_cpu(notif->tsf_high),
3319 le32_to_cpu(notif->tsf_low),
3320 le32_to_cpu(notif->statistics[0]),
3321 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3322 jiffies_to_msecs(elapsed_jiffies
3323 (priv->last_scan_jiffies, jiffies)));
3324
3325 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003326 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003327}
3328
3329/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003330static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3331 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003332{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003333 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3334 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003335
3336 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3337 scan_notif->scanned_channels,
3338 scan_notif->tsf_low,
3339 scan_notif->tsf_high, scan_notif->status);
3340
3341 /* The HW is no longer scanning */
3342 clear_bit(STATUS_SCAN_HW, &priv->status);
3343
3344 /* The scan completion notification came in, so kill that timer... */
3345 cancel_delayed_work(&priv->scan_check);
3346
3347 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
Ron Rindjunsky66b50042008-06-25 16:46:31 +08003348 (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
3349 "2.4" : "5.2",
Zhu Yib481de92007-09-25 17:54:57 -07003350 jiffies_to_msecs(elapsed_jiffies
3351 (priv->scan_pass_start, jiffies)));
3352
Ron Rindjunsky66b50042008-06-25 16:46:31 +08003353 /* Remove this scanned band from the list of pending
3354 * bands to scan, band G precedes A in order of scanning
3355 * as seen in iwl3945_bg_request_scan */
3356 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
3357 priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
3358 else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
3359 priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
Zhu Yib481de92007-09-25 17:54:57 -07003360
3361 /* If a request to abort was given, or the scan did not succeed
3362 * then we reset the scan state machine and terminate,
3363 * re-queuing another scan if one has been requested */
3364 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3365 IWL_DEBUG_INFO("Aborted scan completed.\n");
3366 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3367 } else {
3368 /* If there are more bands on this scan pass reschedule */
3369 if (priv->scan_bands > 0)
3370 goto reschedule;
3371 }
3372
3373 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003374 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003375 IWL_DEBUG_INFO("Setting scan to off\n");
3376
3377 clear_bit(STATUS_SCANNING, &priv->status);
3378
3379 IWL_DEBUG_INFO("Scan took %dms\n",
3380 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3381
3382 queue_work(priv->workqueue, &priv->scan_completed);
3383
3384 return;
3385
3386reschedule:
3387 priv->scan_pass_start = jiffies;
3388 queue_work(priv->workqueue, &priv->request_scan);
3389}
3390
3391/* Handle notification from uCode that card's power state is changing
3392 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003393static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3394 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003395{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003396 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003397 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3398 unsigned long status = priv->status;
3399
3400 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3401 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3402 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3403
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003404 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003405 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3406
3407 if (flags & HW_CARD_DISABLED)
3408 set_bit(STATUS_RF_KILL_HW, &priv->status);
3409 else
3410 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3411
3412
3413 if (flags & SW_CARD_DISABLED)
3414 set_bit(STATUS_RF_KILL_SW, &priv->status);
3415 else
3416 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3417
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003418 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003419
3420 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3421 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3422 (test_bit(STATUS_RF_KILL_SW, &status) !=
3423 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3424 queue_work(priv->workqueue, &priv->rf_kill);
3425 else
3426 wake_up_interruptible(&priv->wait_command_queue);
3427}
3428
3429/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003430 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003431 *
3432 * Setup the RX handlers for each of the reply types sent from the uCode
3433 * to the host.
3434 *
3435 * This function chains into the hardware specific files for them to setup
3436 * any hardware specific handlers as well.
3437 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003438static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003439{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003440 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3441 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3442 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3443 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003444 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003445 iwl3945_rx_spectrum_measure_notif;
3446 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003447 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003448 iwl3945_rx_pm_debug_statistics_notif;
3449 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003450
Ben Cahill9fbab512007-11-29 11:09:47 +08003451 /*
3452 * The same handler is used for both the REPLY to a discrete
3453 * statistics request from the host as well as for the periodic
3454 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003455 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003456 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3457 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003458
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003459 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3460 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003461 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003462 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003463 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003464 iwl3945_rx_scan_complete_notif;
3465 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003466
Ben Cahill9fbab512007-11-29 11:09:47 +08003467 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003468 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003469}
3470
3471/**
Tomas Winkler91c066f2008-03-06 17:36:55 -08003472 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3473 * When FW advances 'R' index, all entries between old and new 'R' index
3474 * need to be reclaimed.
3475 */
3476static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3477 int txq_id, int index)
3478{
3479 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3480 struct iwl3945_queue *q = &txq->q;
3481 int nfreed = 0;
3482
3483 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3484 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3485 "is out of range [0-%d] %d %d.\n", txq_id,
3486 index, q->n_bd, q->write_ptr, q->read_ptr);
3487 return;
3488 }
3489
3490 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3491 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3492 if (nfreed > 1) {
3493 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3494 q->write_ptr, q->read_ptr);
3495 queue_work(priv->workqueue, &priv->restart);
3496 break;
3497 }
3498 nfreed++;
3499 }
3500}
3501
3502
3503/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003504 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003505 * @rxb: Rx buffer to reclaim
3506 *
3507 * If an Rx buffer has an async callback associated with it the callback
3508 * will be executed. The attached skb (if present) will only be freed
3509 * if the callback returns 1
3510 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003511static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3512 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003513{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003514 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003515 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3516 int txq_id = SEQ_TO_QUEUE(sequence);
3517 int index = SEQ_TO_INDEX(sequence);
3518 int huge = sequence & SEQ_HUGE_FRAME;
3519 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003520 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003521
Zhu Yib481de92007-09-25 17:54:57 -07003522 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3523
3524 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3525 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3526
3527 /* Input error checking is done when commands are added to queue. */
3528 if (cmd->meta.flags & CMD_WANT_SKB) {
3529 cmd->meta.source->u.skb = rxb->skb;
3530 rxb->skb = NULL;
3531 } else if (cmd->meta.u.callback &&
3532 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3533 rxb->skb = NULL;
3534
Tomas Winkler91c066f2008-03-06 17:36:55 -08003535 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003536
3537 if (!(cmd->meta.flags & CMD_ASYNC)) {
3538 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3539 wake_up_interruptible(&priv->wait_command_queue);
3540 }
3541}
3542
3543/************************** RX-FUNCTIONS ****************************/
3544/*
3545 * Rx theory of operation
3546 *
3547 * The host allocates 32 DMA target addresses and passes the host address
3548 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3549 * 0 to 31
3550 *
3551 * Rx Queue Indexes
3552 * The host/firmware share two index registers for managing the Rx buffers.
3553 *
3554 * The READ index maps to the first position that the firmware may be writing
3555 * to -- the driver can read up to (but not including) this position and get
3556 * good data.
3557 * The READ index is managed by the firmware once the card is enabled.
3558 *
3559 * The WRITE index maps to the last position the driver has read from -- the
3560 * position preceding WRITE is the last slot the firmware can place a packet.
3561 *
3562 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3563 * WRITE = READ.
3564 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003565 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003566 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3567 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003568 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003569 * and fire the RX interrupt. The driver can then query the READ index and
3570 * process as many packets as possible, moving the WRITE index forward as it
3571 * resets the Rx queue buffers with new memory.
3572 *
3573 * The management in the driver is as follows:
3574 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3575 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003576 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003577 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003578 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3579 * 'processed' and 'read' driver indexes as well)
3580 * + A received packet is processed and handed to the kernel network stack,
3581 * detached from the iwl->rxq. The driver 'processed' index is updated.
3582 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3583 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3584 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3585 * were enough free buffers and RX_STALLED is set it is cleared.
3586 *
3587 *
3588 * Driver sequence:
3589 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003590 * iwl3945_rx_queue_alloc() Allocates rx_free
3591 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003592 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003593 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003594 * queue, updates firmware pointers, and updates
3595 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003596 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003597 *
3598 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003599 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003600 * READ INDEX, detaching the SKB from the pool.
3601 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003602 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003603 * slots.
3604 * ...
3605 *
3606 */
3607
3608/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003609 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003610 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003611static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003612{
3613 int s = q->read - q->write;
3614 if (s <= 0)
3615 s += RX_QUEUE_SIZE;
3616 /* keep some buffer to not confuse full and empty queue */
3617 s -= 2;
3618 if (s < 0)
3619 s = 0;
3620 return s;
3621}
3622
3623/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003624 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003625 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003626int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003627{
3628 u32 reg = 0;
3629 int rc = 0;
3630 unsigned long flags;
3631
3632 spin_lock_irqsave(&q->lock, flags);
3633
3634 if (q->need_update == 0)
3635 goto exit_unlock;
3636
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003637 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003638 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003639 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003640
3641 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003642 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003643 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3644 goto exit_unlock;
3645 }
3646
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003647 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003648 if (rc)
3649 goto exit_unlock;
3650
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003651 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003652 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003653 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003654 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003655
3656 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003657 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003658 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003659 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003660
3661
3662 q->need_update = 0;
3663
3664 exit_unlock:
3665 spin_unlock_irqrestore(&q->lock, flags);
3666 return rc;
3667}
3668
3669/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003670 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003671 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003672static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003673 dma_addr_t dma_addr)
3674{
3675 return cpu_to_le32((u32)dma_addr);
3676}
3677
3678/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003679 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003680 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003681 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003682 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003683 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003684 *
3685 * This moves the 'write' index forward to catch up with 'processed', and
3686 * also updates the memory address in the firmware to reference the new
3687 * target buffer.
3688 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003689static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003690{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003691 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003692 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003693 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003694 unsigned long flags;
3695 int write, rc;
3696
3697 spin_lock_irqsave(&rxq->lock, flags);
3698 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003699 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003700 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003701 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003702 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003703 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003704
3705 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003706 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003707 rxq->queue[rxq->write] = rxb;
3708 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3709 rxq->free_count--;
3710 }
3711 spin_unlock_irqrestore(&rxq->lock, flags);
3712 /* If the pre-allocated buffer pool is dropping low, schedule to
3713 * refill it */
3714 if (rxq->free_count <= RX_LOW_WATERMARK)
3715 queue_work(priv->workqueue, &priv->rx_replenish);
3716
3717
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003718 /* If we've added more space for the firmware to place data, tell it.
3719 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07003720 if ((write != (rxq->write & ~0x7))
3721 || (abs(rxq->write - rxq->read) > 7)) {
3722 spin_lock_irqsave(&rxq->lock, flags);
3723 rxq->need_update = 1;
3724 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003725 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07003726 if (rc)
3727 return rc;
3728 }
3729
3730 return 0;
3731}
3732
3733/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003734 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07003735 *
3736 * When moving to rx_free an SKB is allocated for the slot.
3737 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003738 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08003739 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07003740 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003741static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003742{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003743 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003744 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003745 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003746 unsigned long flags;
3747 spin_lock_irqsave(&rxq->lock, flags);
3748 while (!list_empty(&rxq->rx_used)) {
3749 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003750 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003751
3752 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003753 rxb->skb =
3754 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3755 if (!rxb->skb) {
3756 if (net_ratelimit())
3757 printk(KERN_CRIT DRV_NAME
3758 ": Can not allocate SKB buffers\n");
3759 /* We don't reschedule replenish work here -- we will
3760 * call the restock method and if it still needs
3761 * more buffers it will schedule replenish */
3762 break;
3763 }
Zhu Yi12342c42007-12-20 11:27:32 +08003764
3765 /* If radiotap head is required, reserve some headroom here.
3766 * The physical head count is a variable rx_stats->phy_count.
3767 * We reserve 4 bytes here. Plus these extra bytes, the
3768 * headroom of the physical head should be enough for the
3769 * radiotap head that iwl3945 supported. See iwl3945_rt.
3770 */
3771 skb_reserve(rxb->skb, 4);
3772
Zhu Yib481de92007-09-25 17:54:57 -07003773 priv->alloc_rxb_skb++;
3774 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003775
3776 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07003777 rxb->dma_addr =
3778 pci_map_single(priv->pci_dev, rxb->skb->data,
3779 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3780 list_add_tail(&rxb->list, &rxq->rx_free);
3781 rxq->free_count++;
3782 }
3783 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003784}
3785
3786/*
3787 * this should be called while priv->lock is locked
3788 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02003789static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003790{
3791 struct iwl3945_priv *priv = data;
3792
3793 iwl3945_rx_allocate(priv);
3794 iwl3945_rx_queue_restock(priv);
3795}
3796
3797
3798void iwl3945_rx_replenish(void *data)
3799{
3800 struct iwl3945_priv *priv = data;
3801 unsigned long flags;
3802
3803 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003804
3805 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003806 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003807 spin_unlock_irqrestore(&priv->lock, flags);
3808}
3809
3810/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08003811 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07003812 * This free routine walks the list of POOL entries and if SKB is set to
3813 * non NULL it is unmapped and freed
3814 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003815static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003816{
3817 int i;
3818 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3819 if (rxq->pool[i].skb != NULL) {
3820 pci_unmap_single(priv->pci_dev,
3821 rxq->pool[i].dma_addr,
3822 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3823 dev_kfree_skb(rxq->pool[i].skb);
3824 }
3825 }
3826
3827 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3828 rxq->dma_addr);
3829 rxq->bd = NULL;
3830}
3831
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003832int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003833{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003834 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003835 struct pci_dev *dev = priv->pci_dev;
3836 int i;
3837
3838 spin_lock_init(&rxq->lock);
3839 INIT_LIST_HEAD(&rxq->rx_free);
3840 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003841
3842 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07003843 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3844 if (!rxq->bd)
3845 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003846
Zhu Yib481de92007-09-25 17:54:57 -07003847 /* Fill the rx_used queue with _all_ of the Rx buffers */
3848 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3849 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003850
Zhu Yib481de92007-09-25 17:54:57 -07003851 /* Set us so that we have processed and used all buffers, but have
3852 * not restocked the Rx queue with fresh buffers */
3853 rxq->read = rxq->write = 0;
3854 rxq->free_count = 0;
3855 rxq->need_update = 0;
3856 return 0;
3857}
3858
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003859void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003860{
3861 unsigned long flags;
3862 int i;
3863 spin_lock_irqsave(&rxq->lock, flags);
3864 INIT_LIST_HEAD(&rxq->rx_free);
3865 INIT_LIST_HEAD(&rxq->rx_used);
3866 /* Fill the rx_used queue with _all_ of the Rx buffers */
3867 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3868 /* In the reset function, these buffers may have been allocated
3869 * to an SKB, so we need to unmap and free potential storage */
3870 if (rxq->pool[i].skb != NULL) {
3871 pci_unmap_single(priv->pci_dev,
3872 rxq->pool[i].dma_addr,
3873 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3874 priv->alloc_rxb_skb--;
3875 dev_kfree_skb(rxq->pool[i].skb);
3876 rxq->pool[i].skb = NULL;
3877 }
3878 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3879 }
3880
3881 /* Set us so that we have processed and used all buffers, but have
3882 * not restocked the Rx queue with fresh buffers */
3883 rxq->read = rxq->write = 0;
3884 rxq->free_count = 0;
3885 spin_unlock_irqrestore(&rxq->lock, flags);
3886}
3887
3888/* Convert linear signal-to-noise ratio into dB */
3889static u8 ratio2dB[100] = {
3890/* 0 1 2 3 4 5 6 7 8 9 */
3891 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3892 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3893 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3894 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3895 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3896 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3897 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3898 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3899 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3900 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3901};
3902
3903/* Calculates a relative dB value from a ratio of linear
3904 * (i.e. not dB) signal levels.
3905 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003906int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07003907{
Adrian Bunk221c80c2008-02-02 23:19:01 +02003908 /* 1000:1 or higher just report as 60 dB */
3909 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07003910 return 60;
3911
Adrian Bunk221c80c2008-02-02 23:19:01 +02003912 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07003913 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02003914 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07003915 return (20 + (int)ratio2dB[sig_ratio/10]);
3916
3917 /* We shouldn't see this */
3918 if (sig_ratio < 1)
3919 return 0;
3920
3921 /* Use table for ratios 1:1 - 99:1 */
3922 return (int)ratio2dB[sig_ratio];
3923}
3924
3925#define PERFECT_RSSI (-20) /* dBm */
3926#define WORST_RSSI (-95) /* dBm */
3927#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3928
3929/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3930 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3931 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003932int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07003933{
3934 int sig_qual;
3935 int degradation = PERFECT_RSSI - rssi_dbm;
3936
3937 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3938 * as indicator; formula is (signal dbm - noise dbm).
3939 * SNR at or above 40 is a great signal (100%).
3940 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3941 * Weakest usable signal is usually 10 - 15 dB SNR. */
3942 if (noise_dbm) {
3943 if (rssi_dbm - noise_dbm >= 40)
3944 return 100;
3945 else if (rssi_dbm < noise_dbm)
3946 return 0;
3947 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3948
3949 /* Else use just the signal level.
3950 * This formula is a least squares fit of data points collected and
3951 * compared with a reference system that had a percentage (%) display
3952 * for signal quality. */
3953 } else
3954 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3955 (15 * RSSI_RANGE + 62 * degradation)) /
3956 (RSSI_RANGE * RSSI_RANGE);
3957
3958 if (sig_qual > 100)
3959 sig_qual = 100;
3960 else if (sig_qual < 1)
3961 sig_qual = 0;
3962
3963 return sig_qual;
3964}
3965
3966/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003967 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07003968 *
3969 * Uses the priv->rx_handlers callback function array to invoke
3970 * the appropriate handlers, including command responses,
3971 * frame-received notifications, and other notifications.
3972 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003973static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003974{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003975 struct iwl3945_rx_mem_buffer *rxb;
3976 struct iwl3945_rx_packet *pkt;
3977 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003978 u32 r, i;
3979 int reclaim;
3980 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003981 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08003982 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07003983
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003984 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3985 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003986 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003987 i = rxq->read;
3988
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003989 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3990 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07003991 /* Rx interrupt, but nothing sent from uCode */
3992 if (i == r)
3993 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3994
3995 while (i != r) {
3996 rxb = rxq->queue[i];
3997
Ben Cahill9fbab512007-11-29 11:09:47 +08003998 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07003999 * then a bug has been introduced in the queue refilling
4000 * routines -- catch it here */
4001 BUG_ON(rxb == NULL);
4002
4003 rxq->queue[i] = NULL;
4004
4005 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4006 IWL_RX_BUF_SIZE,
4007 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004008 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004009
4010 /* Reclaim a command buffer only if this packet is a response
4011 * to a (driver-originated) command.
4012 * If the packet (e.g. Rx frame) originated from uCode,
4013 * there is no command buffer to reclaim.
4014 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4015 * but apparently a few don't get set; catch them here. */
4016 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4017 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4018 (pkt->hdr.cmd != REPLY_TX);
4019
4020 /* Based on type of command response or notification,
4021 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004022 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004023 if (priv->rx_handlers[pkt->hdr.cmd]) {
4024 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4025 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4026 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4027 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4028 } else {
4029 /* No handling needed */
4030 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4031 "r %d i %d No handler needed for %s, 0x%02x\n",
4032 r, i, get_cmd_string(pkt->hdr.cmd),
4033 pkt->hdr.cmd);
4034 }
4035
4036 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004037 /* Invoke any callbacks, transfer the skb to caller, and
4038 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004039 * as we reclaim the driver command queue */
4040 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004041 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004042 else
4043 IWL_WARNING("Claim null rxb?\n");
4044 }
4045
4046 /* For now we just don't re-use anything. We can tweak this
4047 * later to try and re-use notification packets and SKBs that
4048 * fail to Rx correctly */
4049 if (rxb->skb != NULL) {
4050 priv->alloc_rxb_skb--;
4051 dev_kfree_skb_any(rxb->skb);
4052 rxb->skb = NULL;
4053 }
4054
4055 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4056 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4057 spin_lock_irqsave(&rxq->lock, flags);
4058 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4059 spin_unlock_irqrestore(&rxq->lock, flags);
4060 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004061 /* If there are a lot of unused frames,
4062 * restock the Rx queue so ucode won't assert. */
4063 if (fill_rx) {
4064 count++;
4065 if (count >= 8) {
4066 priv->rxq.read = i;
4067 __iwl3945_rx_replenish(priv);
4068 count = 0;
4069 }
4070 }
Zhu Yib481de92007-09-25 17:54:57 -07004071 }
4072
4073 /* Backtrack one entry */
4074 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004075 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004076}
4077
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004078/**
4079 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4080 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004081static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4082 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004083{
4084 u32 reg = 0;
4085 int rc = 0;
4086 int txq_id = txq->q.id;
4087
4088 if (txq->need_update == 0)
4089 return rc;
4090
4091 /* if we're trying to save power */
4092 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4093 /* wake up nic if it's powered down ...
4094 * uCode will wake up, and interrupt us again, so next
4095 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004096 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004097
4098 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4099 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004100 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004101 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4102 return rc;
4103 }
4104
4105 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004106 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004107 if (rc)
4108 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004109 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004110 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004111 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004112
4113 /* else not in power-save mode, uCode will never sleep when we're
4114 * trying to tx (during RFKILL, we're not trying to tx). */
4115 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004116 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004117 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004118
4119 txq->need_update = 0;
4120
4121 return rc;
4122}
4123
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004124#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004125static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004126{
Joe Perches0795af52007-10-03 17:59:30 -07004127 DECLARE_MAC_BUF(mac);
4128
Zhu Yib481de92007-09-25 17:54:57 -07004129 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004130 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004131 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4132 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4133 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4134 le32_to_cpu(rxon->filter_flags));
4135 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4136 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4137 rxon->ofdm_basic_rates);
4138 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004139 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4140 print_mac(mac, rxon->node_addr));
4141 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4142 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004143 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4144}
4145#endif
4146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004147static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004148{
4149 IWL_DEBUG_ISR("Enabling interrupts\n");
4150 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004151 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004152}
4153
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004154
4155/* call this function to flush any scheduled tasklet */
4156static inline void iwl_synchronize_irq(struct iwl3945_priv *priv)
4157{
4158 /* wait to make sure we flush pedding tasklet*/
4159 synchronize_irq(priv->pci_dev->irq);
4160 tasklet_kill(&priv->irq_tasklet);
4161}
4162
4163
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004164static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004165{
4166 clear_bit(STATUS_INT_ENABLED, &priv->status);
4167
4168 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004169 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004170
4171 /* acknowledge/clear/reset any interrupts still pending
4172 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004173 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4174 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004175 IWL_DEBUG_ISR("Disabled interrupts\n");
4176}
4177
4178static const char *desc_lookup(int i)
4179{
4180 switch (i) {
4181 case 1:
4182 return "FAIL";
4183 case 2:
4184 return "BAD_PARAM";
4185 case 3:
4186 return "BAD_CHECKSUM";
4187 case 4:
4188 return "NMI_INTERRUPT";
4189 case 5:
4190 return "SYSASSERT";
4191 case 6:
4192 return "FATAL_ERROR";
4193 }
4194
4195 return "UNKNOWN";
4196}
4197
4198#define ERROR_START_OFFSET (1 * sizeof(u32))
4199#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004201static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004202{
4203 u32 i;
4204 u32 desc, time, count, base, data1;
4205 u32 blink1, blink2, ilink1, ilink2;
4206 int rc;
4207
4208 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004210 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004211 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4212 return;
4213 }
4214
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004215 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004216 if (rc) {
4217 IWL_WARNING("Can not read from adapter at this time.\n");
4218 return;
4219 }
4220
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004221 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004222
4223 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4224 IWL_ERROR("Start IWL Error Log Dump:\n");
Tomas Winkler2acae162008-03-02 01:25:59 +02004225 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
Zhu Yib481de92007-09-25 17:54:57 -07004226 }
4227
4228 IWL_ERROR("Desc Time asrtPC blink2 "
4229 "ilink1 nmiPC Line\n");
4230 for (i = ERROR_START_OFFSET;
4231 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4232 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004233 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004234 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004235 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004236 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004237 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004238 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004239 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004240 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004241 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004242 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004243 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004244 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004245 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004246
4247 IWL_ERROR
4248 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4249 desc_lookup(desc), desc, time, blink1, blink2,
4250 ilink1, ilink2, data1);
4251 }
4252
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004253 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004254
4255}
4256
Ben Cahillf58177b2007-11-29 11:09:43 +08004257#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004258
4259/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004260 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004261 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004262 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004263 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004264static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004265 u32 num_events, u32 mode)
4266{
4267 u32 i;
4268 u32 base; /* SRAM byte address of event log header */
4269 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4270 u32 ptr; /* SRAM byte address of log data */
4271 u32 ev, time, data; /* event log data */
4272
4273 if (num_events == 0)
4274 return;
4275
4276 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4277
4278 if (mode == 0)
4279 event_size = 2 * sizeof(u32);
4280 else
4281 event_size = 3 * sizeof(u32);
4282
4283 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4284
4285 /* "time" is actually "data" for mode 0 (no timestamp).
4286 * place event id # at far right for easier visual parsing. */
4287 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004288 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004289 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004290 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004291 ptr += sizeof(u32);
4292 if (mode == 0)
4293 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4294 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004295 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004296 ptr += sizeof(u32);
4297 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4298 }
4299 }
4300}
4301
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004302static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004303{
4304 int rc;
4305 u32 base; /* SRAM byte address of event log header */
4306 u32 capacity; /* event log capacity in # entries */
4307 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4308 u32 num_wraps; /* # times uCode wrapped to top of log */
4309 u32 next_entry; /* index of next entry to be written by uCode */
4310 u32 size; /* # entries that we'll print */
4311
4312 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004313 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004314 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4315 return;
4316 }
4317
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004318 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004319 if (rc) {
4320 IWL_WARNING("Can not read from adapter at this time.\n");
4321 return;
4322 }
4323
4324 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004325 capacity = iwl3945_read_targ_mem(priv, base);
4326 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4327 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4328 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004329
4330 size = num_wraps ? capacity : next_entry;
4331
4332 /* bail out if nothing in log */
4333 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004334 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004335 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004336 return;
4337 }
4338
Zhu Yi583fab32007-09-27 11:27:30 +08004339 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004340 size, num_wraps);
4341
4342 /* if uCode has wrapped back to top of log, start at the oldest entry,
4343 * i.e the next one that uCode would fill. */
4344 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004345 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004346 capacity - next_entry, mode);
4347
4348 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004349 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004350
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004351 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004352}
4353
4354/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004355 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004356 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004357static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004358{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004359 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004360 set_bit(STATUS_FW_ERROR, &priv->status);
4361
4362 /* Cancel currently queued command. */
4363 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4364
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004365#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004366 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4367 iwl3945_dump_nic_error_log(priv);
4368 iwl3945_dump_nic_event_log(priv);
4369 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004370 }
4371#endif
4372
4373 wake_up_interruptible(&priv->wait_command_queue);
4374
4375 /* Keep the restart process from trying to send host
4376 * commands by clearing the INIT status bit */
4377 clear_bit(STATUS_READY, &priv->status);
4378
4379 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4380 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4381 "Restarting adapter due to uCode error.\n");
4382
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004383 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004384 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4385 sizeof(priv->recovery_rxon));
4386 priv->error_recovering = 1;
4387 }
4388 queue_work(priv->workqueue, &priv->restart);
4389 }
4390}
4391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004392static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004393{
4394 unsigned long flags;
4395
4396 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4397 sizeof(priv->staging_rxon));
4398 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004399 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004400
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004401 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004402
4403 spin_lock_irqsave(&priv->lock, flags);
4404 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4405 priv->error_recovering = 0;
4406 spin_unlock_irqrestore(&priv->lock, flags);
4407}
4408
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004409static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004410{
4411 u32 inta, handled = 0;
4412 u32 inta_fh;
4413 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004414#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004415 u32 inta_mask;
4416#endif
4417
4418 spin_lock_irqsave(&priv->lock, flags);
4419
4420 /* Ack/clear/reset pending uCode interrupts.
4421 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4422 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004423 inta = iwl3945_read32(priv, CSR_INT);
4424 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004425
4426 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4427 * Any new interrupts that happen after this, either while we're
4428 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004429 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4430 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004431
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004432#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004433 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004434 /* just for debug */
4435 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004436 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4437 inta, inta_mask, inta_fh);
4438 }
4439#endif
4440
4441 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4442 * atomic, make sure that inta covers all the interrupts that
4443 * we've discovered, even if FH interrupt came in just after
4444 * reading CSR_INT. */
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004445 if (inta_fh & CSR39_FH_INT_RX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004446 inta |= CSR_INT_BIT_FH_RX;
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004447 if (inta_fh & CSR39_FH_INT_TX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004448 inta |= CSR_INT_BIT_FH_TX;
4449
4450 /* Now service all interrupt bits discovered above. */
4451 if (inta & CSR_INT_BIT_HW_ERR) {
4452 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4453
4454 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004455 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004456
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004457 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004458
4459 handled |= CSR_INT_BIT_HW_ERR;
4460
4461 spin_unlock_irqrestore(&priv->lock, flags);
4462
4463 return;
4464 }
4465
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004466#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004467 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004468 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004469 if (inta & CSR_INT_BIT_SCD)
4470 IWL_DEBUG_ISR("Scheduler finished to transmit "
4471 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004472
4473 /* Alive notification via Rx interrupt will do the real work */
4474 if (inta & CSR_INT_BIT_ALIVE)
4475 IWL_DEBUG_ISR("Alive interrupt\n");
4476 }
4477#endif
4478 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004479 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004480
4481 /* HW RF KILL switch toggled (4965 only) */
4482 if (inta & CSR_INT_BIT_RF_KILL) {
4483 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004484 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004485 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4486 hw_rf_kill = 1;
4487
4488 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4489 "RF_KILL bit toggled to %s.\n",
4490 hw_rf_kill ? "disable radio":"enable radio");
4491
4492 /* Queue restart only if RF_KILL switch was set to "kill"
4493 * when we loaded driver, and is now set to "enable".
4494 * After we're Alive, RF_KILL gets handled by
Reinette Chatre32304552008-02-15 14:34:37 -08004495 * iwl3945_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004496 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4497 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004498 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004499 }
Zhu Yib481de92007-09-25 17:54:57 -07004500
4501 handled |= CSR_INT_BIT_RF_KILL;
4502 }
4503
4504 /* Chip got too hot and stopped itself (4965 only) */
4505 if (inta & CSR_INT_BIT_CT_KILL) {
4506 IWL_ERROR("Microcode CT kill error detected.\n");
4507 handled |= CSR_INT_BIT_CT_KILL;
4508 }
4509
4510 /* Error detected by uCode */
4511 if (inta & CSR_INT_BIT_SW_ERR) {
4512 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4513 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004514 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004515 handled |= CSR_INT_BIT_SW_ERR;
4516 }
4517
4518 /* uCode wakes up after power-down sleep */
4519 if (inta & CSR_INT_BIT_WAKEUP) {
4520 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004521 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4522 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4523 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4524 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4525 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4526 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4527 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004528
4529 handled |= CSR_INT_BIT_WAKEUP;
4530 }
4531
4532 /* All uCode command responses, including Tx command responses,
4533 * Rx "responses" (frame-received notification), and other
4534 * notifications from uCode come through here*/
4535 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004536 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004537 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4538 }
4539
4540 if (inta & CSR_INT_BIT_FH_TX) {
4541 IWL_DEBUG_ISR("Tx interrupt\n");
4542
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004543 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4544 if (!iwl3945_grab_nic_access(priv)) {
4545 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004546 FH_TCSR_CREDIT
4547 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004548 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004549 }
4550 handled |= CSR_INT_BIT_FH_TX;
4551 }
4552
4553 if (inta & ~handled)
4554 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4555
4556 if (inta & ~CSR_INI_SET_MASK) {
4557 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4558 inta & ~CSR_INI_SET_MASK);
4559 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4560 }
4561
4562 /* Re-enable all interrupts */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004563 /* only Re-enable if disabled by irq */
4564 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4565 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004566
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004567#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004568 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4569 inta = iwl3945_read32(priv, CSR_INT);
4570 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4571 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004572 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4573 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4574 }
4575#endif
4576 spin_unlock_irqrestore(&priv->lock, flags);
4577}
4578
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004579static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004580{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004581 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004582 u32 inta, inta_mask;
4583 u32 inta_fh;
4584 if (!priv)
4585 return IRQ_NONE;
4586
4587 spin_lock(&priv->lock);
4588
4589 /* Disable (but don't clear!) interrupts here to avoid
4590 * back-to-back ISRs and sporadic interrupts from our NIC.
4591 * If we have something to service, the tasklet will re-enable ints.
4592 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004593 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4594 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004595
4596 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004597 inta = iwl3945_read32(priv, CSR_INT);
4598 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004599
4600 /* Ignore interrupt if there's nothing in NIC to service.
4601 * This may be due to IRQ shared with another device,
4602 * or due to sporadic interrupts thrown from our NIC. */
4603 if (!inta && !inta_fh) {
4604 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4605 goto none;
4606 }
4607
4608 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4609 /* Hardware disappeared */
4610 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004611 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004612 }
4613
4614 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4615 inta, inta_mask, inta_fh);
4616
Joonwoo Park25c03d82008-01-23 10:15:20 -08004617 inta &= ~CSR_INT_BIT_SCD;
4618
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004619 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004620 if (likely(inta || inta_fh))
4621 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004622unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004623 spin_unlock(&priv->lock);
4624
4625 return IRQ_HANDLED;
4626
4627 none:
4628 /* re-enable interrupts here since we don't have anything to service. */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07004629 /* only Re-enable if disabled by irq */
4630 if (test_bit(STATUS_INT_ENABLED, &priv->status))
4631 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004632 spin_unlock(&priv->lock);
4633 return IRQ_NONE;
4634}
4635
4636/************************** EEPROM BANDS ****************************
4637 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004638 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004639 * EEPROM contents to the specific channel number supported for each
4640 * band.
4641 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004642 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004643 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4644 * The specific geography and calibration information for that channel
4645 * is contained in the eeprom map itself.
4646 *
4647 * During init, we copy the eeprom information and channel map
4648 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4649 *
4650 * channel_map_24/52 provides the index in the channel_info array for a
4651 * given channel. We have to have two separate maps as there is channel
4652 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4653 * band_2
4654 *
4655 * A value of 0xff stored in the channel_map indicates that the channel
4656 * is not supported by the hardware at all.
4657 *
4658 * A value of 0xfe in the channel_map indicates that the channel is not
4659 * valid for Tx with the current hardware. This means that
4660 * while the system can tune and receive on a given channel, it may not
4661 * be able to associate or transmit any frames on that
4662 * channel. There is no corresponding channel information for that
4663 * entry.
4664 *
4665 *********************************************************************/
4666
4667/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004668static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004669 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4670};
4671
4672/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004673static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004674 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4675};
4676
Ben Cahill9fbab512007-11-29 11:09:47 +08004677static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004678 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4679};
4680
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004681static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004682 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4683};
4684
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004685static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004686 145, 149, 153, 157, 161, 165
4687};
4688
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004689static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004690 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004691 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004692 **eeprom_ch_info,
4693 const u8 **eeprom_ch_index)
4694{
4695 switch (band) {
4696 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004697 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004698 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004699 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004700 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004701 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004702 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004703 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004704 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004705 break;
4706 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004707 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004708 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004709 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004710 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004711 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004712 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004713 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004714 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004715 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004716 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004717 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004718 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004719 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004720 break;
4721 default:
4722 BUG();
4723 return;
4724 }
4725}
4726
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004727/**
4728 * iwl3945_get_channel_info - Find driver's private channel info
4729 *
4730 * Based on band and channel number.
4731 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004732const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01004733 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07004734{
4735 int i;
4736
Johannes Berg8318d782008-01-24 19:38:38 +01004737 switch (band) {
4738 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004739 for (i = 14; i < priv->channel_count; i++) {
4740 if (priv->channel_info[i].channel == channel)
4741 return &priv->channel_info[i];
4742 }
4743 break;
4744
Johannes Berg8318d782008-01-24 19:38:38 +01004745 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004746 if (channel >= 1 && channel <= 14)
4747 return &priv->channel_info[channel - 1];
4748 break;
Johannes Berg8318d782008-01-24 19:38:38 +01004749 case IEEE80211_NUM_BANDS:
4750 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07004751 }
4752
4753 return NULL;
4754}
4755
4756#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4757 ? # x " " : "")
4758
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004759/**
4760 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4761 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004762static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004763{
4764 int eeprom_ch_count = 0;
4765 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004766 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07004767 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004768 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004769
4770 if (priv->channel_count) {
4771 IWL_DEBUG_INFO("Channel map already initialized.\n");
4772 return 0;
4773 }
4774
4775 if (priv->eeprom.version < 0x2f) {
4776 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4777 priv->eeprom.version);
4778 return -EINVAL;
4779 }
4780
4781 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4782
4783 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004784 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4785 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4786 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4787 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4788 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004789
4790 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4791
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004792 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07004793 priv->channel_count, GFP_KERNEL);
4794 if (!priv->channel_info) {
4795 IWL_ERROR("Could not allocate channel_info\n");
4796 priv->channel_count = 0;
4797 return -ENOMEM;
4798 }
4799
4800 ch_info = priv->channel_info;
4801
4802 /* Loop through the 5 EEPROM bands adding them in order to the
4803 * channel map we maintain (that contains additional information than
4804 * what just in the EEPROM) */
4805 for (band = 1; band <= 5; band++) {
4806
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004807 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07004808 &eeprom_ch_info, &eeprom_ch_index);
4809
4810 /* Loop through each band adding each of the channels */
4811 for (ch = 0; ch < eeprom_ch_count; ch++) {
4812 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01004813 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4814 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07004815
4816 /* permanently store EEPROM's channel regulatory flags
4817 * and max power in channel info database. */
4818 ch_info->eeprom = eeprom_ch_info[ch];
4819
4820 /* Copy the run-time flags so they are there even on
4821 * invalid channels */
4822 ch_info->flags = eeprom_ch_info[ch].flags;
4823
4824 if (!(is_channel_valid(ch_info))) {
4825 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4826 "No traffic\n",
4827 ch_info->channel,
4828 ch_info->flags,
4829 is_channel_a_band(ch_info) ?
4830 "5.2" : "2.4");
4831 ch_info++;
4832 continue;
4833 }
4834
4835 /* Initialize regulatory-based run-time data */
4836 ch_info->max_power_avg = ch_info->curr_txpow =
4837 eeprom_ch_info[ch].max_power_avg;
4838 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4839 ch_info->min_power = 0;
4840
Guy Cohenfe7c4042008-04-21 15:41:56 -07004841 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
Zhu Yib481de92007-09-25 17:54:57 -07004842 " %ddBm): Ad-Hoc %ssupported\n",
4843 ch_info->channel,
4844 is_channel_a_band(ch_info) ?
4845 "5.2" : "2.4",
Tomas Winkler8211ef72008-03-02 01:36:04 +02004846 CHECK_AND_PRINT(VALID),
Zhu Yib481de92007-09-25 17:54:57 -07004847 CHECK_AND_PRINT(IBSS),
4848 CHECK_AND_PRINT(ACTIVE),
4849 CHECK_AND_PRINT(RADAR),
4850 CHECK_AND_PRINT(WIDE),
Zhu Yib481de92007-09-25 17:54:57 -07004851 CHECK_AND_PRINT(DFS),
4852 eeprom_ch_info[ch].flags,
4853 eeprom_ch_info[ch].max_power_avg,
4854 ((eeprom_ch_info[ch].
4855 flags & EEPROM_CHANNEL_IBSS)
4856 && !(eeprom_ch_info[ch].
4857 flags & EEPROM_CHANNEL_RADAR))
4858 ? "" : "not ");
4859
4860 /* Set the user_txpower_limit to the highest power
4861 * supported by any channel */
4862 if (eeprom_ch_info[ch].max_power_avg >
4863 priv->user_txpower_limit)
4864 priv->user_txpower_limit =
4865 eeprom_ch_info[ch].max_power_avg;
4866
4867 ch_info++;
4868 }
4869 }
4870
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004871 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07004872 if (iwl3945_txpower_set_from_eeprom(priv))
4873 return -EIO;
4874
4875 return 0;
4876}
4877
Reinette Chatre849e0dc2008-01-23 10:15:18 -08004878/*
4879 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4880 */
4881static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4882{
4883 kfree(priv->channel_info);
4884 priv->channel_count = 0;
4885}
4886
Zhu Yib481de92007-09-25 17:54:57 -07004887/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4888 * sending probe req. This should be set long enough to hear probe responses
4889 * from more than one AP. */
4890#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4891#define IWL_ACTIVE_DWELL_TIME_52 (10)
4892
4893/* For faster active scanning, scan will move to the next channel if fewer than
4894 * PLCP_QUIET_THRESH packets are heard on this channel within
4895 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4896 * time if it's a quiet channel (nothing responded to our probe, and there's
4897 * no other traffic).
4898 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4899#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4900#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4901
4902/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4903 * Must be set longer than active dwell time.
4904 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4905#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4906#define IWL_PASSIVE_DWELL_TIME_52 (10)
4907#define IWL_PASSIVE_DWELL_BASE (100)
4908#define IWL_CHANNEL_TUNE_TIME 5
4909
Johannes Berg8318d782008-01-24 19:38:38 +01004910static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4911 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004912{
Johannes Berg8318d782008-01-24 19:38:38 +01004913 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004914 return IWL_ACTIVE_DWELL_TIME_52;
4915 else
4916 return IWL_ACTIVE_DWELL_TIME_24;
4917}
4918
Johannes Berg8318d782008-01-24 19:38:38 +01004919static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4920 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004921{
Johannes Berg8318d782008-01-24 19:38:38 +01004922 u16 active = iwl3945_get_active_dwell_time(priv, band);
4923 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07004924 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4925 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4926
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004927 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004928 /* If we're associated, we clamp the maximum passive
4929 * dwell time to be 98% of the beacon interval (minus
4930 * 2 * channel tune time) */
4931 passive = priv->beacon_int;
4932 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4933 passive = IWL_PASSIVE_DWELL_BASE;
4934 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4935 }
4936
4937 if (passive <= active)
4938 passive = active + 1;
4939
4940 return passive;
4941}
4942
Johannes Berg8318d782008-01-24 19:38:38 +01004943static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4944 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07004945 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004946 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07004947{
4948 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01004949 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004950 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004951 u16 passive_dwell = 0;
4952 u16 active_dwell = 0;
4953 int added, i;
4954
Johannes Berg8318d782008-01-24 19:38:38 +01004955 sband = iwl3945_get_band(priv, band);
4956 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07004957 return 0;
4958
Johannes Berg8318d782008-01-24 19:38:38 +01004959 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07004960
Johannes Berg8318d782008-01-24 19:38:38 +01004961 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4962 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07004963
Johannes Berg8318d782008-01-24 19:38:38 +01004964 for (i = 0, added = 0; i < sband->n_channels; i++) {
Johannes Berg182e2e62008-04-04 10:41:56 +02004965 if (channels[i].flags & IEEE80211_CHAN_DISABLED)
4966 continue;
4967
Johannes Berg8318d782008-01-24 19:38:38 +01004968 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07004969
Johannes Berg8318d782008-01-24 19:38:38 +01004970 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07004971 if (!is_channel_valid(ch_info)) {
Ron Rindjunsky66b50042008-06-25 16:46:31 +08004972 IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
Zhu Yib481de92007-09-25 17:54:57 -07004973 scan_ch->channel);
4974 continue;
4975 }
4976
4977 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01004978 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07004979 scan_ch->type = 0; /* passive */
4980 else
4981 scan_ch->type = 1; /* active */
4982
4983 if (scan_ch->type & 1)
4984 scan_ch->type |= (direct_mask << 1);
4985
Zhu Yib481de92007-09-25 17:54:57 -07004986 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4987 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4988
Ben Cahill9fbab512007-11-29 11:09:47 +08004989 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07004990 scan_ch->tpc.dsp_atten = 110;
4991 /* scan_pwr_info->tpc.dsp_atten; */
4992
4993 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01004994 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004995 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4996 else {
4997 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4998 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08004999 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08005000 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07005001 */
5002 }
5003
5004 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5005 scan_ch->channel,
5006 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5007 (scan_ch->type & 1) ?
5008 active_dwell : passive_dwell);
5009
5010 scan_ch++;
5011 added++;
5012 }
5013
5014 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5015 return added;
5016}
5017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005018static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005019 struct ieee80211_rate *rates)
5020{
5021 int i;
5022
5023 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005024 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5025 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5026 rates[i].hw_value_short = i;
5027 rates[i].flags = 0;
5028 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005029 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005030 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005031 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005032 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005033 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005034 }
Zhu Yib481de92007-09-25 17:54:57 -07005035 }
5036}
5037
5038/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005039 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005040 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005041static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005042{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005043 struct iwl3945_channel_info *ch;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005044 struct ieee80211_supported_band *sband;
Zhu Yib481de92007-09-25 17:54:57 -07005045 struct ieee80211_channel *channels;
5046 struct ieee80211_channel *geo_ch;
5047 struct ieee80211_rate *rates;
5048 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005049
Johannes Berg8318d782008-01-24 19:38:38 +01005050 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5051 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005052 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5053 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5054 return 0;
5055 }
5056
Zhu Yib481de92007-09-25 17:54:57 -07005057 channels = kzalloc(sizeof(struct ieee80211_channel) *
5058 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005059 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005060 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005061
Tomas Winkler8211ef72008-03-02 01:36:04 +02005062 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
Zhu Yib481de92007-09-25 17:54:57 -07005063 GFP_KERNEL);
5064 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005065 kfree(channels);
5066 return -ENOMEM;
5067 }
5068
Zhu Yib481de92007-09-25 17:54:57 -07005069 /* 5.2GHz channels start after the 2.4GHz channels */
Tomas Winkler8211ef72008-03-02 01:36:04 +02005070 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5071 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5072 /* just OFDM */
5073 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5074 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
Zhu Yib481de92007-09-25 17:54:57 -07005075
Tomas Winkler8211ef72008-03-02 01:36:04 +02005076 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5077 sband->channels = channels;
5078 /* OFDM & CCK */
5079 sband->bitrates = rates;
5080 sband->n_bitrates = IWL_RATE_COUNT;
Zhu Yib481de92007-09-25 17:54:57 -07005081
5082 priv->ieee_channels = channels;
5083 priv->ieee_rates = rates;
5084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005085 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005086
Tomas Winkler8211ef72008-03-02 01:36:04 +02005087 for (i = 0; i < priv->channel_count; i++) {
Zhu Yib481de92007-09-25 17:54:57 -07005088 ch = &priv->channel_info[i];
5089
Tomas Winkler8211ef72008-03-02 01:36:04 +02005090 /* FIXME: might be removed if scan is OK*/
5091 if (!is_channel_valid(ch))
Zhu Yib481de92007-09-25 17:54:57 -07005092 continue;
Zhu Yib481de92007-09-25 17:54:57 -07005093
5094 if (is_channel_a_band(ch))
Tomas Winkler8211ef72008-03-02 01:36:04 +02005095 sband = &priv->bands[IEEE80211_BAND_5GHZ];
Johannes Berg8318d782008-01-24 19:38:38 +01005096 else
Tomas Winkler8211ef72008-03-02 01:36:04 +02005097 sband = &priv->bands[IEEE80211_BAND_2GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005098
Tomas Winkler8211ef72008-03-02 01:36:04 +02005099 geo_ch = &sband->channels[sband->n_channels++];
5100
5101 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
Johannes Berg8318d782008-01-24 19:38:38 +01005102 geo_ch->max_power = ch->max_power_avg;
5103 geo_ch->max_antenna_gain = 0xff;
Mohamed Abbas7b723042008-01-31 21:46:40 -08005104 geo_ch->hw_value = ch->channel;
Zhu Yib481de92007-09-25 17:54:57 -07005105
5106 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005107 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5108 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005109
Johannes Berg8318d782008-01-24 19:38:38 +01005110 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5111 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005112
5113 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005114 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005115
5116 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5117 priv->max_channel_txpower_limit =
5118 ch->max_power_avg;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005119 } else {
Johannes Berg8318d782008-01-24 19:38:38 +01005120 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005121 }
5122
5123 /* Save flags for reg domain usage */
5124 geo_ch->orig_flags = geo_ch->flags;
5125
5126 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5127 ch->channel, geo_ch->center_freq,
5128 is_channel_a_band(ch) ? "5.2" : "2.4",
5129 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5130 "restricted" : "valid",
5131 geo_ch->flags);
Zhu Yib481de92007-09-25 17:54:57 -07005132 }
5133
Tomas Winkler82b9a122008-03-04 18:09:30 -08005134 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5135 priv->cfg->sku & IWL_SKU_A) {
Zhu Yib481de92007-09-25 17:54:57 -07005136 printk(KERN_INFO DRV_NAME
5137 ": Incorrectly detected BG card as ABG. Please send "
5138 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5139 priv->pci_dev->device, priv->pci_dev->subsystem_device);
Tomas Winkler82b9a122008-03-04 18:09:30 -08005140 priv->cfg->sku &= ~IWL_SKU_A;
Zhu Yib481de92007-09-25 17:54:57 -07005141 }
5142
5143 printk(KERN_INFO DRV_NAME
5144 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005145 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5146 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005147
John W. Linvillee0e0a672008-03-25 15:58:40 -04005148 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5149 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5150 &priv->bands[IEEE80211_BAND_2GHZ];
5151 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5152 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5153 &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005154
Zhu Yib481de92007-09-25 17:54:57 -07005155 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5156
5157 return 0;
5158}
5159
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005160/*
5161 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5162 */
5163static void iwl3945_free_geos(struct iwl3945_priv *priv)
5164{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005165 kfree(priv->ieee_channels);
5166 kfree(priv->ieee_rates);
5167 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5168}
5169
Zhu Yib481de92007-09-25 17:54:57 -07005170/******************************************************************************
5171 *
5172 * uCode download functions
5173 *
5174 ******************************************************************************/
5175
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005176static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005177{
Tomas Winkler98c92212008-01-14 17:46:20 -08005178 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5179 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5180 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5181 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5182 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5183 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005184}
5185
5186/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005187 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005188 * looking at all data.
5189 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005190static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005191{
5192 u32 val;
5193 u32 save_len = len;
5194 int rc = 0;
5195 u32 errcnt;
5196
5197 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005199 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005200 if (rc)
5201 return rc;
5202
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005203 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005204
5205 errcnt = 0;
5206 for (; len > 0; len -= sizeof(u32), image++) {
5207 /* read data comes through single port, auto-incr addr */
5208 /* NOTE: Use the debugless read so we don't flood kernel log
5209 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005210 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005211 if (val != le32_to_cpu(*image)) {
5212 IWL_ERROR("uCode INST section is invalid at "
5213 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5214 save_len - len, val, le32_to_cpu(*image));
5215 rc = -EIO;
5216 errcnt++;
5217 if (errcnt >= 20)
5218 break;
5219 }
5220 }
5221
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005222 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005223
5224 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005225 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005226
5227 return rc;
5228}
5229
5230
5231/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005232 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005233 * using sample data 100 bytes apart. If these sample points are good,
5234 * it's a pretty good bet that everything between them is good, too.
5235 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005236static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005237{
5238 u32 val;
5239 int rc = 0;
5240 u32 errcnt = 0;
5241 u32 i;
5242
5243 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5244
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005245 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005246 if (rc)
5247 return rc;
5248
5249 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5250 /* read data comes through single port, auto-incr addr */
5251 /* NOTE: Use the debugless read so we don't flood kernel log
5252 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005253 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005254 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005255 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005256 if (val != le32_to_cpu(*image)) {
5257#if 0 /* Enable this if you want to see details */
5258 IWL_ERROR("uCode INST section is invalid at "
5259 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5260 i, val, *image);
5261#endif
5262 rc = -EIO;
5263 errcnt++;
5264 if (errcnt >= 3)
5265 break;
5266 }
5267 }
5268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005269 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005270
5271 return rc;
5272}
5273
5274
5275/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005276 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005277 * and verify its contents
5278 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005279static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005280{
5281 __le32 *image;
5282 u32 len;
5283 int rc = 0;
5284
5285 /* Try bootstrap */
5286 image = (__le32 *)priv->ucode_boot.v_addr;
5287 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005288 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005289 if (rc == 0) {
5290 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5291 return 0;
5292 }
5293
5294 /* Try initialize */
5295 image = (__le32 *)priv->ucode_init.v_addr;
5296 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005297 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005298 if (rc == 0) {
5299 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5300 return 0;
5301 }
5302
5303 /* Try runtime/protocol */
5304 image = (__le32 *)priv->ucode_code.v_addr;
5305 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005306 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005307 if (rc == 0) {
5308 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5309 return 0;
5310 }
5311
5312 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5313
Ben Cahill9fbab512007-11-29 11:09:47 +08005314 /* Since nothing seems to match, show first several data entries in
5315 * instruction SRAM, so maybe visual inspection will give a clue.
5316 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005317 image = (__le32 *)priv->ucode_boot.v_addr;
5318 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005319 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005320
5321 return rc;
5322}
5323
5324
5325/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005326static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005327{
5328 __le32 *image = priv->ucode_boot.v_addr;
5329 u32 len = priv->ucode_boot.len;
5330 u32 reg;
5331 u32 val;
5332
5333 IWL_DEBUG_INFO("Begin verify bsm\n");
5334
5335 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005336 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005337 for (reg = BSM_SRAM_LOWER_BOUND;
5338 reg < BSM_SRAM_LOWER_BOUND + len;
5339 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005340 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005341 if (val != le32_to_cpu(*image)) {
5342 IWL_ERROR("BSM uCode verification failed at "
5343 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5344 BSM_SRAM_LOWER_BOUND,
5345 reg - BSM_SRAM_LOWER_BOUND, len,
5346 val, le32_to_cpu(*image));
5347 return -EIO;
5348 }
5349 }
5350
5351 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5352
5353 return 0;
5354}
5355
5356/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005357 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005358 *
5359 * BSM operation:
5360 *
5361 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5362 * in special SRAM that does not power down during RFKILL. When powering back
5363 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5364 * the bootstrap program into the on-board processor, and starts it.
5365 *
5366 * The bootstrap program loads (via DMA) instructions and data for a new
5367 * program from host DRAM locations indicated by the host driver in the
5368 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5369 * automatically.
5370 *
5371 * When initializing the NIC, the host driver points the BSM to the
5372 * "initialize" uCode image. This uCode sets up some internal data, then
5373 * notifies host via "initialize alive" that it is complete.
5374 *
5375 * The host then replaces the BSM_DRAM_* pointer values to point to the
5376 * normal runtime uCode instructions and a backup uCode data cache buffer
5377 * (filled initially with starting data values for the on-board processor),
5378 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5379 * which begins normal operation.
5380 *
5381 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5382 * the backup data cache in DRAM before SRAM is powered down.
5383 *
5384 * When powering back up, the BSM loads the bootstrap program. This reloads
5385 * the runtime uCode instructions and the backup data cache into SRAM,
5386 * and re-launches the runtime uCode from where it left off.
5387 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005388static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005389{
5390 __le32 *image = priv->ucode_boot.v_addr;
5391 u32 len = priv->ucode_boot.len;
5392 dma_addr_t pinst;
5393 dma_addr_t pdata;
5394 u32 inst_len;
5395 u32 data_len;
5396 int rc;
5397 int i;
5398 u32 done;
5399 u32 reg_offset;
5400
5401 IWL_DEBUG_INFO("Begin load bsm\n");
5402
5403 /* make sure bootstrap program is no larger than BSM's SRAM size */
5404 if (len > IWL_MAX_BSM_SIZE)
5405 return -EINVAL;
5406
5407 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005408 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005409 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005410 * after the "initialize" uCode has run, to point to
5411 * runtime/protocol instructions and backup data cache. */
5412 pinst = priv->ucode_init.p_addr;
5413 pdata = priv->ucode_init_data.p_addr;
5414 inst_len = priv->ucode_init.len;
5415 data_len = priv->ucode_init_data.len;
5416
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005417 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005418 if (rc)
5419 return rc;
5420
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005421 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5422 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5423 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5424 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005425
5426 /* Fill BSM memory with bootstrap instructions */
5427 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5428 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5429 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005430 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005431 le32_to_cpu(*image));
5432
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005433 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005434 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005435 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005436 return rc;
5437 }
5438
5439 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005440 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5441 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005442 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005443 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005444
5445 /* Load bootstrap code into instruction SRAM now,
5446 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005447 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005448 BSM_WR_CTRL_REG_BIT_START);
5449
5450 /* Wait for load of bootstrap uCode to finish */
5451 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005452 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005453 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5454 break;
5455 udelay(10);
5456 }
5457 if (i < 100)
5458 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5459 else {
5460 IWL_ERROR("BSM write did not complete!\n");
5461 return -EIO;
5462 }
5463
5464 /* Enable future boot loads whenever power management unit triggers it
5465 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005466 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005467 BSM_WR_CTRL_REG_BIT_START_EN);
5468
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005469 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005470
5471 return 0;
5472}
5473
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005474static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005475{
5476 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005477 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005478}
5479
5480/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005481 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005482 *
5483 * Copy into buffers for card to fetch via bus-mastering
5484 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005485static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005486{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005487 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005488 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005489 const struct firmware *ucode_raw;
5490 /* firmware file name contains uCode/driver compatibility version */
Tomas Winkler4bf775c2008-03-04 18:09:31 -08005491 const char *name = priv->cfg->fw_name;
Zhu Yib481de92007-09-25 17:54:57 -07005492 u8 *src;
5493 size_t len;
5494 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5495
5496 /* Ask kernel firmware_class module to get the boot firmware off disk.
5497 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005498 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5499 if (ret < 0) {
5500 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5501 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005502 goto error;
5503 }
5504
5505 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5506 name, ucode_raw->size);
5507
5508 /* Make sure that we got at least our header! */
5509 if (ucode_raw->size < sizeof(*ucode)) {
5510 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005511 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005512 goto err_release;
5513 }
5514
5515 /* Data from ucode file: header followed by uCode images */
5516 ucode = (void *)ucode_raw->data;
5517
5518 ver = le32_to_cpu(ucode->ver);
5519 inst_size = le32_to_cpu(ucode->inst_size);
5520 data_size = le32_to_cpu(ucode->data_size);
5521 init_size = le32_to_cpu(ucode->init_size);
5522 init_data_size = le32_to_cpu(ucode->init_data_size);
5523 boot_size = le32_to_cpu(ucode->boot_size);
5524
5525 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005526 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5527 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5528 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5529 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5530 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005531
5532 /* Verify size of file vs. image size info in file's header */
5533 if (ucode_raw->size < sizeof(*ucode) +
5534 inst_size + data_size + init_size +
5535 init_data_size + boot_size) {
5536
5537 IWL_DEBUG_INFO("uCode file size %d too small\n",
5538 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005539 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005540 goto err_release;
5541 }
5542
5543 /* Verify that uCode images will fit in card's SRAM */
5544 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005545 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5546 inst_size);
5547 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005548 goto err_release;
5549 }
5550
5551 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005552 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5553 data_size);
5554 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005555 goto err_release;
5556 }
5557 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005558 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5559 init_size);
5560 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005561 goto err_release;
5562 }
5563 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005564 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5565 init_data_size);
5566 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005567 goto err_release;
5568 }
5569 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005570 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5571 boot_size);
5572 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005573 goto err_release;
5574 }
5575
5576 /* Allocate ucode buffers for card's bus-master loading ... */
5577
5578 /* Runtime instructions and 2 copies of data:
5579 * 1) unmodified from disk
5580 * 2) backup cache for save/restore during power-downs */
5581 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005582 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005583
5584 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005585 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005586
5587 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005588 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005589
5590 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005591 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005592 goto err_pci_alloc;
5593
Tomas Winkler90e759d2007-11-29 11:09:41 +08005594 /* Initialization instructions and data */
5595 if (init_size && init_data_size) {
5596 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005597 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005598
5599 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005600 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005601
5602 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5603 goto err_pci_alloc;
5604 }
5605
5606 /* Bootstrap (instructions only, no data) */
5607 if (boot_size) {
5608 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005609 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005610
5611 if (!priv->ucode_boot.v_addr)
5612 goto err_pci_alloc;
5613 }
5614
Zhu Yib481de92007-09-25 17:54:57 -07005615 /* Copy images into buffers for card's bus-master reads ... */
5616
5617 /* Runtime instructions (first block of data in file) */
5618 src = &ucode->data[0];
5619 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005620 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005621 memcpy(priv->ucode_code.v_addr, src, len);
5622 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5623 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5624
5625 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005626 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005627 src = &ucode->data[inst_size];
5628 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005629 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005630 memcpy(priv->ucode_data.v_addr, src, len);
5631 memcpy(priv->ucode_data_backup.v_addr, src, len);
5632
5633 /* Initialization instructions (3rd block) */
5634 if (init_size) {
5635 src = &ucode->data[inst_size + data_size];
5636 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005637 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5638 len);
Zhu Yib481de92007-09-25 17:54:57 -07005639 memcpy(priv->ucode_init.v_addr, src, len);
5640 }
5641
5642 /* Initialization data (4th block) */
5643 if (init_data_size) {
5644 src = &ucode->data[inst_size + data_size + init_size];
5645 len = priv->ucode_init_data.len;
5646 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5647 (int)len);
5648 memcpy(priv->ucode_init_data.v_addr, src, len);
5649 }
5650
5651 /* Bootstrap instructions (5th block) */
5652 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5653 len = priv->ucode_boot.len;
5654 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5655 (int)len);
5656 memcpy(priv->ucode_boot.v_addr, src, len);
5657
5658 /* We have our copies now, allow OS release its copies */
5659 release_firmware(ucode_raw);
5660 return 0;
5661
5662 err_pci_alloc:
5663 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005664 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005665 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005666
5667 err_release:
5668 release_firmware(ucode_raw);
5669
5670 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005671 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005672}
5673
5674
5675/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005676 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005677 *
5678 * Tell initialization uCode where to find runtime uCode.
5679 *
5680 * BSM registers initially contain pointers to initialization uCode.
5681 * We need to replace them to load runtime uCode inst and data,
5682 * and to save runtime data when powering down.
5683 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005684static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005685{
5686 dma_addr_t pinst;
5687 dma_addr_t pdata;
5688 int rc = 0;
5689 unsigned long flags;
5690
5691 /* bits 31:0 for 3945 */
5692 pinst = priv->ucode_code.p_addr;
5693 pdata = priv->ucode_data_backup.p_addr;
5694
5695 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005696 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005697 if (rc) {
5698 spin_unlock_irqrestore(&priv->lock, flags);
5699 return rc;
5700 }
5701
5702 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005703 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5704 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5705 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005706 priv->ucode_data.len);
5707
5708 /* Inst bytecount must be last to set up, bit 31 signals uCode
5709 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005710 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005711 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5712
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005713 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005714
5715 spin_unlock_irqrestore(&priv->lock, flags);
5716
5717 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5718
5719 return rc;
5720}
5721
5722/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005723 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005724 *
5725 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5726 *
Zhu Yib481de92007-09-25 17:54:57 -07005727 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08005728 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005729static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005730{
5731 /* Check alive response for "valid" sign from uCode */
5732 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5733 /* We had an error bringing up the hardware, so take it
5734 * all the way back down so we can try again */
5735 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5736 goto restart;
5737 }
5738
5739 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5740 * This is a paranoid check, because we would not have gotten the
5741 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005742 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005743 /* Runtime instruction load was bad;
5744 * take it all the way back down so we can try again */
5745 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5746 goto restart;
5747 }
5748
5749 /* Send pointers to protocol/runtime uCode image ... init code will
5750 * load and launch runtime uCode, which will send us another "Alive"
5751 * notification. */
5752 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005753 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005754 /* Runtime instruction load won't happen;
5755 * take it all the way back down so we can try again */
5756 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5757 goto restart;
5758 }
5759 return;
5760
5761 restart:
5762 queue_work(priv->workqueue, &priv->restart);
5763}
5764
5765
5766/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005767 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005768 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005769 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07005770 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005771static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005772{
5773 int rc = 0;
5774 int thermal_spin = 0;
5775 u32 rfkill;
5776
5777 IWL_DEBUG_INFO("Runtime Alive received.\n");
5778
5779 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5780 /* We had an error bringing up the hardware, so take it
5781 * all the way back down so we can try again */
5782 IWL_DEBUG_INFO("Alive failed.\n");
5783 goto restart;
5784 }
5785
5786 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5787 * This is a paranoid check, because we would not have gotten the
5788 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005789 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005790 /* Runtime instruction load was bad;
5791 * take it all the way back down so we can try again */
5792 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5793 goto restart;
5794 }
5795
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005796 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005797
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005798 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005799 if (rc) {
5800 IWL_WARNING("Can not read rfkill status from adapter\n");
5801 return;
5802 }
5803
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005804 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005805 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005806 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005807
5808 if (rfkill & 0x1) {
5809 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5810 /* if rfkill is not on, then wait for thermal
5811 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005812 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07005813 thermal_spin++;
5814 udelay(10);
5815 }
5816
5817 if (thermal_spin)
5818 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5819 thermal_spin * 10);
5820 } else
5821 set_bit(STATUS_RF_KILL_HW, &priv->status);
5822
Ben Cahill9fbab512007-11-29 11:09:47 +08005823 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07005824 set_bit(STATUS_ALIVE, &priv->status);
5825
5826 /* Clear out the uCode error bit if it is set */
5827 clear_bit(STATUS_FW_ERROR, &priv->status);
5828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005829 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07005830 return;
5831
Johannes Berg36d68252008-05-15 12:55:26 +02005832 ieee80211_wake_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07005833
5834 priv->active_rate = priv->rates_mask;
5835 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5836
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005837 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07005838
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005839 if (iwl3945_is_associated(priv)) {
5840 struct iwl3945_rxon_cmd *active_rxon =
5841 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005842
5843 memcpy(&priv->staging_rxon, &priv->active_rxon,
5844 sizeof(priv->staging_rxon));
5845 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5846 } else {
5847 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005848 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005849 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5850 }
5851
Ben Cahill9fbab512007-11-29 11:09:47 +08005852 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005853 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005854
5855 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005856 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005857
Zhu Yib481de92007-09-25 17:54:57 -07005858 iwl3945_reg_txpower_periodic(priv);
5859
Reinette Chatrefe00b5a2008-04-03 16:05:23 -07005860 iwl3945_led_register(priv);
5861
Zhu Yib481de92007-09-25 17:54:57 -07005862 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Rick Farringtona9f46782008-03-18 14:57:49 -07005863 set_bit(STATUS_READY, &priv->status);
Zhu Yi5a66926a2008-01-14 17:46:18 -08005864 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07005865
5866 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005867 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005868
Mohamed Abbas84363e62008-04-04 16:59:58 -07005869 ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
Zhu Yib481de92007-09-25 17:54:57 -07005870 return;
5871
5872 restart:
5873 queue_work(priv->workqueue, &priv->restart);
5874}
5875
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005876static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07005877
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005878static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005879{
5880 unsigned long flags;
5881 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5882 struct ieee80211_conf *conf = NULL;
5883
5884 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5885
5886 conf = ieee80211_get_hw_conf(priv->hw);
5887
5888 if (!exit_pending)
5889 set_bit(STATUS_EXIT_PENDING, &priv->status);
5890
Mohamed Abbasab53d8a2008-03-25 16:33:36 -07005891 iwl3945_led_unregister(priv);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005892 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005893
5894 /* Unblock any waiting calls */
5895 wake_up_interruptible_all(&priv->wait_command_queue);
5896
Zhu Yib481de92007-09-25 17:54:57 -07005897 /* Wipe out the EXIT_PENDING status bit if we are not actually
5898 * exiting the module */
5899 if (!exit_pending)
5900 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5901
5902 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005903 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07005904
5905 /* tell the device to stop sending interrupts */
Mohamed Abbas0359fac2008-03-28 16:21:08 -07005906 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005907 iwl3945_disable_interrupts(priv);
Mohamed Abbas0359fac2008-03-28 16:21:08 -07005908 spin_unlock_irqrestore(&priv->lock, flags);
5909 iwl_synchronize_irq(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005910
5911 if (priv->mac80211_registered)
5912 ieee80211_stop_queues(priv->hw);
5913
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005914 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07005915 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005916 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005917 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5918 STATUS_RF_KILL_HW |
5919 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5920 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005921 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5922 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005923 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5924 STATUS_IN_SUSPEND;
5925 goto exit;
5926 }
5927
5928 /* ...otherwise clear out all the status bits but the RF Kill and
5929 * SUSPEND bits and continue taking the NIC down. */
5930 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5931 STATUS_RF_KILL_HW |
5932 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5933 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005934 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5935 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005936 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5937 STATUS_IN_SUSPEND |
5938 test_bit(STATUS_FW_ERROR, &priv->status) <<
5939 STATUS_FW_ERROR;
5940
5941 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005942 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07005943 spin_unlock_irqrestore(&priv->lock, flags);
5944
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005945 iwl3945_hw_txq_ctx_stop(priv);
5946 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005947
5948 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005949 if (!iwl3945_grab_nic_access(priv)) {
5950 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005951 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005952 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005953 }
5954 spin_unlock_irqrestore(&priv->lock, flags);
5955
5956 udelay(5);
5957
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005958 iwl3945_hw_nic_stop_master(priv);
5959 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5960 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005961
5962 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005963 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07005964
5965 if (priv->ibss_beacon)
5966 dev_kfree_skb(priv->ibss_beacon);
5967 priv->ibss_beacon = NULL;
5968
5969 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005970 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005971}
5972
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005973static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005974{
5975 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005976 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005977 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08005978
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005979 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005980}
5981
5982#define MAX_HW_RESTARTS 5
5983
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005984static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005985{
5986 int rc, i;
5987
5988 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5989 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5990 return -EIO;
5991 }
5992
5993 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5994 IWL_WARNING("Radio disabled by SW RF kill (module "
5995 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08005996 return -ENODEV;
5997 }
5998
Reinette Chatree903fbd2008-01-30 22:05:15 -08005999 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6000 IWL_ERROR("ucode not available for device bringup\n");
6001 return -EIO;
6002 }
6003
Zhu Yie655b9f2008-01-24 02:19:38 -08006004 /* If platform's RF_KILL switch is NOT set to KILL */
6005 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6006 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6007 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6008 else {
6009 set_bit(STATUS_RF_KILL_HW, &priv->status);
6010 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6011 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6012 return -ENODEV;
6013 }
Zhu Yib481de92007-09-25 17:54:57 -07006014 }
6015
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006016 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006017
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006018 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006019 if (rc) {
6020 IWL_ERROR("Unable to int nic\n");
6021 return rc;
6022 }
6023
6024 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006025 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6026 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006027 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6028
6029 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006030 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6031 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006032
6033 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006034 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6035 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006036
6037 /* Copy original ucode data image from disk into backup cache.
6038 * This will be used to initialize the on-board processor's
6039 * data SRAM for a clean start when the runtime program first loads. */
6040 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a66926a2008-01-14 17:46:18 -08006041 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006042
Zhu Yie655b9f2008-01-24 02:19:38 -08006043 /* We return success when we resume from suspend and rf_kill is on. */
6044 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6045 return 0;
6046
Zhu Yib481de92007-09-25 17:54:57 -07006047 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6048
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006049 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006050
6051 /* load bootstrap state machine,
6052 * load bootstrap program into processor's memory,
6053 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006054 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006055
6056 if (rc) {
6057 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6058 continue;
6059 }
6060
6061 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006062 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006063
Zhu Yib481de92007-09-25 17:54:57 -07006064 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6065
6066 return 0;
6067 }
6068
6069 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006070 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006071
6072 /* tried to restart and config the device for as long as our
6073 * patience could withstand */
6074 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6075 return -EIO;
6076}
6077
6078
6079/*****************************************************************************
6080 *
6081 * Workqueue callbacks
6082 *
6083 *****************************************************************************/
6084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006085static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006086{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006087 struct iwl3945_priv *priv =
6088 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006089
6090 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6091 return;
6092
6093 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006094 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006095 mutex_unlock(&priv->mutex);
6096}
6097
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006098static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006099{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006100 struct iwl3945_priv *priv =
6101 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006102
6103 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6104 return;
6105
6106 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006107 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006108 mutex_unlock(&priv->mutex);
6109}
6110
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006111static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006112{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006113 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006114
6115 wake_up_interruptible(&priv->wait_command_queue);
6116
6117 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6118 return;
6119
6120 mutex_lock(&priv->mutex);
6121
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006122 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006123 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6124 "HW and/or SW RF Kill no longer active, restarting "
6125 "device\n");
6126 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6127 queue_work(priv->workqueue, &priv->restart);
6128 } else {
6129
6130 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6131 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6132 "disabled by SW switch\n");
6133 else
6134 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6135 "Kill switch must be turned off for "
6136 "wireless networking to work.\n");
6137 }
6138 mutex_unlock(&priv->mutex);
6139}
6140
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08006141static void iwl3945_bg_set_monitor(struct work_struct *work)
6142{
6143 struct iwl3945_priv *priv = container_of(work,
6144 struct iwl3945_priv, set_monitor);
6145
6146 IWL_DEBUG(IWL_DL_STATE, "setting monitor mode\n");
6147
6148 mutex_lock(&priv->mutex);
6149
6150 if (!iwl3945_is_ready(priv))
6151 IWL_DEBUG(IWL_DL_STATE, "leave - not ready\n");
6152 else
6153 if (iwl3945_set_mode(priv, IEEE80211_IF_TYPE_MNTR) != 0)
6154 IWL_ERROR("iwl3945_set_mode() failed\n");
6155
6156 mutex_unlock(&priv->mutex);
6157}
6158
Zhu Yib481de92007-09-25 17:54:57 -07006159#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6160
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006161static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006162{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006163 struct iwl3945_priv *priv =
6164 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006165
6166 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6167 return;
6168
6169 mutex_lock(&priv->mutex);
6170 if (test_bit(STATUS_SCANNING, &priv->status) ||
6171 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6172 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6173 "Scan completion watchdog resetting adapter (%dms)\n",
6174 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006175
Zhu Yib481de92007-09-25 17:54:57 -07006176 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006177 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006178 }
6179 mutex_unlock(&priv->mutex);
6180}
6181
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006182static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006183{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006184 struct iwl3945_priv *priv =
6185 container_of(data, struct iwl3945_priv, request_scan);
6186 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006187 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006188 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006189 .meta.flags = CMD_SIZE_HUGE,
6190 };
6191 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006192 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006193 struct ieee80211_conf *conf = NULL;
6194 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006195 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006196
6197 conf = ieee80211_get_hw_conf(priv->hw);
6198
6199 mutex_lock(&priv->mutex);
6200
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006201 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006202 IWL_WARNING("request scan called when driver not ready.\n");
6203 goto done;
6204 }
6205
6206 /* Make sure the scan wasn't cancelled before this queued work
6207 * was given the chance to run... */
6208 if (!test_bit(STATUS_SCANNING, &priv->status))
6209 goto done;
6210
6211 /* This should never be called or scheduled if there is currently
6212 * a scan active in the hardware. */
6213 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6214 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6215 "Ignoring second request.\n");
6216 rc = -EIO;
6217 goto done;
6218 }
6219
6220 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6221 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6222 goto done;
6223 }
6224
6225 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6226 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6227 goto done;
6228 }
6229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006230 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006231 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6232 goto done;
6233 }
6234
6235 if (!test_bit(STATUS_READY, &priv->status)) {
6236 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6237 goto done;
6238 }
6239
6240 if (!priv->scan_bands) {
6241 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6242 goto done;
6243 }
6244
6245 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006246 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006247 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6248 if (!priv->scan) {
6249 rc = -ENOMEM;
6250 goto done;
6251 }
6252 }
6253 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006254 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006255
6256 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6257 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6258
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006259 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006260 u16 interval = 0;
6261 u32 extra;
6262 u32 suspend_time = 100;
6263 u32 scan_suspend_time = 100;
6264 unsigned long flags;
6265
6266 IWL_DEBUG_INFO("Scanning while associated...\n");
6267
6268 spin_lock_irqsave(&priv->lock, flags);
6269 interval = priv->beacon_int;
6270 spin_unlock_irqrestore(&priv->lock, flags);
6271
6272 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006273 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006274 if (!interval)
6275 interval = suspend_time;
6276 /*
6277 * suspend time format:
6278 * 0-19: beacon interval in usec (time before exec.)
6279 * 20-23: 0
6280 * 24-31: number of beacons (suspend between channels)
6281 */
6282
6283 extra = (suspend_time / interval) << 24;
6284 scan_suspend_time = 0xFF0FFFFF &
6285 (extra | ((suspend_time % interval) * 1024));
6286
6287 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6288 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6289 scan_suspend_time, interval);
6290 }
6291
6292 /* We should add the ability for user to lock to PASSIVE ONLY */
6293 if (priv->one_direct_scan) {
6294 IWL_DEBUG_SCAN
6295 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006296 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006297 priv->direct_ssid_len));
6298 scan->direct_scan[0].id = WLAN_EID_SSID;
6299 scan->direct_scan[0].len = priv->direct_ssid_len;
6300 memcpy(scan->direct_scan[0].ssid,
6301 priv->direct_ssid, priv->direct_ssid_len);
6302 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006303 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Bill Moss786b4552008-04-17 16:03:40 -07006304 IWL_DEBUG_SCAN
6305 ("Kicking off one direct scan for '%s' when not associated\n",
6306 iwl3945_escape_essid(priv->essid, priv->essid_len));
Zhu Yib481de92007-09-25 17:54:57 -07006307 scan->direct_scan[0].id = WLAN_EID_SSID;
6308 scan->direct_scan[0].len = priv->essid_len;
6309 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6310 direct_mask = 1;
Bill Moss786b4552008-04-17 16:03:40 -07006311 } else {
6312 IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
Zhu Yib481de92007-09-25 17:54:57 -07006313 direct_mask = 0;
Bill Moss786b4552008-04-17 16:03:40 -07006314 }
Zhu Yib481de92007-09-25 17:54:57 -07006315
6316 /* We don't build a direct scan probe request; the uCode will do
6317 * that based on the direct_mask added to each channel entry */
6318 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006319 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006320 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006321 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6322 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6323 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6324
6325 /* flags + rate selection */
6326
Ron Rindjunsky66b50042008-06-25 16:46:31 +08006327 if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
Zhu Yib481de92007-09-25 17:54:57 -07006328 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6329 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6330 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006331 band = IEEE80211_BAND_2GHZ;
Ron Rindjunsky66b50042008-06-25 16:46:31 +08006332 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
Zhu Yib481de92007-09-25 17:54:57 -07006333 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6334 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006335 band = IEEE80211_BAND_5GHZ;
Ron Rindjunsky66b50042008-06-25 16:46:31 +08006336 } else {
Zhu Yib481de92007-09-25 17:54:57 -07006337 IWL_WARNING("Invalid scan band count\n");
6338 goto done;
6339 }
6340
6341 /* select Rx antennas */
6342 scan->flags |= iwl3945_get_antenna_flags(priv);
6343
6344 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6345 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6346
Bill Moss786b4552008-04-17 16:03:40 -07006347 if (direct_mask)
Reinette Chatre26c0f032008-03-11 16:17:15 -07006348 scan->channel_count =
6349 iwl3945_get_channels_for_scan(
6350 priv, band, 1, /* active */
6351 direct_mask,
6352 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
Bill Moss786b4552008-04-17 16:03:40 -07006353 else
Reinette Chatre26c0f032008-03-11 16:17:15 -07006354 scan->channel_count =
6355 iwl3945_get_channels_for_scan(
6356 priv, band, 0, /* passive */
6357 direct_mask,
6358 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
Zhu Yib481de92007-09-25 17:54:57 -07006359
6360 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006361 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006362 cmd.data = scan;
6363 scan->len = cpu_to_le16(cmd.len);
6364
6365 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006366 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006367 if (rc)
6368 goto done;
6369
6370 queue_delayed_work(priv->workqueue, &priv->scan_check,
6371 IWL_SCAN_CHECK_WATCHDOG);
6372
6373 mutex_unlock(&priv->mutex);
6374 return;
6375
6376 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006377 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006378 queue_work(priv->workqueue, &priv->scan_completed);
6379 mutex_unlock(&priv->mutex);
6380}
6381
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006382static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006383{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006384 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006385
6386 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6387 return;
6388
6389 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006390 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006391 mutex_unlock(&priv->mutex);
6392}
6393
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006394static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006395{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006396 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006397
6398 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6399 return;
6400
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006401 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006402 queue_work(priv->workqueue, &priv->up);
6403}
6404
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006405static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006406{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006407 struct iwl3945_priv *priv =
6408 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006409
6410 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6411 return;
6412
6413 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006414 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006415 mutex_unlock(&priv->mutex);
6416}
6417
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006418#define IWL_DELAY_NEXT_SCAN (HZ*2)
6419
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006420static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006421{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006422 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006423 post_associate.work);
6424
6425 int rc = 0;
6426 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006427 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006428
6429 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6430 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6431 return;
6432 }
6433
6434
Joe Perches0795af52007-10-03 17:59:30 -07006435 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6436 priv->assoc_id,
6437 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006438
6439 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6440 return;
6441
6442 mutex_lock(&priv->mutex);
6443
Johannes Berg32bfd352007-12-19 01:31:26 +01006444 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006445 mutex_unlock(&priv->mutex);
6446 return;
6447 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006448 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006449
Zhu Yib481de92007-09-25 17:54:57 -07006450 conf = ieee80211_get_hw_conf(priv->hw);
6451
6452 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006453 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006454
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006455 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6456 iwl3945_setup_rxon_timing(priv);
6457 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006458 sizeof(priv->rxon_timing), &priv->rxon_timing);
6459 if (rc)
6460 IWL_WARNING("REPLY_RXON_TIMING failed - "
6461 "Attempting to continue.\n");
6462
6463 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6464
6465 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6466
6467 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6468 priv->assoc_id, priv->beacon_int);
6469
6470 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6471 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6472 else
6473 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6474
6475 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6476 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6477 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6478 else
6479 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6480
6481 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6482 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6483
6484 }
6485
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006486 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006487
6488 switch (priv->iw_mode) {
6489 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006490 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006491 break;
6492
6493 case IEEE80211_IF_TYPE_IBSS:
6494
6495 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006496 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006497
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006498 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6499 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006500 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006501 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006502 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6503 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006504 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6505 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006506
6507 break;
6508
6509 default:
6510 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006511 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006512 break;
6513 }
6514
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006515 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006516
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006517 iwl3945_activate_qos(priv, 0);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08006518
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006519 /* we have just associated, don't start scan too early */
6520 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006521 mutex_unlock(&priv->mutex);
6522}
6523
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006524static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006525{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006526 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006527
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006528 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006529 return;
6530
6531 mutex_lock(&priv->mutex);
6532
6533 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006534 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006535
6536 mutex_unlock(&priv->mutex);
6537}
6538
Zhu Yi76bb77e2007-11-22 10:53:22 +08006539static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6540
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006541static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006542{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006543 struct iwl3945_priv *priv =
6544 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006545
6546 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6547
6548 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6549 return;
6550
Zhu Yia0646472007-12-20 14:10:01 +08006551 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6552 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006553
Zhu Yib481de92007-09-25 17:54:57 -07006554 ieee80211_scan_completed(priv->hw);
6555
6556 /* Since setting the TXPOWER may have been deferred while
6557 * performing the scan, fire one off */
6558 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006559 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006560 mutex_unlock(&priv->mutex);
6561}
6562
6563/*****************************************************************************
6564 *
6565 * mac80211 entry point functions
6566 *
6567 *****************************************************************************/
6568
Zhu Yi5a66926a2008-01-14 17:46:18 -08006569#define UCODE_READY_TIMEOUT (2 * HZ)
6570
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006571static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006572{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006573 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006574 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006575
6576 IWL_DEBUG_MAC80211("enter\n");
6577
Zhu Yi5a66926a2008-01-14 17:46:18 -08006578 if (pci_enable_device(priv->pci_dev)) {
6579 IWL_ERROR("Fail to pci_enable_device\n");
6580 return -ENODEV;
6581 }
6582 pci_restore_state(priv->pci_dev);
6583 pci_enable_msi(priv->pci_dev);
6584
6585 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6586 DRV_NAME, priv);
6587 if (ret) {
6588 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6589 goto out_disable_msi;
6590 }
6591
Zhu Yib481de92007-09-25 17:54:57 -07006592 /* we should be verifying the device is ready to be opened */
6593 mutex_lock(&priv->mutex);
6594
Zhu Yi5a66926a2008-01-14 17:46:18 -08006595 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6596 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6597 * ucode filename and max sizes are card-specific. */
6598
6599 if (!priv->ucode_code.len) {
6600 ret = iwl3945_read_ucode(priv);
6601 if (ret) {
6602 IWL_ERROR("Could not read microcode: %d\n", ret);
6603 mutex_unlock(&priv->mutex);
6604 goto out_release_irq;
6605 }
6606 }
6607
Zhu Yie655b9f2008-01-24 02:19:38 -08006608 ret = __iwl3945_up(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006609
Zhu Yib481de92007-09-25 17:54:57 -07006610 mutex_unlock(&priv->mutex);
Zhu Yi5a66926a2008-01-14 17:46:18 -08006611
Zhu Yie655b9f2008-01-24 02:19:38 -08006612 if (ret)
6613 goto out_release_irq;
6614
6615 IWL_DEBUG_INFO("Start UP work.\n");
6616
6617 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6618 return 0;
6619
Zhu Yi5a66926a2008-01-14 17:46:18 -08006620 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6621 * mac80211 will not be run successfully. */
6622 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6623 test_bit(STATUS_READY, &priv->status),
6624 UCODE_READY_TIMEOUT);
6625 if (!ret) {
6626 if (!test_bit(STATUS_READY, &priv->status)) {
6627 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6628 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6629 ret = -ETIMEDOUT;
6630 goto out_release_irq;
6631 }
6632 }
6633
Zhu Yie655b9f2008-01-24 02:19:38 -08006634 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006635 IWL_DEBUG_MAC80211("leave\n");
6636 return 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006637
6638out_release_irq:
6639 free_irq(priv->pci_dev->irq, priv);
6640out_disable_msi:
6641 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006642 pci_disable_device(priv->pci_dev);
6643 priv->is_open = 0;
6644 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a66926a2008-01-14 17:46:18 -08006645 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006646}
6647
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006648static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006649{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006650 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006651
6652 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006653
Zhu Yie655b9f2008-01-24 02:19:38 -08006654 if (!priv->is_open) {
6655 IWL_DEBUG_MAC80211("leave - skip\n");
6656 return;
6657 }
6658
Zhu Yib481de92007-09-25 17:54:57 -07006659 priv->is_open = 0;
Zhu Yi5a66926a2008-01-14 17:46:18 -08006660
6661 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006662 /* stop mac, cancel any scan request and clear
6663 * RXON_FILTER_ASSOC_MSK BIT
6664 */
Zhu Yi5a66926a2008-01-14 17:46:18 -08006665 mutex_lock(&priv->mutex);
6666 iwl3945_scan_cancel_timeout(priv, 100);
6667 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006668 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006669 }
6670
Zhu Yi5a66926a2008-01-14 17:46:18 -08006671 iwl3945_down(priv);
6672
6673 flush_workqueue(priv->workqueue);
6674 free_irq(priv->pci_dev->irq, priv);
6675 pci_disable_msi(priv->pci_dev);
6676 pci_save_state(priv->pci_dev);
6677 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006678
Zhu Yib481de92007-09-25 17:54:57 -07006679 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006680}
6681
Johannes Berge039fa42008-05-15 12:55:29 +02006682static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07006683{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006684 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006685
6686 IWL_DEBUG_MAC80211("enter\n");
6687
6688 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6689 IWL_DEBUG_MAC80211("leave - monitor\n");
6690 return -1;
6691 }
6692
6693 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berge039fa42008-05-15 12:55:29 +02006694 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006695
Johannes Berge039fa42008-05-15 12:55:29 +02006696 if (iwl3945_tx_skb(priv, skb))
Zhu Yib481de92007-09-25 17:54:57 -07006697 dev_kfree_skb_any(skb);
6698
6699 IWL_DEBUG_MAC80211("leave\n");
6700 return 0;
6701}
6702
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006703static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006704 struct ieee80211_if_init_conf *conf)
6705{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006706 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006707 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006708 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006709
Johannes Berg32bfd352007-12-19 01:31:26 +01006710 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006711
Johannes Berg32bfd352007-12-19 01:31:26 +01006712 if (priv->vif) {
6713 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006714 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006715 }
6716
6717 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006718 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006719
6720 spin_unlock_irqrestore(&priv->lock, flags);
6721
6722 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006723
6724 if (conf->mac_addr) {
6725 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6726 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6727 }
6728
Zhu Yi5a66926a2008-01-14 17:46:18 -08006729 if (iwl3945_is_ready(priv))
6730 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006731
Zhu Yib481de92007-09-25 17:54:57 -07006732 mutex_unlock(&priv->mutex);
6733
Zhu Yi5a66926a2008-01-14 17:46:18 -08006734 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006735 return 0;
6736}
6737
6738/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006739 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006740 *
6741 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6742 * be set inappropriately and the driver currently sets the hardware up to
6743 * use it whenever needed.
6744 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006745static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07006746{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006747 struct iwl3945_priv *priv = hw->priv;
6748 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07006749 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08006750 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07006751
6752 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01006753 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006754
Zhu Yi12342c42007-12-20 11:27:32 +08006755 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6756
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006757 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006758 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006759 ret = -EIO;
6760 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006761 }
6762
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006763 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07006764 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08006765 IWL_DEBUG_MAC80211("leave - scanning\n");
6766 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006767 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08006768 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07006769 }
6770
6771 spin_lock_irqsave(&priv->lock, flags);
6772
Johannes Berg8318d782008-01-24 19:38:38 +01006773 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6774 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006775 if (!is_channel_valid(ch_info)) {
Ron Rindjunsky66b50042008-06-25 16:46:31 +08006776 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01006777 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006778 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6779 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006780 ret = -EINVAL;
6781 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006782 }
6783
Johannes Berg8318d782008-01-24 19:38:38 +01006784 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006785
Johannes Berg8318d782008-01-24 19:38:38 +01006786 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006787
6788 /* The list of supported rates and rate mask can be different
6789 * for each phymode; since the phymode may have changed, reset
6790 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006791 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006792
6793 spin_unlock_irqrestore(&priv->lock, flags);
6794
6795#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6796 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006797 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006798 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006799 }
6800#endif
6801
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006802 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07006803
6804 if (!conf->radio_enabled) {
6805 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006806 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006807 }
6808
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006809 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006810 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006811 ret = -EIO;
6812 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006813 }
6814
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006815 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006816
6817 if (memcmp(&priv->active_rxon,
6818 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006819 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006820 else
6821 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6822
6823 IWL_DEBUG_MAC80211("leave\n");
6824
Zhu Yi76bb77e2007-11-22 10:53:22 +08006825out:
Zhu Yia0646472007-12-20 14:10:01 +08006826 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006827 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006828 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006829}
6830
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006831static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006832{
6833 int rc = 0;
6834
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08006835 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07006836 return;
6837
6838 /* The following should be done only at AP bring up */
6839 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6840
6841 /* RXON - unassoc (to set timing command) */
6842 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006843 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006844
6845 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006846 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6847 iwl3945_setup_rxon_timing(priv);
6848 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006849 sizeof(priv->rxon_timing), &priv->rxon_timing);
6850 if (rc)
6851 IWL_WARNING("REPLY_RXON_TIMING failed - "
6852 "Attempting to continue.\n");
6853
6854 /* FIXME: what should be the assoc_id for AP? */
6855 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6856 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6857 priv->staging_rxon.flags |=
6858 RXON_FLG_SHORT_PREAMBLE_MSK;
6859 else
6860 priv->staging_rxon.flags &=
6861 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6862
6863 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6864 if (priv->assoc_capability &
6865 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6866 priv->staging_rxon.flags |=
6867 RXON_FLG_SHORT_SLOT_MSK;
6868 else
6869 priv->staging_rxon.flags &=
6870 ~RXON_FLG_SHORT_SLOT_MSK;
6871
6872 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6873 priv->staging_rxon.flags &=
6874 ~RXON_FLG_SHORT_SLOT_MSK;
6875 }
6876 /* restore RXON assoc */
6877 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006878 iwl3945_commit_rxon(priv);
6879 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08006880 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006881 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006882
6883 /* FIXME - we need to add code here to detect a totally new
6884 * configuration, reset the AP, unassoc, rxon timing, assoc,
6885 * clear sta table, add BCAST sta... */
6886}
6887
Johannes Berg32bfd352007-12-19 01:31:26 +01006888static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6889 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07006890 struct ieee80211_if_conf *conf)
6891{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006892 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07006893 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006894 unsigned long flags;
6895 int rc;
6896
6897 if (conf == NULL)
6898 return -EIO;
6899
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006900 if (priv->vif != vif) {
6901 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006902 return 0;
6903 }
6904
Johannes Berg4150c572007-09-17 01:29:23 -04006905 /* XXX: this MUST use conf->mac_addr */
6906
Zhu Yib481de92007-09-25 17:54:57 -07006907 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6908 (!conf->beacon || !conf->ssid_len)) {
6909 IWL_DEBUG_MAC80211
6910 ("Leaving in AP mode because HostAPD is not ready.\n");
6911 return 0;
6912 }
6913
Zhu Yi5a66926a2008-01-14 17:46:18 -08006914 if (!iwl3945_is_alive(priv))
6915 return -EAGAIN;
6916
Zhu Yib481de92007-09-25 17:54:57 -07006917 mutex_lock(&priv->mutex);
6918
Zhu Yib481de92007-09-25 17:54:57 -07006919 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07006920 IWL_DEBUG_MAC80211("bssid: %s\n",
6921 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006922
Johannes Berg4150c572007-09-17 01:29:23 -04006923/*
6924 * very dubious code was here; the probe filtering flag is never set:
6925 *
Zhu Yib481de92007-09-25 17:54:57 -07006926 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6927 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04006928 */
Zhu Yib481de92007-09-25 17:54:57 -07006929
6930 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6931 if (!conf->bssid) {
6932 conf->bssid = priv->mac_addr;
6933 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07006934 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6935 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006936 }
6937 if (priv->ibss_beacon)
6938 dev_kfree_skb(priv->ibss_beacon);
6939
6940 priv->ibss_beacon = conf->beacon;
6941 }
6942
Mohamed Abbasfde35712007-11-29 11:10:15 +08006943 if (iwl3945_is_rfkill(priv))
6944 goto done;
6945
Zhu Yib481de92007-09-25 17:54:57 -07006946 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6947 !is_multicast_ether_addr(conf->bssid)) {
6948 /* If there is currently a HW scan going on in the background
6949 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006950 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07006951 IWL_WARNING("Aborted scan still in progress "
6952 "after 100ms\n");
6953 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6954 mutex_unlock(&priv->mutex);
6955 return -EAGAIN;
6956 }
6957 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6958
6959 /* TODO: Audit driver for usage of these members and see
6960 * if mac80211 deprecates them (priv->bssid looks like it
6961 * shouldn't be there, but I haven't scanned the IBSS code
6962 * to verify) - jpk */
6963 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6964
6965 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006966 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006967 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006968 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006969 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006970 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08006971 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006972 }
6973
6974 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006975 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07006976 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006977 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006978 }
6979
Mohamed Abbasfde35712007-11-29 11:10:15 +08006980 done:
Zhu Yib481de92007-09-25 17:54:57 -07006981 spin_lock_irqsave(&priv->lock, flags);
6982 if (!conf->ssid_len)
6983 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6984 else
6985 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6986
6987 priv->essid_len = conf->ssid_len;
6988 spin_unlock_irqrestore(&priv->lock, flags);
6989
6990 IWL_DEBUG_MAC80211("leave\n");
6991 mutex_unlock(&priv->mutex);
6992
6993 return 0;
6994}
6995
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006996static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04006997 unsigned int changed_flags,
6998 unsigned int *total_flags,
6999 int mc_count, struct dev_addr_list *mc_list)
7000{
7001 /*
7002 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007003 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04007004 */
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08007005 struct iwl3945_priv *priv = hw->priv;
7006 int new_flags = 0;
7007 if (changed_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
7008 if (*total_flags & (FIF_PROMISC_IN_BSS | FIF_OTHER_BSS)) {
7009 IWL_DEBUG_MAC80211("Enter: type %d (0x%x, 0x%x)\n",
7010 IEEE80211_IF_TYPE_MNTR,
7011 changed_flags, *total_flags);
7012 /* queue work 'cuz mac80211 is holding a lock which
7013 * prevents us from issuing (synchronous) f/w cmds */
7014 queue_work(priv->workqueue, &priv->set_monitor);
7015 new_flags &= FIF_PROMISC_IN_BSS |
7016 FIF_OTHER_BSS |
7017 FIF_ALLMULTI;
7018 }
7019 }
7020 *total_flags = new_flags;
Johannes Berg4150c572007-09-17 01:29:23 -04007021}
7022
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007023static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007024 struct ieee80211_if_init_conf *conf)
7025{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007026 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007027
7028 IWL_DEBUG_MAC80211("enter\n");
7029
7030 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007031
Mohamed Abbasfde35712007-11-29 11:10:15 +08007032 if (iwl3945_is_ready_rf(priv)) {
7033 iwl3945_scan_cancel_timeout(priv, 100);
7034 cancel_delayed_work(&priv->post_associate);
7035 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7036 iwl3945_commit_rxon(priv);
7037 }
Johannes Berg32bfd352007-12-19 01:31:26 +01007038 if (priv->vif == conf->vif) {
7039 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007040 memset(priv->bssid, 0, ETH_ALEN);
7041 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7042 priv->essid_len = 0;
7043 }
7044 mutex_unlock(&priv->mutex);
7045
7046 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007047}
7048
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007049static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007050{
7051 int rc = 0;
7052 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007053 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007054
7055 IWL_DEBUG_MAC80211("enter\n");
7056
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007057 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007058 spin_lock_irqsave(&priv->lock, flags);
7059
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007060 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007061 rc = -EIO;
7062 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7063 goto out_unlock;
7064 }
7065
7066 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7067 rc = -EIO;
7068 IWL_ERROR("ERROR: APs don't scan\n");
7069 goto out_unlock;
7070 }
7071
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007072 /* we don't schedule scan within next_scan_jiffies period */
7073 if (priv->next_scan_jiffies &&
7074 time_after(priv->next_scan_jiffies, jiffies)) {
7075 rc = -EAGAIN;
7076 goto out_unlock;
7077 }
Bill Moss15dbf1b2008-05-06 11:05:15 +08007078 /* if we just finished scan ask for delay for a broadcast scan */
7079 if ((len == 0) && priv->last_scan_jiffies &&
7080 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
7081 jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007082 rc = -EAGAIN;
7083 goto out_unlock;
7084 }
7085 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007086 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007087 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007088
7089 priv->one_direct_scan = 1;
7090 priv->direct_ssid_len = (u8)
7091 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7092 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007093 } else
7094 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007095
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007096 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007097
7098 IWL_DEBUG_MAC80211("leave\n");
7099
7100out_unlock:
7101 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007102 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007103
7104 return rc;
7105}
7106
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007107static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007108 const u8 *local_addr, const u8 *addr,
7109 struct ieee80211_key_conf *key)
7110{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007111 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007112 int rc = 0;
7113 u8 sta_id;
7114
7115 IWL_DEBUG_MAC80211("enter\n");
7116
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007117 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007118 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7119 return -EOPNOTSUPP;
7120 }
7121
7122 if (is_zero_ether_addr(addr))
7123 /* only support pairwise keys */
7124 return -EOPNOTSUPP;
7125
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007126 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007127 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007128 DECLARE_MAC_BUF(mac);
7129
7130 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7131 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007132 return -EINVAL;
7133 }
7134
7135 mutex_lock(&priv->mutex);
7136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007137 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007138
Zhu Yib481de92007-09-25 17:54:57 -07007139 switch (cmd) {
7140 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007141 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007142 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007143 iwl3945_set_rxon_hwcrypto(priv, 1);
7144 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007145 key->hw_key_idx = sta_id;
7146 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7147 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7148 }
7149 break;
7150 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007151 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007152 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007153 iwl3945_set_rxon_hwcrypto(priv, 0);
7154 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007155 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7156 }
7157 break;
7158 default:
7159 rc = -EINVAL;
7160 }
7161
7162 IWL_DEBUG_MAC80211("leave\n");
7163 mutex_unlock(&priv->mutex);
7164
7165 return rc;
7166}
7167
Johannes Berge100bb62008-04-30 18:51:21 +02007168static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
Zhu Yib481de92007-09-25 17:54:57 -07007169 const struct ieee80211_tx_queue_params *params)
7170{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007171 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007172 unsigned long flags;
7173 int q;
Zhu Yib481de92007-09-25 17:54:57 -07007174
7175 IWL_DEBUG_MAC80211("enter\n");
7176
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007177 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007178 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7179 return -EIO;
7180 }
7181
7182 if (queue >= AC_NUM) {
7183 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7184 return 0;
7185 }
7186
Zhu Yib481de92007-09-25 17:54:57 -07007187 if (!priv->qos_data.qos_enable) {
7188 priv->qos_data.qos_active = 0;
7189 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7190 return 0;
7191 }
7192 q = AC_NUM - 1 - queue;
7193
7194 spin_lock_irqsave(&priv->lock, flags);
7195
7196 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7197 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7198 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7199 priv->qos_data.def_qos_parm.ac[q].edca_txop =
Johannes Berg3330d7b2008-02-10 16:49:38 +01007200 cpu_to_le16((params->txop * 32));
Zhu Yib481de92007-09-25 17:54:57 -07007201
7202 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7203 priv->qos_data.qos_active = 1;
7204
7205 spin_unlock_irqrestore(&priv->lock, flags);
7206
7207 mutex_lock(&priv->mutex);
7208 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007209 iwl3945_activate_qos(priv, 1);
7210 else if (priv->assoc_id && iwl3945_is_associated(priv))
7211 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007212
7213 mutex_unlock(&priv->mutex);
7214
Zhu Yib481de92007-09-25 17:54:57 -07007215 IWL_DEBUG_MAC80211("leave\n");
7216 return 0;
7217}
7218
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007219static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007220 struct ieee80211_tx_queue_stats *stats)
7221{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007222 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007223 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007224 struct iwl3945_tx_queue *txq;
7225 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007226 unsigned long flags;
7227
7228 IWL_DEBUG_MAC80211("enter\n");
7229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007230 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007231 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7232 return -EIO;
7233 }
7234
7235 spin_lock_irqsave(&priv->lock, flags);
7236
7237 for (i = 0; i < AC_NUM; i++) {
7238 txq = &priv->txq[i];
7239 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007240 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007241
Johannes Berg57ffc582008-04-29 17:18:59 +02007242 stats[i].len = q->n_window - avail;
7243 stats[i].limit = q->n_window - q->high_mark;
7244 stats[i].count = q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -07007245
7246 }
7247 spin_unlock_irqrestore(&priv->lock, flags);
7248
7249 IWL_DEBUG_MAC80211("leave\n");
7250
7251 return 0;
7252}
7253
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007254static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007255 struct ieee80211_low_level_stats *stats)
7256{
7257 IWL_DEBUG_MAC80211("enter\n");
7258 IWL_DEBUG_MAC80211("leave\n");
7259
7260 return 0;
7261}
7262
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007263static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007264{
7265 IWL_DEBUG_MAC80211("enter\n");
7266 IWL_DEBUG_MAC80211("leave\n");
7267
7268 return 0;
7269}
7270
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007271static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007272{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007273 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007274 unsigned long flags;
7275
7276 mutex_lock(&priv->mutex);
7277 IWL_DEBUG_MAC80211("enter\n");
7278
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007279 iwl3945_reset_qos(priv);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08007280
Zhu Yib481de92007-09-25 17:54:57 -07007281 cancel_delayed_work(&priv->post_associate);
7282
7283 spin_lock_irqsave(&priv->lock, flags);
7284 priv->assoc_id = 0;
7285 priv->assoc_capability = 0;
7286 priv->call_post_assoc_from_beacon = 0;
7287
7288 /* new association get rid of ibss beacon skb */
7289 if (priv->ibss_beacon)
7290 dev_kfree_skb(priv->ibss_beacon);
7291
7292 priv->ibss_beacon = NULL;
7293
7294 priv->beacon_int = priv->hw->conf.beacon_int;
7295 priv->timestamp1 = 0;
7296 priv->timestamp0 = 0;
7297 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7298 priv->beacon_int = 0;
7299
7300 spin_unlock_irqrestore(&priv->lock, flags);
7301
Mohamed Abbasfde35712007-11-29 11:10:15 +08007302 if (!iwl3945_is_ready_rf(priv)) {
7303 IWL_DEBUG_MAC80211("leave - not ready\n");
7304 mutex_unlock(&priv->mutex);
7305 return;
7306 }
7307
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007308 /* we are restarting association process
7309 * clear RXON_FILTER_ASSOC_MSK bit
7310 */
7311 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007312 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007313 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007314 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007315 }
7316
Zhu Yib481de92007-09-25 17:54:57 -07007317 /* Per mac80211.h: This is only used in IBSS mode... */
7318 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007319
Zhu Yib481de92007-09-25 17:54:57 -07007320 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7321 mutex_unlock(&priv->mutex);
7322 return;
7323 }
7324
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007325 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007326
7327 mutex_unlock(&priv->mutex);
7328
7329 IWL_DEBUG_MAC80211("leave\n");
7330
7331}
7332
Johannes Berge039fa42008-05-15 12:55:29 +02007333static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07007334{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007335 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007336 unsigned long flags;
7337
7338 mutex_lock(&priv->mutex);
7339 IWL_DEBUG_MAC80211("enter\n");
7340
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007341 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007342 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7343 mutex_unlock(&priv->mutex);
7344 return -EIO;
7345 }
7346
7347 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7348 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7349 mutex_unlock(&priv->mutex);
7350 return -EIO;
7351 }
7352
7353 spin_lock_irqsave(&priv->lock, flags);
7354
7355 if (priv->ibss_beacon)
7356 dev_kfree_skb(priv->ibss_beacon);
7357
7358 priv->ibss_beacon = skb;
7359
7360 priv->assoc_id = 0;
7361
7362 IWL_DEBUG_MAC80211("leave\n");
7363 spin_unlock_irqrestore(&priv->lock, flags);
7364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007365 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007366
7367 queue_work(priv->workqueue, &priv->post_associate.work);
7368
7369 mutex_unlock(&priv->mutex);
7370
7371 return 0;
7372}
7373
7374/*****************************************************************************
7375 *
7376 * sysfs attributes
7377 *
7378 *****************************************************************************/
7379
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007380#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007381
7382/*
7383 * The following adds a new attribute to the sysfs representation
7384 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7385 * used for controlling the debug level.
7386 *
7387 * See the level definitions in iwl for details.
7388 */
7389
7390static ssize_t show_debug_level(struct device_driver *d, char *buf)
7391{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007392 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007393}
7394static ssize_t store_debug_level(struct device_driver *d,
7395 const char *buf, size_t count)
7396{
7397 char *p = (char *)buf;
7398 u32 val;
7399
7400 val = simple_strtoul(p, &p, 0);
7401 if (p == buf)
7402 printk(KERN_INFO DRV_NAME
7403 ": %s is not in hex or decimal form.\n", buf);
7404 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007405 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007406
7407 return strnlen(buf, count);
7408}
7409
7410static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7411 show_debug_level, store_debug_level);
7412
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007413#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007414
7415static ssize_t show_rf_kill(struct device *d,
7416 struct device_attribute *attr, char *buf)
7417{
7418 /*
7419 * 0 - RF kill not enabled
7420 * 1 - SW based RF kill active (sysfs)
7421 * 2 - HW based RF kill active
7422 * 3 - Both HW and SW based RF kill active
7423 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007424 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007425 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7426 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7427
7428 return sprintf(buf, "%i\n", val);
7429}
7430
7431static ssize_t store_rf_kill(struct device *d,
7432 struct device_attribute *attr,
7433 const char *buf, size_t count)
7434{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007435 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007436
7437 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007438 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007439 mutex_unlock(&priv->mutex);
7440
7441 return count;
7442}
7443
7444static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7445
7446static ssize_t show_temperature(struct device *d,
7447 struct device_attribute *attr, char *buf)
7448{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007449 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007450
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007451 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007452 return -EAGAIN;
7453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007454 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007455}
7456
7457static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7458
7459static ssize_t show_rs_window(struct device *d,
7460 struct device_attribute *attr,
7461 char *buf)
7462{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007463 struct iwl3945_priv *priv = d->driver_data;
7464 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007465}
7466static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7467
7468static ssize_t show_tx_power(struct device *d,
7469 struct device_attribute *attr, char *buf)
7470{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007471 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007472 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7473}
7474
7475static ssize_t store_tx_power(struct device *d,
7476 struct device_attribute *attr,
7477 const char *buf, size_t count)
7478{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007479 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007480 char *p = (char *)buf;
7481 u32 val;
7482
7483 val = simple_strtoul(p, &p, 10);
7484 if (p == buf)
7485 printk(KERN_INFO DRV_NAME
7486 ": %s is not in decimal form.\n", buf);
7487 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007488 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007489
7490 return count;
7491}
7492
7493static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7494
7495static ssize_t show_flags(struct device *d,
7496 struct device_attribute *attr, char *buf)
7497{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007498 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007499
7500 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7501}
7502
7503static ssize_t store_flags(struct device *d,
7504 struct device_attribute *attr,
7505 const char *buf, size_t count)
7506{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007507 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007508 u32 flags = simple_strtoul(buf, NULL, 0);
7509
7510 mutex_lock(&priv->mutex);
7511 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7512 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007513 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007514 IWL_WARNING("Could not cancel scan.\n");
7515 else {
7516 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7517 flags);
7518 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007519 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007520 }
7521 }
7522 mutex_unlock(&priv->mutex);
7523
7524 return count;
7525}
7526
7527static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7528
7529static ssize_t show_filter_flags(struct device *d,
7530 struct device_attribute *attr, char *buf)
7531{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007532 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007533
7534 return sprintf(buf, "0x%04X\n",
7535 le32_to_cpu(priv->active_rxon.filter_flags));
7536}
7537
7538static ssize_t store_filter_flags(struct device *d,
7539 struct device_attribute *attr,
7540 const char *buf, size_t count)
7541{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007542 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007543 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7544
7545 mutex_lock(&priv->mutex);
7546 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7547 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007548 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007549 IWL_WARNING("Could not cancel scan.\n");
7550 else {
7551 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7552 "0x%04X\n", filter_flags);
7553 priv->staging_rxon.filter_flags =
7554 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007555 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007556 }
7557 }
7558 mutex_unlock(&priv->mutex);
7559
7560 return count;
7561}
7562
7563static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7564 store_filter_flags);
7565
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007566#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007567
7568static ssize_t show_measurement(struct device *d,
7569 struct device_attribute *attr, char *buf)
7570{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007571 struct iwl3945_priv *priv = dev_get_drvdata(d);
7572 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007573 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7574 u8 *data = (u8 *) & measure_report;
7575 unsigned long flags;
7576
7577 spin_lock_irqsave(&priv->lock, flags);
7578 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7579 spin_unlock_irqrestore(&priv->lock, flags);
7580 return 0;
7581 }
7582 memcpy(&measure_report, &priv->measure_report, size);
7583 priv->measurement_status = 0;
7584 spin_unlock_irqrestore(&priv->lock, flags);
7585
7586 while (size && (PAGE_SIZE - len)) {
7587 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7588 PAGE_SIZE - len, 1);
7589 len = strlen(buf);
7590 if (PAGE_SIZE - len)
7591 buf[len++] = '\n';
7592
7593 ofs += 16;
7594 size -= min(size, 16U);
7595 }
7596
7597 return len;
7598}
7599
7600static ssize_t store_measurement(struct device *d,
7601 struct device_attribute *attr,
7602 const char *buf, size_t count)
7603{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007604 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007605 struct ieee80211_measurement_params params = {
7606 .channel = le16_to_cpu(priv->active_rxon.channel),
7607 .start_time = cpu_to_le64(priv->last_tsf),
7608 .duration = cpu_to_le16(1),
7609 };
7610 u8 type = IWL_MEASURE_BASIC;
7611 u8 buffer[32];
7612 u8 channel;
7613
7614 if (count) {
7615 char *p = buffer;
7616 strncpy(buffer, buf, min(sizeof(buffer), count));
7617 channel = simple_strtoul(p, NULL, 0);
7618 if (channel)
7619 params.channel = channel;
7620
7621 p = buffer;
7622 while (*p && *p != ' ')
7623 p++;
7624 if (*p)
7625 type = simple_strtoul(p + 1, NULL, 0);
7626 }
7627
7628 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7629 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007630 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007631
7632 return count;
7633}
7634
7635static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7636 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007637#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007638
Zhu Yib481de92007-09-25 17:54:57 -07007639static ssize_t store_retry_rate(struct device *d,
7640 struct device_attribute *attr,
7641 const char *buf, size_t count)
7642{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007643 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007644
7645 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7646 if (priv->retry_rate <= 0)
7647 priv->retry_rate = 1;
7648
7649 return count;
7650}
7651
7652static ssize_t show_retry_rate(struct device *d,
7653 struct device_attribute *attr, char *buf)
7654{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007655 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007656 return sprintf(buf, "%d", priv->retry_rate);
7657}
7658
7659static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7660 store_retry_rate);
7661
7662static ssize_t store_power_level(struct device *d,
7663 struct device_attribute *attr,
7664 const char *buf, size_t count)
7665{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007666 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007667 int rc;
7668 int mode;
7669
7670 mode = simple_strtoul(buf, NULL, 0);
7671 mutex_lock(&priv->mutex);
7672
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007673 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007674 rc = -EAGAIN;
7675 goto out;
7676 }
7677
7678 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7679 mode = IWL_POWER_AC;
7680 else
7681 mode |= IWL_POWER_ENABLED;
7682
7683 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007684 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007685 if (rc) {
7686 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7687 goto out;
7688 }
7689 priv->power_mode = mode;
7690 }
7691
7692 rc = count;
7693
7694 out:
7695 mutex_unlock(&priv->mutex);
7696 return rc;
7697}
7698
7699#define MAX_WX_STRING 80
7700
7701/* Values are in microsecond */
7702static const s32 timeout_duration[] = {
7703 350000,
7704 250000,
7705 75000,
7706 37000,
7707 25000,
7708};
7709static const s32 period_duration[] = {
7710 400000,
7711 700000,
7712 1000000,
7713 1000000,
7714 1000000
7715};
7716
7717static ssize_t show_power_level(struct device *d,
7718 struct device_attribute *attr, char *buf)
7719{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007720 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007721 int level = IWL_POWER_LEVEL(priv->power_mode);
7722 char *p = buf;
7723
7724 p += sprintf(p, "%d ", level);
7725 switch (level) {
7726 case IWL_POWER_MODE_CAM:
7727 case IWL_POWER_AC:
7728 p += sprintf(p, "(AC)");
7729 break;
7730 case IWL_POWER_BATTERY:
7731 p += sprintf(p, "(BATTERY)");
7732 break;
7733 default:
7734 p += sprintf(p,
7735 "(Timeout %dms, Period %dms)",
7736 timeout_duration[level - 1] / 1000,
7737 period_duration[level - 1] / 1000);
7738 }
7739
7740 if (!(priv->power_mode & IWL_POWER_ENABLED))
7741 p += sprintf(p, " OFF\n");
7742 else
7743 p += sprintf(p, " \n");
7744
7745 return (p - buf + 1);
7746
7747}
7748
7749static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7750 store_power_level);
7751
7752static ssize_t show_channels(struct device *d,
7753 struct device_attribute *attr, char *buf)
7754{
Johannes Berg8318d782008-01-24 19:38:38 +01007755 /* all this shit doesn't belong into sysfs anyway */
7756 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007757}
7758
7759static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7760
7761static ssize_t show_statistics(struct device *d,
7762 struct device_attribute *attr, char *buf)
7763{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007764 struct iwl3945_priv *priv = dev_get_drvdata(d);
7765 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07007766 u32 len = 0, ofs = 0;
7767 u8 *data = (u8 *) & priv->statistics;
7768 int rc = 0;
7769
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007770 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007771 return -EAGAIN;
7772
7773 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007774 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007775 mutex_unlock(&priv->mutex);
7776
7777 if (rc) {
7778 len = sprintf(buf,
7779 "Error sending statistics request: 0x%08X\n", rc);
7780 return len;
7781 }
7782
7783 while (size && (PAGE_SIZE - len)) {
7784 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7785 PAGE_SIZE - len, 1);
7786 len = strlen(buf);
7787 if (PAGE_SIZE - len)
7788 buf[len++] = '\n';
7789
7790 ofs += 16;
7791 size -= min(size, 16U);
7792 }
7793
7794 return len;
7795}
7796
7797static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7798
7799static ssize_t show_antenna(struct device *d,
7800 struct device_attribute *attr, char *buf)
7801{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007802 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007803
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007804 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007805 return -EAGAIN;
7806
7807 return sprintf(buf, "%d\n", priv->antenna);
7808}
7809
7810static ssize_t store_antenna(struct device *d,
7811 struct device_attribute *attr,
7812 const char *buf, size_t count)
7813{
7814 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007815 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007816
7817 if (count == 0)
7818 return 0;
7819
7820 if (sscanf(buf, "%1i", &ant) != 1) {
7821 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7822 return count;
7823 }
7824
7825 if ((ant >= 0) && (ant <= 2)) {
7826 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007827 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07007828 } else
7829 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7830
7831
7832 return count;
7833}
7834
7835static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7836
7837static ssize_t show_status(struct device *d,
7838 struct device_attribute *attr, char *buf)
7839{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007840 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7841 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007842 return -EAGAIN;
7843 return sprintf(buf, "0x%08x\n", (int)priv->status);
7844}
7845
7846static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7847
7848static ssize_t dump_error_log(struct device *d,
7849 struct device_attribute *attr,
7850 const char *buf, size_t count)
7851{
7852 char *p = (char *)buf;
7853
7854 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007855 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007856
7857 return strnlen(buf, count);
7858}
7859
7860static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7861
7862static ssize_t dump_event_log(struct device *d,
7863 struct device_attribute *attr,
7864 const char *buf, size_t count)
7865{
7866 char *p = (char *)buf;
7867
7868 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007869 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007870
7871 return strnlen(buf, count);
7872}
7873
7874static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7875
7876/*****************************************************************************
7877 *
7878 * driver setup and teardown
7879 *
7880 *****************************************************************************/
7881
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007882static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007883{
7884 priv->workqueue = create_workqueue(DRV_NAME);
7885
7886 init_waitqueue_head(&priv->wait_command_queue);
7887
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007888 INIT_WORK(&priv->up, iwl3945_bg_up);
7889 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7890 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7891 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7892 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7893 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7894 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7895 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
Abhijeet Kolekar5ec03972008-05-05 10:22:48 +08007896 INIT_WORK(&priv->set_monitor, iwl3945_bg_set_monitor);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007897 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7898 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7899 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7900 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07007901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007902 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007903
7904 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007905 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07007906}
7907
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007908static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007909{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007910 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007911
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09007912 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07007913 cancel_delayed_work(&priv->scan_check);
7914 cancel_delayed_work(&priv->alive_start);
7915 cancel_delayed_work(&priv->post_associate);
7916 cancel_work_sync(&priv->beacon_update);
7917}
7918
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007919static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07007920 &dev_attr_antenna.attr,
7921 &dev_attr_channels.attr,
7922 &dev_attr_dump_errors.attr,
7923 &dev_attr_dump_events.attr,
7924 &dev_attr_flags.attr,
7925 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007926#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007927 &dev_attr_measurement.attr,
7928#endif
7929 &dev_attr_power_level.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007930 &dev_attr_retry_rate.attr,
7931 &dev_attr_rf_kill.attr,
7932 &dev_attr_rs_window.attr,
7933 &dev_attr_statistics.attr,
7934 &dev_attr_status.attr,
7935 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007936 &dev_attr_tx_power.attr,
7937
7938 NULL
7939};
7940
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007941static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07007942 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007943 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07007944};
7945
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007946static struct ieee80211_ops iwl3945_hw_ops = {
7947 .tx = iwl3945_mac_tx,
7948 .start = iwl3945_mac_start,
7949 .stop = iwl3945_mac_stop,
7950 .add_interface = iwl3945_mac_add_interface,
7951 .remove_interface = iwl3945_mac_remove_interface,
7952 .config = iwl3945_mac_config,
7953 .config_interface = iwl3945_mac_config_interface,
7954 .configure_filter = iwl3945_configure_filter,
7955 .set_key = iwl3945_mac_set_key,
7956 .get_stats = iwl3945_mac_get_stats,
7957 .get_tx_stats = iwl3945_mac_get_tx_stats,
7958 .conf_tx = iwl3945_mac_conf_tx,
7959 .get_tsf = iwl3945_mac_get_tsf,
7960 .reset_tsf = iwl3945_mac_reset_tsf,
7961 .beacon_update = iwl3945_mac_beacon_update,
7962 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07007963};
7964
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007965static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07007966{
7967 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007968 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07007969 struct ieee80211_hw *hw;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007970 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007971 int i;
Mohamed Abbas0359fac2008-03-28 16:21:08 -07007972 unsigned long flags;
Zhu Yi5a66926a2008-01-14 17:46:18 -08007973 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007974
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007975 /* Disabling hardware scan means that mac80211 will perform scans
7976 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007977 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07007978 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007979 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007980 }
7981
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07007982 if ((iwl3945_param_queues_num > IWL39_MAX_NUM_QUEUES) ||
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007983 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07007984 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
Ron Rindjunskydfe7d452008-04-15 16:01:45 -07007985 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
Zhu Yib481de92007-09-25 17:54:57 -07007986 err = -EINVAL;
7987 goto out;
7988 }
7989
7990 /* mac80211 allocates memory for this device instance, including
7991 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007992 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07007993 if (hw == NULL) {
7994 IWL_ERROR("Can not allocate network device\n");
7995 err = -ENOMEM;
7996 goto out;
7997 }
7998 SET_IEEE80211_DEV(hw, &pdev->dev);
7999
Johannes Bergf51359a2007-10-28 14:53:36 +01008000 hw->rate_control_algorithm = "iwl-3945-rs";
8001
Zhu Yib481de92007-09-25 17:54:57 -07008002 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8003 priv = hw->priv;
8004 priv->hw = hw;
8005
8006 priv->pci_dev = pdev;
Tomas Winkler82b9a122008-03-04 18:09:30 -08008007 priv->cfg = cfg;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008008
8009 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008010 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008011#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008012 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008013 atomic_set(&priv->restrict_refcnt, 0);
8014#endif
8015 priv->retry_rate = 1;
8016
8017 priv->ibss_beacon = NULL;
8018
Bruno Randolf566bfe52008-05-08 19:15:40 +02008019 /* Tell mac80211 our characteristics */
8020 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
8021 IEEE80211_HW_SIGNAL_DBM |
8022 IEEE80211_HW_NOISE_DBM;
Zhu Yib481de92007-09-25 17:54:57 -07008023
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008024 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07008025 hw->queues = 4;
8026
8027 spin_lock_init(&priv->lock);
8028 spin_lock_init(&priv->power_data.lock);
8029 spin_lock_init(&priv->sta_lock);
8030 spin_lock_init(&priv->hcmd_lock);
8031
8032 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8033 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8034
8035 INIT_LIST_HEAD(&priv->free_frames);
8036
8037 mutex_init(&priv->mutex);
8038 if (pci_enable_device(pdev)) {
8039 err = -ENODEV;
8040 goto out_ieee80211_free_hw;
8041 }
8042
8043 pci_set_master(pdev);
8044
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008045 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008046 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008047
8048 priv->data_retry_limit = -1;
8049 priv->ieee_channels = NULL;
8050 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008051 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008052
8053 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8054 if (!err)
8055 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8056 if (err) {
8057 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8058 goto out_pci_disable_device;
8059 }
8060
8061 pci_set_drvdata(pdev, priv);
8062 err = pci_request_regions(pdev, DRV_NAME);
8063 if (err)
8064 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008065
Zhu Yib481de92007-09-25 17:54:57 -07008066 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8067 * PCI Tx retries from interfering with C3 CPU state */
8068 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008069
Zhu Yib481de92007-09-25 17:54:57 -07008070 priv->hw_base = pci_iomap(pdev, 0, 0);
8071 if (!priv->hw_base) {
8072 err = -ENODEV;
8073 goto out_pci_release_regions;
8074 }
8075
8076 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8077 (unsigned long long) pci_resource_len(pdev, 0));
8078 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8079
8080 /* Initialize module parameter values here */
8081
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008082 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008083 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008084 set_bit(STATUS_RF_KILL_SW, &priv->status);
8085 IWL_DEBUG_INFO("Radio disabled.\n");
8086 }
8087
8088 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8089
Zhu Yib481de92007-09-25 17:54:57 -07008090 printk(KERN_INFO DRV_NAME
Tomas Winkler82b9a122008-03-04 18:09:30 -08008091 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
Zhu Yib481de92007-09-25 17:54:57 -07008092
8093 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008094 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008095 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008096 goto out_iounmap;
8097 }
8098
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008099 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008100 priv->qos_data.qos_enable = 1;
8101
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008102 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008103
8104 priv->qos_data.qos_active = 0;
8105 priv->qos_data.qos_cap.val = 0;
Zhu Yib481de92007-09-25 17:54:57 -07008106
Johannes Berg8318d782008-01-24 19:38:38 +01008107 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008108 iwl3945_setup_deferred_work(priv);
8109 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008110
8111 priv->rates_mask = IWL_RATES_MASK;
8112 /* If power management is turned on, default to AC mode */
8113 priv->power_mode = IWL_POWER_AC;
8114 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8115
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008116 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008117 iwl3945_disable_interrupts(priv);
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008118 spin_unlock_irqrestore(&priv->lock, flags);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008119
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008120 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008121 if (err) {
8122 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008123 goto out_release_irq;
8124 }
8125
Zhu Yi5a66926a2008-01-14 17:46:18 -08008126 /* nic init */
8127 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8128 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8129
8130 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8131 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8132 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8133 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8134 if (err < 0) {
8135 IWL_DEBUG_INFO("Failed to init the card\n");
8136 goto out_remove_sysfs;
8137 }
8138 /* Read the EEPROM */
8139 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008140 if (err) {
Zhu Yi5a66926a2008-01-14 17:46:18 -08008141 IWL_ERROR("Unable to init EEPROM\n");
8142 goto out_remove_sysfs;
8143 }
8144 /* MAC Address location in EEPROM same for 3945/4965 */
8145 get_eeprom_mac(priv, priv->mac_addr);
8146 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8147 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8148
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008149 err = iwl3945_init_channel_map(priv);
8150 if (err) {
8151 IWL_ERROR("initializing regulatory failed: %d\n", err);
8152 goto out_remove_sysfs;
8153 }
8154
8155 err = iwl3945_init_geos(priv);
8156 if (err) {
8157 IWL_ERROR("initializing geos failed: %d\n", err);
8158 goto out_free_channel_map;
8159 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008160
Zhu Yi5a66926a2008-01-14 17:46:18 -08008161 err = ieee80211_register_hw(priv->hw);
8162 if (err) {
8163 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008164 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008165 }
8166
Zhu Yi5a66926a2008-01-14 17:46:18 -08008167 priv->hw->conf.beacon_int = 100;
8168 priv->mac80211_registered = 1;
8169 pci_save_state(pdev);
8170 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008171
8172 return 0;
8173
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008174 out_free_geos:
8175 iwl3945_free_geos(priv);
8176 out_free_channel_map:
8177 iwl3945_free_channel_map(priv);
Zhu Yi5a66926a2008-01-14 17:46:18 -08008178 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008179 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008180
8181 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008182 destroy_workqueue(priv->workqueue);
8183 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008184 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008185
8186 out_iounmap:
8187 pci_iounmap(pdev, priv->hw_base);
8188 out_pci_release_regions:
8189 pci_release_regions(pdev);
8190 out_pci_disable_device:
8191 pci_disable_device(pdev);
8192 pci_set_drvdata(pdev, NULL);
8193 out_ieee80211_free_hw:
8194 ieee80211_free_hw(priv->hw);
8195 out:
8196 return err;
8197}
8198
Reinette Chatrec83dbf62008-03-21 13:53:41 -07008199static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008200{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008201 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008202 struct list_head *p, *q;
8203 int i;
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008204 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07008205
8206 if (!priv)
8207 return;
8208
8209 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8210
Zhu Yib481de92007-09-25 17:54:57 -07008211 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008213 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008214
Mohamed Abbas0359fac2008-03-28 16:21:08 -07008215 /* make sure we flush any pending irq or
8216 * tasklet for the driver
8217 */
8218 spin_lock_irqsave(&priv->lock, flags);
8219 iwl3945_disable_interrupts(priv);
8220 spin_unlock_irqrestore(&priv->lock, flags);
8221
8222 iwl_synchronize_irq(priv);
8223
Zhu Yib481de92007-09-25 17:54:57 -07008224 /* Free MAC hash list for ADHOC */
8225 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8226 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8227 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008228 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008229 }
8230 }
8231
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008232 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008233
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008234 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008235
8236 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008237 iwl3945_rx_queue_free(priv, &priv->rxq);
8238 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008240 iwl3945_unset_hw_setting(priv);
8241 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008242
8243 if (priv->mac80211_registered) {
8244 ieee80211_unregister_hw(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008245 }
8246
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008247 /*netif_stop_queue(dev); */
8248 flush_workqueue(priv->workqueue);
8249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008250 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008251 * priv->workqueue... so we can't take down the workqueue
8252 * until now... */
8253 destroy_workqueue(priv->workqueue);
8254 priv->workqueue = NULL;
8255
Zhu Yib481de92007-09-25 17:54:57 -07008256 pci_iounmap(pdev, priv->hw_base);
8257 pci_release_regions(pdev);
8258 pci_disable_device(pdev);
8259 pci_set_drvdata(pdev, NULL);
8260
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008261 iwl3945_free_channel_map(priv);
8262 iwl3945_free_geos(priv);
Emmanuel Grumbach261415f2008-05-29 16:35:25 +08008263 kfree(priv->scan);
Zhu Yib481de92007-09-25 17:54:57 -07008264 if (priv->ibss_beacon)
8265 dev_kfree_skb(priv->ibss_beacon);
8266
8267 ieee80211_free_hw(priv->hw);
8268}
8269
8270#ifdef CONFIG_PM
8271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008272static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008273{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008274 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008275
Zhu Yie655b9f2008-01-24 02:19:38 -08008276 if (priv->is_open) {
8277 set_bit(STATUS_IN_SUSPEND, &priv->status);
8278 iwl3945_mac_stop(priv->hw);
8279 priv->is_open = 1;
8280 }
Zhu Yib481de92007-09-25 17:54:57 -07008281
Zhu Yib481de92007-09-25 17:54:57 -07008282 pci_set_power_state(pdev, PCI_D3hot);
8283
Zhu Yib481de92007-09-25 17:54:57 -07008284 return 0;
8285}
8286
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008287static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008288{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008289 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008290
Zhu Yib481de92007-09-25 17:54:57 -07008291 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008292
Zhu Yie655b9f2008-01-24 02:19:38 -08008293 if (priv->is_open)
8294 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008295
Zhu Yie655b9f2008-01-24 02:19:38 -08008296 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008297 return 0;
8298}
8299
8300#endif /* CONFIG_PM */
8301
8302/*****************************************************************************
8303 *
8304 * driver and module entry point
8305 *
8306 *****************************************************************************/
8307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008308static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008309 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008310 .id_table = iwl3945_hw_card_ids,
8311 .probe = iwl3945_pci_probe,
8312 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008313#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008314 .suspend = iwl3945_pci_suspend,
8315 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008316#endif
8317};
8318
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008319static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008320{
8321
8322 int ret;
8323 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8324 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008325
8326 ret = iwl3945_rate_control_register();
8327 if (ret) {
8328 IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
8329 return ret;
8330 }
8331
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008332 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008333 if (ret) {
8334 IWL_ERROR("Unable to initialize PCI module\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008335 goto error_register;
Zhu Yib481de92007-09-25 17:54:57 -07008336 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008337#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008338 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008339 if (ret) {
8340 IWL_ERROR("Unable to create driver sysfs file\n");
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008341 goto error_debug;
Zhu Yib481de92007-09-25 17:54:57 -07008342 }
8343#endif
8344
8345 return ret;
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008346
8347#ifdef CONFIG_IWL3945_DEBUG
8348error_debug:
8349 pci_unregister_driver(&iwl3945_driver);
8350#endif
8351error_register:
8352 iwl3945_rate_control_unregister();
8353 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07008354}
8355
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008356static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008357{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008358#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008359 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008360#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008361 pci_unregister_driver(&iwl3945_driver);
Reinette Chatre897e1cf2008-03-28 16:21:09 -07008362 iwl3945_rate_control_unregister();
Zhu Yib481de92007-09-25 17:54:57 -07008363}
8364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008365module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008366MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008367module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008368MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008369module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008370MODULE_PARM_DESC(hwcrypto,
8371 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008372module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008373MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008374module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008375MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8376
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008377module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008378MODULE_PARM_DESC(queues_num, "number of hw queues.");
8379
8380/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008381module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008382MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008384module_exit(iwl3945_exit);
8385module_init(iwl3945_init);