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Marek Szyprowskid947e792010-05-17 08:53:10 +02001/* linux/arch/arm/mach-s5pv210/mach-aquila.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/serial_core.h>
Marek Szyprowskib3150322010-05-17 08:53:13 +020015#include <linux/fb.h>
Marek Szyprowskia1660c12010-07-14 18:33:44 +090016#include <linux/i2c.h>
17#include <linux/i2c-gpio.h>
18#include <linux/mfd/max8998.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <linux/gpio.h>
Marek Szyprowskid947e792010-05-17 08:53:10 +020022
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/setup.h>
26#include <asm/mach-types.h>
27
28#include <mach/map.h>
29#include <mach/regs-clock.h>
Marek Szyprowskib3150322010-05-17 08:53:13 +020030#include <mach/regs-fb.h>
Marek Szyprowskid947e792010-05-17 08:53:10 +020031
Marek Szyprowskia1660c12010-07-14 18:33:44 +090032#include <plat/gpio-cfg.h>
Marek Szyprowskid947e792010-05-17 08:53:10 +020033#include <plat/regs-serial.h>
34#include <plat/s5pv210.h>
35#include <plat/devs.h>
36#include <plat/cpu.h>
Marek Szyprowskib3150322010-05-17 08:53:13 +020037#include <plat/fb.h>
Marek Szyprowskiba3fbef92010-08-05 18:00:12 +090038#include <plat/sdhci.h>
Marek Szyprowskid947e792010-05-17 08:53:10 +020039
40/* Following are default values for UCON, ULCON and UFCON UART registers */
Kukjin Kimc8def082010-07-21 09:19:51 +090041#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Marek Szyprowskid947e792010-05-17 08:53:10 +020042 S3C2410_UCON_RXILEVEL | \
43 S3C2410_UCON_TXIRQMODE | \
44 S3C2410_UCON_RXIRQMODE | \
45 S3C2410_UCON_RXFIFO_TOI | \
46 S3C2443_UCON_RXERR_IRQEN)
47
Kukjin Kimc8def082010-07-21 09:19:51 +090048#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8
Marek Szyprowskid947e792010-05-17 08:53:10 +020049
Kukjin Kimf2b7e3c2010-08-06 21:34:55 +090050#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
Marek Szyprowskid947e792010-05-17 08:53:10 +020051
Joonyoung Shimdf017142010-06-24 19:28:55 +090052static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
Marek Szyprowskid947e792010-05-17 08:53:10 +020053 [0] = {
54 .hwport = 0,
55 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090056 .ucon = AQUILA_UCON_DEFAULT,
57 .ulcon = AQUILA_ULCON_DEFAULT,
Joonyoung Shimdf017142010-06-24 19:28:55 +090058 /*
59 * Actually UART0 can support 256 bytes fifo, but aquila board
60 * supports 128 bytes fifo because of initial chip bug
61 */
Kukjin Kimf2b7e3c2010-08-06 21:34:55 +090062 .ufcon = AQUILA_UFCON_DEFAULT |
Joonyoung Shimdf017142010-06-24 19:28:55 +090063 S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
Marek Szyprowskid947e792010-05-17 08:53:10 +020064 },
65 [1] = {
66 .hwport = 1,
67 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090068 .ucon = AQUILA_UCON_DEFAULT,
69 .ulcon = AQUILA_ULCON_DEFAULT,
Kukjin Kimf2b7e3c2010-08-06 21:34:55 +090070 .ufcon = AQUILA_UFCON_DEFAULT |
Joonyoung Shimdf017142010-06-24 19:28:55 +090071 S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
Marek Szyprowskid947e792010-05-17 08:53:10 +020072 },
73 [2] = {
74 .hwport = 2,
75 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090076 .ucon = AQUILA_UCON_DEFAULT,
77 .ulcon = AQUILA_ULCON_DEFAULT,
Kukjin Kimf2b7e3c2010-08-06 21:34:55 +090078 .ufcon = AQUILA_UFCON_DEFAULT |
Joonyoung Shimdf017142010-06-24 19:28:55 +090079 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
Marek Szyprowskid947e792010-05-17 08:53:10 +020080 },
81 [3] = {
82 .hwport = 3,
83 .flags = 0,
Kukjin Kimc8def082010-07-21 09:19:51 +090084 .ucon = AQUILA_UCON_DEFAULT,
85 .ulcon = AQUILA_ULCON_DEFAULT,
Kukjin Kimf2b7e3c2010-08-06 21:34:55 +090086 .ufcon = AQUILA_UFCON_DEFAULT |
Joonyoung Shimdf017142010-06-24 19:28:55 +090087 S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
Marek Szyprowskid947e792010-05-17 08:53:10 +020088 },
89};
90
Marek Szyprowskib3150322010-05-17 08:53:13 +020091/* Frame Buffer */
92static struct s3c_fb_pd_win aquila_fb_win0 = {
93 .win_mode = {
94 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
95 .left_margin = 16,
96 .right_margin = 16,
97 .upper_margin = 3,
98 .lower_margin = 28,
99 .hsync_len = 2,
100 .vsync_len = 2,
101 .xres = 480,
102 .yres = 800,
103 },
104 .max_bpp = 32,
105 .default_bpp = 16,
106};
107
108static struct s3c_fb_pd_win aquila_fb_win1 = {
109 .win_mode = {
110 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
111 .left_margin = 16,
112 .right_margin = 16,
113 .upper_margin = 3,
114 .lower_margin = 28,
115 .hsync_len = 2,
116 .vsync_len = 2,
117 .xres = 480,
118 .yres = 800,
119 },
120 .max_bpp = 32,
121 .default_bpp = 16,
122};
123
124static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
125 .win[0] = &aquila_fb_win0,
126 .win[1] = &aquila_fb_win1,
127 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
128 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
129 VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
130 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
131};
132
Marek Szyprowskia1660c12010-07-14 18:33:44 +0900133/* MAX8998 regulators */
134#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
135
136static struct regulator_init_data aquila_ldo2_data = {
137 .constraints = {
138 .name = "VALIVE_1.1V",
139 .min_uV = 1100000,
140 .max_uV = 1100000,
141 .apply_uV = 1,
142 .always_on = 1,
143 .state_mem = {
144 .enabled = 1,
145 },
146 },
147};
148
149static struct regulator_init_data aquila_ldo3_data = {
150 .constraints = {
151 .name = "VUSB/MIPI_1.1V",
152 .min_uV = 1100000,
153 .max_uV = 1100000,
154 .apply_uV = 1,
155 .always_on = 1,
156 },
157};
158
159static struct regulator_init_data aquila_ldo4_data = {
160 .constraints = {
161 .name = "VDAC_3.3V",
162 .min_uV = 3300000,
163 .max_uV = 3300000,
164 .apply_uV = 1,
165 },
166};
167
168static struct regulator_init_data aquila_ldo5_data = {
169 .constraints = {
170 .name = "VTF_2.8V",
171 .min_uV = 2800000,
172 .max_uV = 2800000,
173 .apply_uV = 1,
174 },
175};
176
177static struct regulator_init_data aquila_ldo6_data = {
178 .constraints = {
179 .name = "VCC_3.3V",
180 .min_uV = 3300000,
181 .max_uV = 3300000,
182 .apply_uV = 1,
183 },
184};
185
186static struct regulator_init_data aquila_ldo7_data = {
187 .constraints = {
188 .name = "VCC_3.0V",
189 .min_uV = 3000000,
190 .max_uV = 3000000,
191 .apply_uV = 1,
192 .boot_on = 1,
193 .always_on = 1,
194 },
195};
196
197static struct regulator_init_data aquila_ldo8_data = {
198 .constraints = {
199 .name = "VUSB/VADC_3.3V",
200 .min_uV = 3300000,
201 .max_uV = 3300000,
202 .apply_uV = 1,
203 .always_on = 1,
204 },
205};
206
207static struct regulator_init_data aquila_ldo9_data = {
208 .constraints = {
209 .name = "VCC/VCAM_2.8V",
210 .min_uV = 2800000,
211 .max_uV = 2800000,
212 .apply_uV = 1,
213 .always_on = 1,
214 },
215};
216
217static struct regulator_init_data aquila_ldo10_data = {
218 .constraints = {
219 .name = "VPLL_1.1V",
220 .min_uV = 1100000,
221 .max_uV = 1100000,
222 .apply_uV = 1,
223 .boot_on = 1,
224 },
225};
226
227static struct regulator_init_data aquila_ldo11_data = {
228 .constraints = {
229 .name = "CAM_IO_2.8V",
230 .min_uV = 2800000,
231 .max_uV = 2800000,
232 .apply_uV = 1,
233 .always_on = 1,
234 },
235};
236
237static struct regulator_init_data aquila_ldo12_data = {
238 .constraints = {
239 .name = "CAM_ISP_1.2V",
240 .min_uV = 1200000,
241 .max_uV = 1200000,
242 .apply_uV = 1,
243 .always_on = 1,
244 },
245};
246
247static struct regulator_init_data aquila_ldo13_data = {
248 .constraints = {
249 .name = "CAM_A_2.8V",
250 .min_uV = 2800000,
251 .max_uV = 2800000,
252 .apply_uV = 1,
253 .always_on = 1,
254 },
255};
256
257static struct regulator_init_data aquila_ldo14_data = {
258 .constraints = {
259 .name = "CAM_CIF_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .always_on = 1,
264 },
265};
266
267static struct regulator_init_data aquila_ldo15_data = {
268 .constraints = {
269 .name = "CAM_AF_3.3V",
270 .min_uV = 3300000,
271 .max_uV = 3300000,
272 .apply_uV = 1,
273 .always_on = 1,
274 },
275};
276
277static struct regulator_init_data aquila_ldo16_data = {
278 .constraints = {
279 .name = "VMIPI_1.8V",
280 .min_uV = 1800000,
281 .max_uV = 1800000,
282 .apply_uV = 1,
283 .always_on = 1,
284 },
285};
286
287static struct regulator_init_data aquila_ldo17_data = {
288 .constraints = {
289 .name = "CAM_8M_1.8V",
290 .min_uV = 1800000,
291 .max_uV = 1800000,
292 .apply_uV = 1,
293 .always_on = 1,
294 },
295};
296
297/* BUCK */
298static struct regulator_consumer_supply buck1_consumer[] = {
299 { .supply = "vddarm", },
300};
301
302static struct regulator_consumer_supply buck2_consumer[] = {
303 { .supply = "vddint", },
304};
305
306static struct regulator_init_data aquila_buck1_data = {
307 .constraints = {
308 .name = "VARM_1.2V",
309 .min_uV = 1200000,
310 .max_uV = 1200000,
311 .apply_uV = 1,
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
313 REGULATOR_CHANGE_STATUS,
314 },
315 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
316 .consumer_supplies = buck1_consumer,
317};
318
319static struct regulator_init_data aquila_buck2_data = {
320 .constraints = {
321 .name = "VINT_1.2V",
322 .min_uV = 1200000,
323 .max_uV = 1200000,
324 .apply_uV = 1,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
326 REGULATOR_CHANGE_STATUS,
327 },
328 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
329 .consumer_supplies = buck2_consumer,
330};
331
332static struct regulator_init_data aquila_buck3_data = {
333 .constraints = {
334 .name = "VCC_1.8V",
335 .min_uV = 1800000,
336 .max_uV = 1800000,
337 .apply_uV = 1,
338 .state_mem = {
339 .enabled = 1,
340 },
341 },
342};
343
344static struct regulator_init_data aquila_buck4_data = {
345 .constraints = {
346 .name = "CAM_CORE_1.2V",
347 .min_uV = 1200000,
348 .max_uV = 1200000,
349 .apply_uV = 1,
350 .always_on = 1,
351 },
352};
353
354static struct max8998_regulator_data aquila_regulators[] = {
355 { MAX8998_LDO2, &aquila_ldo2_data },
356 { MAX8998_LDO3, &aquila_ldo3_data },
357 { MAX8998_LDO4, &aquila_ldo4_data },
358 { MAX8998_LDO5, &aquila_ldo5_data },
359 { MAX8998_LDO6, &aquila_ldo6_data },
360 { MAX8998_LDO7, &aquila_ldo7_data },
361 { MAX8998_LDO8, &aquila_ldo8_data },
362 { MAX8998_LDO9, &aquila_ldo9_data },
363 { MAX8998_LDO10, &aquila_ldo10_data },
364 { MAX8998_LDO11, &aquila_ldo11_data },
365 { MAX8998_LDO12, &aquila_ldo12_data },
366 { MAX8998_LDO13, &aquila_ldo13_data },
367 { MAX8998_LDO14, &aquila_ldo14_data },
368 { MAX8998_LDO15, &aquila_ldo15_data },
369 { MAX8998_LDO16, &aquila_ldo16_data },
370 { MAX8998_LDO17, &aquila_ldo17_data },
371 { MAX8998_BUCK1, &aquila_buck1_data },
372 { MAX8998_BUCK2, &aquila_buck2_data },
373 { MAX8998_BUCK3, &aquila_buck3_data },
374 { MAX8998_BUCK4, &aquila_buck4_data },
375};
376
377static struct max8998_platform_data aquila_max8998_pdata = {
378 .num_regulators = ARRAY_SIZE(aquila_regulators),
379 .regulators = aquila_regulators,
380};
381#endif
382
383/* GPIO I2C PMIC */
384#define AP_I2C_GPIO_PMIC_BUS_4 4
385static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = {
386 .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */
387 .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */
388};
389
390static struct platform_device aquila_i2c_gpio_pmic = {
391 .name = "i2c-gpio",
392 .id = AP_I2C_GPIO_PMIC_BUS_4,
393 .dev = {
394 .platform_data = &aquila_i2c_gpio_pmic_data,
395 },
396};
397
398static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = {
399#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE)
400 {
401 /* 0xCC when SRAD = 0 */
402 I2C_BOARD_INFO("max8998", 0xCC >> 1),
403 .platform_data = &aquila_max8998_pdata,
404 },
405#endif
406};
407
408/* PMIC Power button */
409static struct gpio_keys_button aquila_gpio_keys_table[] = {
410 {
411 .code = KEY_POWER,
412 .gpio = S5PV210_GPH2(6),
413 .desc = "gpio-keys: KEY_POWER",
414 .type = EV_KEY,
415 .active_low = 1,
416 .wakeup = 1,
417 .debounce_interval = 1,
418 },
419};
420
421static struct gpio_keys_platform_data aquila_gpio_keys_data = {
422 .buttons = aquila_gpio_keys_table,
423 .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table),
424};
425
426static struct platform_device aquila_device_gpiokeys = {
427 .name = "gpio-keys",
428 .dev = {
429 .platform_data = &aquila_gpio_keys_data,
430 },
431};
432
433static void __init aquila_pmic_init(void)
434{
435 /* AP_PMIC_IRQ: EINT7 */
436 s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf));
437 s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP);
438
439 /* nPower: EINT22 */
440 s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf));
441 s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP);
442}
443
Marek Szyprowskiba3fbef92010-08-05 18:00:12 +0900444/* MoviNAND */
445static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = {
446 .max_width = 4,
447 .cd_type = S3C_SDHCI_CD_PERMANENT,
448};
449
450/* Wireless LAN */
451static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = {
452 .max_width = 4,
453 .cd_type = S3C_SDHCI_CD_EXTERNAL,
454 /* ext_cd_{init,cleanup} callbacks will be added later */
455};
456
457/* External Flash */
458#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4)
459#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4)
460static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
461 .max_width = 4,
462 .cd_type = S3C_SDHCI_CD_GPIO,
463 .ext_cd_gpio = AQUILA_EXT_FLASH_CD,
464 .ext_cd_gpio_invert = 1,
465};
466
467static void aquila_setup_sdhci(void)
468{
469 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN");
470 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
471
472 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
473 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
474 s3c_sdhci2_set_platdata(&aquila_hsmmc2_data);
475};
476
Marek Szyprowskid947e792010-05-17 08:53:10 +0200477static struct platform_device *aquila_devices[] __initdata = {
Marek Szyprowskia1660c12010-07-14 18:33:44 +0900478 &aquila_i2c_gpio_pmic,
479 &aquila_device_gpiokeys,
Marek Szyprowskib3150322010-05-17 08:53:13 +0200480 &s3c_device_fb,
Joonyoung Shimab7a3372010-06-30 20:36:01 +0900481 &s5pc110_device_onenand,
Marek Szyprowskiba3fbef92010-08-05 18:00:12 +0900482 &s3c_device_hsmmc0,
483 &s3c_device_hsmmc1,
484 &s3c_device_hsmmc2,
Sylwester Nawrocki7200c112010-08-09 16:55:24 +0900485 &s5p_device_fimc0,
486 &s5p_device_fimc1,
487 &s5p_device_fimc2,
Marek Szyprowskid947e792010-05-17 08:53:10 +0200488};
489
490static void __init aquila_map_io(void)
491{
492 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
493 s3c24xx_init_clocks(24000000);
Joonyoung Shimdf017142010-06-24 19:28:55 +0900494 s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs));
Marek Szyprowskid947e792010-05-17 08:53:10 +0200495}
496
497static void __init aquila_machine_init(void)
498{
Marek Szyprowskia1660c12010-07-14 18:33:44 +0900499 /* PMIC */
500 aquila_pmic_init();
501 i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs,
502 ARRAY_SIZE(i2c_gpio_pmic_devs));
Marek Szyprowskiba3fbef92010-08-05 18:00:12 +0900503 /* SDHCI */
504 aquila_setup_sdhci();
Marek Szyprowskia1660c12010-07-14 18:33:44 +0900505
Marek Szyprowskib3150322010-05-17 08:53:13 +0200506 /* FB */
507 s3c_fb_set_platdata(&aquila_lcd_pdata);
508
Marek Szyprowskid947e792010-05-17 08:53:10 +0200509 platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
510}
511
512MACHINE_START(AQUILA, "Aquila")
513 /* Maintainers:
514 Marek Szyprowski <m.szyprowski@samsung.com>
515 Kyungmin Park <kyungmin.park@samsung.com> */
516 .phys_io = S3C_PA_UART & 0xfff00000,
517 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
518 .boot_params = S5P_PA_SDRAM + 0x100,
519 .init_irq = s5pv210_init_irq,
520 .map_io = aquila_map_io,
521 .init_machine = aquila_machine_init,
522 .timer = &s3c24xx_timer,
523MACHINE_END