Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * (C) 2001-2004 Dave Jones. <davej@codemonkey.org.uk> |
| 3 | * (C) 2002 Padraig Brady. <padraig@antefacto.com> |
| 4 | * |
| 5 | * Licensed under the terms of the GNU GPL License version 2. |
| 6 | * Based upon datasheets & sample CPUs kindly provided by VIA. |
| 7 | * |
| 8 | * VIA have currently 3 different versions of Longhaul. |
| 9 | * Version 1 (Longhaul) uses the BCR2 MSR at 0x1147. |
| 10 | * It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0. |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 11 | * Version 2 of longhaul is backward compatible with v1, but adds |
| 12 | * LONGHAUL MSR for purpose of both frequency and voltage scaling. |
| 13 | * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * Version 3 of longhaul got renamed to Powersaver and redesigned |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 15 | * to use only the POWERSAVER MSR at 0x110a. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | * It is present in Ezra-T (C5M), Nehemiah (C5X) and above. |
| 17 | * It's pretty much the same feature wise to longhaul v2, though |
| 18 | * there is provision for scaling FSB too, but this doesn't work |
| 19 | * too well in practice so we don't even try to use this. |
| 20 | * |
| 21 | * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* |
| 22 | */ |
| 23 | |
| 24 | #include <linux/kernel.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/moduleparam.h> |
| 27 | #include <linux/init.h> |
| 28 | #include <linux/cpufreq.h> |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 29 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | #include <linux/slab.h> |
| 31 | #include <linux/string.h> |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 32 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
| 34 | #include <asm/msr.h> |
| 35 | #include <asm/timex.h> |
| 36 | #include <asm/io.h> |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 37 | #include <asm/acpi.h> |
| 38 | #include <linux/acpi.h> |
| 39 | #include <acpi/processor.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
| 41 | #include "longhaul.h" |
| 42 | |
| 43 | #define PFX "longhaul: " |
| 44 | |
| 45 | #define TYPE_LONGHAUL_V1 1 |
| 46 | #define TYPE_LONGHAUL_V2 2 |
| 47 | #define TYPE_POWERSAVER 3 |
| 48 | |
| 49 | #define CPU_SAMUEL 1 |
| 50 | #define CPU_SAMUEL2 2 |
| 51 | #define CPU_EZRA 3 |
| 52 | #define CPU_EZRA_T 4 |
| 53 | #define CPU_NEHEMIAH 5 |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 54 | #define CPU_NEHEMIAH_C 6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 56 | /* Flags */ |
| 57 | #define USE_ACPI_C3 (1 << 1) |
| 58 | #define USE_NORTHBRIDGE (1 << 2) |
| 59 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | static int cpu_model; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 61 | static unsigned int numscales=16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | static unsigned int fsb; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 63 | |
Dave Jones | bd5ab26 | 2007-02-22 19:11:16 -0500 | [diff] [blame] | 64 | static const struct mV_pos *vrm_mV_table; |
| 65 | static const unsigned char *mV_vrm_table; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 66 | |
| 67 | static unsigned int highest_speed, lowest_speed; /* kHz */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | static unsigned int minmult, maxmult; |
| 69 | static int can_scale_voltage; |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 70 | static struct acpi_processor *pr = NULL; |
| 71 | static struct acpi_processor_cx *cx = NULL; |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 72 | static u8 longhaul_flags; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 73 | static unsigned int longhaul_index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | |
| 75 | /* Module parameters */ |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 76 | static int scale_voltage; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | |
| 78 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg) |
| 79 | |
| 80 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | /* Clock ratios multiplied by 10 */ |
| 82 | static int clock_ratio[32]; |
| 83 | static int eblcr_table[32]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | static int longhaul_version; |
| 85 | static struct cpufreq_frequency_table *longhaul_table; |
| 86 | |
| 87 | #ifdef CONFIG_CPU_FREQ_DEBUG |
| 88 | static char speedbuffer[8]; |
| 89 | |
| 90 | static char *print_speed(int speed) |
| 91 | { |
Dave Jones | e2aa873 | 2006-05-30 17:37:15 -0400 | [diff] [blame] | 92 | if (speed < 1000) { |
| 93 | snprintf(speedbuffer, sizeof(speedbuffer),"%dMHz", speed); |
| 94 | return speedbuffer; |
| 95 | } |
| 96 | |
| 97 | if (speed%1000 == 0) |
| 98 | snprintf(speedbuffer, sizeof(speedbuffer), |
| 99 | "%dGHz", speed/1000); |
| 100 | else |
| 101 | snprintf(speedbuffer, sizeof(speedbuffer), |
| 102 | "%d.%dGHz", speed/1000, (speed%1000)/100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | |
| 104 | return speedbuffer; |
| 105 | } |
| 106 | #endif |
| 107 | |
| 108 | |
| 109 | static unsigned int calc_speed(int mult) |
| 110 | { |
| 111 | int khz; |
| 112 | khz = (mult/10)*fsb; |
| 113 | if (mult%10) |
| 114 | khz += fsb/2; |
| 115 | khz *= 1000; |
| 116 | return khz; |
| 117 | } |
| 118 | |
| 119 | |
| 120 | static int longhaul_get_cpu_mult(void) |
| 121 | { |
| 122 | unsigned long invalue=0,lo, hi; |
| 123 | |
| 124 | rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi); |
| 125 | invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22; |
| 126 | if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) { |
| 127 | if (lo & (1<<27)) |
| 128 | invalue+=16; |
| 129 | } |
| 130 | return eblcr_table[invalue]; |
| 131 | } |
| 132 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 133 | /* For processor with BCR2 MSR */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 135 | static void do_longhaul1(unsigned int clock_ratio_index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | { |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 137 | union msr_bcr2 bcr2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 139 | rdmsrl(MSR_VIA_BCR2, bcr2.val); |
| 140 | /* Enable software clock multiplier */ |
| 141 | bcr2.bits.ESOFTBF = 1; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 142 | bcr2.bits.CLOCKMUL = clock_ratio_index & 0xff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 144 | /* Sync to timer tick */ |
Zachary Amsden | 4bb0d3e | 2005-09-03 15:56:36 -0700 | [diff] [blame] | 145 | safe_halt(); |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 146 | /* Change frequency on next halt or sleep */ |
| 147 | wrmsrl(MSR_VIA_BCR2, bcr2.val); |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 148 | /* Invoke transition */ |
| 149 | ACPI_FLUSH_CPU_CACHE(); |
| 150 | halt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 151 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 152 | /* Disable software clock multiplier */ |
Dave Jones | 3be6a48 | 2005-05-31 19:03:51 -0700 | [diff] [blame] | 153 | local_irq_disable(); |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 154 | rdmsrl(MSR_VIA_BCR2, bcr2.val); |
| 155 | bcr2.bits.ESOFTBF = 0; |
| 156 | wrmsrl(MSR_VIA_BCR2, bcr2.val); |
| 157 | } |
Dave Jones | 3be6a48 | 2005-05-31 19:03:51 -0700 | [diff] [blame] | 158 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 159 | /* For processor with Longhaul MSR */ |
Dave Jones | 1174631 | 2005-05-31 19:03:51 -0700 | [diff] [blame] | 160 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 161 | static void do_powersaver(int cx_address, unsigned int clock_ratio_index, |
| 162 | unsigned int dir) |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 163 | { |
| 164 | union msr_longhaul longhaul; |
| 165 | u32 t; |
Dave Jones | 3be6a48 | 2005-05-31 19:03:51 -0700 | [diff] [blame] | 166 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 167 | rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 168 | /* Setup new frequency */ |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 169 | longhaul.bits.RevisionKey = longhaul.bits.RevisionID; |
| 170 | longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf; |
| 171 | longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4; |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 172 | /* Setup new voltage */ |
| 173 | if (can_scale_voltage) |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 174 | longhaul.bits.SoftVID = (clock_ratio_index >> 8) & 0x1f; |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 175 | /* Sync to timer tick */ |
| 176 | safe_halt(); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 177 | /* Raise voltage if necessary */ |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 178 | if (can_scale_voltage && dir) { |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 179 | longhaul.bits.EnableSoftVID = 1; |
| 180 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
| 181 | /* Change voltage */ |
| 182 | if (!cx_address) { |
| 183 | ACPI_FLUSH_CPU_CACHE(); |
| 184 | halt(); |
| 185 | } else { |
| 186 | ACPI_FLUSH_CPU_CACHE(); |
| 187 | /* Invoke C3 */ |
| 188 | inb(cx_address); |
| 189 | /* Dummy op - must do something useless after P_LVL3 |
| 190 | * read */ |
Dave Jones | bd0561c | 2007-02-10 20:36:29 -0500 | [diff] [blame] | 191 | t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 192 | } |
| 193 | longhaul.bits.EnableSoftVID = 0; |
| 194 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 195 | } |
| 196 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 197 | /* Change frequency on next halt or sleep */ |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 198 | longhaul.bits.EnableSoftBusRatio = 1; |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 199 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 200 | if (!cx_address) { |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 201 | ACPI_FLUSH_CPU_CACHE(); |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 202 | halt(); |
| 203 | } else { |
| 204 | ACPI_FLUSH_CPU_CACHE(); |
| 205 | /* Invoke C3 */ |
| 206 | inb(cx_address); |
| 207 | /* Dummy op - must do something useless after P_LVL3 read */ |
Alexey Starikovskiy | cee324b | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 208 | t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 209 | } |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 210 | /* Disable bus ratio bit */ |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 211 | longhaul.bits.EnableSoftBusRatio = 0; |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 212 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 213 | |
| 214 | /* Reduce voltage if necessary */ |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 215 | if (can_scale_voltage && !dir) { |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 216 | longhaul.bits.EnableSoftVID = 1; |
| 217 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
| 218 | /* Change voltage */ |
| 219 | if (!cx_address) { |
| 220 | ACPI_FLUSH_CPU_CACHE(); |
| 221 | halt(); |
| 222 | } else { |
| 223 | ACPI_FLUSH_CPU_CACHE(); |
| 224 | /* Invoke C3 */ |
| 225 | inb(cx_address); |
| 226 | /* Dummy op - must do something useless after P_LVL3 |
| 227 | * read */ |
Dave Jones | bd0561c | 2007-02-10 20:36:29 -0500 | [diff] [blame] | 228 | t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 229 | } |
| 230 | longhaul.bits.EnableSoftVID = 0; |
| 231 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 232 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | /** |
| 236 | * longhaul_set_cpu_frequency() |
| 237 | * @clock_ratio_index : bitpattern of the new multiplier. |
| 238 | * |
| 239 | * Sets a new clock ratio. |
| 240 | */ |
| 241 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 242 | static void longhaul_setstate(unsigned int table_index) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 244 | unsigned int clock_ratio_index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | int speed, mult; |
| 246 | struct cpufreq_freqs freqs; |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 247 | unsigned long flags; |
| 248 | unsigned int pic1_mask, pic2_mask; |
Rafał Bilski | 489dc5c | 2007-05-17 22:39:02 +0200 | [diff] [blame] | 249 | u32 bm_status = 0; |
| 250 | u32 bm_timeout = 100000; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 251 | unsigned int dir = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 253 | clock_ratio_index = longhaul_table[table_index].index; |
| 254 | /* Safety precautions */ |
| 255 | mult = clock_ratio[clock_ratio_index & 0x1f]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | if (mult == -1) |
| 257 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 258 | speed = calc_speed(mult); |
| 259 | if ((speed > highest_speed) || (speed < lowest_speed)) |
| 260 | return; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 261 | /* Voltage transition before frequency transition? */ |
| 262 | if (can_scale_voltage && longhaul_index < table_index) |
| 263 | dir = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | |
| 265 | freqs.old = calc_speed(longhaul_get_cpu_mult()); |
| 266 | freqs.new = speed; |
| 267 | freqs.cpu = 0; /* longhaul.c is UP only driver */ |
| 268 | |
| 269 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
| 270 | |
| 271 | dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n", |
| 272 | fsb, mult/10, mult%10, print_speed(speed/1000)); |
| 273 | |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 274 | preempt_disable(); |
| 275 | local_irq_save(flags); |
| 276 | |
| 277 | pic2_mask = inb(0xA1); |
| 278 | pic1_mask = inb(0x21); /* works on C3. save mask. */ |
| 279 | outb(0xFF,0xA1); /* Overkill */ |
| 280 | outb(0xFE,0x21); /* TMR0 only */ |
| 281 | |
Rafał Bilski | 489dc5c | 2007-05-17 22:39:02 +0200 | [diff] [blame] | 282 | /* Wait while PCI bus is busy. */ |
| 283 | if (longhaul_flags & USE_NORTHBRIDGE |
| 284 | || ((pr != NULL) && pr->flags.bm_control)) { |
| 285 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
| 286 | while (bm_status && bm_timeout) { |
| 287 | acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
| 288 | bm_timeout--; |
| 289 | acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS, |
| 290 | &bm_status); |
| 291 | } |
| 292 | } |
| 293 | |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 294 | if (longhaul_flags & USE_NORTHBRIDGE) { |
| 295 | /* Disable AGP and PCI arbiters */ |
| 296 | outb(3, 0x22); |
| 297 | } else if ((pr != NULL) && pr->flags.bm_control) { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 298 | /* Disable bus master arbitration */ |
Alexey Starikovskiy | cee324b | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 299 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1); |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 300 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | switch (longhaul_version) { |
| 302 | |
| 303 | /* |
| 304 | * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B]) |
| 305 | * Software controlled multipliers only. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | */ |
| 307 | case TYPE_LONGHAUL_V1: |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 308 | do_longhaul1(clock_ratio_index); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | break; |
| 310 | |
| 311 | /* |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 312 | * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5B] and Ezra [C5C] |
| 313 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 314 | * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N]) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | * Nehemiah can do FSB scaling too, but this has never been proven |
| 316 | * to work in practice. |
| 317 | */ |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 318 | case TYPE_LONGHAUL_V2: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | case TYPE_POWERSAVER: |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 320 | if (longhaul_flags & USE_ACPI_C3) { |
| 321 | /* Don't allow wakeup */ |
Alexey Starikovskiy | cee324b | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 322 | acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 323 | do_powersaver(cx->address, clock_ratio_index, dir); |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 324 | } else { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 325 | do_powersaver(0, clock_ratio_index, dir); |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 326 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | break; |
| 328 | } |
| 329 | |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 330 | if (longhaul_flags & USE_NORTHBRIDGE) { |
| 331 | /* Enable arbiters */ |
| 332 | outb(0, 0x22); |
| 333 | } else if ((pr != NULL) && pr->flags.bm_control) { |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 334 | /* Enable bus master arbitration */ |
Alexey Starikovskiy | cee324b | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 335 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0); |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 336 | } |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 337 | outb(pic2_mask,0xA1); /* restore mask */ |
| 338 | outb(pic1_mask,0x21); |
| 339 | |
| 340 | local_irq_restore(flags); |
| 341 | preempt_enable(); |
| 342 | |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 343 | freqs.new = calc_speed(longhaul_get_cpu_mult()); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
Rafał Bilski | 489dc5c | 2007-05-17 22:39:02 +0200 | [diff] [blame] | 345 | |
| 346 | if (!bm_timeout) |
| 347 | printk(KERN_INFO PFX "Warning: Timeout while waiting for " |
| 348 | "idle PCI bus.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | } |
| 350 | |
| 351 | /* |
| 352 | * Centaur decided to make life a little more tricky. |
| 353 | * Only longhaul v1 is allowed to read EBLCR BSEL[0:1]. |
| 354 | * Samuel2 and above have to try and guess what the FSB is. |
| 355 | * We do this by assuming we booted at maximum multiplier, and interpolate |
| 356 | * between that value multiplied by possible FSBs and cpu_mhz which |
| 357 | * was calculated at boot time. Really ugly, but no other way to do this. |
| 358 | */ |
| 359 | |
| 360 | #define ROUNDING 0xf |
| 361 | |
Rafa³ Bilski | 24ebead | 2007-01-01 23:49:34 +0100 | [diff] [blame] | 362 | static int guess_fsb(int mult) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | { |
Rafa³ Bilski | 46ef955 | 2007-02-04 15:58:46 +0100 | [diff] [blame] | 364 | int speed = cpu_khz / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | int i; |
Rafa³ Bilski | 46ef955 | 2007-02-04 15:58:46 +0100 | [diff] [blame] | 366 | int speeds[] = { 666, 1000, 1333, 2000 }; |
| 367 | int f_max, f_min; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | |
Rafa³ Bilski | 46ef955 | 2007-02-04 15:58:46 +0100 | [diff] [blame] | 369 | for (i = 0; i < 4; i++) { |
| 370 | f_max = ((speeds[i] * mult) + 50) / 100; |
| 371 | f_max += (ROUNDING / 2); |
| 372 | f_min = f_max - ROUNDING; |
| 373 | if ((speed <= f_max) && (speed >= f_min)) |
| 374 | return speeds[i] / 10; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | } |
| 376 | return 0; |
| 377 | } |
| 378 | |
| 379 | |
| 380 | static int __init longhaul_get_ranges(void) |
| 381 | { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 382 | unsigned int i, j, k = 0; |
| 383 | unsigned int ratio; |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 384 | int mult; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 386 | /* Get current frequency */ |
| 387 | mult = longhaul_get_cpu_mult(); |
| 388 | if (mult == -1) { |
| 389 | printk(KERN_INFO PFX "Invalid (reserved) multiplier!\n"); |
| 390 | return -EINVAL; |
| 391 | } |
| 392 | fsb = guess_fsb(mult); |
| 393 | if (fsb == 0) { |
| 394 | printk(KERN_INFO PFX "Invalid (reserved) FSB!\n"); |
| 395 | return -EINVAL; |
| 396 | } |
| 397 | /* Get max multiplier - as we always did. |
| 398 | * Longhaul MSR is usefull only when voltage scaling is enabled. |
| 399 | * C3 is booting at max anyway. */ |
| 400 | maxmult = mult; |
| 401 | /* Get min multiplier */ |
Rafa³ Bilski | 9addf3b | 2007-02-07 22:53:29 +0100 | [diff] [blame] | 402 | switch (cpu_model) { |
| 403 | case CPU_NEHEMIAH: |
| 404 | minmult = 50; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 405 | break; |
Rafa³ Bilski | 9addf3b | 2007-02-07 22:53:29 +0100 | [diff] [blame] | 406 | case CPU_NEHEMIAH_C: |
| 407 | minmult = 40; |
| 408 | break; |
| 409 | default: |
| 410 | minmult = 30; |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 411 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | } |
| 413 | |
| 414 | dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n", |
| 415 | minmult/10, minmult%10, maxmult/10, maxmult%10); |
| 416 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | highest_speed = calc_speed(maxmult); |
| 418 | lowest_speed = calc_speed(minmult); |
| 419 | dprintk ("FSB:%dMHz Lowest speed: %s Highest speed:%s\n", fsb, |
Alexey Starikovskiy | cee324b | 2007-02-02 19:48:22 +0300 | [diff] [blame] | 420 | print_speed(lowest_speed/1000), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | print_speed(highest_speed/1000)); |
| 422 | |
| 423 | if (lowest_speed == highest_speed) { |
| 424 | printk (KERN_INFO PFX "highestspeed == lowest, aborting.\n"); |
| 425 | return -EINVAL; |
| 426 | } |
| 427 | if (lowest_speed > highest_speed) { |
| 428 | printk (KERN_INFO PFX "nonsense! lowest (%d > %d) !\n", |
| 429 | lowest_speed, highest_speed); |
| 430 | return -EINVAL; |
| 431 | } |
| 432 | |
| 433 | longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL); |
| 434 | if(!longhaul_table) |
| 435 | return -ENOMEM; |
| 436 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 437 | for (j = 0; j < numscales; j++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | ratio = clock_ratio[j]; |
| 439 | if (ratio == -1) |
| 440 | continue; |
| 441 | if (ratio > maxmult || ratio < minmult) |
| 442 | continue; |
| 443 | longhaul_table[k].frequency = calc_speed(ratio); |
| 444 | longhaul_table[k].index = j; |
| 445 | k++; |
| 446 | } |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 447 | if (k <= 1) { |
| 448 | kfree(longhaul_table); |
| 449 | return -ENODEV; |
| 450 | } |
| 451 | /* Sort */ |
| 452 | for (j = 0; j < k - 1; j++) { |
| 453 | unsigned int min_f, min_i; |
| 454 | min_f = longhaul_table[j].frequency; |
| 455 | min_i = j; |
| 456 | for (i = j + 1; i < k; i++) { |
| 457 | if (longhaul_table[i].frequency < min_f) { |
| 458 | min_f = longhaul_table[i].frequency; |
| 459 | min_i = i; |
| 460 | } |
| 461 | } |
| 462 | if (min_i != j) { |
| 463 | unsigned int temp; |
| 464 | temp = longhaul_table[j].frequency; |
| 465 | longhaul_table[j].frequency = longhaul_table[min_i].frequency; |
| 466 | longhaul_table[min_i].frequency = temp; |
| 467 | temp = longhaul_table[j].index; |
| 468 | longhaul_table[j].index = longhaul_table[min_i].index; |
| 469 | longhaul_table[min_i].index = temp; |
| 470 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 471 | } |
| 472 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 473 | longhaul_table[k].frequency = CPUFREQ_TABLE_END; |
| 474 | |
| 475 | /* Find index we are running on */ |
| 476 | for (j = 0; j < k; j++) { |
| 477 | if (clock_ratio[longhaul_table[j].index & 0x1f] == mult) { |
| 478 | longhaul_index = j; |
| 479 | break; |
| 480 | } |
| 481 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | return 0; |
| 483 | } |
| 484 | |
| 485 | |
| 486 | static void __init longhaul_setup_voltagescaling(void) |
| 487 | { |
| 488 | union msr_longhaul longhaul; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 489 | struct mV_pos minvid, maxvid, vid; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 490 | unsigned int j, speed, pos, kHz_step, numvscales; |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 491 | int min_vid_speed; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 493 | rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
| 494 | if (!(longhaul.bits.RevisionID & 1)) { |
| 495 | printk(KERN_INFO PFX "Voltage scaling not supported by CPU.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | return; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 497 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 499 | if (!longhaul.bits.VRMRev) { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 500 | printk(KERN_INFO PFX "VRM 8.5\n"); |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 501 | vrm_mV_table = &vrm85_mV[0]; |
| 502 | mV_vrm_table = &mV_vrm85[0]; |
| 503 | } else { |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 504 | printk(KERN_INFO PFX "Mobile VRM\n"); |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 505 | if (cpu_model < CPU_NEHEMIAH) |
| 506 | return; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 507 | vrm_mV_table = &mobilevrm_mV[0]; |
| 508 | mV_vrm_table = &mV_mobilevrm[0]; |
| 509 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 511 | minvid = vrm_mV_table[longhaul.bits.MinimumVID]; |
| 512 | maxvid = vrm_mV_table[longhaul.bits.MaximumVID]; |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 513 | |
| 514 | if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. " |
| 516 | "Voltage scaling disabled.\n", |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 517 | minvid.mV/1000, minvid.mV%1000, maxvid.mV/1000, maxvid.mV%1000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | return; |
| 519 | } |
| 520 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 521 | if (minvid.mV == maxvid.mV) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are " |
| 523 | "both %d.%03d. Voltage scaling disabled\n", |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 524 | maxvid.mV/1000, maxvid.mV%1000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | return; |
| 526 | } |
| 527 | |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 528 | /* How many voltage steps */ |
| 529 | numvscales = maxvid.pos - minvid.pos + 1; |
| 530 | printk(KERN_INFO PFX |
| 531 | "Max VID=%d.%03d " |
| 532 | "Min VID=%d.%03d, " |
| 533 | "%d possible voltage scales\n", |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 534 | maxvid.mV/1000, maxvid.mV%1000, |
| 535 | minvid.mV/1000, minvid.mV%1000, |
| 536 | numvscales); |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 537 | |
| 538 | /* Calculate max frequency at min voltage */ |
| 539 | j = longhaul.bits.MinMHzBR; |
| 540 | if (longhaul.bits.MinMHzBR4) |
| 541 | j += 16; |
| 542 | min_vid_speed = eblcr_table[j]; |
| 543 | if (min_vid_speed == -1) |
| 544 | return; |
| 545 | switch (longhaul.bits.MinMHzFSB) { |
| 546 | case 0: |
| 547 | min_vid_speed *= 13333; |
| 548 | break; |
| 549 | case 1: |
| 550 | min_vid_speed *= 10000; |
| 551 | break; |
| 552 | case 3: |
| 553 | min_vid_speed *= 6666; |
| 554 | break; |
| 555 | default: |
| 556 | return; |
| 557 | break; |
| 558 | } |
| 559 | if (min_vid_speed >= highest_speed) |
| 560 | return; |
| 561 | /* Calculate kHz for one voltage step */ |
| 562 | kHz_step = (highest_speed - min_vid_speed) / numvscales; |
| 563 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 564 | j = 0; |
| 565 | while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) { |
| 566 | speed = longhaul_table[j].frequency; |
Rafa³ Bilski | 348f31e | 2007-02-08 18:56:04 +0100 | [diff] [blame] | 567 | if (speed > min_vid_speed) |
| 568 | pos = (speed - min_vid_speed) / kHz_step + minvid.pos; |
| 569 | else |
| 570 | pos = minvid.pos; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 571 | longhaul_table[j].index |= mV_vrm_table[pos] << 8; |
| 572 | vid = vrm_mV_table[mV_vrm_table[pos]]; |
| 573 | printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n", speed, j, vid.mV); |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 574 | j++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | } |
| 576 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | can_scale_voltage = 1; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 578 | printk(KERN_INFO PFX "Voltage scaling enabled.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | } |
| 580 | |
| 581 | |
| 582 | static int longhaul_verify(struct cpufreq_policy *policy) |
| 583 | { |
| 584 | return cpufreq_frequency_table_verify(policy, longhaul_table); |
| 585 | } |
| 586 | |
| 587 | |
| 588 | static int longhaul_target(struct cpufreq_policy *policy, |
| 589 | unsigned int target_freq, unsigned int relation) |
| 590 | { |
| 591 | unsigned int table_index = 0; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 592 | unsigned int i; |
| 593 | unsigned int dir = 0; |
| 594 | u8 vid, current_vid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | |
| 596 | if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index)) |
| 597 | return -EINVAL; |
| 598 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 599 | /* Don't set same frequency again */ |
| 600 | if (longhaul_index == table_index) |
| 601 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 603 | if (!can_scale_voltage) |
| 604 | longhaul_setstate(table_index); |
| 605 | else { |
| 606 | /* On test system voltage transitions exceeding single |
| 607 | * step up or down were turning motherboard off. Both |
| 608 | * "ondemand" and "userspace" are unsafe. C7 is doing |
| 609 | * this in hardware, C3 is old and we need to do this |
| 610 | * in software. */ |
| 611 | i = longhaul_index; |
| 612 | current_vid = (longhaul_table[longhaul_index].index >> 8) & 0x1f; |
| 613 | if (table_index > longhaul_index) |
| 614 | dir = 1; |
| 615 | while (i != table_index) { |
| 616 | vid = (longhaul_table[i].index >> 8) & 0x1f; |
| 617 | if (vid != current_vid) { |
| 618 | longhaul_setstate(i); |
| 619 | current_vid = vid; |
| 620 | msleep(200); |
| 621 | } |
| 622 | if (dir) |
| 623 | i++; |
| 624 | else |
| 625 | i--; |
| 626 | } |
| 627 | longhaul_setstate(table_index); |
| 628 | } |
| 629 | longhaul_index = table_index; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 630 | return 0; |
| 631 | } |
| 632 | |
| 633 | |
| 634 | static unsigned int longhaul_get(unsigned int cpu) |
| 635 | { |
| 636 | if (cpu) |
| 637 | return 0; |
| 638 | return calc_speed(longhaul_get_cpu_mult()); |
| 639 | } |
| 640 | |
Adrian Bunk | c4a96c1 | 2006-07-09 19:53:08 +0200 | [diff] [blame] | 641 | static acpi_status longhaul_walk_callback(acpi_handle obj_handle, |
| 642 | u32 nesting_level, |
| 643 | void *context, void **return_value) |
Rafa³ Bilski | dadb49d | 2006-07-03 07:19:05 +0200 | [diff] [blame] | 644 | { |
| 645 | struct acpi_device *d; |
| 646 | |
| 647 | if ( acpi_bus_get_device(obj_handle, &d) ) { |
| 648 | return 0; |
| 649 | } |
| 650 | *return_value = (void *)acpi_driver_data(d); |
| 651 | return 1; |
| 652 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 654 | /* VIA don't support PM2 reg, but have something similar */ |
| 655 | static int enable_arbiter_disable(void) |
| 656 | { |
| 657 | struct pci_dev *dev; |
Rafał Bilski | 73e107d | 2007-05-28 21:56:19 +0200 | [diff] [blame^] | 658 | int status = 1; |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 659 | int reg; |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 660 | u8 pci_cmd; |
| 661 | |
| 662 | /* Find PLE133 host bridge */ |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 663 | reg = 0x78; |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 664 | dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0, |
| 665 | NULL); |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 666 | /* Find CLE266 host bridge */ |
| 667 | if (dev == NULL) { |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 668 | reg = 0x76; |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 669 | dev = pci_get_device(PCI_VENDOR_ID_VIA, |
| 670 | PCI_DEVICE_ID_VIA_862X_0, NULL); |
Rafa³ Bilski | db2fb9d | 2006-11-30 03:47:41 +0100 | [diff] [blame] | 671 | /* Find CN400 V-Link host bridge */ |
| 672 | if (dev == NULL) |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 673 | dev = pci_get_device(PCI_VENDOR_ID_VIA, 0x7259, NULL); |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 674 | } |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 675 | if (dev != NULL) { |
| 676 | /* Enable access to port 0x22 */ |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 677 | pci_read_config_byte(dev, reg, &pci_cmd); |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 678 | if (!(pci_cmd & 1<<7)) { |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 679 | pci_cmd |= 1<<7; |
rafalbilski@interia.pl | 7f1be89 | 2006-09-24 20:28:13 +0200 | [diff] [blame] | 680 | pci_write_config_byte(dev, reg, pci_cmd); |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 681 | pci_read_config_byte(dev, reg, &pci_cmd); |
| 682 | if (!(pci_cmd & 1<<7)) { |
| 683 | printk(KERN_ERR PFX |
| 684 | "Can't enable access to port 0x22.\n"); |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 685 | status = 0; |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 686 | } |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 687 | } |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 688 | pci_dev_put(dev); |
| 689 | return status; |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 690 | } |
| 691 | return 0; |
| 692 | } |
| 693 | |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 694 | static int longhaul_setup_southbridge(void) |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 695 | { |
| 696 | struct pci_dev *dev; |
| 697 | u8 pci_cmd; |
| 698 | |
| 699 | /* Find VT8235 southbridge */ |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 700 | dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL); |
Rafał Bilski | 920dd0f | 2007-05-17 22:35:29 +0200 | [diff] [blame] | 701 | if (dev == NULL) |
| 702 | /* Find VT8237 southbridge */ |
| 703 | dev = pci_get_device(PCI_VENDOR_ID_VIA, |
| 704 | PCI_DEVICE_ID_VIA_8237, NULL); |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 705 | if (dev != NULL) { |
| 706 | /* Set transition time to max */ |
| 707 | pci_read_config_byte(dev, 0xec, &pci_cmd); |
| 708 | pci_cmd &= ~(1 << 2); |
| 709 | pci_write_config_byte(dev, 0xec, pci_cmd); |
| 710 | pci_read_config_byte(dev, 0xe4, &pci_cmd); |
| 711 | pci_cmd &= ~(1 << 7); |
| 712 | pci_write_config_byte(dev, 0xe4, pci_cmd); |
| 713 | pci_read_config_byte(dev, 0xe5, &pci_cmd); |
| 714 | pci_cmd |= 1 << 7; |
| 715 | pci_write_config_byte(dev, 0xe5, pci_cmd); |
Rafał Bilski | fb48e15 | 2007-03-02 20:12:27 +0100 | [diff] [blame] | 716 | pci_dev_put(dev); |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 717 | return 1; |
| 718 | } |
| 719 | return 0; |
| 720 | } |
| 721 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | static int __init longhaul_cpu_init(struct cpufreq_policy *policy) |
| 723 | { |
| 724 | struct cpuinfo_x86 *c = cpu_data; |
| 725 | char *cpuname=NULL; |
| 726 | int ret; |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 727 | u32 lo, hi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 728 | |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 729 | /* Check what we have on this motherboard */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | switch (c->x86_model) { |
| 731 | case 6: |
| 732 | cpu_model = CPU_SAMUEL; |
| 733 | cpuname = "C3 'Samuel' [C5A]"; |
| 734 | longhaul_version = TYPE_LONGHAUL_V1; |
| 735 | memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio)); |
| 736 | memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr)); |
| 737 | break; |
| 738 | |
| 739 | case 7: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | switch (c->x86_mask) { |
| 741 | case 0: |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 742 | longhaul_version = TYPE_LONGHAUL_V1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | cpu_model = CPU_SAMUEL2; |
| 744 | cpuname = "C3 'Samuel 2' [C5B]"; |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 745 | /* Note, this is not a typo, early Samuel2's had |
| 746 | * Samuel1 ratios. */ |
| 747 | memcpy(clock_ratio, samuel1_clock_ratio, |
| 748 | sizeof(samuel1_clock_ratio)); |
| 749 | memcpy(eblcr_table, samuel2_eblcr, |
| 750 | sizeof(samuel2_eblcr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | break; |
| 752 | case 1 ... 15: |
Rafal Bilski | 0784425 | 2007-04-22 12:26:04 +0200 | [diff] [blame] | 753 | longhaul_version = TYPE_LONGHAUL_V1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | if (c->x86_mask < 8) { |
| 755 | cpu_model = CPU_SAMUEL2; |
| 756 | cpuname = "C3 'Samuel 2' [C5B]"; |
| 757 | } else { |
| 758 | cpu_model = CPU_EZRA; |
| 759 | cpuname = "C3 'Ezra' [C5C]"; |
| 760 | } |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 761 | memcpy(clock_ratio, ezra_clock_ratio, |
| 762 | sizeof(ezra_clock_ratio)); |
| 763 | memcpy(eblcr_table, ezra_eblcr, |
| 764 | sizeof(ezra_eblcr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | break; |
| 766 | } |
| 767 | break; |
| 768 | |
| 769 | case 8: |
| 770 | cpu_model = CPU_EZRA_T; |
| 771 | cpuname = "C3 'Ezra-T' [C5M]"; |
| 772 | longhaul_version = TYPE_POWERSAVER; |
| 773 | numscales=32; |
| 774 | memcpy (clock_ratio, ezrat_clock_ratio, sizeof(ezrat_clock_ratio)); |
| 775 | memcpy (eblcr_table, ezrat_eblcr, sizeof(ezrat_eblcr)); |
| 776 | break; |
| 777 | |
| 778 | case 9: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | longhaul_version = TYPE_POWERSAVER; |
Rafa³ Bilski | 0d44b2b | 2007-01-31 23:50:49 +0100 | [diff] [blame] | 780 | numscales = 32; |
| 781 | memcpy(clock_ratio, |
| 782 | nehemiah_clock_ratio, |
| 783 | sizeof(nehemiah_clock_ratio)); |
| 784 | memcpy(eblcr_table, nehemiah_eblcr, sizeof(nehemiah_eblcr)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | switch (c->x86_mask) { |
| 786 | case 0 ... 1: |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 787 | cpu_model = CPU_NEHEMIAH; |
Rafa³ Bilski | e57501c | 2007-02-08 23:12:02 +0100 | [diff] [blame] | 788 | cpuname = "C3 'Nehemiah A' [C5XLOE]"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | break; |
| 790 | case 2 ... 4: |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 791 | cpu_model = CPU_NEHEMIAH; |
Rafa³ Bilski | e57501c | 2007-02-08 23:12:02 +0100 | [diff] [blame] | 792 | cpuname = "C3 'Nehemiah B' [C5XLOH]"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 793 | break; |
| 794 | case 5 ... 15: |
Rafa³ Bilski | 980342a | 2007-01-31 23:42:47 +0100 | [diff] [blame] | 795 | cpu_model = CPU_NEHEMIAH_C; |
Rafa³ Bilski | e57501c | 2007-02-08 23:12:02 +0100 | [diff] [blame] | 796 | cpuname = "C3 'Nehemiah C' [C5P]"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 797 | break; |
| 798 | } |
| 799 | break; |
| 800 | |
| 801 | default: |
| 802 | cpuname = "Unknown"; |
| 803 | break; |
| 804 | } |
Rafa³ Bilski | 2b8c0e1 | 2007-02-14 22:00:37 +0100 | [diff] [blame] | 805 | /* Check Longhaul ver. 2 */ |
| 806 | if (longhaul_version == TYPE_LONGHAUL_V2) { |
| 807 | rdmsr(MSR_VIA_LONGHAUL, lo, hi); |
| 808 | if (lo == 0 && hi == 0) |
| 809 | /* Looks like MSR isn't present */ |
| 810 | longhaul_version = TYPE_LONGHAUL_V1; |
| 811 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 812 | |
| 813 | printk (KERN_INFO PFX "VIA %s CPU detected. ", cpuname); |
| 814 | switch (longhaul_version) { |
| 815 | case TYPE_LONGHAUL_V1: |
| 816 | case TYPE_LONGHAUL_V2: |
| 817 | printk ("Longhaul v%d supported.\n", longhaul_version); |
| 818 | break; |
| 819 | case TYPE_POWERSAVER: |
| 820 | printk ("Powersaver supported.\n"); |
| 821 | break; |
| 822 | }; |
| 823 | |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 824 | /* Doesn't hurt */ |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 825 | longhaul_setup_southbridge(); |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 826 | |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 827 | /* Find ACPI data for processor */ |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 828 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, |
| 829 | ACPI_UINT32_MAX, &longhaul_walk_callback, |
| 830 | NULL, (void *)&pr); |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 831 | |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 832 | /* Check ACPI support for C3 state */ |
Dave Jones | 7ab77e0 | 2007-04-20 15:58:00 -0400 | [diff] [blame] | 833 | if (pr != NULL && longhaul_version == TYPE_POWERSAVER) { |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 834 | cx = &pr->power.states[ACPI_STATE_C3]; |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 835 | if (cx->address > 0 && cx->latency <= 1000) |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 836 | longhaul_flags |= USE_ACPI_C3; |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 837 | } |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 838 | /* Check if northbridge is friendly */ |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 839 | if (enable_arbiter_disable()) |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 840 | longhaul_flags |= USE_NORTHBRIDGE; |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 841 | |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 842 | /* Check ACPI support for bus master arbiter disable */ |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 843 | if (!(longhaul_flags & USE_ACPI_C3 |
| 844 | || longhaul_flags & USE_NORTHBRIDGE) |
| 845 | && ((pr == NULL) || !(pr->flags.bm_control))) { |
Rafa³ Bilski | 264166e | 2006-12-24 14:04:23 +0100 | [diff] [blame] | 846 | printk(KERN_ERR PFX |
| 847 | "No ACPI support. Unsupported northbridge.\n"); |
| 848 | return -ENODEV; |
| 849 | } |
| 850 | |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 851 | if (longhaul_flags & USE_NORTHBRIDGE) |
Rafał Bilski | 7d5edcc | 2007-05-17 22:33:46 +0200 | [diff] [blame] | 852 | printk(KERN_INFO PFX "Using northbridge support.\n"); |
| 853 | if (longhaul_flags & USE_ACPI_C3) |
| 854 | printk(KERN_INFO PFX "Using ACPI support.\n"); |
Rafa³ Bilski | 179da8e | 2006-08-08 19:12:20 +0200 | [diff] [blame] | 855 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 856 | ret = longhaul_get_ranges(); |
| 857 | if (ret != 0) |
| 858 | return ret; |
| 859 | |
Rafa³ Bilski | 786f46b | 2007-02-04 18:43:12 +0100 | [diff] [blame] | 860 | if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | longhaul_setup_voltagescaling(); |
| 862 | |
| 863 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
Dave Jones | 6778bae | 2005-05-31 19:03:51 -0700 | [diff] [blame] | 864 | policy->cpuinfo.transition_latency = 200000; /* nsec */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | policy->cur = calc_speed(longhaul_get_cpu_mult()); |
| 866 | |
| 867 | ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table); |
| 868 | if (ret) |
| 869 | return ret; |
| 870 | |
| 871 | cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); |
| 872 | |
| 873 | return 0; |
| 874 | } |
| 875 | |
| 876 | static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) |
| 877 | { |
| 878 | cpufreq_frequency_table_put_attr(policy->cpu); |
| 879 | return 0; |
| 880 | } |
| 881 | |
| 882 | static struct freq_attr* longhaul_attr[] = { |
| 883 | &cpufreq_freq_attr_scaling_available_freqs, |
| 884 | NULL, |
| 885 | }; |
| 886 | |
Linus Torvalds | 221dee2 | 2007-02-26 14:55:48 -0800 | [diff] [blame] | 887 | static struct cpufreq_driver longhaul_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 888 | .verify = longhaul_verify, |
| 889 | .target = longhaul_target, |
| 890 | .get = longhaul_get, |
| 891 | .init = longhaul_cpu_init, |
| 892 | .exit = __devexit_p(longhaul_cpu_exit), |
| 893 | .name = "longhaul", |
| 894 | .owner = THIS_MODULE, |
| 895 | .attr = longhaul_attr, |
| 896 | }; |
| 897 | |
| 898 | |
| 899 | static int __init longhaul_init(void) |
| 900 | { |
| 901 | struct cpuinfo_x86 *c = cpu_data; |
| 902 | |
| 903 | if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6) |
| 904 | return -ENODEV; |
| 905 | |
Rafa³ Bilski | 48b7bde | 2006-07-04 17:50:57 +0200 | [diff] [blame] | 906 | #ifdef CONFIG_SMP |
| 907 | if (num_online_cpus() > 1) { |
Rafa³ Bilski | 48b7bde | 2006-07-04 17:50:57 +0200 | [diff] [blame] | 908 | printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n"); |
Dave Jones | 1cfe201 | 2006-12-28 22:30:16 -0500 | [diff] [blame] | 909 | return -ENODEV; |
Rafa³ Bilski | 48b7bde | 2006-07-04 17:50:57 +0200 | [diff] [blame] | 910 | } |
| 911 | #endif |
| 912 | #ifdef CONFIG_X86_IO_APIC |
| 913 | if (cpu_has_apic) { |
| 914 | printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n"); |
| 915 | return -ENODEV; |
| 916 | } |
| 917 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 918 | switch (c->x86_model) { |
| 919 | case 6 ... 9: |
| 920 | return cpufreq_register_driver(&longhaul_driver); |
Dave Jones | 8ec9822 | 2006-12-17 19:07:35 -0500 | [diff] [blame] | 921 | case 10: |
| 922 | printk(KERN_ERR PFX "Use acpi-cpufreq driver for VIA C7\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | default: |
Dave Jones | 928ee51 | 2006-12-17 19:09:59 -0500 | [diff] [blame] | 924 | ;; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | } |
| 926 | |
| 927 | return -ENODEV; |
| 928 | } |
| 929 | |
| 930 | |
| 931 | static void __exit longhaul_exit(void) |
| 932 | { |
Dave Jones | 8eebf1a | 2006-05-30 17:40:16 -0400 | [diff] [blame] | 933 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 934 | |
| 935 | for (i=0; i < numscales; i++) { |
| 936 | if (clock_ratio[i] == maxmult) { |
| 937 | longhaul_setstate(i); |
| 938 | break; |
| 939 | } |
| 940 | } |
| 941 | |
| 942 | cpufreq_unregister_driver(&longhaul_driver); |
| 943 | kfree(longhaul_table); |
| 944 | } |
| 945 | |
Rafa³ Bilski | db44aaf | 2006-08-16 01:07:33 +0200 | [diff] [blame] | 946 | module_param (scale_voltage, int, 0644); |
| 947 | MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 948 | |
| 949 | MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>"); |
| 950 | MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors."); |
| 951 | MODULE_LICENSE ("GPL"); |
| 952 | |
Rafa³ Bilski | 0d6daba | 2006-07-07 08:48:26 +0200 | [diff] [blame] | 953 | late_initcall(longhaul_init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | module_exit(longhaul_exit); |