Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| 3 | * http://www.samsung.com |
| 4 | * |
| 5 | * Combiner irqchip for EXYNOS |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/err.h> |
| 12 | #include <linux/export.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 15 | #include <linux/slab.h> |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 16 | #include <linux/syscore_ops.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 17 | #include <linux/irqdomain.h> |
Joel Porquet | 41a83e0 | 2015-07-07 17:11:46 -0400 | [diff] [blame] | 18 | #include <linux/irqchip.h> |
Catalin Marinas | de88cbb | 2013-01-18 15:31:37 +0000 | [diff] [blame] | 19 | #include <linux/irqchip/chained_irq.h> |
Naveen Krishna Chatradhi | bc64690 | 2014-09-03 11:02:09 +0530 | [diff] [blame] | 20 | #include <linux/interrupt.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 21 | #include <linux/of_address.h> |
| 22 | #include <linux/of_irq.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 23 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 24 | #define COMBINER_ENABLE_SET 0x0 |
| 25 | #define COMBINER_ENABLE_CLEAR 0x4 |
| 26 | #define COMBINER_INT_STATUS 0xC |
| 27 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 28 | #define IRQ_IN_COMBINER 8 |
| 29 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 30 | static DEFINE_SPINLOCK(irq_controller_lock); |
| 31 | |
| 32 | struct combiner_chip_data { |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 33 | unsigned int hwirq_offset; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 34 | unsigned int irq_mask; |
| 35 | void __iomem *base; |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 36 | unsigned int parent_irq; |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 37 | #ifdef CONFIG_PM |
| 38 | u32 pm_save; |
| 39 | #endif |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 40 | }; |
| 41 | |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 42 | static struct combiner_chip_data *combiner_data; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 43 | static struct irq_domain *combiner_irq_domain; |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 44 | static unsigned int max_nr = 20; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 45 | |
| 46 | static inline void __iomem *combiner_base(struct irq_data *data) |
| 47 | { |
| 48 | struct combiner_chip_data *combiner_data = |
| 49 | irq_data_get_irq_chip_data(data); |
| 50 | |
| 51 | return combiner_data->base; |
| 52 | } |
| 53 | |
| 54 | static void combiner_mask_irq(struct irq_data *data) |
| 55 | { |
| 56 | u32 mask = 1 << (data->hwirq % 32); |
| 57 | |
| 58 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); |
| 59 | } |
| 60 | |
| 61 | static void combiner_unmask_irq(struct irq_data *data) |
| 62 | { |
| 63 | u32 mask = 1 << (data->hwirq % 32); |
| 64 | |
| 65 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); |
| 66 | } |
| 67 | |
| 68 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) |
| 69 | { |
| 70 | struct combiner_chip_data *chip_data = irq_get_handler_data(irq); |
| 71 | struct irq_chip *chip = irq_get_chip(irq); |
| 72 | unsigned int cascade_irq, combiner_irq; |
| 73 | unsigned long status; |
| 74 | |
| 75 | chained_irq_enter(chip, desc); |
| 76 | |
| 77 | spin_lock(&irq_controller_lock); |
| 78 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); |
| 79 | spin_unlock(&irq_controller_lock); |
| 80 | status &= chip_data->irq_mask; |
| 81 | |
| 82 | if (status == 0) |
| 83 | goto out; |
| 84 | |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 85 | combiner_irq = chip_data->hwirq_offset + __ffs(status); |
| 86 | cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 87 | |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 88 | if (unlikely(!cascade_irq)) |
Pankaj Dubey | a837848 | 2014-02-14 07:27:40 +0900 | [diff] [blame] | 89 | handle_bad_irq(irq, desc); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 90 | else |
| 91 | generic_handle_irq(cascade_irq); |
| 92 | |
| 93 | out: |
| 94 | chained_irq_exit(chip, desc); |
| 95 | } |
| 96 | |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 97 | #ifdef CONFIG_SMP |
| 98 | static int combiner_set_affinity(struct irq_data *d, |
| 99 | const struct cpumask *mask_val, bool force) |
| 100 | { |
| 101 | struct combiner_chip_data *chip_data = irq_data_get_irq_chip_data(d); |
| 102 | struct irq_chip *chip = irq_get_chip(chip_data->parent_irq); |
| 103 | struct irq_data *data = irq_get_irq_data(chip_data->parent_irq); |
| 104 | |
| 105 | if (chip && chip->irq_set_affinity) |
| 106 | return chip->irq_set_affinity(data, mask_val, force); |
| 107 | else |
| 108 | return -EINVAL; |
| 109 | } |
| 110 | #endif |
| 111 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 112 | static struct irq_chip combiner_chip = { |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 113 | .name = "COMBINER", |
| 114 | .irq_mask = combiner_mask_irq, |
| 115 | .irq_unmask = combiner_unmask_irq, |
| 116 | #ifdef CONFIG_SMP |
| 117 | .irq_set_affinity = combiner_set_affinity, |
| 118 | #endif |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 119 | }; |
| 120 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 121 | static void __init combiner_cascade_irq(struct combiner_chip_data *combiner_data, |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 122 | unsigned int irq) |
| 123 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 124 | if (irq_set_handler_data(irq, combiner_data) != 0) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 125 | BUG(); |
| 126 | irq_set_chained_handler(irq, combiner_handle_cascade_irq); |
| 127 | } |
| 128 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 129 | static void __init combiner_init_one(struct combiner_chip_data *combiner_data, |
| 130 | unsigned int combiner_nr, |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 131 | void __iomem *base, unsigned int irq) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 132 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 133 | combiner_data->base = base; |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 134 | combiner_data->hwirq_offset = (combiner_nr & ~3) * IRQ_IN_COMBINER; |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 135 | combiner_data->irq_mask = 0xff << ((combiner_nr % 4) << 3); |
| 136 | combiner_data->parent_irq = irq; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 137 | |
| 138 | /* Disable all interrupts */ |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 139 | __raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 140 | } |
| 141 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 142 | static int combiner_irq_domain_xlate(struct irq_domain *d, |
| 143 | struct device_node *controller, |
| 144 | const u32 *intspec, unsigned int intsize, |
| 145 | unsigned long *out_hwirq, |
| 146 | unsigned int *out_type) |
| 147 | { |
| 148 | if (d->of_node != controller) |
| 149 | return -EINVAL; |
| 150 | |
| 151 | if (intsize < 2) |
| 152 | return -EINVAL; |
| 153 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 154 | *out_hwirq = intspec[0] * IRQ_IN_COMBINER + intspec[1]; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 155 | *out_type = 0; |
| 156 | |
| 157 | return 0; |
| 158 | } |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 159 | |
| 160 | static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq, |
| 161 | irq_hw_number_t hw) |
| 162 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 163 | struct combiner_chip_data *combiner_data = d->host_data; |
| 164 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 165 | irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq); |
| 166 | irq_set_chip_data(irq, &combiner_data[hw >> 3]); |
| 167 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
| 168 | |
| 169 | return 0; |
| 170 | } |
| 171 | |
Krzysztof Kozlowski | 9600973 | 2015-04-27 21:54:24 +0900 | [diff] [blame] | 172 | static const struct irq_domain_ops combiner_irq_domain_ops = { |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 173 | .xlate = combiner_irq_domain_xlate, |
| 174 | .map = combiner_irq_domain_map, |
| 175 | }; |
| 176 | |
Sachin Kamat | b8394de | 2013-06-26 17:06:37 +0530 | [diff] [blame] | 177 | static void __init combiner_init(void __iomem *combiner_base, |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 178 | struct device_node *np) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 179 | { |
Arnd Bergmann | 863a08d | 2013-04-12 15:27:09 +0200 | [diff] [blame] | 180 | int i, irq; |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 181 | unsigned int nr_irq; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 182 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 183 | nr_irq = max_nr * IRQ_IN_COMBINER; |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 184 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 185 | combiner_data = kcalloc(max_nr, sizeof (*combiner_data), GFP_KERNEL); |
| 186 | if (!combiner_data) { |
| 187 | pr_warning("%s: could not allocate combiner data\n", __func__); |
| 188 | return; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 189 | } |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 190 | |
Chander Kashyap | 9403ac8 | 2013-10-21 06:01:40 +0900 | [diff] [blame] | 191 | combiner_irq_domain = irq_domain_add_linear(np, nr_irq, |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 192 | &combiner_irq_domain_ops, combiner_data); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 193 | if (WARN_ON(!combiner_irq_domain)) { |
| 194 | pr_warning("%s: irq domain init failed\n", __func__); |
| 195 | return; |
| 196 | } |
| 197 | |
| 198 | for (i = 0; i < max_nr; i++) { |
Kukjin Kim | 0f56151 | 2013-07-16 12:18:19 +0900 | [diff] [blame] | 199 | irq = irq_of_parse_and_map(np, i); |
Arnd Bergmann | 92c8e49 | 2013-04-10 15:59:58 +0200 | [diff] [blame] | 200 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 201 | combiner_init_one(&combiner_data[i], i, |
| 202 | combiner_base + (i >> 2) * 0x10, irq); |
| 203 | combiner_cascade_irq(&combiner_data[i], irq); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 204 | } |
| 205 | } |
| 206 | |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 207 | #ifdef CONFIG_PM |
| 208 | |
| 209 | /** |
| 210 | * combiner_suspend - save interrupt combiner state before suspend |
| 211 | * |
| 212 | * Save the interrupt enable set register for all combiner groups since |
| 213 | * the state is lost when the system enters into a sleep state. |
| 214 | * |
| 215 | */ |
| 216 | static int combiner_suspend(void) |
| 217 | { |
| 218 | int i; |
| 219 | |
| 220 | for (i = 0; i < max_nr; i++) |
| 221 | combiner_data[i].pm_save = |
| 222 | __raw_readl(combiner_data[i].base + COMBINER_ENABLE_SET); |
| 223 | |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | /** |
| 228 | * combiner_resume - restore interrupt combiner state after resume |
| 229 | * |
| 230 | * Restore the interrupt enable set register for all combiner groups since |
| 231 | * the state is lost when the system enters into a sleep state on suspend. |
| 232 | * |
| 233 | */ |
| 234 | static void combiner_resume(void) |
| 235 | { |
| 236 | int i; |
| 237 | |
| 238 | for (i = 0; i < max_nr; i++) { |
| 239 | __raw_writel(combiner_data[i].irq_mask, |
| 240 | combiner_data[i].base + COMBINER_ENABLE_CLEAR); |
| 241 | __raw_writel(combiner_data[i].pm_save, |
| 242 | combiner_data[i].base + COMBINER_ENABLE_SET); |
| 243 | } |
| 244 | } |
| 245 | |
| 246 | #else |
| 247 | #define combiner_suspend NULL |
| 248 | #define combiner_resume NULL |
| 249 | #endif |
| 250 | |
| 251 | static struct syscore_ops combiner_syscore_ops = { |
| 252 | .suspend = combiner_suspend, |
| 253 | .resume = combiner_resume, |
| 254 | }; |
| 255 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 256 | static int __init combiner_of_init(struct device_node *np, |
| 257 | struct device_node *parent) |
| 258 | { |
| 259 | void __iomem *combiner_base; |
| 260 | |
| 261 | combiner_base = of_iomap(np, 0); |
| 262 | if (!combiner_base) { |
| 263 | pr_err("%s: failed to map combiner registers\n", __func__); |
| 264 | return -ENXIO; |
| 265 | } |
| 266 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 267 | if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) { |
| 268 | pr_info("%s: number of combiners not specified, " |
| 269 | "setting default as %d.\n", |
| 270 | __func__, max_nr); |
| 271 | } |
| 272 | |
Javier Martinez Canillas | 6fd4899 | 2015-06-12 07:43:15 +0200 | [diff] [blame] | 273 | combiner_init(combiner_base, np); |
| 274 | |
| 275 | register_syscore_ops(&combiner_syscore_ops); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 276 | |
| 277 | return 0; |
| 278 | } |
| 279 | IRQCHIP_DECLARE(exynos4210_combiner, "samsung,exynos4210-combiner", |
| 280 | combiner_of_init); |