Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| 3 | * http://www.samsung.com |
| 4 | * |
| 5 | * Combiner irqchip for EXYNOS |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/err.h> |
| 12 | #include <linux/export.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/io.h> |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 15 | #include <linux/slab.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 16 | #include <linux/irqdomain.h> |
Catalin Marinas | de88cbb | 2013-01-18 15:31:37 +0000 | [diff] [blame] | 17 | #include <linux/irqchip/chained_irq.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 18 | #include <linux/of_address.h> |
| 19 | #include <linux/of_irq.h> |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 20 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 21 | #include "irqchip.h" |
| 22 | |
| 23 | #define COMBINER_ENABLE_SET 0x0 |
| 24 | #define COMBINER_ENABLE_CLEAR 0x4 |
| 25 | #define COMBINER_INT_STATUS 0xC |
| 26 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 27 | #define IRQ_IN_COMBINER 8 |
| 28 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 29 | static DEFINE_SPINLOCK(irq_controller_lock); |
| 30 | |
| 31 | struct combiner_chip_data { |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 32 | unsigned int hwirq_offset; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 33 | unsigned int irq_mask; |
| 34 | void __iomem *base; |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 35 | unsigned int parent_irq; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 36 | }; |
| 37 | |
| 38 | static struct irq_domain *combiner_irq_domain; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 39 | |
| 40 | static inline void __iomem *combiner_base(struct irq_data *data) |
| 41 | { |
| 42 | struct combiner_chip_data *combiner_data = |
| 43 | irq_data_get_irq_chip_data(data); |
| 44 | |
| 45 | return combiner_data->base; |
| 46 | } |
| 47 | |
| 48 | static void combiner_mask_irq(struct irq_data *data) |
| 49 | { |
| 50 | u32 mask = 1 << (data->hwirq % 32); |
| 51 | |
| 52 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_CLEAR); |
| 53 | } |
| 54 | |
| 55 | static void combiner_unmask_irq(struct irq_data *data) |
| 56 | { |
| 57 | u32 mask = 1 << (data->hwirq % 32); |
| 58 | |
| 59 | __raw_writel(mask, combiner_base(data) + COMBINER_ENABLE_SET); |
| 60 | } |
| 61 | |
| 62 | static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) |
| 63 | { |
| 64 | struct combiner_chip_data *chip_data = irq_get_handler_data(irq); |
| 65 | struct irq_chip *chip = irq_get_chip(irq); |
| 66 | unsigned int cascade_irq, combiner_irq; |
| 67 | unsigned long status; |
| 68 | |
| 69 | chained_irq_enter(chip, desc); |
| 70 | |
| 71 | spin_lock(&irq_controller_lock); |
| 72 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); |
| 73 | spin_unlock(&irq_controller_lock); |
| 74 | status &= chip_data->irq_mask; |
| 75 | |
| 76 | if (status == 0) |
| 77 | goto out; |
| 78 | |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 79 | combiner_irq = chip_data->hwirq_offset + __ffs(status); |
| 80 | cascade_irq = irq_find_mapping(combiner_irq_domain, combiner_irq); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 81 | |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 82 | if (unlikely(!cascade_irq)) |
Pankaj Dubey | a837848 | 2014-02-14 07:27:40 +0900 | [diff] [blame^] | 83 | handle_bad_irq(irq, desc); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 84 | else |
| 85 | generic_handle_irq(cascade_irq); |
| 86 | |
| 87 | out: |
| 88 | chained_irq_exit(chip, desc); |
| 89 | } |
| 90 | |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 91 | #ifdef CONFIG_SMP |
| 92 | static int combiner_set_affinity(struct irq_data *d, |
| 93 | const struct cpumask *mask_val, bool force) |
| 94 | { |
| 95 | struct combiner_chip_data *chip_data = irq_data_get_irq_chip_data(d); |
| 96 | struct irq_chip *chip = irq_get_chip(chip_data->parent_irq); |
| 97 | struct irq_data *data = irq_get_irq_data(chip_data->parent_irq); |
| 98 | |
| 99 | if (chip && chip->irq_set_affinity) |
| 100 | return chip->irq_set_affinity(data, mask_val, force); |
| 101 | else |
| 102 | return -EINVAL; |
| 103 | } |
| 104 | #endif |
| 105 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 106 | static struct irq_chip combiner_chip = { |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 107 | .name = "COMBINER", |
| 108 | .irq_mask = combiner_mask_irq, |
| 109 | .irq_unmask = combiner_unmask_irq, |
| 110 | #ifdef CONFIG_SMP |
| 111 | .irq_set_affinity = combiner_set_affinity, |
| 112 | #endif |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 113 | }; |
| 114 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 115 | static void __init combiner_cascade_irq(struct combiner_chip_data *combiner_data, |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 116 | unsigned int irq) |
| 117 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 118 | if (irq_set_handler_data(irq, combiner_data) != 0) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 119 | BUG(); |
| 120 | irq_set_chained_handler(irq, combiner_handle_cascade_irq); |
| 121 | } |
| 122 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 123 | static void __init combiner_init_one(struct combiner_chip_data *combiner_data, |
| 124 | unsigned int combiner_nr, |
Chanho Park | df7ef46 | 2012-12-12 14:02:45 +0900 | [diff] [blame] | 125 | void __iomem *base, unsigned int irq) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 126 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 127 | combiner_data->base = base; |
Arnd Bergmann | 20adee8 | 2013-04-18 23:57:26 +0200 | [diff] [blame] | 128 | combiner_data->hwirq_offset = (combiner_nr & ~3) * IRQ_IN_COMBINER; |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 129 | combiner_data->irq_mask = 0xff << ((combiner_nr % 4) << 3); |
| 130 | combiner_data->parent_irq = irq; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 131 | |
| 132 | /* Disable all interrupts */ |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 133 | __raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 134 | } |
| 135 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 136 | static int combiner_irq_domain_xlate(struct irq_domain *d, |
| 137 | struct device_node *controller, |
| 138 | const u32 *intspec, unsigned int intsize, |
| 139 | unsigned long *out_hwirq, |
| 140 | unsigned int *out_type) |
| 141 | { |
| 142 | if (d->of_node != controller) |
| 143 | return -EINVAL; |
| 144 | |
| 145 | if (intsize < 2) |
| 146 | return -EINVAL; |
| 147 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 148 | *out_hwirq = intspec[0] * IRQ_IN_COMBINER + intspec[1]; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 149 | *out_type = 0; |
| 150 | |
| 151 | return 0; |
| 152 | } |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 153 | |
| 154 | static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq, |
| 155 | irq_hw_number_t hw) |
| 156 | { |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 157 | struct combiner_chip_data *combiner_data = d->host_data; |
| 158 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 159 | irq_set_chip_and_handler(irq, &combiner_chip, handle_level_irq); |
| 160 | irq_set_chip_data(irq, &combiner_data[hw >> 3]); |
| 161 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
| 162 | |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | static struct irq_domain_ops combiner_irq_domain_ops = { |
| 167 | .xlate = combiner_irq_domain_xlate, |
| 168 | .map = combiner_irq_domain_map, |
| 169 | }; |
| 170 | |
Sachin Kamat | b8394de | 2013-06-26 17:06:37 +0530 | [diff] [blame] | 171 | static void __init combiner_init(void __iomem *combiner_base, |
| 172 | struct device_node *np, |
Chander Kashyap | 9403ac8 | 2013-10-21 06:01:40 +0900 | [diff] [blame] | 173 | unsigned int max_nr) |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 174 | { |
Arnd Bergmann | 863a08d | 2013-04-12 15:27:09 +0200 | [diff] [blame] | 175 | int i, irq; |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 176 | unsigned int nr_irq; |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 177 | struct combiner_chip_data *combiner_data; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 178 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 179 | nr_irq = max_nr * IRQ_IN_COMBINER; |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 180 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 181 | combiner_data = kcalloc(max_nr, sizeof (*combiner_data), GFP_KERNEL); |
| 182 | if (!combiner_data) { |
| 183 | pr_warning("%s: could not allocate combiner data\n", __func__); |
| 184 | return; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 185 | } |
Chanho Park | 4e164dc | 2012-12-12 14:02:49 +0900 | [diff] [blame] | 186 | |
Chander Kashyap | 9403ac8 | 2013-10-21 06:01:40 +0900 | [diff] [blame] | 187 | combiner_irq_domain = irq_domain_add_linear(np, nr_irq, |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 188 | &combiner_irq_domain_ops, combiner_data); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 189 | if (WARN_ON(!combiner_irq_domain)) { |
| 190 | pr_warning("%s: irq domain init failed\n", __func__); |
| 191 | return; |
| 192 | } |
| 193 | |
| 194 | for (i = 0; i < max_nr; i++) { |
Kukjin Kim | 0f56151 | 2013-07-16 12:18:19 +0900 | [diff] [blame] | 195 | irq = irq_of_parse_and_map(np, i); |
Arnd Bergmann | 92c8e49 | 2013-04-10 15:59:58 +0200 | [diff] [blame] | 196 | |
Arnd Bergmann | d34f03d | 2013-04-10 15:31:11 +0200 | [diff] [blame] | 197 | combiner_init_one(&combiner_data[i], i, |
| 198 | combiner_base + (i >> 2) * 0x10, irq); |
| 199 | combiner_cascade_irq(&combiner_data[i], irq); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 200 | } |
| 201 | } |
| 202 | |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 203 | static int __init combiner_of_init(struct device_node *np, |
| 204 | struct device_node *parent) |
| 205 | { |
| 206 | void __iomem *combiner_base; |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 207 | unsigned int max_nr = 20; |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 208 | |
| 209 | combiner_base = of_iomap(np, 0); |
| 210 | if (!combiner_base) { |
| 211 | pr_err("%s: failed to map combiner registers\n", __func__); |
| 212 | return -ENXIO; |
| 213 | } |
| 214 | |
Arnd Bergmann | 6761dcf | 2013-04-10 15:17:47 +0200 | [diff] [blame] | 215 | if (of_property_read_u32(np, "samsung,combiner-nr", &max_nr)) { |
| 216 | pr_info("%s: number of combiners not specified, " |
| 217 | "setting default as %d.\n", |
| 218 | __func__, max_nr); |
| 219 | } |
| 220 | |
Chander Kashyap | 9403ac8 | 2013-10-21 06:01:40 +0900 | [diff] [blame] | 221 | combiner_init(combiner_base, np, max_nr); |
Rob Herring | a900e5d | 2013-02-12 16:04:52 -0600 | [diff] [blame] | 222 | |
| 223 | return 0; |
| 224 | } |
| 225 | IRQCHIP_DECLARE(exynos4210_combiner, "samsung,exynos4210-combiner", |
| 226 | combiner_of_init); |