Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | #include <linux/module.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/sched.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/slab.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 10 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 11 | #include <linux/interrupt.h> |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 12 | #include <linux/seq_file.h> |
| 13 | #include <linux/debugfs.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 14 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 15 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <asm/processor.h> |
| 17 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 18 | #include <asm/sections.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 19 | #include <asm/uaccess.h> |
| 20 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 21 | #include <asm/proto.h> |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 22 | #include <asm/pat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 24 | /* |
| 25 | * The current flushing context - we pass it instead of 5 arguments: |
| 26 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 27 | struct cpa_data { |
| 28 | unsigned long vaddr; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 29 | pgprot_t mask_set; |
| 30 | pgprot_t mask_clr; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | int numpages; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 32 | int flushtlb; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 33 | unsigned long pfn; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 34 | unsigned force_split : 1; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 35 | }; |
| 36 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 37 | #ifdef CONFIG_X86_64 |
| 38 | |
| 39 | static inline unsigned long highmap_start_pfn(void) |
| 40 | { |
| 41 | return __pa(_text) >> PAGE_SHIFT; |
| 42 | } |
| 43 | |
| 44 | static inline unsigned long highmap_end_pfn(void) |
| 45 | { |
| 46 | return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT; |
| 47 | } |
| 48 | |
| 49 | #endif |
| 50 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 51 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 52 | # define debug_pagealloc 1 |
| 53 | #else |
| 54 | # define debug_pagealloc 0 |
| 55 | #endif |
| 56 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 57 | static inline int |
| 58 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 59 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 60 | return addr >= start && addr < end; |
| 61 | } |
| 62 | |
| 63 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 64 | * Flushing functions |
| 65 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 66 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 67 | /** |
| 68 | * clflush_cache_range - flush a cache range with clflush |
| 69 | * @addr: virtual start address |
| 70 | * @size: number of bytes to flush |
| 71 | * |
| 72 | * clflush is an unordered instruction which needs fencing with mfence |
| 73 | * to avoid ordering issues. |
| 74 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 75 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 76 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 77 | void *vend = vaddr + size - 1; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 78 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 79 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 80 | |
| 81 | for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size) |
| 82 | clflush(vaddr); |
| 83 | /* |
| 84 | * Flush any possible final partial cacheline: |
| 85 | */ |
| 86 | clflush(vend); |
| 87 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 88 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 89 | } |
| 90 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 91 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 92 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 93 | unsigned long cache = (unsigned long)arg; |
| 94 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 95 | /* |
| 96 | * Flush all to work around Errata in early athlons regarding |
| 97 | * large page flushing. |
| 98 | */ |
| 99 | __flush_tlb_all(); |
| 100 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 101 | if (cache && boot_cpu_data.x86_model >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 102 | wbinvd(); |
| 103 | } |
| 104 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 105 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 106 | { |
| 107 | BUG_ON(irqs_disabled()); |
| 108 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 109 | on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 110 | } |
| 111 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 112 | static void __cpa_flush_range(void *arg) |
| 113 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 114 | /* |
| 115 | * We could optimize that further and do individual per page |
| 116 | * tlb invalidates for a low number of pages. Caveat: we must |
| 117 | * flush the high aliases on 64bit as well. |
| 118 | */ |
| 119 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 120 | } |
| 121 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 122 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 123 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 124 | unsigned int i, level; |
| 125 | unsigned long addr; |
| 126 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 127 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 128 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 129 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 130 | on_each_cpu(__cpa_flush_range, NULL, 1, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 131 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 132 | if (!cache) |
| 133 | return; |
| 134 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 135 | /* |
| 136 | * We only need to flush on one CPU, |
| 137 | * clflush is a MESI-coherent instruction that |
| 138 | * will cause all other CPUs to flush the same |
| 139 | * cachelines: |
| 140 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 141 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 142 | pte_t *pte = lookup_address(addr, &level); |
| 143 | |
| 144 | /* |
| 145 | * Only flush present addresses: |
| 146 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 147 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 148 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 149 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 150 | } |
| 151 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 152 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 153 | * Certain areas of memory on x86 require very specific protection flags, |
| 154 | * for example the BIOS area or kernel text. Callers don't always get this |
| 155 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 156 | * checks and fixes these known static required protection bits. |
| 157 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 158 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 159 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 160 | { |
| 161 | pgprot_t forbidden = __pgprot(0); |
| 162 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 163 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 164 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 165 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 166 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 167 | if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 168 | pgprot_val(forbidden) |= _PAGE_NX; |
| 169 | |
| 170 | /* |
| 171 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 172 | * Does not cover __inittext since that is gone later on. On |
| 173 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 174 | */ |
| 175 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 176 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 177 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 178 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 179 | * The .rodata section needs to be read-only. Using the pfn |
| 180 | * catches all aliases. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 181 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 182 | if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT, |
| 183 | __pa((unsigned long)__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 184 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 185 | |
| 186 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 187 | |
| 188 | return prot; |
| 189 | } |
| 190 | |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 191 | /* |
| 192 | * Lookup the page table entry for a virtual address. Return a pointer |
| 193 | * to the entry and the level of the mapping. |
| 194 | * |
| 195 | * Note: We return pud and pmd either when the entry is marked large |
| 196 | * or when the present bit is not set. Otherwise we would return a |
| 197 | * pointer to a nonexisting mapping. |
| 198 | */ |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 199 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 200 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | pgd_t *pgd = pgd_offset_k(address); |
| 202 | pud_t *pud; |
| 203 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 204 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 205 | *level = PG_LEVEL_NONE; |
| 206 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | if (pgd_none(*pgd)) |
| 208 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 209 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | pud = pud_offset(pgd, address); |
| 211 | if (pud_none(*pud)) |
| 212 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 213 | |
| 214 | *level = PG_LEVEL_1G; |
| 215 | if (pud_large(*pud) || !pud_present(*pud)) |
| 216 | return (pte_t *)pud; |
| 217 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | pmd = pmd_offset(pud, address); |
| 219 | if (pmd_none(*pmd)) |
| 220 | return NULL; |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 221 | |
| 222 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 223 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 226 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 227 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 228 | return pte_offset_kernel(pmd, address); |
| 229 | } |
Pekka Paalanen | 75bb883 | 2008-05-12 21:20:56 +0200 | [diff] [blame^] | 230 | EXPORT_SYMBOL_GPL(lookup_address); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 231 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 232 | /* |
| 233 | * Set the new pmd in all the pgds we know about: |
| 234 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 235 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 236 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 237 | /* change init_mm */ |
| 238 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 239 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 240 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 241 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 243 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 244 | pgd_t *pgd; |
| 245 | pud_t *pud; |
| 246 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 247 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 248 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 249 | pud = pud_offset(pgd, address); |
| 250 | pmd = pmd_offset(pud, address); |
| 251 | set_pte_atomic((pte_t *)pmd, pte); |
| 252 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 254 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | } |
| 256 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 257 | static int |
| 258 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 259 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 260 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 261 | unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 262 | pte_t new_pte, old_pte, *tmp; |
| 263 | pgprot_t old_prot, new_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 264 | int i, do_split = 1; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 265 | unsigned int level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 266 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 267 | if (cpa->force_split) |
| 268 | return 1; |
| 269 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 270 | spin_lock_irqsave(&pgd_lock, flags); |
| 271 | /* |
| 272 | * Check for races, another CPU might have split this page |
| 273 | * up already: |
| 274 | */ |
| 275 | tmp = lookup_address(address, &level); |
| 276 | if (tmp != kpte) |
| 277 | goto out_unlock; |
| 278 | |
| 279 | switch (level) { |
| 280 | case PG_LEVEL_2M: |
Andi Kleen | 31422c5 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 281 | psize = PMD_PAGE_SIZE; |
| 282 | pmask = PMD_PAGE_MASK; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 283 | break; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 284 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 285 | case PG_LEVEL_1G: |
Andi Kleen | 5d3c8b2 | 2008-02-13 16:20:35 +0100 | [diff] [blame] | 286 | psize = PUD_PAGE_SIZE; |
| 287 | pmask = PUD_PAGE_MASK; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 288 | break; |
| 289 | #endif |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 290 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 291 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 292 | goto out_unlock; |
| 293 | } |
| 294 | |
| 295 | /* |
| 296 | * Calculate the number of pages, which fit into this large |
| 297 | * page starting at address: |
| 298 | */ |
| 299 | nextpage_addr = (address + psize) & pmask; |
| 300 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 301 | if (numpages < cpa->numpages) |
| 302 | cpa->numpages = numpages; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 303 | |
| 304 | /* |
| 305 | * We are safe now. Check whether the new pgprot is the same: |
| 306 | */ |
| 307 | old_pte = *kpte; |
| 308 | old_prot = new_prot = pte_pgprot(old_pte); |
| 309 | |
| 310 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 311 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 312 | |
| 313 | /* |
| 314 | * old_pte points to the large page base address. So we need |
| 315 | * to add the offset of the virtual address: |
| 316 | */ |
| 317 | pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT); |
| 318 | cpa->pfn = pfn; |
| 319 | |
| 320 | new_prot = static_protections(new_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 321 | |
| 322 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 323 | * We need to check the full range, whether |
| 324 | * static_protection() requires a different pgprot for one of |
| 325 | * the pages in the range we try to preserve: |
| 326 | */ |
| 327 | addr = address + PAGE_SIZE; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 328 | pfn++; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 329 | for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 330 | pgprot_t chk_prot = static_protections(new_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 331 | |
| 332 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 333 | goto out_unlock; |
| 334 | } |
| 335 | |
| 336 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 337 | * If there are no changes, return. maxpages has been updated |
| 338 | * above: |
| 339 | */ |
| 340 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 341 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 342 | goto out_unlock; |
| 343 | } |
| 344 | |
| 345 | /* |
| 346 | * We need to change the attributes. Check, whether we can |
| 347 | * change the large page in one go. We request a split, when |
| 348 | * the address is not aligned and the number of pages is |
| 349 | * smaller than the number of pages in the large page. Note |
| 350 | * that we limited the number of possible pages already to |
| 351 | * the number of pages in the large page. |
| 352 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 353 | if (address == (nextpage_addr - psize) && cpa->numpages == numpages) { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 354 | /* |
| 355 | * The address is aligned and the number of pages |
| 356 | * covers the full page. |
| 357 | */ |
| 358 | new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot)); |
| 359 | __set_pmd_pte(kpte, address, new_pte); |
| 360 | cpa->flushtlb = 1; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 361 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 362 | } |
| 363 | |
| 364 | out_unlock: |
| 365 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 366 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 367 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 368 | } |
| 369 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 370 | static LIST_HEAD(page_pool); |
| 371 | static unsigned long pool_size, pool_pages, pool_low; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 372 | static unsigned long pool_used, pool_failed; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 373 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 374 | static void cpa_fill_pool(struct page **ret) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 375 | { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 376 | gfp_t gfp = GFP_KERNEL; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 377 | unsigned long flags; |
| 378 | struct page *p; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 379 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 380 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 381 | * Avoid recursion (on debug-pagealloc) and also signal |
| 382 | * our priority to get to these pagetables: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 383 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 384 | if (current->flags & PF_MEMALLOC) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 385 | return; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 386 | current->flags |= PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 387 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 388 | /* |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 389 | * Allocate atomically from atomic contexts: |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 390 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 391 | if (in_atomic() || irqs_disabled() || debug_pagealloc) |
| 392 | gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 393 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 394 | while (pool_pages < pool_size || (ret && !*ret)) { |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 395 | p = alloc_pages(gfp, 0); |
| 396 | if (!p) { |
| 397 | pool_failed++; |
| 398 | break; |
| 399 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 400 | /* |
| 401 | * If the call site needs a page right now, provide it: |
| 402 | */ |
| 403 | if (ret && !*ret) { |
| 404 | *ret = p; |
| 405 | continue; |
| 406 | } |
| 407 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 408 | list_add(&p->lru, &page_pool); |
| 409 | pool_pages++; |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 410 | spin_unlock_irqrestore(&pgd_lock, flags); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 411 | } |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 412 | |
| 413 | current->flags &= ~PF_MEMALLOC; |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 414 | } |
| 415 | |
| 416 | #define SHIFT_MB (20 - PAGE_SHIFT) |
| 417 | #define ROUND_MB_GB ((1 << 10) - 1) |
| 418 | #define SHIFT_MB_GB 10 |
| 419 | #define POOL_PAGES_PER_GB 16 |
| 420 | |
| 421 | void __init cpa_init(void) |
| 422 | { |
| 423 | struct sysinfo si; |
| 424 | unsigned long gb; |
| 425 | |
| 426 | si_meminfo(&si); |
| 427 | /* |
| 428 | * Calculate the number of pool pages: |
| 429 | * |
| 430 | * Convert totalram (nr of pages) to MiB and round to the next |
| 431 | * GiB. Shift MiB to Gib and multiply the result by |
| 432 | * POOL_PAGES_PER_GB: |
| 433 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 434 | if (debug_pagealloc) { |
| 435 | gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB; |
| 436 | pool_size = POOL_PAGES_PER_GB * gb; |
| 437 | } else { |
| 438 | pool_size = 1; |
| 439 | } |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 440 | pool_low = pool_size; |
| 441 | |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 442 | cpa_fill_pool(NULL); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 443 | printk(KERN_DEBUG |
| 444 | "CPA: page pool initialized %lu of %lu pages preallocated\n", |
| 445 | pool_pages, pool_size); |
| 446 | } |
| 447 | |
Ingo Molnar | 7afe15b | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 448 | static int split_large_page(pte_t *kpte, unsigned long address) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 449 | { |
Thomas Gleixner | 7b610ee | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 450 | unsigned long flags, pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 451 | unsigned int i, level; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 452 | pte_t *pbase, *tmp; |
| 453 | pgprot_t ref_prot; |
| 454 | struct page *base; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 455 | |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 456 | /* |
| 457 | * Get a page from the pool. The pool list is protected by the |
| 458 | * pgd_lock, which we have to take anyway for the split |
| 459 | * operation: |
| 460 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 461 | spin_lock_irqsave(&pgd_lock, flags); |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 462 | if (list_empty(&page_pool)) { |
| 463 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 464 | base = NULL; |
| 465 | cpa_fill_pool(&base); |
| 466 | if (!base) |
| 467 | return -ENOMEM; |
| 468 | spin_lock_irqsave(&pgd_lock, flags); |
| 469 | } else { |
| 470 | base = list_first_entry(&page_pool, struct page, lru); |
| 471 | list_del(&base->lru); |
| 472 | pool_pages--; |
| 473 | |
| 474 | if (pool_pages < pool_low) |
| 475 | pool_low = pool_pages; |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 476 | } |
| 477 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 478 | /* |
| 479 | * Check for races, another CPU might have split this page |
| 480 | * up for us already: |
| 481 | */ |
| 482 | tmp = lookup_address(address, &level); |
Ingo Molnar | 6ce9fc1 | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 483 | if (tmp != kpte) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 484 | goto out_unlock; |
| 485 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 486 | pbase = (pte_t *)page_address(base); |
Jeremy Fitzhardinge | 6944a9c | 2008-03-17 16:37:01 -0700 | [diff] [blame] | 487 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 488 | ref_prot = pte_pgprot(pte_clrhuge(*kpte)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 489 | |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 490 | #ifdef CONFIG_X86_64 |
| 491 | if (level == PG_LEVEL_1G) { |
| 492 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
| 493 | pgprot_val(ref_prot) |= _PAGE_PSE; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 494 | } |
| 495 | #endif |
| 496 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 497 | /* |
| 498 | * Get the target pfn from the original entry: |
| 499 | */ |
| 500 | pfn = pte_pfn(*kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 501 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 502 | set_pte(&pbase[i], pfn_pte(pfn, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 503 | |
| 504 | /* |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 505 | * Install the new, split up pagetable. Important details here: |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 506 | * |
| 507 | * On Intel the NX bit of all levels must be cleared to make a |
| 508 | * page executable. See section 4.13.2 of Intel 64 and IA-32 |
| 509 | * Architectures Software Developer's Manual). |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 510 | * |
| 511 | * Mark the entry present. The current mapping might be |
| 512 | * set to not present, which we preserved above. |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 513 | */ |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 514 | ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte))); |
Thomas Gleixner | 07cf89c | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 515 | pgprot_val(ref_prot) |= _PAGE_PRESENT; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 516 | __set_pmd_pte(kpte, address, mk_pte(base, ref_prot)); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 517 | base = NULL; |
| 518 | |
| 519 | out_unlock: |
Thomas Gleixner | eb5b5f0 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 520 | /* |
| 521 | * If we dropped out via the lookup_address check under |
| 522 | * pgd_lock then stick the page back into the pool: |
| 523 | */ |
| 524 | if (base) { |
| 525 | list_add(&base->lru, &page_pool); |
| 526 | pool_pages++; |
| 527 | } else |
| 528 | pool_used++; |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 529 | spin_unlock_irqrestore(&pgd_lock, flags); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 530 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 531 | return 0; |
| 532 | } |
| 533 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 534 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 535 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 536 | unsigned long address = cpa->vaddr; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 537 | int do_split, err; |
| 538 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 539 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 541 | repeat: |
Ingo Molnar | f0646e4 | 2008-01-30 13:33:43 +0100 | [diff] [blame] | 542 | kpte = lookup_address(address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | if (!kpte) |
Ingo Molnar | d1a4be6 | 2008-04-18 21:32:22 +0200 | [diff] [blame] | 544 | return 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 545 | |
| 546 | old_pte = *kpte; |
| 547 | if (!pte_val(old_pte)) { |
| 548 | if (!primary) |
| 549 | return 0; |
| 550 | printk(KERN_WARNING "CPA: called for zero pte. " |
| 551 | "vaddr = %lx cpa->vaddr = %lx\n", address, |
| 552 | cpa->vaddr); |
| 553 | WARN_ON(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | return -EINVAL; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 555 | } |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 556 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 557 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 558 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 559 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 560 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 561 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 562 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 563 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 564 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 565 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 566 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 567 | /* |
| 568 | * We need to keep the pfn from the existing PTE, |
| 569 | * after all we're only going to change it's attributes |
| 570 | * not the memory it points to |
| 571 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 572 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 573 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 574 | /* |
| 575 | * Do we really change anything ? |
| 576 | */ |
| 577 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 578 | set_pte_atomic(kpte, new_pte); |
| 579 | cpa->flushtlb = 1; |
| 580 | } |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 581 | cpa->numpages = 1; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 582 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 584 | |
| 585 | /* |
| 586 | * Check, whether we can keep the large page intact |
| 587 | * and just change the pte: |
| 588 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 589 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 590 | /* |
| 591 | * When the range fits into the existing large page, |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 592 | * return. cp->numpages and cpa->tlbflush have been updated in |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 593 | * try_large_page: |
| 594 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 595 | if (do_split <= 0) |
| 596 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 597 | |
| 598 | /* |
| 599 | * We have to split the large page: |
| 600 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 601 | err = split_large_page(kpte, address); |
| 602 | if (!err) { |
| 603 | cpa->flushtlb = 1; |
| 604 | goto repeat; |
| 605 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 606 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 607 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 608 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 610 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 611 | |
| 612 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 613 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 614 | struct cpa_data alias_cpa; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 615 | int ret = 0; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 616 | |
| 617 | if (cpa->pfn > max_pfn_mapped) |
| 618 | return 0; |
| 619 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 620 | /* |
| 621 | * No need to redo, when the primary call touched the direct |
| 622 | * mapping already: |
| 623 | */ |
| 624 | if (!within(cpa->vaddr, PAGE_OFFSET, |
| 625 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 626 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 627 | alias_cpa = *cpa; |
| 628 | alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT); |
| 629 | |
| 630 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
| 631 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 632 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 633 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 634 | if (ret) |
| 635 | return ret; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 636 | /* |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 637 | * No need to redo, when the primary call touched the high |
| 638 | * mapping already: |
| 639 | */ |
| 640 | if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end)) |
| 641 | return 0; |
| 642 | |
| 643 | /* |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 644 | * If the physical address is inside the kernel map, we need |
| 645 | * to touch the high mapped kernel as well: |
| 646 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 647 | if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) |
| 648 | return 0; |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 649 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 650 | alias_cpa = *cpa; |
| 651 | alias_cpa.vaddr = |
| 652 | (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base; |
| 653 | |
| 654 | /* |
| 655 | * The high mapping range is imprecise, so ignore the return value. |
| 656 | */ |
| 657 | __change_page_attr_set_clr(&alias_cpa, 0); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 658 | #endif |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 659 | return ret; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 660 | } |
| 661 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 662 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 663 | { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 664 | int ret, numpages = cpa->numpages; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 665 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 666 | while (numpages) { |
| 667 | /* |
| 668 | * Store the remaining nr of pages for the large page |
| 669 | * preservation check. |
| 670 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 671 | cpa->numpages = numpages; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 672 | |
| 673 | ret = __change_page_attr(cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 674 | if (ret) |
| 675 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 676 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 677 | if (checkalias) { |
| 678 | ret = cpa_process_alias(cpa); |
| 679 | if (ret) |
| 680 | return ret; |
| 681 | } |
| 682 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 683 | /* |
| 684 | * Adjust the number of pages with the result of the |
| 685 | * CPA operation. Either a large page has been |
| 686 | * preserved or a single page update happened. |
| 687 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 688 | BUG_ON(cpa->numpages > numpages); |
| 689 | numpages -= cpa->numpages; |
| 690 | cpa->vaddr += cpa->numpages * PAGE_SIZE; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 691 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 692 | return 0; |
| 693 | } |
| 694 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 695 | static inline int cache_attr(pgprot_t attr) |
| 696 | { |
| 697 | return pgprot_val(attr) & |
| 698 | (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD); |
| 699 | } |
| 700 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 701 | static int change_page_attr_set_clr(unsigned long addr, int numpages, |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 702 | pgprot_t mask_set, pgprot_t mask_clr, |
| 703 | int force_split) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 704 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 705 | struct cpa_data cpa; |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 706 | int ret, cache, checkalias; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 707 | |
| 708 | /* |
| 709 | * Check, if we are requested to change a not supported |
| 710 | * feature: |
| 711 | */ |
| 712 | mask_set = canon_pgprot(mask_set); |
| 713 | mask_clr = canon_pgprot(mask_clr); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 714 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 715 | return 0; |
| 716 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 717 | /* Ensure we are PAGE_SIZE aligned */ |
| 718 | if (addr & ~PAGE_MASK) { |
| 719 | addr &= PAGE_MASK; |
| 720 | /* |
| 721 | * People should not be passing in unaligned addresses: |
| 722 | */ |
| 723 | WARN_ON_ONCE(1); |
| 724 | } |
| 725 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 726 | cpa.vaddr = addr; |
| 727 | cpa.numpages = numpages; |
| 728 | cpa.mask_set = mask_set; |
| 729 | cpa.mask_clr = mask_clr; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 730 | cpa.flushtlb = 0; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 731 | cpa.force_split = force_split; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 732 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 733 | /* No alias checking for _NX bit modifications */ |
| 734 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 735 | |
| 736 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 737 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 738 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 739 | * Check whether we really changed something: |
| 740 | */ |
| 741 | if (!cpa.flushtlb) |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 742 | goto out; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 743 | |
| 744 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 745 | * No need to flush, when we did not set any of the caching |
| 746 | * attributes: |
| 747 | */ |
| 748 | cache = cache_attr(mask_set); |
| 749 | |
| 750 | /* |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 751 | * On success we use clflush, when the CPU supports it to |
| 752 | * avoid the wbindv. If the CPU does not support it and in the |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 753 | * error case we fall back to cpa_flush_all (which uses |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 754 | * wbindv): |
| 755 | */ |
| 756 | if (!ret && cpu_has_clflush) |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 757 | cpa_flush_range(addr, numpages, cache); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 758 | else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 759 | cpa_flush_all(cache); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 760 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 761 | out: |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 762 | cpa_fill_pool(NULL); |
| 763 | |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 764 | return ret; |
| 765 | } |
| 766 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 767 | static inline int change_page_attr_set(unsigned long addr, int numpages, |
| 768 | pgprot_t mask) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 769 | { |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 770 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 771 | } |
| 772 | |
Thomas Gleixner | 5674454 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 773 | static inline int change_page_attr_clear(unsigned long addr, int numpages, |
| 774 | pgprot_t mask) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 775 | { |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 776 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 777 | } |
| 778 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 779 | int _set_memory_uc(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 780 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 781 | /* |
| 782 | * for now UC MINUS. see comments in ioremap_nocache() |
| 783 | */ |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 784 | return change_page_attr_set(addr, numpages, |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 785 | __pgprot(_PAGE_CACHE_UC_MINUS)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 786 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 787 | |
| 788 | int set_memory_uc(unsigned long addr, int numpages) |
| 789 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 790 | /* |
| 791 | * for now UC MINUS. see comments in ioremap_nocache() |
| 792 | */ |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 793 | if (reserve_memtype(addr, addr + numpages * PAGE_SIZE, |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 794 | _PAGE_CACHE_UC_MINUS, NULL)) |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 795 | return -EINVAL; |
| 796 | |
| 797 | return _set_memory_uc(addr, numpages); |
| 798 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 799 | EXPORT_SYMBOL(set_memory_uc); |
| 800 | |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 801 | int _set_memory_wc(unsigned long addr, int numpages) |
| 802 | { |
| 803 | return change_page_attr_set(addr, numpages, |
| 804 | __pgprot(_PAGE_CACHE_WC)); |
| 805 | } |
| 806 | |
| 807 | int set_memory_wc(unsigned long addr, int numpages) |
| 808 | { |
| 809 | if (!pat_wc_enabled) |
| 810 | return set_memory_uc(addr, numpages); |
| 811 | |
| 812 | if (reserve_memtype(addr, addr + numpages * PAGE_SIZE, |
| 813 | _PAGE_CACHE_WC, NULL)) |
| 814 | return -EINVAL; |
| 815 | |
| 816 | return _set_memory_wc(addr, numpages); |
| 817 | } |
| 818 | EXPORT_SYMBOL(set_memory_wc); |
| 819 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 820 | int _set_memory_wb(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 821 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 822 | return change_page_attr_clear(addr, numpages, |
venkatesh.pallipadi@intel.com | 2e5d9c8 | 2008-03-18 17:00:14 -0700 | [diff] [blame] | 823 | __pgprot(_PAGE_CACHE_MASK)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 824 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 825 | |
| 826 | int set_memory_wb(unsigned long addr, int numpages) |
| 827 | { |
| 828 | free_memtype(addr, addr + numpages * PAGE_SIZE); |
| 829 | |
| 830 | return _set_memory_wb(addr, numpages); |
| 831 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 832 | EXPORT_SYMBOL(set_memory_wb); |
| 833 | |
| 834 | int set_memory_x(unsigned long addr, int numpages) |
| 835 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 836 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 837 | } |
| 838 | EXPORT_SYMBOL(set_memory_x); |
| 839 | |
| 840 | int set_memory_nx(unsigned long addr, int numpages) |
| 841 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 842 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 843 | } |
| 844 | EXPORT_SYMBOL(set_memory_nx); |
| 845 | |
| 846 | int set_memory_ro(unsigned long addr, int numpages) |
| 847 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 848 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 849 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 850 | |
| 851 | int set_memory_rw(unsigned long addr, int numpages) |
| 852 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 853 | return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW)); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 854 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 855 | |
| 856 | int set_memory_np(unsigned long addr, int numpages) |
| 857 | { |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 858 | return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT)); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 859 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 860 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 861 | int set_memory_4k(unsigned long addr, int numpages) |
| 862 | { |
| 863 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), |
| 864 | __pgprot(0), 1); |
| 865 | } |
| 866 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 867 | int set_pages_uc(struct page *page, int numpages) |
| 868 | { |
| 869 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 870 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 871 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 872 | } |
| 873 | EXPORT_SYMBOL(set_pages_uc); |
| 874 | |
| 875 | int set_pages_wb(struct page *page, int numpages) |
| 876 | { |
| 877 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 878 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 879 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 880 | } |
| 881 | EXPORT_SYMBOL(set_pages_wb); |
| 882 | |
| 883 | int set_pages_x(struct page *page, int numpages) |
| 884 | { |
| 885 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 886 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 887 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 888 | } |
| 889 | EXPORT_SYMBOL(set_pages_x); |
| 890 | |
| 891 | int set_pages_nx(struct page *page, int numpages) |
| 892 | { |
| 893 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 894 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 895 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 896 | } |
| 897 | EXPORT_SYMBOL(set_pages_nx); |
| 898 | |
| 899 | int set_pages_ro(struct page *page, int numpages) |
| 900 | { |
| 901 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 902 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 903 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 904 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 905 | |
| 906 | int set_pages_rw(struct page *page, int numpages) |
| 907 | { |
| 908 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 909 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 910 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 911 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 912 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 913 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 914 | |
| 915 | static int __set_pages_p(struct page *page, int numpages) |
| 916 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 917 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 918 | .numpages = numpages, |
| 919 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 920 | .mask_clr = __pgprot(0)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 921 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 922 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 923 | } |
| 924 | |
| 925 | static int __set_pages_np(struct page *page, int numpages) |
| 926 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 927 | struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page), |
| 928 | .numpages = numpages, |
| 929 | .mask_set = __pgprot(0), |
| 930 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 931 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 932 | return __change_page_attr_set_clr(&cpa, 1); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 933 | } |
| 934 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 935 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 936 | { |
| 937 | if (PageHighMem(page)) |
| 938 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 939 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 940 | debug_check_no_locks_freed(page_address(page), |
| 941 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 942 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 943 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 944 | /* |
Ingo Molnar | 12d6f21 | 2008-01-30 13:33:58 +0100 | [diff] [blame] | 945 | * If page allocator is not up yet then do not call c_p_a(): |
| 946 | */ |
| 947 | if (!debug_pagealloc_enabled) |
| 948 | return; |
| 949 | |
| 950 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 951 | * The return value is ignored as the calls cannot fail. |
| 952 | * Large pages are kept enabled at boot time, and are |
| 953 | * split up quickly with DEBUG_PAGEALLOC. If a splitup |
| 954 | * fails here (due to temporary memory shortage) no damage |
| 955 | * is done because we just keep the largepage intact up |
| 956 | * to the next attempt when it will likely be split up: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 958 | if (enable) |
| 959 | __set_pages_p(page, numpages); |
| 960 | else |
| 961 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 962 | |
| 963 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 964 | * We should perform an IPI and flush all tlbs, |
| 965 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | */ |
| 967 | __flush_tlb_all(); |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 968 | |
| 969 | /* |
| 970 | * Try to refill the page pool here. We can do this only after |
| 971 | * the tlb flush. |
| 972 | */ |
Ingo Molnar | 92cb54a | 2008-02-13 14:37:52 +0100 | [diff] [blame] | 973 | cpa_fill_pool(NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 974 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 975 | |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 976 | #ifdef CONFIG_DEBUG_FS |
| 977 | static int dpa_show(struct seq_file *m, void *v) |
| 978 | { |
| 979 | seq_puts(m, "DEBUG_PAGEALLOC\n"); |
| 980 | seq_printf(m, "pool_size : %lu\n", pool_size); |
| 981 | seq_printf(m, "pool_pages : %lu\n", pool_pages); |
| 982 | seq_printf(m, "pool_low : %lu\n", pool_low); |
| 983 | seq_printf(m, "pool_used : %lu\n", pool_used); |
| 984 | seq_printf(m, "pool_failed : %lu\n", pool_failed); |
| 985 | |
| 986 | return 0; |
| 987 | } |
| 988 | |
| 989 | static int dpa_open(struct inode *inode, struct file *filp) |
| 990 | { |
| 991 | return single_open(filp, dpa_show, NULL); |
| 992 | } |
| 993 | |
| 994 | static const struct file_operations dpa_fops = { |
| 995 | .open = dpa_open, |
| 996 | .read = seq_read, |
| 997 | .llseek = seq_lseek, |
| 998 | .release = single_release, |
| 999 | }; |
| 1000 | |
Ingo Molnar | a4928cf | 2008-04-23 13:20:56 +0200 | [diff] [blame] | 1001 | static int __init debug_pagealloc_proc_init(void) |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 1002 | { |
| 1003 | struct dentry *de; |
| 1004 | |
| 1005 | de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL, |
| 1006 | &dpa_fops); |
| 1007 | if (!de) |
| 1008 | return -ENOMEM; |
| 1009 | |
| 1010 | return 0; |
| 1011 | } |
| 1012 | __initcall(debug_pagealloc_proc_init); |
| 1013 | #endif |
| 1014 | |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1015 | #ifdef CONFIG_HIBERNATION |
| 1016 | |
| 1017 | bool kernel_page_present(struct page *page) |
| 1018 | { |
| 1019 | unsigned int level; |
| 1020 | pte_t *pte; |
| 1021 | |
| 1022 | if (PageHighMem(page)) |
| 1023 | return false; |
| 1024 | |
| 1025 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 1026 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 1027 | } |
| 1028 | |
| 1029 | #endif /* CONFIG_HIBERNATION */ |
| 1030 | |
| 1031 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1032 | |
| 1033 | /* |
| 1034 | * The testcases use internal knowledge of the implementation that shouldn't |
| 1035 | * be exposed to the rest of the kernel. Include these directly here. |
| 1036 | */ |
| 1037 | #ifdef CONFIG_CPA_DEBUG |
| 1038 | #include "pageattr-test.c" |
| 1039 | #endif |