Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 1 | #ifndef __MACH_IMX_CLK_H |
| 2 | #define __MACH_IMX_CLK_H |
| 3 | |
| 4 | #include <linux/spinlock.h> |
| 5 | #include <linux/clk-provider.h> |
Sascha Hauer | 3a84d17 | 2012-09-11 08:50:00 +0200 | [diff] [blame] | 6 | |
| 7 | extern spinlock_t imx_ccm_lock; |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 8 | |
Alexander Shiyan | 229be9c | 2014-06-10 19:40:26 +0400 | [diff] [blame] | 9 | void imx_check_clocks(struct clk *clks[], unsigned int count); |
Lucas Stach | 55adc61 | 2015-09-21 18:53:57 +0200 | [diff] [blame] | 10 | void imx_register_uart_clocks(struct clk ** const clks[]); |
Alexander Shiyan | 229be9c | 2014-06-10 19:40:26 +0400 | [diff] [blame] | 11 | |
Liu Ying | dfd8714 | 2013-07-04 17:57:17 +0800 | [diff] [blame] | 12 | extern void imx_cscmr1_fixup(u32 *val); |
| 13 | |
Shawn Guo | 3bec5f8 | 2015-04-26 13:33:39 +0800 | [diff] [blame] | 14 | enum imx_pllv1_type { |
| 15 | IMX_PLLV1_IMX1, |
| 16 | IMX_PLLV1_IMX21, |
| 17 | IMX_PLLV1_IMX25, |
| 18 | IMX_PLLV1_IMX27, |
| 19 | IMX_PLLV1_IMX31, |
| 20 | IMX_PLLV1_IMX35, |
| 21 | }; |
| 22 | |
| 23 | struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name, |
| 24 | const char *parent, void __iomem *base); |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 25 | |
Sascha Hauer | a547b81 | 2012-03-19 12:36:10 +0100 | [diff] [blame] | 26 | struct clk *imx_clk_pllv2(const char *name, const char *parent, |
| 27 | void __iomem *base); |
| 28 | |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 29 | enum imx_pllv3_type { |
| 30 | IMX_PLLV3_GENERIC, |
| 31 | IMX_PLLV3_SYS, |
| 32 | IMX_PLLV3_USB, |
Stefan Agner | 60ad846 | 2014-12-02 17:59:42 +0100 | [diff] [blame] | 33 | IMX_PLLV3_USB_VF610, |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 34 | IMX_PLLV3_AV, |
| 35 | IMX_PLLV3_ENET, |
Frank Li | f539474 | 2015-05-19 02:45:02 +0800 | [diff] [blame] | 36 | IMX_PLLV3_ENET_IMX7, |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 37 | }; |
| 38 | |
| 39 | struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, |
Sascha Hauer | 2b25469 | 2012-11-22 10:18:41 +0100 | [diff] [blame] | 40 | const char *parent_name, void __iomem *base, u32 div_mask); |
Shawn Guo | a3f6b9d | 2012-04-04 16:02:28 +0800 | [diff] [blame] | 41 | |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 42 | struct clk *clk_register_gate2(struct device *dev, const char *name, |
| 43 | const char *parent_name, unsigned long flags, |
Stefan Agner | 4568292 | 2016-03-09 18:16:47 -0800 | [diff] [blame] | 44 | void __iomem *reg, u8 bit_idx, u8 cgr_val, |
Shawn Guo | f9f28cd | 2014-04-19 10:58:22 +0800 | [diff] [blame] | 45 | u8 clk_gate_flags, spinlock_t *lock, |
| 46 | unsigned int *share_count); |
Sascha Hauer | b75c015 | 2011-04-19 08:33:45 +0200 | [diff] [blame] | 47 | |
Martin Fuzzey | 75f83d0 | 2013-04-23 20:16:59 +0800 | [diff] [blame] | 48 | struct clk * imx_obtain_fixed_clock( |
| 49 | const char *name, unsigned long rate); |
| 50 | |
Shawn Guo | 19d8634 | 2014-08-26 15:06:33 +0800 | [diff] [blame] | 51 | struct clk *imx_clk_gate_exclusive(const char *name, const char *parent, |
| 52 | void __iomem *reg, u8 shift, u32 exclusive_mask); |
| 53 | |
Shawn Guo | a10bd67 | 2012-04-04 16:07:53 +0800 | [diff] [blame] | 54 | struct clk *imx_clk_pfd(const char *name, const char *parent_name, |
| 55 | void __iomem *reg, u8 idx); |
| 56 | |
Shawn Guo | 32af7a8 | 2012-04-04 16:20:56 +0800 | [diff] [blame] | 57 | struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, |
| 58 | void __iomem *reg, u8 shift, u8 width, |
| 59 | void __iomem *busy_reg, u8 busy_shift); |
| 60 | |
| 61 | struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, |
| 62 | u8 width, void __iomem *busy_reg, u8 busy_shift, |
| 63 | const char **parent_names, int num_parents); |
| 64 | |
Liu Ying | cbe7fc8 | 2013-07-04 17:22:26 +0800 | [diff] [blame] | 65 | struct clk *imx_clk_fixup_divider(const char *name, const char *parent, |
| 66 | void __iomem *reg, u8 shift, u8 width, |
| 67 | void (*fixup)(u32 *val)); |
| 68 | |
Liu Ying | a49e6c4 | 2013-07-04 17:35:46 +0800 | [diff] [blame] | 69 | struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, |
| 70 | u8 shift, u8 width, const char **parents, |
| 71 | int num_parents, void (*fixup)(u32 *val)); |
| 72 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 73 | static inline struct clk *imx_clk_fixed(const char *name, int rate) |
| 74 | { |
Stephen Boyd | 38c7035 | 2016-03-01 10:59:49 -0800 | [diff] [blame] | 75 | return clk_register_fixed_rate(NULL, name, NULL, 0, rate); |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 76 | } |
| 77 | |
Dong Aisheng | 5afc994 | 2016-06-30 17:31:15 +0800 | [diff] [blame] | 78 | static inline struct clk *imx_clk_fixed_factor(const char *name, |
| 79 | const char *parent, unsigned int mult, unsigned int div) |
| 80 | { |
| 81 | return clk_register_fixed_factor(NULL, name, parent, |
| 82 | CLK_SET_RATE_PARENT, mult, div); |
| 83 | } |
| 84 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 85 | static inline struct clk *imx_clk_divider(const char *name, const char *parent, |
| 86 | void __iomem *reg, u8 shift, u8 width) |
| 87 | { |
| 88 | return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, |
| 89 | reg, shift, width, 0, &imx_ccm_lock); |
| 90 | } |
| 91 | |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 92 | static inline struct clk *imx_clk_divider_flags(const char *name, |
| 93 | const char *parent, void __iomem *reg, u8 shift, u8 width, |
| 94 | unsigned long flags) |
| 95 | { |
| 96 | return clk_register_divider(NULL, name, parent, flags, |
| 97 | reg, shift, width, 0, &imx_ccm_lock); |
| 98 | } |
| 99 | |
Dong Aisheng | 39c2949 | 2016-06-30 17:31:16 +0800 | [diff] [blame] | 100 | static inline struct clk *imx_clk_divider2(const char *name, const char *parent, |
| 101 | void __iomem *reg, u8 shift, u8 width) |
| 102 | { |
| 103 | return clk_register_divider(NULL, name, parent, |
| 104 | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, |
| 105 | reg, shift, width, 0, &imx_ccm_lock); |
| 106 | } |
| 107 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 108 | static inline struct clk *imx_clk_gate(const char *name, const char *parent, |
| 109 | void __iomem *reg, u8 shift) |
| 110 | { |
| 111 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 112 | shift, 0, &imx_ccm_lock); |
| 113 | } |
| 114 | |
Alexander Shiyan | 6525169 | 2014-06-22 17:17:06 +0400 | [diff] [blame] | 115 | static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, |
| 116 | void __iomem *reg, u8 shift) |
| 117 | { |
| 118 | return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 119 | shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); |
| 120 | } |
| 121 | |
Dong Aisheng | 5afc994 | 2016-06-30 17:31:15 +0800 | [diff] [blame] | 122 | static inline struct clk *imx_clk_gate2(const char *name, const char *parent, |
| 123 | void __iomem *reg, u8 shift) |
| 124 | { |
| 125 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 126 | shift, 0x3, 0, &imx_ccm_lock, NULL); |
| 127 | } |
| 128 | |
| 129 | static inline struct clk *imx_clk_gate2_shared(const char *name, |
| 130 | const char *parent, void __iomem *reg, u8 shift, |
| 131 | unsigned int *share_count) |
| 132 | { |
| 133 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 134 | shift, 0x3, 0, &imx_ccm_lock, share_count); |
| 135 | } |
| 136 | |
Fabio Estevam | d5ebf5f | 2016-08-12 15:26:55 -0300 | [diff] [blame] | 137 | static inline struct clk *imx_clk_gate2_shared2(const char *name, |
| 138 | const char *parent, void __iomem *reg, u8 shift, |
| 139 | unsigned int *share_count) |
| 140 | { |
| 141 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | |
| 142 | CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, |
| 143 | &imx_ccm_lock, share_count); |
| 144 | } |
| 145 | |
Dong Aisheng | 5afc994 | 2016-06-30 17:31:15 +0800 | [diff] [blame] | 146 | static inline struct clk *imx_clk_gate2_cgr(const char *name, |
| 147 | const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) |
| 148 | { |
| 149 | return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, |
| 150 | shift, cgr_val, 0, &imx_ccm_lock, NULL); |
| 151 | } |
| 152 | |
Dong Aisheng | 39c2949 | 2016-06-30 17:31:16 +0800 | [diff] [blame] | 153 | static inline struct clk *imx_clk_gate3(const char *name, const char *parent, |
| 154 | void __iomem *reg, u8 shift) |
| 155 | { |
| 156 | return clk_register_gate(NULL, name, parent, |
| 157 | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, |
| 158 | reg, shift, 0, &imx_ccm_lock); |
| 159 | } |
| 160 | |
| 161 | static inline struct clk *imx_clk_gate4(const char *name, const char *parent, |
| 162 | void __iomem *reg, u8 shift) |
| 163 | { |
| 164 | return clk_register_gate2(NULL, name, parent, |
| 165 | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, |
| 166 | reg, shift, 0x3, 0, &imx_ccm_lock, NULL); |
| 167 | } |
| 168 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 169 | static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, |
| 170 | u8 shift, u8 width, const char **parents, int num_parents) |
| 171 | { |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 172 | return clk_register_mux(NULL, name, parents, num_parents, |
| 173 | CLK_SET_RATE_NO_REPARENT, reg, shift, |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 174 | width, 0, &imx_ccm_lock); |
| 175 | } |
| 176 | |
Dong Aisheng | 39c2949 | 2016-06-30 17:31:16 +0800 | [diff] [blame] | 177 | static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg, |
| 178 | u8 shift, u8 width, const char **parents, int num_parents) |
| 179 | { |
| 180 | return clk_register_mux(NULL, name, parents, num_parents, |
| 181 | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE, |
| 182 | reg, shift, width, 0, &imx_ccm_lock); |
| 183 | } |
| 184 | |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 185 | static inline struct clk *imx_clk_mux_flags(const char *name, |
| 186 | void __iomem *reg, u8 shift, u8 width, const char **parents, |
| 187 | int num_parents, unsigned long flags) |
| 188 | { |
| 189 | return clk_register_mux(NULL, name, parents, num_parents, |
James Hogan | 819c1de | 2013-07-29 12:25:01 +0100 | [diff] [blame] | 190 | flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0, |
Philipp Zabel | 3ce9217 | 2013-03-27 18:30:40 +0100 | [diff] [blame] | 191 | &imx_ccm_lock); |
| 192 | } |
| 193 | |
Lucas Stach | e0fed51 | 2014-09-26 15:41:01 +0200 | [diff] [blame] | 194 | struct clk *imx_clk_cpu(const char *name, const char *parent_name, |
| 195 | struct clk *div, struct clk *mux, struct clk *pll, |
| 196 | struct clk *step); |
| 197 | |
Sascha Hauer | 6c7b06850 | 2012-03-07 21:01:28 +0100 | [diff] [blame] | 198 | #endif |