blob: df1f1b52c7ecbfd929ac945738f3e7ebae76fe4d [file] [log] [blame]
Steve Wisecfdda9d2010-04-21 15:30:06 -07001/*
2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/debugfs.h>
Vipul Pandyae5725682012-05-21 17:31:13 +053035#include <linux/vmalloc.h>
Steve Wisecfdda9d2010-04-21 15:30:06 -070036
37#include <rdma/ib_verbs.h>
38
39#include "iw_cxgb4.h"
40
41#define DRV_VERSION "0.1"
42
43MODULE_AUTHOR("Steve Wise");
Vipul Pandyaf079af72013-03-14 05:08:58 +000044MODULE_DESCRIPTION("Chelsio T4/T5 RDMA Driver");
Steve Wisecfdda9d2010-04-21 15:30:06 -070045MODULE_LICENSE("Dual BSD/GPL");
46MODULE_VERSION(DRV_VERSION);
47
Vipul Pandya80ccdd62013-03-14 05:09:00 +000048static int allow_db_fc_on_t5;
49module_param(allow_db_fc_on_t5, int, 0644);
50MODULE_PARM_DESC(allow_db_fc_on_t5,
51 "Allow DB Flow Control on T5 (default = 0)");
52
53static int allow_db_coalescing_on_t5;
54module_param(allow_db_coalescing_on_t5, int, 0644);
55MODULE_PARM_DESC(allow_db_coalescing_on_t5,
56 "Allow DB Coalescing on T5 (default = 0)");
57
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +053058int c4iw_wr_log = 0;
59module_param(c4iw_wr_log, int, 0444);
60MODULE_PARM_DESC(c4iw_wr_log, "Enables logging of work request timing data.");
61
62int c4iw_wr_log_size_order = 12;
63module_param(c4iw_wr_log_size_order, int, 0444);
64MODULE_PARM_DESC(c4iw_wr_log_size_order,
65 "Number of entries (log2) in the work request timing log.");
66
Vipul Pandya2c974782012-05-18 15:29:28 +053067struct uld_ctx {
68 struct list_head entry;
69 struct cxgb4_lld_info lldi;
70 struct c4iw_dev *dev;
71};
72
Steve Wise2f25e9a2011-05-09 22:06:23 -070073static LIST_HEAD(uld_ctx_list);
Steve Wisecfdda9d2010-04-21 15:30:06 -070074static DEFINE_MUTEX(dev_mutex);
75
Steve Wise05eb2382014-03-14 21:52:08 +053076#define DB_FC_RESUME_SIZE 64
77#define DB_FC_RESUME_DELAY 1
78#define DB_FC_DRAIN_THRESH 0
79
Steve Wisecfdda9d2010-04-21 15:30:06 -070080static struct dentry *c4iw_debugfs_root;
81
Steve Wise9e8d1fa32010-09-10 11:15:20 -050082struct c4iw_debugfs_data {
Steve Wisecfdda9d2010-04-21 15:30:06 -070083 struct c4iw_dev *devp;
84 char *buf;
85 int bufsize;
86 int pos;
87};
88
Steve Wise9eccfe12014-03-26 17:08:09 -050089/* registered cxgb4 netlink callbacks */
90static struct ibnl_client_cbs c4iw_nl_cb_table[] = {
91 [RDMA_NL_IWPM_REG_PID] = {.dump = iwpm_register_pid_cb},
92 [RDMA_NL_IWPM_ADD_MAPPING] = {.dump = iwpm_add_mapping_cb},
93 [RDMA_NL_IWPM_QUERY_MAPPING] = {.dump = iwpm_add_and_query_mapping_cb},
94 [RDMA_NL_IWPM_HANDLE_ERR] = {.dump = iwpm_mapping_error_cb},
95 [RDMA_NL_IWPM_MAPINFO] = {.dump = iwpm_mapping_info_cb},
96 [RDMA_NL_IWPM_MAPINFO_NUM] = {.dump = iwpm_ack_mapping_info_cb}
97};
98
Steve Wise9e8d1fa32010-09-10 11:15:20 -050099static int count_idrs(int id, void *p, void *data)
Steve Wisecfdda9d2010-04-21 15:30:06 -0700100{
Steve Wisecfdda9d2010-04-21 15:30:06 -0700101 int *countp = data;
102
Steve Wisecfdda9d2010-04-21 15:30:06 -0700103 *countp = *countp + 1;
104 return 0;
105}
106
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500107static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
108 loff_t *ppos)
109{
110 struct c4iw_debugfs_data *d = file->private_data;
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500111
Steve Wise31609772010-09-29 18:21:33 +0000112 return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500113}
114
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530115void c4iw_log_wr_stats(struct t4_wq *wq, struct t4_cqe *cqe)
116{
117 struct wr_log_entry le;
118 int idx;
119
120 if (!wq->rdev->wr_log)
121 return;
122
123 idx = (atomic_inc_return(&wq->rdev->wr_log_idx) - 1) &
124 (wq->rdev->wr_log_size - 1);
125 le.poll_sge_ts = cxgb4_read_sge_timestamp(wq->rdev->lldi.ports[0]);
126 getnstimeofday(&le.poll_host_ts);
127 le.valid = 1;
128 le.cqe_sge_ts = CQE_TS(cqe);
129 if (SQ_TYPE(cqe)) {
130 le.qid = wq->sq.qid;
131 le.opcode = CQE_OPCODE(cqe);
132 le.post_host_ts = wq->sq.sw_sq[wq->sq.cidx].host_ts;
133 le.post_sge_ts = wq->sq.sw_sq[wq->sq.cidx].sge_ts;
134 le.wr_id = CQE_WRID_SQ_IDX(cqe);
135 } else {
136 le.qid = wq->rq.qid;
137 le.opcode = FW_RI_RECEIVE;
138 le.post_host_ts = wq->rq.sw_rq[wq->rq.cidx].host_ts;
139 le.post_sge_ts = wq->rq.sw_rq[wq->rq.cidx].sge_ts;
140 le.wr_id = CQE_WRID_MSN(cqe);
141 }
142 wq->rdev->wr_log[idx] = le;
143}
144
145static int wr_log_show(struct seq_file *seq, void *v)
146{
147 struct c4iw_dev *dev = seq->private;
148 struct timespec prev_ts = {0, 0};
149 struct wr_log_entry *lep;
150 int prev_ts_set = 0;
151 int idx, end;
152
153#define ts2ns(ts) ((ts) * dev->rdev.lldi.cclk_ps / 1000)
154
155 idx = atomic_read(&dev->rdev.wr_log_idx) &
156 (dev->rdev.wr_log_size - 1);
157 end = idx - 1;
158 if (end < 0)
159 end = dev->rdev.wr_log_size - 1;
160 lep = &dev->rdev.wr_log[idx];
161 while (idx != end) {
162 if (lep->valid) {
163 if (!prev_ts_set) {
164 prev_ts_set = 1;
165 prev_ts = lep->poll_host_ts;
166 }
167 seq_printf(seq, "%04u: sec %lu nsec %lu qid %u opcode "
168 "%u %s 0x%x host_wr_delta sec %lu nsec %lu "
169 "post_sge_ts 0x%llx cqe_sge_ts 0x%llx "
170 "poll_sge_ts 0x%llx post_poll_delta_ns %llu "
171 "cqe_poll_delta_ns %llu\n",
172 idx,
173 timespec_sub(lep->poll_host_ts,
174 prev_ts).tv_sec,
175 timespec_sub(lep->poll_host_ts,
176 prev_ts).tv_nsec,
177 lep->qid, lep->opcode,
178 lep->opcode == FW_RI_RECEIVE ?
179 "msn" : "wrid",
180 lep->wr_id,
181 timespec_sub(lep->poll_host_ts,
182 lep->post_host_ts).tv_sec,
183 timespec_sub(lep->poll_host_ts,
184 lep->post_host_ts).tv_nsec,
185 lep->post_sge_ts, lep->cqe_sge_ts,
186 lep->poll_sge_ts,
187 ts2ns(lep->poll_sge_ts - lep->post_sge_ts),
188 ts2ns(lep->poll_sge_ts - lep->cqe_sge_ts));
189 prev_ts = lep->poll_host_ts;
190 }
191 idx++;
192 if (idx > (dev->rdev.wr_log_size - 1))
193 idx = 0;
194 lep = &dev->rdev.wr_log[idx];
195 }
196#undef ts2ns
197 return 0;
198}
199
200static int wr_log_open(struct inode *inode, struct file *file)
201{
202 return single_open(file, wr_log_show, inode->i_private);
203}
204
205static ssize_t wr_log_clear(struct file *file, const char __user *buf,
206 size_t count, loff_t *pos)
207{
208 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
209 int i;
210
211 if (dev->rdev.wr_log)
212 for (i = 0; i < dev->rdev.wr_log_size; i++)
213 dev->rdev.wr_log[i].valid = 0;
214 return count;
215}
216
217static const struct file_operations wr_log_debugfs_fops = {
218 .owner = THIS_MODULE,
219 .open = wr_log_open,
220 .release = single_release,
221 .read = seq_read,
222 .llseek = seq_lseek,
223 .write = wr_log_clear,
224};
225
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500226static int dump_qp(int id, void *p, void *data)
Steve Wisecfdda9d2010-04-21 15:30:06 -0700227{
228 struct c4iw_qp *qp = p;
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500229 struct c4iw_debugfs_data *qpd = data;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700230 int space;
231 int cc;
232
233 if (id != qp->wq.sq.qid)
234 return 0;
235
236 space = qpd->bufsize - qpd->pos - 1;
237 if (space == 0)
238 return 1;
239
Vipul Pandya830662f2013-07-04 16:10:47 +0530240 if (qp->ep) {
241 if (qp->ep->com.local_addr.ss_family == AF_INET) {
242 struct sockaddr_in *lsin = (struct sockaddr_in *)
243 &qp->ep->com.local_addr;
244 struct sockaddr_in *rsin = (struct sockaddr_in *)
245 &qp->ep->com.remote_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500246 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
247 &qp->ep->com.mapped_local_addr;
248 struct sockaddr_in *mapped_rsin = (struct sockaddr_in *)
249 &qp->ep->com.mapped_remote_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530250
251 cc = snprintf(qpd->buf + qpd->pos, space,
252 "rc qp sq id %u rq id %u state %u "
253 "onchip %u ep tid %u state %u "
Steve Wise9eccfe12014-03-26 17:08:09 -0500254 "%pI4:%u/%u->%pI4:%u/%u\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530255 qp->wq.sq.qid, qp->wq.rq.qid,
256 (int)qp->attr.state,
257 qp->wq.sq.flags & T4_SQ_ONCHIP,
258 qp->ep->hwtid, (int)qp->ep->com.state,
259 &lsin->sin_addr, ntohs(lsin->sin_port),
Steve Wise9eccfe12014-03-26 17:08:09 -0500260 ntohs(mapped_lsin->sin_port),
261 &rsin->sin_addr, ntohs(rsin->sin_port),
262 ntohs(mapped_rsin->sin_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530263 } else {
264 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
265 &qp->ep->com.local_addr;
266 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
267 &qp->ep->com.remote_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500268 struct sockaddr_in6 *mapped_lsin6 =
269 (struct sockaddr_in6 *)
270 &qp->ep->com.mapped_local_addr;
271 struct sockaddr_in6 *mapped_rsin6 =
272 (struct sockaddr_in6 *)
273 &qp->ep->com.mapped_remote_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530274
275 cc = snprintf(qpd->buf + qpd->pos, space,
276 "rc qp sq id %u rq id %u state %u "
277 "onchip %u ep tid %u state %u "
Steve Wise9eccfe12014-03-26 17:08:09 -0500278 "%pI6:%u/%u->%pI6:%u/%u\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530279 qp->wq.sq.qid, qp->wq.rq.qid,
280 (int)qp->attr.state,
281 qp->wq.sq.flags & T4_SQ_ONCHIP,
282 qp->ep->hwtid, (int)qp->ep->com.state,
283 &lsin6->sin6_addr,
284 ntohs(lsin6->sin6_port),
Steve Wise9eccfe12014-03-26 17:08:09 -0500285 ntohs(mapped_lsin6->sin6_port),
Vipul Pandya830662f2013-07-04 16:10:47 +0530286 &rsin6->sin6_addr,
Steve Wise9eccfe12014-03-26 17:08:09 -0500287 ntohs(rsin6->sin6_port),
288 ntohs(mapped_rsin6->sin6_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530289 }
290 } else
Steve Wisedb5d0402011-03-11 22:29:50 +0000291 cc = snprintf(qpd->buf + qpd->pos, space,
292 "qp sq id %u rq id %u state %u onchip %u\n",
293 qp->wq.sq.qid, qp->wq.rq.qid,
294 (int)qp->attr.state,
295 qp->wq.sq.flags & T4_SQ_ONCHIP);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700296 if (cc < space)
297 qpd->pos += cc;
298 return 0;
299}
300
301static int qp_release(struct inode *inode, struct file *file)
302{
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500303 struct c4iw_debugfs_data *qpd = file->private_data;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700304 if (!qpd) {
305 printk(KERN_INFO "%s null qpd?\n", __func__);
306 return 0;
307 }
Vipul Pandyad716a2a2012-05-18 15:29:31 +0530308 vfree(qpd->buf);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700309 kfree(qpd);
310 return 0;
311}
312
313static int qp_open(struct inode *inode, struct file *file)
314{
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500315 struct c4iw_debugfs_data *qpd;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700316 int ret = 0;
317 int count = 1;
318
319 qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
320 if (!qpd) {
321 ret = -ENOMEM;
322 goto out;
323 }
324 qpd->devp = inode->i_private;
325 qpd->pos = 0;
326
327 spin_lock_irq(&qpd->devp->lock);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500328 idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700329 spin_unlock_irq(&qpd->devp->lock);
330
331 qpd->bufsize = count * 128;
Vipul Pandyad716a2a2012-05-18 15:29:31 +0530332 qpd->buf = vmalloc(qpd->bufsize);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700333 if (!qpd->buf) {
334 ret = -ENOMEM;
335 goto err1;
336 }
337
338 spin_lock_irq(&qpd->devp->lock);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500339 idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700340 spin_unlock_irq(&qpd->devp->lock);
341
342 qpd->buf[qpd->pos++] = 0;
343 file->private_data = qpd;
344 goto out;
345err1:
346 kfree(qpd);
347out:
348 return ret;
349}
350
Steve Wisecfdda9d2010-04-21 15:30:06 -0700351static const struct file_operations qp_debugfs_fops = {
352 .owner = THIS_MODULE,
353 .open = qp_open,
354 .release = qp_release,
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500355 .read = debugfs_read,
Steve Wise8bbac892010-09-29 14:11:12 +0000356 .llseek = default_llseek,
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500357};
358
359static int dump_stag(int id, void *p, void *data)
360{
361 struct c4iw_debugfs_data *stagd = data;
362 int space;
363 int cc;
Hariprasad Shenai031cf472014-07-14 21:34:53 +0530364 struct fw_ri_tpte tpte;
365 int ret;
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500366
367 space = stagd->bufsize - stagd->pos - 1;
368 if (space == 0)
369 return 1;
370
Hariprasad Shenai031cf472014-07-14 21:34:53 +0530371 ret = cxgb4_read_tpte(stagd->devp->rdev.lldi.ports[0], (u32)id<<8,
372 (__be32 *)&tpte);
373 if (ret) {
374 dev_err(&stagd->devp->rdev.lldi.pdev->dev,
375 "%s cxgb4_read_tpte err %d\n", __func__, ret);
376 return ret;
377 }
378 cc = snprintf(stagd->buf + stagd->pos, space,
379 "stag: idx 0x%x valid %d key 0x%x state %d pdid %d "
380 "perm 0x%x ps %d len 0x%llx va 0x%llx\n",
381 (u32)id<<8,
382 G_FW_RI_TPTE_VALID(ntohl(tpte.valid_to_pdid)),
383 G_FW_RI_TPTE_STAGKEY(ntohl(tpte.valid_to_pdid)),
384 G_FW_RI_TPTE_STAGSTATE(ntohl(tpte.valid_to_pdid)),
385 G_FW_RI_TPTE_PDID(ntohl(tpte.valid_to_pdid)),
386 G_FW_RI_TPTE_PERM(ntohl(tpte.locread_to_qpid)),
387 G_FW_RI_TPTE_PS(ntohl(tpte.locread_to_qpid)),
388 ((u64)ntohl(tpte.len_hi) << 32) | ntohl(tpte.len_lo),
389 ((u64)ntohl(tpte.va_hi) << 32) | ntohl(tpte.va_lo_fbo));
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500390 if (cc < space)
391 stagd->pos += cc;
392 return 0;
393}
394
395static int stag_release(struct inode *inode, struct file *file)
396{
397 struct c4iw_debugfs_data *stagd = file->private_data;
398 if (!stagd) {
399 printk(KERN_INFO "%s null stagd?\n", __func__);
400 return 0;
401 }
Hariprasad Shenai031cf472014-07-14 21:34:53 +0530402 vfree(stagd->buf);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500403 kfree(stagd);
404 return 0;
405}
406
407static int stag_open(struct inode *inode, struct file *file)
408{
409 struct c4iw_debugfs_data *stagd;
410 int ret = 0;
411 int count = 1;
412
413 stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
414 if (!stagd) {
415 ret = -ENOMEM;
416 goto out;
417 }
418 stagd->devp = inode->i_private;
419 stagd->pos = 0;
420
421 spin_lock_irq(&stagd->devp->lock);
422 idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
423 spin_unlock_irq(&stagd->devp->lock);
424
Hariprasad Shenai031cf472014-07-14 21:34:53 +0530425 stagd->bufsize = count * 256;
426 stagd->buf = vmalloc(stagd->bufsize);
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500427 if (!stagd->buf) {
428 ret = -ENOMEM;
429 goto err1;
430 }
431
432 spin_lock_irq(&stagd->devp->lock);
433 idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
434 spin_unlock_irq(&stagd->devp->lock);
435
436 stagd->buf[stagd->pos++] = 0;
437 file->private_data = stagd;
438 goto out;
439err1:
440 kfree(stagd);
441out:
442 return ret;
443}
444
445static const struct file_operations stag_debugfs_fops = {
446 .owner = THIS_MODULE,
447 .open = stag_open,
448 .release = stag_release,
449 .read = debugfs_read,
Steve Wise8bbac892010-09-29 14:11:12 +0000450 .llseek = default_llseek,
Steve Wisecfdda9d2010-04-21 15:30:06 -0700451};
452
Steve Wise05eb2382014-03-14 21:52:08 +0530453static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY", "STOPPED"};
Vipul Pandya422eea02012-05-18 15:29:30 +0530454
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530455static int stats_show(struct seq_file *seq, void *v)
456{
457 struct c4iw_dev *dev = seq->private;
458
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530459 seq_printf(seq, " Object: %10s %10s %10s %10s\n", "Total", "Current",
460 "Max", "Fail");
461 seq_printf(seq, " PDID: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530462 dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530463 dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
464 seq_printf(seq, " QID: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530465 dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530466 dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
467 seq_printf(seq, " TPTMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530468 dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530469 dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
470 seq_printf(seq, " PBLMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530471 dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530472 dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
473 seq_printf(seq, " RQTMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530474 dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530475 dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
476 seq_printf(seq, " OCQPMEM: %10llu %10llu %10llu %10llu\n",
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530477 dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530478 dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
Vipul Pandya2c974782012-05-18 15:29:28 +0530479 seq_printf(seq, " DB FULL: %10llu\n", dev->rdev.stats.db_full);
480 seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
481 seq_printf(seq, " DB DROP: %10llu\n", dev->rdev.stats.db_drop);
Steve Wise05eb2382014-03-14 21:52:08 +0530482 seq_printf(seq, " DB State: %s Transitions %llu FC Interruptions %llu\n",
Vipul Pandya422eea02012-05-18 15:29:30 +0530483 db_state_str[dev->db_state],
Steve Wise05eb2382014-03-14 21:52:08 +0530484 dev->rdev.stats.db_state_transitions,
485 dev->rdev.stats.db_fc_interruptions);
Vipul Pandya1cab7752012-12-10 09:30:55 +0000486 seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
Vipul Pandya793dad92012-12-10 09:30:56 +0000487 seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n",
488 dev->rdev.stats.act_ofld_conn_fails);
489 seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n",
490 dev->rdev.stats.pas_ofld_conn_fails);
Hariprasad Shenai4c2c5762014-07-14 21:34:52 +0530491 seq_printf(seq, "AVAILABLE IRD: %10u\n", dev->avail_ird);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530492 return 0;
493}
494
495static int stats_open(struct inode *inode, struct file *file)
496{
497 return single_open(file, stats_show, inode->i_private);
498}
499
500static ssize_t stats_clear(struct file *file, const char __user *buf,
501 size_t count, loff_t *pos)
502{
503 struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
504
505 mutex_lock(&dev->rdev.stats.lock);
506 dev->rdev.stats.pd.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530507 dev->rdev.stats.pd.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530508 dev->rdev.stats.qid.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530509 dev->rdev.stats.qid.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530510 dev->rdev.stats.stag.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530511 dev->rdev.stats.stag.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530512 dev->rdev.stats.pbl.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530513 dev->rdev.stats.pbl.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530514 dev->rdev.stats.rqt.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530515 dev->rdev.stats.rqt.fail = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530516 dev->rdev.stats.ocqp.max = 0;
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530517 dev->rdev.stats.ocqp.fail = 0;
Vipul Pandya2c974782012-05-18 15:29:28 +0530518 dev->rdev.stats.db_full = 0;
519 dev->rdev.stats.db_empty = 0;
520 dev->rdev.stats.db_drop = 0;
Vipul Pandya422eea02012-05-18 15:29:30 +0530521 dev->rdev.stats.db_state_transitions = 0;
Vipul Pandya793dad92012-12-10 09:30:56 +0000522 dev->rdev.stats.tcam_full = 0;
523 dev->rdev.stats.act_ofld_conn_fails = 0;
524 dev->rdev.stats.pas_ofld_conn_fails = 0;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530525 mutex_unlock(&dev->rdev.stats.lock);
526 return count;
527}
528
529static const struct file_operations stats_debugfs_fops = {
530 .owner = THIS_MODULE,
531 .open = stats_open,
532 .release = single_release,
533 .read = seq_read,
534 .llseek = seq_lseek,
535 .write = stats_clear,
536};
537
Vipul Pandya793dad92012-12-10 09:30:56 +0000538static int dump_ep(int id, void *p, void *data)
539{
540 struct c4iw_ep *ep = p;
541 struct c4iw_debugfs_data *epd = data;
542 int space;
543 int cc;
544
545 space = epd->bufsize - epd->pos - 1;
546 if (space == 0)
547 return 1;
548
Vipul Pandya830662f2013-07-04 16:10:47 +0530549 if (ep->com.local_addr.ss_family == AF_INET) {
550 struct sockaddr_in *lsin = (struct sockaddr_in *)
551 &ep->com.local_addr;
552 struct sockaddr_in *rsin = (struct sockaddr_in *)
553 &ep->com.remote_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500554 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
555 &ep->com.mapped_local_addr;
556 struct sockaddr_in *mapped_rsin = (struct sockaddr_in *)
557 &ep->com.mapped_remote_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530558
559 cc = snprintf(epd->buf + epd->pos, space,
560 "ep %p cm_id %p qp %p state %d flags 0x%lx "
561 "history 0x%lx hwtid %d atid %d "
Steve Wise9eccfe12014-03-26 17:08:09 -0500562 "%pI4:%d/%d <-> %pI4:%d/%d\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530563 ep, ep->com.cm_id, ep->com.qp,
564 (int)ep->com.state, ep->com.flags,
565 ep->com.history, ep->hwtid, ep->atid,
566 &lsin->sin_addr, ntohs(lsin->sin_port),
Steve Wise9eccfe12014-03-26 17:08:09 -0500567 ntohs(mapped_lsin->sin_port),
568 &rsin->sin_addr, ntohs(rsin->sin_port),
569 ntohs(mapped_rsin->sin_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530570 } else {
571 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
572 &ep->com.local_addr;
573 struct sockaddr_in6 *rsin6 = (struct sockaddr_in6 *)
574 &ep->com.remote_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500575 struct sockaddr_in6 *mapped_lsin6 = (struct sockaddr_in6 *)
576 &ep->com.mapped_local_addr;
577 struct sockaddr_in6 *mapped_rsin6 = (struct sockaddr_in6 *)
578 &ep->com.mapped_remote_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530579
580 cc = snprintf(epd->buf + epd->pos, space,
581 "ep %p cm_id %p qp %p state %d flags 0x%lx "
582 "history 0x%lx hwtid %d atid %d "
Steve Wise9eccfe12014-03-26 17:08:09 -0500583 "%pI6:%d/%d <-> %pI6:%d/%d\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530584 ep, ep->com.cm_id, ep->com.qp,
585 (int)ep->com.state, ep->com.flags,
586 ep->com.history, ep->hwtid, ep->atid,
587 &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
Steve Wise9eccfe12014-03-26 17:08:09 -0500588 ntohs(mapped_lsin6->sin6_port),
589 &rsin6->sin6_addr, ntohs(rsin6->sin6_port),
590 ntohs(mapped_rsin6->sin6_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530591 }
Vipul Pandya793dad92012-12-10 09:30:56 +0000592 if (cc < space)
593 epd->pos += cc;
594 return 0;
595}
596
597static int dump_listen_ep(int id, void *p, void *data)
598{
599 struct c4iw_listen_ep *ep = p;
600 struct c4iw_debugfs_data *epd = data;
601 int space;
602 int cc;
603
604 space = epd->bufsize - epd->pos - 1;
605 if (space == 0)
606 return 1;
607
Vipul Pandya830662f2013-07-04 16:10:47 +0530608 if (ep->com.local_addr.ss_family == AF_INET) {
609 struct sockaddr_in *lsin = (struct sockaddr_in *)
610 &ep->com.local_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500611 struct sockaddr_in *mapped_lsin = (struct sockaddr_in *)
612 &ep->com.mapped_local_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530613
614 cc = snprintf(epd->buf + epd->pos, space,
615 "ep %p cm_id %p state %d flags 0x%lx stid %d "
Steve Wise9eccfe12014-03-26 17:08:09 -0500616 "backlog %d %pI4:%d/%d\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530617 ep, ep->com.cm_id, (int)ep->com.state,
618 ep->com.flags, ep->stid, ep->backlog,
Steve Wise9eccfe12014-03-26 17:08:09 -0500619 &lsin->sin_addr, ntohs(lsin->sin_port),
620 ntohs(mapped_lsin->sin_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530621 } else {
622 struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
623 &ep->com.local_addr;
Steve Wise9eccfe12014-03-26 17:08:09 -0500624 struct sockaddr_in6 *mapped_lsin6 = (struct sockaddr_in6 *)
625 &ep->com.mapped_local_addr;
Vipul Pandya830662f2013-07-04 16:10:47 +0530626
627 cc = snprintf(epd->buf + epd->pos, space,
628 "ep %p cm_id %p state %d flags 0x%lx stid %d "
Steve Wise9eccfe12014-03-26 17:08:09 -0500629 "backlog %d %pI6:%d/%d\n",
Vipul Pandya830662f2013-07-04 16:10:47 +0530630 ep, ep->com.cm_id, (int)ep->com.state,
631 ep->com.flags, ep->stid, ep->backlog,
Steve Wise9eccfe12014-03-26 17:08:09 -0500632 &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
633 ntohs(mapped_lsin6->sin6_port));
Vipul Pandya830662f2013-07-04 16:10:47 +0530634 }
Vipul Pandya793dad92012-12-10 09:30:56 +0000635 if (cc < space)
636 epd->pos += cc;
637 return 0;
638}
639
640static int ep_release(struct inode *inode, struct file *file)
641{
642 struct c4iw_debugfs_data *epd = file->private_data;
643 if (!epd) {
644 pr_info("%s null qpd?\n", __func__);
645 return 0;
646 }
647 vfree(epd->buf);
648 kfree(epd);
649 return 0;
650}
651
652static int ep_open(struct inode *inode, struct file *file)
653{
654 struct c4iw_debugfs_data *epd;
655 int ret = 0;
656 int count = 1;
657
658 epd = kmalloc(sizeof(*epd), GFP_KERNEL);
659 if (!epd) {
660 ret = -ENOMEM;
661 goto out;
662 }
663 epd->devp = inode->i_private;
664 epd->pos = 0;
665
666 spin_lock_irq(&epd->devp->lock);
667 idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count);
668 idr_for_each(&epd->devp->atid_idr, count_idrs, &count);
669 idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
670 spin_unlock_irq(&epd->devp->lock);
671
672 epd->bufsize = count * 160;
673 epd->buf = vmalloc(epd->bufsize);
674 if (!epd->buf) {
675 ret = -ENOMEM;
676 goto err1;
677 }
678
679 spin_lock_irq(&epd->devp->lock);
680 idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd);
681 idr_for_each(&epd->devp->atid_idr, dump_ep, epd);
682 idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd);
683 spin_unlock_irq(&epd->devp->lock);
684
685 file->private_data = epd;
686 goto out;
687err1:
688 kfree(epd);
689out:
690 return ret;
691}
692
693static const struct file_operations ep_debugfs_fops = {
694 .owner = THIS_MODULE,
695 .open = ep_open,
696 .release = ep_release,
697 .read = debugfs_read,
698};
699
Steve Wisecfdda9d2010-04-21 15:30:06 -0700700static int setup_debugfs(struct c4iw_dev *devp)
701{
702 struct dentry *de;
703
704 if (!devp->debugfs_root)
705 return -1;
706
707 de = debugfs_create_file("qps", S_IWUSR, devp->debugfs_root,
708 (void *)devp, &qp_debugfs_fops);
709 if (de && de->d_inode)
710 de->d_inode->i_size = 4096;
Steve Wise9e8d1fa32010-09-10 11:15:20 -0500711
712 de = debugfs_create_file("stags", S_IWUSR, devp->debugfs_root,
713 (void *)devp, &stag_debugfs_fops);
714 if (de && de->d_inode)
715 de->d_inode->i_size = 4096;
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530716
717 de = debugfs_create_file("stats", S_IWUSR, devp->debugfs_root,
718 (void *)devp, &stats_debugfs_fops);
719 if (de && de->d_inode)
720 de->d_inode->i_size = 4096;
721
Vipul Pandya793dad92012-12-10 09:30:56 +0000722 de = debugfs_create_file("eps", S_IWUSR, devp->debugfs_root,
723 (void *)devp, &ep_debugfs_fops);
724 if (de && de->d_inode)
725 de->d_inode->i_size = 4096;
726
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530727 if (c4iw_wr_log) {
728 de = debugfs_create_file("wr_log", S_IWUSR, devp->debugfs_root,
729 (void *)devp, &wr_log_debugfs_fops);
730 if (de && de->d_inode)
731 de->d_inode->i_size = 4096;
732 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700733 return 0;
734}
735
736void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
737 struct c4iw_dev_ucontext *uctx)
738{
739 struct list_head *pos, *nxt;
740 struct c4iw_qid_list *entry;
741
742 mutex_lock(&uctx->lock);
743 list_for_each_safe(pos, nxt, &uctx->qpids) {
744 entry = list_entry(pos, struct c4iw_qid_list, entry);
745 list_del_init(&entry->entry);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530746 if (!(entry->qid & rdev->qpmask)) {
Vipul Pandyaec3eead2012-05-18 15:29:32 +0530747 c4iw_put_resource(&rdev->resource.qid_table,
748 entry->qid);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530749 mutex_lock(&rdev->stats.lock);
750 rdev->stats.qid.cur -= rdev->qpmask + 1;
751 mutex_unlock(&rdev->stats.lock);
752 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700753 kfree(entry);
754 }
755
756 list_for_each_safe(pos, nxt, &uctx->qpids) {
757 entry = list_entry(pos, struct c4iw_qid_list, entry);
758 list_del_init(&entry->entry);
759 kfree(entry);
760 }
761 mutex_unlock(&uctx->lock);
762}
763
764void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
765 struct c4iw_dev_ucontext *uctx)
766{
767 INIT_LIST_HEAD(&uctx->qpids);
768 INIT_LIST_HEAD(&uctx->cqids);
769 mutex_init(&uctx->lock);
770}
771
772/* Caller takes care of locking if needed */
773static int c4iw_rdev_open(struct c4iw_rdev *rdev)
774{
775 int err;
776
777 c4iw_init_dev_ucontext(rdev, &rdev->uctx);
778
779 /*
780 * qpshift is the number of bits to shift the qpid left in order
781 * to get the correct address of the doorbell for that qp.
782 */
783 rdev->qpshift = PAGE_SHIFT - ilog2(rdev->lldi.udb_density);
784 rdev->qpmask = rdev->lldi.udb_density - 1;
785 rdev->cqshift = PAGE_SHIFT - ilog2(rdev->lldi.ucq_density);
786 rdev->cqmask = rdev->lldi.ucq_density - 1;
787 PDBG("%s dev %s stag start 0x%0x size 0x%0x num stags %d "
Steve Wise93fb72e2010-06-23 15:46:55 +0000788 "pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x "
789 "qp qid start %u size %u cq qid start %u size %u\n",
Steve Wisecfdda9d2010-04-21 15:30:06 -0700790 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
791 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
792 rdev->lldi.vr->pbl.start,
793 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
Steve Wise93fb72e2010-06-23 15:46:55 +0000794 rdev->lldi.vr->rq.size,
795 rdev->lldi.vr->qp.start,
796 rdev->lldi.vr->qp.size,
797 rdev->lldi.vr->cq.start,
798 rdev->lldi.vr->cq.size);
Ben Hutchings649fb5e2013-10-27 21:50:45 +0000799 PDBG("udb len 0x%x udb base %llx db_reg %p gts_reg %p qpshift %lu "
Steve Wisecfdda9d2010-04-21 15:30:06 -0700800 "qpmask 0x%x cqshift %lu cqmask 0x%x\n",
801 (unsigned)pci_resource_len(rdev->lldi.pdev, 2),
Ben Hutchings649fb5e2013-10-27 21:50:45 +0000802 (u64)pci_resource_start(rdev->lldi.pdev, 2),
Steve Wisecfdda9d2010-04-21 15:30:06 -0700803 rdev->lldi.db_reg,
804 rdev->lldi.gts_reg,
805 rdev->qpshift, rdev->qpmask,
806 rdev->cqshift, rdev->cqmask);
807
808 if (c4iw_num_stags(rdev) == 0) {
809 err = -EINVAL;
810 goto err1;
811 }
812
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530813 rdev->stats.pd.total = T4_MAX_NUM_PD;
814 rdev->stats.stag.total = rdev->lldi.vr->stag.size;
815 rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
816 rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
817 rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
818 rdev->stats.qid.total = rdev->lldi.vr->qp.size;
819
Steve Wisecfdda9d2010-04-21 15:30:06 -0700820 err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
821 if (err) {
822 printk(KERN_ERR MOD "error %d initializing resources\n", err);
823 goto err1;
824 }
825 err = c4iw_pblpool_create(rdev);
826 if (err) {
827 printk(KERN_ERR MOD "error %d initializing pbl pool\n", err);
828 goto err2;
829 }
830 err = c4iw_rqtpool_create(rdev);
831 if (err) {
832 printk(KERN_ERR MOD "error %d initializing rqt pool\n", err);
833 goto err3;
834 }
Steve Wisec6d7b262010-09-13 11:23:57 -0500835 err = c4iw_ocqp_pool_create(rdev);
836 if (err) {
837 printk(KERN_ERR MOD "error %d initializing ocqp pool\n", err);
838 goto err4;
839 }
Steve Wise05eb2382014-03-14 21:52:08 +0530840 rdev->status_page = (struct t4_dev_status_page *)
841 __get_free_page(GFP_KERNEL);
842 if (!rdev->status_page) {
843 pr_err(MOD "error allocating status page\n");
844 goto err4;
845 }
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530846 if (c4iw_wr_log) {
847 rdev->wr_log = kzalloc((1 << c4iw_wr_log_size_order) *
848 sizeof(*rdev->wr_log), GFP_KERNEL);
849 if (rdev->wr_log) {
850 rdev->wr_log_size = 1 << c4iw_wr_log_size_order;
851 atomic_set(&rdev->wr_log_idx, 0);
852 } else {
853 pr_err(MOD "error allocating wr_log. Logging disabled\n");
854 }
855 }
Steve Wisecfdda9d2010-04-21 15:30:06 -0700856 return 0;
Steve Wisec6d7b262010-09-13 11:23:57 -0500857err4:
858 c4iw_rqtpool_destroy(rdev);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700859err3:
860 c4iw_pblpool_destroy(rdev);
861err2:
862 c4iw_destroy_resource(&rdev->resource);
863err1:
864 return err;
865}
866
867static void c4iw_rdev_close(struct c4iw_rdev *rdev)
868{
Hariprasad Shenai7730b4c2014-07-14 21:34:54 +0530869 kfree(rdev->wr_log);
Steve Wise05eb2382014-03-14 21:52:08 +0530870 free_page((unsigned long)rdev->status_page);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700871 c4iw_pblpool_destroy(rdev);
872 c4iw_rqtpool_destroy(rdev);
873 c4iw_destroy_resource(&rdev->resource);
874}
875
Steve Wise9efe10a2011-10-06 09:32:44 -0700876static void c4iw_dealloc(struct uld_ctx *ctx)
Steve Wisecfdda9d2010-04-21 15:30:06 -0700877{
Steve Wise2f25e9a2011-05-09 22:06:23 -0700878 c4iw_rdev_close(&ctx->dev->rdev);
879 idr_destroy(&ctx->dev->cqidr);
880 idr_destroy(&ctx->dev->qpidr);
881 idr_destroy(&ctx->dev->mmidr);
Vipul Pandya793dad92012-12-10 09:30:56 +0000882 idr_destroy(&ctx->dev->hwtid_idr);
883 idr_destroy(&ctx->dev->stid_idr);
884 idr_destroy(&ctx->dev->atid_idr);
Steve Wisefa658a92014-04-09 09:38:25 -0500885 if (ctx->dev->rdev.bar2_kva)
886 iounmap(ctx->dev->rdev.bar2_kva);
887 if (ctx->dev->rdev.oc_mw_kva)
888 iounmap(ctx->dev->rdev.oc_mw_kva);
Steve Wise2f25e9a2011-05-09 22:06:23 -0700889 ib_dealloc_device(&ctx->dev->ibdev);
Steve Wise9eccfe12014-03-26 17:08:09 -0500890 iwpm_exit(RDMA_NL_C4IW);
Steve Wise2f25e9a2011-05-09 22:06:23 -0700891 ctx->dev = NULL;
Steve Wisecfdda9d2010-04-21 15:30:06 -0700892}
893
Steve Wise9efe10a2011-10-06 09:32:44 -0700894static void c4iw_remove(struct uld_ctx *ctx)
895{
896 PDBG("%s c4iw_dev %p\n", __func__, ctx->dev);
897 c4iw_unregister_device(ctx->dev);
898 c4iw_dealloc(ctx);
899}
900
901static int rdma_supported(const struct cxgb4_lld_info *infop)
902{
903 return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
904 infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
Vipul Pandyaf079af72013-03-14 05:08:58 +0000905 infop->vr->cq.size > 0;
Steve Wise9efe10a2011-10-06 09:32:44 -0700906}
907
Steve Wisecfdda9d2010-04-21 15:30:06 -0700908static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
909{
910 struct c4iw_dev *devp;
911 int ret;
912
Steve Wise9efe10a2011-10-06 09:32:44 -0700913 if (!rdma_supported(infop)) {
914 printk(KERN_INFO MOD "%s: RDMA not supported on this device.\n",
915 pci_name(infop->pdev));
916 return ERR_PTR(-ENOSYS);
917 }
Vipul Pandyaf079af72013-03-14 05:08:58 +0000918 if (!ocqp_supported(infop))
919 pr_info("%s: On-Chip Queues not supported on this device.\n",
920 pci_name(infop->pdev));
Vipul Pandya80ccdd62013-03-14 05:09:00 +0000921
Steve Wisecfdda9d2010-04-21 15:30:06 -0700922 devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
923 if (!devp) {
924 printk(KERN_ERR MOD "Cannot allocate ib device\n");
Steve Wisebbe9a0a2011-05-09 22:06:22 -0700925 return ERR_PTR(-ENOMEM);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700926 }
927 devp->rdev.lldi = *infop;
928
Hariprasad Shenai04e10e22014-07-14 21:34:51 +0530929 /* init various hw-queue params based on lld info */
930 PDBG("%s: Ing. padding boundary is %d, egrsstatuspagesize = %d\n",
931 __func__, devp->rdev.lldi.sge_ingpadboundary,
932 devp->rdev.lldi.sge_egrstatuspagesize);
933
934 devp->rdev.hw_queue.t4_eq_status_entries =
935 devp->rdev.lldi.sge_ingpadboundary > 64 ? 2 : 1;
936 devp->rdev.hw_queue.t4_max_eq_size =
937 65520 - devp->rdev.hw_queue.t4_eq_status_entries;
938 devp->rdev.hw_queue.t4_max_iq_size = 65520 - 1;
939 devp->rdev.hw_queue.t4_max_rq_size =
940 8192 - devp->rdev.hw_queue.t4_eq_status_entries;
941 devp->rdev.hw_queue.t4_max_sq_size =
942 devp->rdev.hw_queue.t4_max_eq_size - 1;
943 devp->rdev.hw_queue.t4_max_qp_depth =
944 devp->rdev.hw_queue.t4_max_rq_size - 1;
945 devp->rdev.hw_queue.t4_max_cq_depth =
946 devp->rdev.hw_queue.t4_max_iq_size - 1;
947 devp->rdev.hw_queue.t4_stat_len =
948 devp->rdev.lldi.sge_egrstatuspagesize;
949
Steve Wisefa658a92014-04-09 09:38:25 -0500950 /*
951 * For T5 devices, we map all of BAR2 with WC.
952 * For T4 devices with onchip qp mem, we map only that part
953 * of BAR2 with WC.
954 */
955 devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
956 if (is_t5(devp->rdev.lldi.adapter_type)) {
957 devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
958 pci_resource_len(devp->rdev.lldi.pdev, 2));
959 if (!devp->rdev.bar2_kva) {
960 pr_err(MOD "Unable to ioremap BAR2\n");
Christoph Jaeger65b302a2014-04-21 17:02:42 +0200961 ib_dealloc_device(&devp->ibdev);
Steve Wisefa658a92014-04-09 09:38:25 -0500962 return ERR_PTR(-EINVAL);
963 }
964 } else if (ocqp_supported(infop)) {
965 devp->rdev.oc_mw_pa =
966 pci_resource_start(devp->rdev.lldi.pdev, 2) +
967 pci_resource_len(devp->rdev.lldi.pdev, 2) -
968 roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size);
969 devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
970 devp->rdev.lldi.vr->ocq.size);
971 if (!devp->rdev.oc_mw_kva) {
972 pr_err(MOD "Unable to ioremap onchip mem\n");
Christoph Jaeger65b302a2014-04-21 17:02:42 +0200973 ib_dealloc_device(&devp->ibdev);
Steve Wisefa658a92014-04-09 09:38:25 -0500974 return ERR_PTR(-EINVAL);
975 }
976 }
Steve Wisec6d7b262010-09-13 11:23:57 -0500977
Steve Wise2f25e9a2011-05-09 22:06:23 -0700978 PDBG(KERN_INFO MOD "ocq memory: "
Steve Wisec6d7b262010-09-13 11:23:57 -0500979 "hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
980 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
981 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
982
Steve Wisecfdda9d2010-04-21 15:30:06 -0700983 ret = c4iw_rdev_open(&devp->rdev);
984 if (ret) {
Steve Wisecfdda9d2010-04-21 15:30:06 -0700985 printk(KERN_ERR MOD "Unable to open CXIO rdev err %d\n", ret);
986 ib_dealloc_device(&devp->ibdev);
Steve Wisebbe9a0a2011-05-09 22:06:22 -0700987 return ERR_PTR(ret);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700988 }
989
990 idr_init(&devp->cqidr);
991 idr_init(&devp->qpidr);
992 idr_init(&devp->mmidr);
Vipul Pandya793dad92012-12-10 09:30:56 +0000993 idr_init(&devp->hwtid_idr);
994 idr_init(&devp->stid_idr);
995 idr_init(&devp->atid_idr);
Steve Wisecfdda9d2010-04-21 15:30:06 -0700996 spin_lock_init(&devp->lock);
Vipul Pandya8d81ef32012-05-18 15:29:27 +0530997 mutex_init(&devp->rdev.stats.lock);
Vipul Pandya2c974782012-05-18 15:29:28 +0530998 mutex_init(&devp->db_mutex);
Steve Wise05eb2382014-03-14 21:52:08 +0530999 INIT_LIST_HEAD(&devp->db_fc_list);
Hariprasad Shenai4c2c5762014-07-14 21:34:52 +05301000 devp->avail_ird = devp->rdev.lldi.max_ird_adapter;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001001
Steve Wisecfdda9d2010-04-21 15:30:06 -07001002 if (c4iw_debugfs_root) {
1003 devp->debugfs_root = debugfs_create_dir(
1004 pci_name(devp->rdev.lldi.pdev),
1005 c4iw_debugfs_root);
1006 setup_debugfs(devp);
1007 }
Steve Wise9eccfe12014-03-26 17:08:09 -05001008
1009 ret = iwpm_init(RDMA_NL_C4IW);
1010 if (ret) {
1011 pr_err("port mapper initialization failed with %d\n", ret);
1012 ib_dealloc_device(&devp->ibdev);
1013 return ERR_PTR(ret);
1014 }
1015
Steve Wisecfdda9d2010-04-21 15:30:06 -07001016 return devp;
1017}
1018
1019static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
1020{
Steve Wise2f25e9a2011-05-09 22:06:23 -07001021 struct uld_ctx *ctx;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001022 static int vers_printed;
1023 int i;
1024
1025 if (!vers_printed++)
Vipul Pandyaf079af72013-03-14 05:08:58 +00001026 pr_info("Chelsio T4/T5 RDMA Driver - version %s\n",
1027 DRV_VERSION);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001028
Steve Wise2f25e9a2011-05-09 22:06:23 -07001029 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1030 if (!ctx) {
1031 ctx = ERR_PTR(-ENOMEM);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001032 goto out;
Steve Wise2f25e9a2011-05-09 22:06:23 -07001033 }
1034 ctx->lldi = *infop;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001035
1036 PDBG("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -07001037 __func__, pci_name(ctx->lldi.pdev),
1038 ctx->lldi.nchan, ctx->lldi.nrxq,
1039 ctx->lldi.ntxq, ctx->lldi.nports);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001040
Steve Wise2f25e9a2011-05-09 22:06:23 -07001041 mutex_lock(&dev_mutex);
1042 list_add_tail(&ctx->entry, &uld_ctx_list);
1043 mutex_unlock(&dev_mutex);
1044
1045 for (i = 0; i < ctx->lldi.nrxq; i++)
1046 PDBG("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001047out:
Steve Wise2f25e9a2011-05-09 22:06:23 -07001048 return ctx;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001049}
1050
Vipul Pandya1cab7752012-12-10 09:30:55 +00001051static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
1052 const __be64 *rsp,
1053 u32 pktshift)
1054{
1055 struct sk_buff *skb;
1056
1057 /*
1058 * Allocate space for cpl_pass_accept_req which will be synthesized by
1059 * driver. Once the driver synthesizes the request the skb will go
1060 * through the regular cpl_pass_accept_req processing.
1061 * The math here assumes sizeof cpl_pass_accept_req >= sizeof
1062 * cpl_rx_pkt.
1063 */
1064 skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1065 sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
1066 if (unlikely(!skb))
1067 return NULL;
1068
1069 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1070 sizeof(struct rss_header) - pktshift);
1071
1072 /*
1073 * This skb will contain:
1074 * rss_header from the rspq descriptor (1 flit)
1075 * cpl_rx_pkt struct from the rspq descriptor (2 flits)
1076 * space for the difference between the size of an
1077 * rx_pkt and pass_accept_req cpl (1 flit)
1078 * the packet data from the gl
1079 */
1080 skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
1081 sizeof(struct rss_header));
1082 skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
1083 sizeof(struct cpl_pass_accept_req),
1084 gl->va + pktshift,
1085 gl->tot_len - pktshift);
1086 return skb;
1087}
1088
1089static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
1090 const __be64 *rsp)
1091{
1092 unsigned int opcode = *(u8 *)rsp;
1093 struct sk_buff *skb;
1094
1095 if (opcode != CPL_RX_PKT)
1096 goto out;
1097
1098 skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
1099 if (skb == NULL)
1100 goto out;
1101
1102 if (c4iw_handlers[opcode] == NULL) {
1103 pr_info("%s no handler opcode 0x%x...\n", __func__,
1104 opcode);
1105 kfree_skb(skb);
1106 goto out;
1107 }
1108 c4iw_handlers[opcode](dev, skb);
1109 return 1;
1110out:
1111 return 0;
1112}
1113
Steve Wisecfdda9d2010-04-21 15:30:06 -07001114static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
1115 const struct pkt_gl *gl)
1116{
Steve Wise2f25e9a2011-05-09 22:06:23 -07001117 struct uld_ctx *ctx = handle;
1118 struct c4iw_dev *dev = ctx->dev;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001119 struct sk_buff *skb;
Vipul Pandya1cab7752012-12-10 09:30:55 +00001120 u8 opcode;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001121
1122 if (gl == NULL) {
1123 /* omit RSS and rsp_ctrl at end of descriptor */
1124 unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
1125
1126 skb = alloc_skb(256, GFP_ATOMIC);
1127 if (!skb)
1128 goto nomem;
1129 __skb_put(skb, len);
1130 skb_copy_to_linear_data(skb, &rsp[1], len);
1131 } else if (gl == CXGB4_MSG_AN) {
1132 const struct rsp_ctrl *rc = (void *)rsp;
1133
1134 u32 qid = be32_to_cpu(rc->pldbuflen_qid);
1135 c4iw_ev_handler(dev, qid);
1136 return 0;
Vipul Pandya1cab7752012-12-10 09:30:55 +00001137 } else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
1138 if (recv_rx_pkt(dev, gl, rsp))
1139 return 0;
1140
1141 pr_info("%s: unexpected FL contents at %p, " \
1142 "RSS %#llx, FL %#llx, len %u\n",
1143 pci_name(ctx->lldi.pdev), gl->va,
1144 (unsigned long long)be64_to_cpu(*rsp),
Vipul Pandyaef5d6352013-01-07 13:12:00 +00001145 (unsigned long long)be64_to_cpu(
1146 *(__force __be64 *)gl->va),
Vipul Pandya1cab7752012-12-10 09:30:55 +00001147 gl->tot_len);
1148
1149 return 0;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001150 } else {
Steve Wiseda411ba2010-10-18 15:16:45 +00001151 skb = cxgb4_pktgl_to_skb(gl, 128, 128);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001152 if (unlikely(!skb))
1153 goto nomem;
1154 }
1155
Vipul Pandya1cab7752012-12-10 09:30:55 +00001156 opcode = *(u8 *)rsp;
Steve Wisedbb084c2014-03-21 20:40:30 +05301157 if (c4iw_handlers[opcode]) {
Steve Wisecfdda9d2010-04-21 15:30:06 -07001158 c4iw_handlers[opcode](dev, skb);
Steve Wisedbb084c2014-03-21 20:40:30 +05301159 } else {
Vipul Pandya1cab7752012-12-10 09:30:55 +00001160 pr_info("%s no handler opcode 0x%x...\n", __func__,
Steve Wisecfdda9d2010-04-21 15:30:06 -07001161 opcode);
Steve Wisedbb084c2014-03-21 20:40:30 +05301162 kfree_skb(skb);
1163 }
Steve Wisecfdda9d2010-04-21 15:30:06 -07001164
1165 return 0;
1166nomem:
1167 return -1;
1168}
1169
1170static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
1171{
Steve Wise2f25e9a2011-05-09 22:06:23 -07001172 struct uld_ctx *ctx = handle;
Steve Wise1c01c532010-05-20 16:57:32 -05001173
Steve Wisecfdda9d2010-04-21 15:30:06 -07001174 PDBG("%s new_state %u\n", __func__, new_state);
Steve Wise1c01c532010-05-20 16:57:32 -05001175 switch (new_state) {
1176 case CXGB4_STATE_UP:
Steve Wise2f25e9a2011-05-09 22:06:23 -07001177 printk(KERN_INFO MOD "%s: Up\n", pci_name(ctx->lldi.pdev));
1178 if (!ctx->dev) {
Steve Wise9efe10a2011-10-06 09:32:44 -07001179 int ret;
Steve Wise2f25e9a2011-05-09 22:06:23 -07001180
1181 ctx->dev = c4iw_alloc(&ctx->lldi);
Steve Wise9efe10a2011-10-06 09:32:44 -07001182 if (IS_ERR(ctx->dev)) {
1183 printk(KERN_ERR MOD
1184 "%s: initialization failed: %ld\n",
1185 pci_name(ctx->lldi.pdev),
1186 PTR_ERR(ctx->dev));
1187 ctx->dev = NULL;
1188 break;
1189 }
1190 ret = c4iw_register_device(ctx->dev);
1191 if (ret) {
Steve Wise1c01c532010-05-20 16:57:32 -05001192 printk(KERN_ERR MOD
1193 "%s: RDMA registration failed: %d\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -07001194 pci_name(ctx->lldi.pdev), ret);
Steve Wise9efe10a2011-10-06 09:32:44 -07001195 c4iw_dealloc(ctx);
1196 }
Steve Wise1c01c532010-05-20 16:57:32 -05001197 }
1198 break;
1199 case CXGB4_STATE_DOWN:
1200 printk(KERN_INFO MOD "%s: Down\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -07001201 pci_name(ctx->lldi.pdev));
1202 if (ctx->dev)
1203 c4iw_remove(ctx);
Steve Wise1c01c532010-05-20 16:57:32 -05001204 break;
1205 case CXGB4_STATE_START_RECOVERY:
1206 printk(KERN_INFO MOD "%s: Fatal Error\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -07001207 pci_name(ctx->lldi.pdev));
1208 if (ctx->dev) {
Steve Wise767fbe82011-03-11 22:30:53 +00001209 struct ib_event event;
1210
Steve Wise2f25e9a2011-05-09 22:06:23 -07001211 ctx->dev->rdev.flags |= T4_FATAL_ERROR;
Steve Wise767fbe82011-03-11 22:30:53 +00001212 memset(&event, 0, sizeof event);
1213 event.event = IB_EVENT_DEVICE_FATAL;
Steve Wise2f25e9a2011-05-09 22:06:23 -07001214 event.device = &ctx->dev->ibdev;
Steve Wise767fbe82011-03-11 22:30:53 +00001215 ib_dispatch_event(&event);
Steve Wise2f25e9a2011-05-09 22:06:23 -07001216 c4iw_remove(ctx);
Steve Wise767fbe82011-03-11 22:30:53 +00001217 }
Steve Wise1c01c532010-05-20 16:57:32 -05001218 break;
1219 case CXGB4_STATE_DETACH:
1220 printk(KERN_INFO MOD "%s: Detach\n",
Steve Wise2f25e9a2011-05-09 22:06:23 -07001221 pci_name(ctx->lldi.pdev));
1222 if (ctx->dev)
1223 c4iw_remove(ctx);
Steve Wise1c01c532010-05-20 16:57:32 -05001224 break;
1225 }
Steve Wisecfdda9d2010-04-21 15:30:06 -07001226 return 0;
1227}
1228
Vipul Pandya2c974782012-05-18 15:29:28 +05301229static int disable_qp_db(int id, void *p, void *data)
1230{
1231 struct c4iw_qp *qp = p;
1232
1233 t4_disable_wq_db(&qp->wq);
1234 return 0;
1235}
1236
1237static void stop_queues(struct uld_ctx *ctx)
1238{
Steve Wise05eb2382014-03-14 21:52:08 +05301239 unsigned long flags;
1240
1241 spin_lock_irqsave(&ctx->dev->lock, flags);
1242 ctx->dev->rdev.stats.db_state_transitions++;
1243 ctx->dev->db_state = STOPPED;
1244 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED)
Vipul Pandya422eea02012-05-18 15:29:30 +05301245 idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
Steve Wise05eb2382014-03-14 21:52:08 +05301246 else
1247 ctx->dev->rdev.status_page->db_off = 1;
1248 spin_unlock_irqrestore(&ctx->dev->lock, flags);
Vipul Pandya2c974782012-05-18 15:29:28 +05301249}
1250
1251static int enable_qp_db(int id, void *p, void *data)
1252{
1253 struct c4iw_qp *qp = p;
1254
1255 t4_enable_wq_db(&qp->wq);
1256 return 0;
1257}
1258
Steve Wise05eb2382014-03-14 21:52:08 +05301259static void resume_rc_qp(struct c4iw_qp *qp)
1260{
1261 spin_lock(&qp->lock);
Steve Wisefa658a92014-04-09 09:38:25 -05001262 t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc,
1263 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
Steve Wise05eb2382014-03-14 21:52:08 +05301264 qp->wq.sq.wq_pidx_inc = 0;
Steve Wisefa658a92014-04-09 09:38:25 -05001265 t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc,
1266 is_t5(qp->rhp->rdev.lldi.adapter_type), NULL);
Steve Wise05eb2382014-03-14 21:52:08 +05301267 qp->wq.rq.wq_pidx_inc = 0;
1268 spin_unlock(&qp->lock);
1269}
1270
1271static void resume_a_chunk(struct uld_ctx *ctx)
1272{
1273 int i;
1274 struct c4iw_qp *qp;
1275
1276 for (i = 0; i < DB_FC_RESUME_SIZE; i++) {
1277 qp = list_first_entry(&ctx->dev->db_fc_list, struct c4iw_qp,
1278 db_fc_entry);
1279 list_del_init(&qp->db_fc_entry);
1280 resume_rc_qp(qp);
1281 if (list_empty(&ctx->dev->db_fc_list))
1282 break;
1283 }
1284}
1285
Vipul Pandya2c974782012-05-18 15:29:28 +05301286static void resume_queues(struct uld_ctx *ctx)
1287{
1288 spin_lock_irq(&ctx->dev->lock);
Steve Wise05eb2382014-03-14 21:52:08 +05301289 if (ctx->dev->db_state != STOPPED)
1290 goto out;
1291 ctx->dev->db_state = FLOW_CONTROL;
1292 while (1) {
1293 if (list_empty(&ctx->dev->db_fc_list)) {
1294 WARN_ON(ctx->dev->db_state != FLOW_CONTROL);
1295 ctx->dev->db_state = NORMAL;
1296 ctx->dev->rdev.stats.db_state_transitions++;
1297 if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) {
1298 idr_for_each(&ctx->dev->qpidr, enable_qp_db,
1299 NULL);
1300 } else {
1301 ctx->dev->rdev.status_page->db_off = 0;
1302 }
1303 break;
1304 } else {
1305 if (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1)
1306 < (ctx->dev->rdev.lldi.dbfifo_int_thresh <<
1307 DB_FC_DRAIN_THRESH)) {
1308 resume_a_chunk(ctx);
1309 }
1310 if (!list_empty(&ctx->dev->db_fc_list)) {
1311 spin_unlock_irq(&ctx->dev->lock);
1312 if (DB_FC_RESUME_DELAY) {
1313 set_current_state(TASK_UNINTERRUPTIBLE);
1314 schedule_timeout(DB_FC_RESUME_DELAY);
1315 }
1316 spin_lock_irq(&ctx->dev->lock);
1317 if (ctx->dev->db_state != FLOW_CONTROL)
1318 break;
1319 }
1320 }
Vipul Pandya422eea02012-05-18 15:29:30 +05301321 }
Steve Wise05eb2382014-03-14 21:52:08 +05301322out:
1323 if (ctx->dev->db_state != NORMAL)
1324 ctx->dev->rdev.stats.db_fc_interruptions++;
Vipul Pandya2c974782012-05-18 15:29:28 +05301325 spin_unlock_irq(&ctx->dev->lock);
1326}
1327
Vipul Pandya422eea02012-05-18 15:29:30 +05301328struct qp_list {
1329 unsigned idx;
1330 struct c4iw_qp **qps;
1331};
1332
1333static int add_and_ref_qp(int id, void *p, void *data)
1334{
1335 struct qp_list *qp_listp = data;
1336 struct c4iw_qp *qp = p;
1337
1338 c4iw_qp_add_ref(&qp->ibqp);
1339 qp_listp->qps[qp_listp->idx++] = qp;
1340 return 0;
1341}
1342
1343static int count_qps(int id, void *p, void *data)
1344{
1345 unsigned *countp = data;
1346 (*countp)++;
1347 return 0;
1348}
1349
Steve Wise05eb2382014-03-14 21:52:08 +05301350static void deref_qps(struct qp_list *qp_list)
Vipul Pandya422eea02012-05-18 15:29:30 +05301351{
1352 int idx;
1353
Steve Wise05eb2382014-03-14 21:52:08 +05301354 for (idx = 0; idx < qp_list->idx; idx++)
1355 c4iw_qp_rem_ref(&qp_list->qps[idx]->ibqp);
Vipul Pandya422eea02012-05-18 15:29:30 +05301356}
1357
1358static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
1359{
1360 int idx;
1361 int ret;
1362
1363 for (idx = 0; idx < qp_list->idx; idx++) {
1364 struct c4iw_qp *qp = qp_list->qps[idx];
1365
Steve Wise05eb2382014-03-14 21:52:08 +05301366 spin_lock_irq(&qp->rhp->lock);
1367 spin_lock(&qp->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301368 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1369 qp->wq.sq.qid,
1370 t4_sq_host_wq_pidx(&qp->wq),
1371 t4_sq_wq_size(&qp->wq));
1372 if (ret) {
Steve Wise05eb2382014-03-14 21:52:08 +05301373 pr_err(KERN_ERR MOD "%s: Fatal error - "
Vipul Pandya422eea02012-05-18 15:29:30 +05301374 "DB overflow recovery failed - "
1375 "error syncing SQ qid %u\n",
1376 pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
Steve Wise05eb2382014-03-14 21:52:08 +05301377 spin_unlock(&qp->lock);
1378 spin_unlock_irq(&qp->rhp->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301379 return;
1380 }
Steve Wise05eb2382014-03-14 21:52:08 +05301381 qp->wq.sq.wq_pidx_inc = 0;
Vipul Pandya422eea02012-05-18 15:29:30 +05301382
1383 ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1384 qp->wq.rq.qid,
1385 t4_rq_host_wq_pidx(&qp->wq),
1386 t4_rq_wq_size(&qp->wq));
1387
1388 if (ret) {
Steve Wise05eb2382014-03-14 21:52:08 +05301389 pr_err(KERN_ERR MOD "%s: Fatal error - "
Vipul Pandya422eea02012-05-18 15:29:30 +05301390 "DB overflow recovery failed - "
1391 "error syncing RQ qid %u\n",
1392 pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
Steve Wise05eb2382014-03-14 21:52:08 +05301393 spin_unlock(&qp->lock);
1394 spin_unlock_irq(&qp->rhp->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301395 return;
1396 }
Steve Wise05eb2382014-03-14 21:52:08 +05301397 qp->wq.rq.wq_pidx_inc = 0;
1398 spin_unlock(&qp->lock);
1399 spin_unlock_irq(&qp->rhp->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301400
1401 /* Wait for the dbfifo to drain */
1402 while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
1403 set_current_state(TASK_UNINTERRUPTIBLE);
1404 schedule_timeout(usecs_to_jiffies(10));
1405 }
1406 }
1407}
1408
1409static void recover_queues(struct uld_ctx *ctx)
1410{
1411 int count = 0;
1412 struct qp_list qp_list;
1413 int ret;
1414
Vipul Pandya422eea02012-05-18 15:29:30 +05301415 /* slow everybody down */
1416 set_current_state(TASK_UNINTERRUPTIBLE);
1417 schedule_timeout(usecs_to_jiffies(1000));
1418
Vipul Pandya422eea02012-05-18 15:29:30 +05301419 /* flush the SGE contexts */
1420 ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
1421 if (ret) {
1422 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1423 pci_name(ctx->lldi.pdev));
Steve Wise05eb2382014-03-14 21:52:08 +05301424 return;
Vipul Pandya422eea02012-05-18 15:29:30 +05301425 }
1426
1427 /* Count active queues so we can build a list of queues to recover */
1428 spin_lock_irq(&ctx->dev->lock);
Steve Wise05eb2382014-03-14 21:52:08 +05301429 WARN_ON(ctx->dev->db_state != STOPPED);
1430 ctx->dev->db_state = RECOVERY;
Vipul Pandya422eea02012-05-18 15:29:30 +05301431 idr_for_each(&ctx->dev->qpidr, count_qps, &count);
1432
1433 qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
1434 if (!qp_list.qps) {
1435 printk(KERN_ERR MOD "%s: Fatal error - DB overflow recovery failed\n",
1436 pci_name(ctx->lldi.pdev));
1437 spin_unlock_irq(&ctx->dev->lock);
Steve Wise05eb2382014-03-14 21:52:08 +05301438 return;
Vipul Pandya422eea02012-05-18 15:29:30 +05301439 }
1440 qp_list.idx = 0;
1441
1442 /* add and ref each qp so it doesn't get freed */
1443 idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
1444
1445 spin_unlock_irq(&ctx->dev->lock);
1446
1447 /* now traverse the list in a safe context to recover the db state*/
1448 recover_lost_dbs(ctx, &qp_list);
1449
1450 /* we're almost done! deref the qps and clean up */
Steve Wise05eb2382014-03-14 21:52:08 +05301451 deref_qps(&qp_list);
Vipul Pandya422eea02012-05-18 15:29:30 +05301452 kfree(qp_list.qps);
1453
Vipul Pandya422eea02012-05-18 15:29:30 +05301454 spin_lock_irq(&ctx->dev->lock);
Steve Wise05eb2382014-03-14 21:52:08 +05301455 WARN_ON(ctx->dev->db_state != RECOVERY);
1456 ctx->dev->db_state = STOPPED;
Vipul Pandya422eea02012-05-18 15:29:30 +05301457 spin_unlock_irq(&ctx->dev->lock);
Vipul Pandya422eea02012-05-18 15:29:30 +05301458}
1459
Vipul Pandya2c974782012-05-18 15:29:28 +05301460static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
1461{
1462 struct uld_ctx *ctx = handle;
1463
1464 switch (control) {
1465 case CXGB4_CONTROL_DB_FULL:
1466 stop_queues(ctx);
Vipul Pandya2c974782012-05-18 15:29:28 +05301467 ctx->dev->rdev.stats.db_full++;
Vipul Pandya2c974782012-05-18 15:29:28 +05301468 break;
1469 case CXGB4_CONTROL_DB_EMPTY:
1470 resume_queues(ctx);
1471 mutex_lock(&ctx->dev->rdev.stats.lock);
1472 ctx->dev->rdev.stats.db_empty++;
1473 mutex_unlock(&ctx->dev->rdev.stats.lock);
1474 break;
1475 case CXGB4_CONTROL_DB_DROP:
Vipul Pandya422eea02012-05-18 15:29:30 +05301476 recover_queues(ctx);
Vipul Pandya2c974782012-05-18 15:29:28 +05301477 mutex_lock(&ctx->dev->rdev.stats.lock);
1478 ctx->dev->rdev.stats.db_drop++;
1479 mutex_unlock(&ctx->dev->rdev.stats.lock);
1480 break;
1481 default:
1482 printk(KERN_WARNING MOD "%s: unknown control cmd %u\n",
1483 pci_name(ctx->lldi.pdev), control);
1484 break;
1485 }
1486 return 0;
1487}
1488
Steve Wisecfdda9d2010-04-21 15:30:06 -07001489static struct cxgb4_uld_info c4iw_uld_info = {
1490 .name = DRV_NAME,
1491 .add = c4iw_uld_add,
1492 .rx_handler = c4iw_uld_rx_handler,
1493 .state_change = c4iw_uld_state_change,
Vipul Pandya2c974782012-05-18 15:29:28 +05301494 .control = c4iw_uld_control,
Steve Wisecfdda9d2010-04-21 15:30:06 -07001495};
1496
1497static int __init c4iw_init_module(void)
1498{
1499 int err;
1500
1501 err = c4iw_cm_init();
1502 if (err)
1503 return err;
1504
1505 c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
1506 if (!c4iw_debugfs_root)
1507 printk(KERN_WARNING MOD
1508 "could not create debugfs entry, continuing\n");
1509
Steve Wise9eccfe12014-03-26 17:08:09 -05001510 if (ibnl_add_client(RDMA_NL_C4IW, RDMA_NL_IWPM_NUM_OPS,
1511 c4iw_nl_cb_table))
1512 pr_err("%s[%u]: Failed to add netlink callback\n"
1513 , __func__, __LINE__);
1514
Steve Wisecfdda9d2010-04-21 15:30:06 -07001515 cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
1516
1517 return 0;
1518}
1519
1520static void __exit c4iw_exit_module(void)
1521{
Steve Wise2f25e9a2011-05-09 22:06:23 -07001522 struct uld_ctx *ctx, *tmp;
Steve Wisecfdda9d2010-04-21 15:30:06 -07001523
Steve Wisecfdda9d2010-04-21 15:30:06 -07001524 mutex_lock(&dev_mutex);
Steve Wise2f25e9a2011-05-09 22:06:23 -07001525 list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
1526 if (ctx->dev)
1527 c4iw_remove(ctx);
1528 kfree(ctx);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001529 }
1530 mutex_unlock(&dev_mutex);
Steve Wisefd388ce2010-05-20 16:57:27 -05001531 cxgb4_unregister_uld(CXGB4_ULD_RDMA);
Steve Wise9eccfe12014-03-26 17:08:09 -05001532 ibnl_remove_client(RDMA_NL_C4IW);
Steve Wisecfdda9d2010-04-21 15:30:06 -07001533 c4iw_cm_term();
1534 debugfs_remove_recursive(c4iw_debugfs_root);
1535}
1536
1537module_init(c4iw_init_module);
1538module_exit(c4iw_exit_module);