Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Implementation of primary alsa driver code base for Intel HD Audio. |
| 4 | * |
| 5 | * Copyright(c) 2004 Intel Corporation. All rights reserved. |
| 6 | * |
| 7 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> |
| 8 | * PeiSen Hou <pshou@realtek.com.tw> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the Free |
| 12 | * Software Foundation; either version 2 of the License, or (at your option) |
| 13 | * any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 16 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 18 | * more details. |
| 19 | * |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | #include <linux/clocksource.h> |
| 24 | #include <linux/delay.h> |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 25 | #include <linux/interrupt.h> |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 26 | #include <linux/kernel.h> |
| 27 | #include <linux/module.h> |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 28 | #include <linux/pm_runtime.h> |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 29 | #include <linux/slab.h> |
| 30 | #include <sound/core.h> |
| 31 | #include <sound/initval.h> |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 32 | #include "hda_controller.h" |
| 33 | |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 34 | /* DSP lock helpers */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 35 | #define dsp_lock(dev) snd_hdac_dsp_lock(azx_stream(dev)) |
| 36 | #define dsp_unlock(dev) snd_hdac_dsp_unlock(azx_stream(dev)) |
| 37 | #define dsp_is_locked(dev) snd_hdac_stream_is_locked(azx_stream(dev)) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 38 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 39 | /* |
| 40 | * AZX stream operations. |
| 41 | */ |
| 42 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 43 | /* |
| 44 | * set up the SD for streaming |
| 45 | */ |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 46 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 47 | { |
| 48 | unsigned int val; |
| 49 | /* make sure the run bit is zero for SD */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 50 | snd_hdac_stream_clear(azx_stream(azx_dev)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 51 | /* program the stream_tag */ |
| 52 | val = azx_sd_readl(chip, azx_dev, SD_CTL); |
| 53 | val = (val & ~SD_CTL_STREAM_TAG_MASK) | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 54 | (azx_dev->core.stream_tag << SD_CTL_STREAM_TAG_SHIFT); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 55 | if (!azx_snoop(chip)) |
| 56 | val |= SD_CTL_TRAFFIC_PRIO; |
| 57 | azx_sd_writel(chip, azx_dev, SD_CTL, val); |
| 58 | |
| 59 | /* program the length of samples in cyclic buffer */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 60 | azx_sd_writel(chip, azx_dev, SD_CBL, azx_dev->core.bufsize); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 61 | |
| 62 | /* program the stream format */ |
| 63 | /* this value needs to be the same as the one programmed */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 64 | azx_sd_writew(chip, azx_dev, SD_FORMAT, azx_dev->core.format_val); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 65 | |
| 66 | /* program the stream LVI (last valid index) of the BDL */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 67 | azx_sd_writew(chip, azx_dev, SD_LVI, azx_dev->core.frags - 1); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 68 | |
| 69 | /* program the BDL address */ |
| 70 | /* lower BDL address */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 71 | azx_sd_writel(chip, azx_dev, SD_BDLPL, (u32)azx_dev->core.bdl.addr); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 72 | /* upper BDL address */ |
| 73 | azx_sd_writel(chip, azx_dev, SD_BDLPU, |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 74 | upper_32_bits(azx_dev->core.bdl.addr)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 75 | |
| 76 | /* enable the position buffer */ |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 77 | if (chip->get_position[0] != azx_get_pos_lpib || |
| 78 | chip->get_position[1] != azx_get_pos_lpib) { |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 79 | if (!(azx_readl(chip, DPLBASE) & AZX_DPLBASE_ENABLE)) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 80 | azx_writel(chip, DPLBASE, |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 81 | (u32)chip->posbuf.addr | AZX_DPLBASE_ENABLE); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | /* set the interrupt enable bits in the descriptor control register */ |
| 85 | azx_sd_writel(chip, azx_dev, SD_CTL, |
| 86 | azx_sd_readl(chip, azx_dev, SD_CTL) | SD_INT_MASK); |
| 87 | |
| 88 | return 0; |
| 89 | } |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 90 | |
| 91 | /* assign a stream for the PCM */ |
| 92 | static inline struct azx_dev * |
| 93 | azx_assign_device(struct azx *chip, struct snd_pcm_substream *substream) |
| 94 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 95 | struct hdac_stream *s; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 96 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 97 | s = snd_hdac_stream_assign(azx_bus(chip), substream); |
| 98 | if (!s) |
| 99 | return NULL; |
| 100 | return stream_to_azx_dev(s); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | /* release the assigned stream */ |
| 104 | static inline void azx_release_device(struct azx_dev *azx_dev) |
| 105 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 106 | snd_hdac_stream_release(azx_stream(azx_dev)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | static cycle_t azx_cc_read(const struct cyclecounter *cc) |
| 110 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 111 | struct azx_dev *azx_dev = container_of(cc, struct azx_dev, core.cc); |
| 112 | struct snd_pcm_substream *substream = azx_dev->core.substream; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 113 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 114 | struct azx *chip = apcm->chip; |
| 115 | |
| 116 | return azx_readl(chip, WALLCLK); |
| 117 | } |
| 118 | |
| 119 | static void azx_timecounter_init(struct snd_pcm_substream *substream, |
| 120 | bool force, cycle_t last) |
| 121 | { |
| 122 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 123 | struct timecounter *tc = &azx_dev->core.tc; |
| 124 | struct cyclecounter *cc = &azx_dev->core.cc; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 125 | u64 nsec; |
| 126 | |
| 127 | cc->read = azx_cc_read; |
| 128 | cc->mask = CLOCKSOURCE_MASK(32); |
| 129 | |
| 130 | /* |
| 131 | * Converting from 24 MHz to ns means applying a 125/3 factor. |
| 132 | * To avoid any saturation issues in intermediate operations, |
| 133 | * the 125 factor is applied first. The division is applied |
| 134 | * last after reading the timecounter value. |
| 135 | * Applying the 1/3 factor as part of the multiplication |
| 136 | * requires at least 20 bits for a decent precision, however |
| 137 | * overflows occur after about 4 hours or less, not a option. |
| 138 | */ |
| 139 | |
| 140 | cc->mult = 125; /* saturation after 195 years */ |
| 141 | cc->shift = 0; |
| 142 | |
| 143 | nsec = 0; /* audio time is elapsed time since trigger */ |
| 144 | timecounter_init(tc, cc, nsec); |
| 145 | if (force) |
| 146 | /* |
| 147 | * force timecounter to use predefined value, |
| 148 | * used for synchronized starts |
| 149 | */ |
| 150 | tc->cycle_last = last; |
| 151 | } |
| 152 | |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 153 | static inline struct hda_pcm_stream * |
| 154 | to_hda_pcm_stream(struct snd_pcm_substream *substream) |
| 155 | { |
| 156 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 157 | return &apcm->info->stream[substream->stream]; |
| 158 | } |
| 159 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 160 | static u64 azx_adjust_codec_delay(struct snd_pcm_substream *substream, |
| 161 | u64 nsec) |
| 162 | { |
| 163 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 164 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 165 | u64 codec_frames, codec_nsecs; |
| 166 | |
| 167 | if (!hinfo->ops.get_delay) |
| 168 | return nsec; |
| 169 | |
| 170 | codec_frames = hinfo->ops.get_delay(hinfo, apcm->codec, substream); |
| 171 | codec_nsecs = div_u64(codec_frames * 1000000000LL, |
| 172 | substream->runtime->rate); |
| 173 | |
| 174 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) |
| 175 | return nsec + codec_nsecs; |
| 176 | |
| 177 | return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0; |
| 178 | } |
| 179 | |
| 180 | /* |
| 181 | * set up a BDL entry |
| 182 | */ |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 183 | static int setup_bdle(struct azx *chip, |
| 184 | struct snd_dma_buffer *dmab, |
| 185 | struct azx_dev *azx_dev, u32 **bdlp, |
| 186 | int ofs, int size, int with_ioc) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 187 | { |
| 188 | u32 *bdl = *bdlp; |
| 189 | |
| 190 | while (size > 0) { |
| 191 | dma_addr_t addr; |
| 192 | int chunk; |
| 193 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 194 | if (azx_dev->core.frags >= AZX_MAX_BDL_ENTRIES) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 195 | return -EINVAL; |
| 196 | |
| 197 | addr = snd_sgbuf_get_addr(dmab, ofs); |
| 198 | /* program the address field of the BDL entry */ |
| 199 | bdl[0] = cpu_to_le32((u32)addr); |
| 200 | bdl[1] = cpu_to_le32(upper_32_bits(addr)); |
| 201 | /* program the size field of the BDL entry */ |
| 202 | chunk = snd_sgbuf_get_chunk_size(dmab, ofs, size); |
| 203 | /* one BDLE cannot cross 4K boundary on CTHDA chips */ |
| 204 | if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY) { |
| 205 | u32 remain = 0x1000 - (ofs & 0xfff); |
| 206 | if (chunk > remain) |
| 207 | chunk = remain; |
| 208 | } |
| 209 | bdl[2] = cpu_to_le32(chunk); |
| 210 | /* program the IOC to enable interrupt |
| 211 | * only when the whole fragment is processed |
| 212 | */ |
| 213 | size -= chunk; |
| 214 | bdl[3] = (size || !with_ioc) ? 0 : cpu_to_le32(0x01); |
| 215 | bdl += 4; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 216 | azx_dev->core.frags++; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 217 | ofs += chunk; |
| 218 | } |
| 219 | *bdlp = bdl; |
| 220 | return ofs; |
| 221 | } |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 222 | |
| 223 | /* |
| 224 | * set up BDL entries |
| 225 | */ |
| 226 | static int azx_setup_periods(struct azx *chip, |
| 227 | struct snd_pcm_substream *substream, |
| 228 | struct azx_dev *azx_dev) |
| 229 | { |
| 230 | u32 *bdl; |
| 231 | int i, ofs, periods, period_bytes; |
| 232 | int pos_adj = 0; |
| 233 | |
| 234 | /* reset BDL address */ |
| 235 | azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); |
| 236 | azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); |
| 237 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 238 | period_bytes = azx_dev->core.period_bytes; |
| 239 | periods = azx_dev->core.bufsize / period_bytes; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 240 | |
| 241 | /* program the initial BDL entries */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 242 | bdl = (u32 *)azx_dev->core.bdl.area; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 243 | ofs = 0; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 244 | azx_dev->core.frags = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 245 | |
| 246 | if (chip->bdl_pos_adj) |
| 247 | pos_adj = chip->bdl_pos_adj[chip->dev_index]; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 248 | if (!azx_dev->core.no_period_wakeup && pos_adj > 0) { |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 249 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 250 | int pos_align = pos_adj; |
| 251 | pos_adj = (pos_adj * runtime->rate + 47999) / 48000; |
| 252 | if (!pos_adj) |
| 253 | pos_adj = pos_align; |
| 254 | else |
| 255 | pos_adj = ((pos_adj + pos_align - 1) / pos_align) * |
| 256 | pos_align; |
| 257 | pos_adj = frames_to_bytes(runtime, pos_adj); |
| 258 | if (pos_adj >= period_bytes) { |
| 259 | dev_warn(chip->card->dev,"Too big adjustment %d\n", |
| 260 | pos_adj); |
| 261 | pos_adj = 0; |
| 262 | } else { |
| 263 | ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), |
| 264 | azx_dev, |
| 265 | &bdl, ofs, pos_adj, true); |
| 266 | if (ofs < 0) |
| 267 | goto error; |
| 268 | } |
| 269 | } else |
| 270 | pos_adj = 0; |
| 271 | |
| 272 | for (i = 0; i < periods; i++) { |
| 273 | if (i == periods - 1 && pos_adj) |
| 274 | ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), |
| 275 | azx_dev, &bdl, ofs, |
| 276 | period_bytes - pos_adj, 0); |
| 277 | else |
| 278 | ofs = setup_bdle(chip, snd_pcm_get_dma_buf(substream), |
| 279 | azx_dev, &bdl, ofs, |
| 280 | period_bytes, |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 281 | !azx_dev->core.no_period_wakeup); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 282 | if (ofs < 0) |
| 283 | goto error; |
| 284 | } |
| 285 | return 0; |
| 286 | |
| 287 | error: |
| 288 | dev_err(chip->card->dev, "Too many BDL entries: buffer=%d, period=%d\n", |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 289 | azx_dev->core.bufsize, period_bytes); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 290 | return -EINVAL; |
| 291 | } |
| 292 | |
| 293 | /* |
| 294 | * PCM ops |
| 295 | */ |
| 296 | |
| 297 | static int azx_pcm_close(struct snd_pcm_substream *substream) |
| 298 | { |
| 299 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 300 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 301 | struct azx *chip = apcm->chip; |
| 302 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 303 | unsigned long flags; |
| 304 | |
| 305 | mutex_lock(&chip->open_mutex); |
| 306 | spin_lock_irqsave(&chip->reg_lock, flags); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 307 | azx_dev->core.substream = NULL; |
| 308 | azx_dev->core.running = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 309 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 310 | azx_release_device(azx_dev); |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 311 | if (hinfo->ops.close) |
| 312 | hinfo->ops.close(hinfo, apcm->codec, substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 313 | snd_hda_power_down(apcm->codec); |
| 314 | mutex_unlock(&chip->open_mutex); |
Takashi Iwai | 9a6246f | 2015-02-27 18:17:28 +0100 | [diff] [blame] | 315 | snd_hda_codec_pcm_put(apcm->info); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 316 | return 0; |
| 317 | } |
| 318 | |
| 319 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, |
| 320 | struct snd_pcm_hw_params *hw_params) |
| 321 | { |
| 322 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 323 | struct azx *chip = apcm->chip; |
| 324 | int ret; |
| 325 | |
| 326 | dsp_lock(get_azx_dev(substream)); |
| 327 | if (dsp_is_locked(get_azx_dev(substream))) { |
| 328 | ret = -EBUSY; |
| 329 | goto unlock; |
| 330 | } |
| 331 | |
| 332 | ret = chip->ops->substream_alloc_pages(chip, substream, |
| 333 | params_buffer_bytes(hw_params)); |
| 334 | unlock: |
| 335 | dsp_unlock(get_azx_dev(substream)); |
| 336 | return ret; |
| 337 | } |
| 338 | |
| 339 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) |
| 340 | { |
| 341 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 342 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 343 | struct azx *chip = apcm->chip; |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 344 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 345 | int err; |
| 346 | |
| 347 | /* reset BDL address */ |
| 348 | dsp_lock(azx_dev); |
| 349 | if (!dsp_is_locked(azx_dev)) { |
| 350 | azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); |
| 351 | azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); |
| 352 | azx_sd_writel(chip, azx_dev, SD_CTL, 0); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 353 | azx_dev->core.bufsize = 0; |
| 354 | azx_dev->core.period_bytes = 0; |
| 355 | azx_dev->core.format_val = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 356 | } |
| 357 | |
| 358 | snd_hda_codec_cleanup(apcm->codec, hinfo, substream); |
| 359 | |
| 360 | err = chip->ops->substream_free_pages(chip, substream); |
| 361 | azx_dev->prepared = 0; |
| 362 | dsp_unlock(azx_dev); |
| 363 | return err; |
| 364 | } |
| 365 | |
| 366 | static int azx_pcm_prepare(struct snd_pcm_substream *substream) |
| 367 | { |
| 368 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 369 | struct azx *chip = apcm->chip; |
| 370 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 371 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 372 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 373 | unsigned int bufsize, period_bytes, format_val, stream_tag; |
| 374 | int err; |
| 375 | struct hda_spdif_out *spdif = |
| 376 | snd_hda_spdif_out_of_nid(apcm->codec, hinfo->nid); |
| 377 | unsigned short ctls = spdif ? spdif->ctls : 0; |
| 378 | |
| 379 | dsp_lock(azx_dev); |
| 380 | if (dsp_is_locked(azx_dev)) { |
| 381 | err = -EBUSY; |
| 382 | goto unlock; |
| 383 | } |
| 384 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 385 | snd_hdac_stream_reset(azx_stream(azx_dev)); |
Takashi Iwai | 6194b99 | 2014-06-06 18:12:16 +0200 | [diff] [blame] | 386 | format_val = snd_hda_calc_stream_format(apcm->codec, |
| 387 | runtime->rate, |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 388 | runtime->channels, |
| 389 | runtime->format, |
| 390 | hinfo->maxbps, |
| 391 | ctls); |
| 392 | if (!format_val) { |
| 393 | dev_err(chip->card->dev, |
| 394 | "invalid format_val, rate=%d, ch=%d, format=%d\n", |
| 395 | runtime->rate, runtime->channels, runtime->format); |
| 396 | err = -EINVAL; |
| 397 | goto unlock; |
| 398 | } |
| 399 | |
| 400 | bufsize = snd_pcm_lib_buffer_bytes(substream); |
| 401 | period_bytes = snd_pcm_lib_period_bytes(substream); |
| 402 | |
| 403 | dev_dbg(chip->card->dev, "azx_pcm_prepare: bufsize=0x%x, format=0x%x\n", |
| 404 | bufsize, format_val); |
| 405 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 406 | if (bufsize != azx_dev->core.bufsize || |
| 407 | period_bytes != azx_dev->core.period_bytes || |
| 408 | format_val != azx_dev->core.format_val || |
| 409 | runtime->no_period_wakeup != azx_dev->core.no_period_wakeup) { |
| 410 | azx_dev->core.bufsize = bufsize; |
| 411 | azx_dev->core.period_bytes = period_bytes; |
| 412 | azx_dev->core.format_val = format_val; |
| 413 | azx_dev->core.no_period_wakeup = runtime->no_period_wakeup; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 414 | err = azx_setup_periods(chip, substream, azx_dev); |
| 415 | if (err < 0) |
| 416 | goto unlock; |
| 417 | } |
| 418 | |
| 419 | /* when LPIB delay correction gives a small negative value, |
| 420 | * we ignore it; currently set the threshold statically to |
| 421 | * 64 frames |
| 422 | */ |
| 423 | if (runtime->period_size > 64) |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 424 | azx_dev->core.delay_negative_threshold = -frames_to_bytes(runtime, 64); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 425 | else |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 426 | azx_dev->core.delay_negative_threshold = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 427 | |
| 428 | /* wallclk has 24Mhz clock source */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 429 | azx_dev->core.period_wallclk = (((runtime->period_size * 24000) / |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 430 | runtime->rate) * 1000); |
| 431 | azx_setup_controller(chip, azx_dev); |
| 432 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 433 | azx_dev->core.fifo_size = |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 434 | azx_sd_readw(chip, azx_dev, SD_FIFOSIZE) + 1; |
| 435 | else |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 436 | azx_dev->core.fifo_size = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 437 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 438 | stream_tag = azx_dev->core.stream_tag; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 439 | /* CA-IBG chips need the playback stream starting from 1 */ |
| 440 | if ((chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) && |
| 441 | stream_tag > chip->capture_streams) |
| 442 | stream_tag -= chip->capture_streams; |
| 443 | err = snd_hda_codec_prepare(apcm->codec, hinfo, stream_tag, |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 444 | azx_dev->core.format_val, substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 445 | |
| 446 | unlock: |
| 447 | if (!err) |
| 448 | azx_dev->prepared = 1; |
| 449 | dsp_unlock(azx_dev); |
| 450 | return err; |
| 451 | } |
| 452 | |
| 453 | static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
| 454 | { |
| 455 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 456 | struct azx *chip = apcm->chip; |
| 457 | struct azx_dev *azx_dev; |
| 458 | struct snd_pcm_substream *s; |
| 459 | int rstart = 0, start, nsync = 0, sbits = 0; |
| 460 | int nwait, timeout; |
| 461 | |
| 462 | azx_dev = get_azx_dev(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 463 | |
| 464 | if (dsp_is_locked(azx_dev) || !azx_dev->prepared) |
| 465 | return -EPIPE; |
| 466 | |
| 467 | switch (cmd) { |
| 468 | case SNDRV_PCM_TRIGGER_START: |
| 469 | rstart = 1; |
| 470 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 471 | case SNDRV_PCM_TRIGGER_RESUME: |
| 472 | start = 1; |
| 473 | break; |
| 474 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 475 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 476 | case SNDRV_PCM_TRIGGER_STOP: |
| 477 | start = 0; |
| 478 | break; |
| 479 | default: |
| 480 | return -EINVAL; |
| 481 | } |
| 482 | |
| 483 | snd_pcm_group_for_each_entry(s, substream) { |
| 484 | if (s->pcm->card != substream->pcm->card) |
| 485 | continue; |
| 486 | azx_dev = get_azx_dev(s); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 487 | sbits |= 1 << azx_dev->core.index; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 488 | nsync++; |
| 489 | snd_pcm_trigger_done(s, substream); |
| 490 | } |
| 491 | |
| 492 | spin_lock(&chip->reg_lock); |
| 493 | |
| 494 | /* first, set SYNC bits of corresponding streams */ |
| 495 | if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) |
| 496 | azx_writel(chip, OLD_SSYNC, |
| 497 | azx_readl(chip, OLD_SSYNC) | sbits); |
| 498 | else |
| 499 | azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) | sbits); |
| 500 | |
| 501 | snd_pcm_group_for_each_entry(s, substream) { |
| 502 | if (s->pcm->card != substream->pcm->card) |
| 503 | continue; |
| 504 | azx_dev = get_azx_dev(s); |
| 505 | if (start) { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 506 | azx_dev->insufficient = 1; |
| 507 | snd_hdac_stream_start(azx_stream(azx_dev), true); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 508 | } else { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 509 | snd_hdac_stream_stop(azx_stream(azx_dev)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 510 | } |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 511 | } |
| 512 | spin_unlock(&chip->reg_lock); |
| 513 | if (start) { |
| 514 | /* wait until all FIFOs get ready */ |
| 515 | for (timeout = 5000; timeout; timeout--) { |
| 516 | nwait = 0; |
| 517 | snd_pcm_group_for_each_entry(s, substream) { |
| 518 | if (s->pcm->card != substream->pcm->card) |
| 519 | continue; |
| 520 | azx_dev = get_azx_dev(s); |
| 521 | if (!(azx_sd_readb(chip, azx_dev, SD_STS) & |
| 522 | SD_STS_FIFO_READY)) |
| 523 | nwait++; |
| 524 | } |
| 525 | if (!nwait) |
| 526 | break; |
| 527 | cpu_relax(); |
| 528 | } |
| 529 | } else { |
| 530 | /* wait until all RUN bits are cleared */ |
| 531 | for (timeout = 5000; timeout; timeout--) { |
| 532 | nwait = 0; |
| 533 | snd_pcm_group_for_each_entry(s, substream) { |
| 534 | if (s->pcm->card != substream->pcm->card) |
| 535 | continue; |
| 536 | azx_dev = get_azx_dev(s); |
| 537 | if (azx_sd_readb(chip, azx_dev, SD_CTL) & |
| 538 | SD_CTL_DMA_START) |
| 539 | nwait++; |
| 540 | } |
| 541 | if (!nwait) |
| 542 | break; |
| 543 | cpu_relax(); |
| 544 | } |
| 545 | } |
| 546 | spin_lock(&chip->reg_lock); |
| 547 | /* reset SYNC bits */ |
| 548 | if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) |
| 549 | azx_writel(chip, OLD_SSYNC, |
| 550 | azx_readl(chip, OLD_SSYNC) & ~sbits); |
| 551 | else |
| 552 | azx_writel(chip, SSYNC, azx_readl(chip, SSYNC) & ~sbits); |
| 553 | if (start) { |
| 554 | azx_timecounter_init(substream, 0, 0); |
Pierre-Louis Bossart | ed610af | 2015-02-06 15:55:52 -0600 | [diff] [blame] | 555 | snd_pcm_gettime(substream->runtime, &substream->runtime->trigger_tstamp); |
| 556 | substream->runtime->trigger_tstamp_latched = true; |
| 557 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 558 | if (nsync > 1) { |
| 559 | cycle_t cycle_last; |
| 560 | |
| 561 | /* same start cycle for master and group */ |
| 562 | azx_dev = get_azx_dev(substream); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 563 | cycle_last = azx_dev->core.tc.cycle_last; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 564 | |
| 565 | snd_pcm_group_for_each_entry(s, substream) { |
| 566 | if (s->pcm->card != substream->pcm->card) |
| 567 | continue; |
| 568 | azx_timecounter_init(s, 1, cycle_last); |
| 569 | } |
| 570 | } |
| 571 | } |
| 572 | spin_unlock(&chip->reg_lock); |
| 573 | return 0; |
| 574 | } |
| 575 | |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 576 | unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 577 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 578 | return snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 579 | } |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 580 | EXPORT_SYMBOL_GPL(azx_get_pos_lpib); |
| 581 | |
| 582 | unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev) |
| 583 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 584 | return snd_hdac_stream_get_pos_posbuf(azx_stream(azx_dev)); |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 585 | } |
| 586 | EXPORT_SYMBOL_GPL(azx_get_pos_posbuf); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 587 | |
| 588 | unsigned int azx_get_position(struct azx *chip, |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 589 | struct azx_dev *azx_dev) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 590 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 591 | struct snd_pcm_substream *substream = azx_dev->core.substream; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 592 | unsigned int pos; |
| 593 | int stream = substream->stream; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 594 | int delay = 0; |
| 595 | |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 596 | if (chip->get_position[stream]) |
| 597 | pos = chip->get_position[stream](chip, azx_dev); |
| 598 | else /* use the position buffer as default */ |
| 599 | pos = azx_get_pos_posbuf(chip, azx_dev); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 600 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 601 | if (pos >= azx_dev->core.bufsize) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 602 | pos = 0; |
| 603 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 604 | if (substream->runtime) { |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 605 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 606 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 607 | |
| 608 | if (chip->get_delay[stream]) |
| 609 | delay += chip->get_delay[stream](chip, azx_dev, pos); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 610 | if (hinfo->ops.get_delay) |
| 611 | delay += hinfo->ops.get_delay(hinfo, apcm->codec, |
| 612 | substream); |
| 613 | substream->runtime->delay = delay; |
| 614 | } |
| 615 | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 616 | return pos; |
| 617 | } |
| 618 | EXPORT_SYMBOL_GPL(azx_get_position); |
| 619 | |
| 620 | static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream) |
| 621 | { |
| 622 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 623 | struct azx *chip = apcm->chip; |
| 624 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 625 | return bytes_to_frames(substream->runtime, |
Takashi Iwai | b6050ef | 2014-06-26 16:50:16 +0200 | [diff] [blame] | 626 | azx_get_position(chip, azx_dev)); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 627 | } |
| 628 | |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 629 | static int azx_get_time_info(struct snd_pcm_substream *substream, |
| 630 | struct timespec *system_ts, struct timespec *audio_ts, |
| 631 | struct snd_pcm_audio_tstamp_config *audio_tstamp_config, |
| 632 | struct snd_pcm_audio_tstamp_report *audio_tstamp_report) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 633 | { |
| 634 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 635 | u64 nsec; |
| 636 | |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 637 | if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) && |
| 638 | (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) { |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 639 | |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 640 | snd_pcm_gettime(substream->runtime, system_ts); |
| 641 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 642 | nsec = timecounter_read(&azx_dev->core.tc); |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 643 | nsec = div_u64(nsec, 3); /* can be optimized */ |
| 644 | if (audio_tstamp_config->report_delay) |
| 645 | nsec = azx_adjust_codec_delay(substream, nsec); |
| 646 | |
| 647 | *audio_ts = ns_to_timespec(nsec); |
| 648 | |
| 649 | audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK; |
| 650 | audio_tstamp_report->accuracy_report = 1; /* rest of structure is valid */ |
| 651 | audio_tstamp_report->accuracy = 42; /* 24 MHz WallClock == 42ns resolution */ |
| 652 | |
| 653 | } else |
| 654 | audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 655 | |
| 656 | return 0; |
| 657 | } |
| 658 | |
| 659 | static struct snd_pcm_hardware azx_pcm_hw = { |
| 660 | .info = (SNDRV_PCM_INFO_MMAP | |
| 661 | SNDRV_PCM_INFO_INTERLEAVED | |
| 662 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 663 | SNDRV_PCM_INFO_MMAP_VALID | |
| 664 | /* No full-resume yet implemented */ |
| 665 | /* SNDRV_PCM_INFO_RESUME |*/ |
| 666 | SNDRV_PCM_INFO_PAUSE | |
| 667 | SNDRV_PCM_INFO_SYNC_START | |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 668 | SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */ |
| 669 | SNDRV_PCM_INFO_HAS_LINK_ATIME | |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 670 | SNDRV_PCM_INFO_NO_PERIOD_WAKEUP), |
| 671 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 672 | .rates = SNDRV_PCM_RATE_48000, |
| 673 | .rate_min = 48000, |
| 674 | .rate_max = 48000, |
| 675 | .channels_min = 2, |
| 676 | .channels_max = 2, |
| 677 | .buffer_bytes_max = AZX_MAX_BUF_SIZE, |
| 678 | .period_bytes_min = 128, |
| 679 | .period_bytes_max = AZX_MAX_BUF_SIZE / 2, |
| 680 | .periods_min = 2, |
| 681 | .periods_max = AZX_MAX_FRAG, |
| 682 | .fifo_size = 0, |
| 683 | }; |
| 684 | |
| 685 | static int azx_pcm_open(struct snd_pcm_substream *substream) |
| 686 | { |
| 687 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 688 | struct hda_pcm_stream *hinfo = to_hda_pcm_stream(substream); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 689 | struct azx *chip = apcm->chip; |
| 690 | struct azx_dev *azx_dev; |
| 691 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 692 | unsigned long flags; |
| 693 | int err; |
| 694 | int buff_step; |
| 695 | |
Takashi Iwai | 9a6246f | 2015-02-27 18:17:28 +0100 | [diff] [blame] | 696 | snd_hda_codec_pcm_get(apcm->info); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 697 | mutex_lock(&chip->open_mutex); |
| 698 | azx_dev = azx_assign_device(chip, substream); |
| 699 | if (azx_dev == NULL) { |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 700 | err = -EBUSY; |
| 701 | goto unlock; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 702 | } |
| 703 | runtime->hw = azx_pcm_hw; |
| 704 | runtime->hw.channels_min = hinfo->channels_min; |
| 705 | runtime->hw.channels_max = hinfo->channels_max; |
| 706 | runtime->hw.formats = hinfo->formats; |
| 707 | runtime->hw.rates = hinfo->rates; |
| 708 | snd_pcm_limit_hw_rates(runtime); |
| 709 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
| 710 | |
| 711 | /* avoid wrap-around with wall-clock */ |
| 712 | snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME, |
| 713 | 20, |
| 714 | 178000000); |
| 715 | |
| 716 | if (chip->align_buffer_size) |
| 717 | /* constrain buffer sizes to be multiple of 128 |
| 718 | bytes. This is more efficient in terms of memory |
| 719 | access but isn't required by the HDA spec and |
| 720 | prevents users from specifying exact period/buffer |
| 721 | sizes. For example for 44.1kHz, a period size set |
| 722 | to 20ms will be rounded to 19.59ms. */ |
| 723 | buff_step = 128; |
| 724 | else |
| 725 | /* Don't enforce steps on buffer sizes, still need to |
| 726 | be multiple of 4 bytes (HDA spec). Tested on Intel |
| 727 | HDA controllers, may not work on all devices where |
| 728 | option needs to be disabled */ |
| 729 | buff_step = 4; |
| 730 | |
| 731 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, |
| 732 | buff_step); |
| 733 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
| 734 | buff_step); |
Takashi Iwai | cc72da7 | 2015-02-19 16:00:22 +0100 | [diff] [blame] | 735 | snd_hda_power_up(apcm->codec); |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 736 | if (hinfo->ops.open) |
| 737 | err = hinfo->ops.open(hinfo, apcm->codec, substream); |
| 738 | else |
| 739 | err = -ENODEV; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 740 | if (err < 0) { |
| 741 | azx_release_device(azx_dev); |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 742 | goto powerdown; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 743 | } |
| 744 | snd_pcm_limit_hw_rates(runtime); |
| 745 | /* sanity check */ |
| 746 | if (snd_BUG_ON(!runtime->hw.channels_min) || |
| 747 | snd_BUG_ON(!runtime->hw.channels_max) || |
| 748 | snd_BUG_ON(!runtime->hw.formats) || |
| 749 | snd_BUG_ON(!runtime->hw.rates)) { |
| 750 | azx_release_device(azx_dev); |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 751 | if (hinfo->ops.close) |
| 752 | hinfo->ops.close(hinfo, apcm->codec, substream); |
| 753 | err = -EINVAL; |
| 754 | goto powerdown; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 755 | } |
| 756 | |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 757 | /* disable LINK_ATIME timestamps for capture streams |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 758 | until we figure out how to handle digital inputs */ |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 759 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 760 | runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */ |
| 761 | runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME; |
| 762 | } |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 763 | |
| 764 | spin_lock_irqsave(&chip->reg_lock, flags); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 765 | azx_dev->core.substream = substream; |
| 766 | azx_dev->core.running = 0; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 767 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 768 | |
| 769 | runtime->private_data = azx_dev; |
| 770 | snd_pcm_set_sync(substream); |
| 771 | mutex_unlock(&chip->open_mutex); |
| 772 | return 0; |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 773 | |
| 774 | powerdown: |
| 775 | snd_hda_power_down(apcm->codec); |
| 776 | unlock: |
| 777 | mutex_unlock(&chip->open_mutex); |
Takashi Iwai | 9a6246f | 2015-02-27 18:17:28 +0100 | [diff] [blame] | 778 | snd_hda_codec_pcm_put(apcm->info); |
Takashi Iwai | 61ca410 | 2015-02-27 17:57:55 +0100 | [diff] [blame] | 779 | return err; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 780 | } |
| 781 | |
| 782 | static int azx_pcm_mmap(struct snd_pcm_substream *substream, |
| 783 | struct vm_area_struct *area) |
| 784 | { |
| 785 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 786 | struct azx *chip = apcm->chip; |
| 787 | if (chip->ops->pcm_mmap_prepare) |
| 788 | chip->ops->pcm_mmap_prepare(substream, area); |
| 789 | return snd_pcm_lib_default_mmap(substream, area); |
| 790 | } |
| 791 | |
| 792 | static struct snd_pcm_ops azx_pcm_ops = { |
| 793 | .open = azx_pcm_open, |
| 794 | .close = azx_pcm_close, |
| 795 | .ioctl = snd_pcm_lib_ioctl, |
| 796 | .hw_params = azx_pcm_hw_params, |
| 797 | .hw_free = azx_pcm_hw_free, |
| 798 | .prepare = azx_pcm_prepare, |
| 799 | .trigger = azx_pcm_trigger, |
| 800 | .pointer = azx_pcm_pointer, |
Pierre-Louis Bossart | 9e94df3 | 2015-02-13 15:14:07 -0600 | [diff] [blame] | 801 | .get_time_info = azx_get_time_info, |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 802 | .mmap = azx_pcm_mmap, |
| 803 | .page = snd_pcm_sgbuf_ops_page, |
| 804 | }; |
| 805 | |
| 806 | static void azx_pcm_free(struct snd_pcm *pcm) |
| 807 | { |
| 808 | struct azx_pcm *apcm = pcm->private_data; |
| 809 | if (apcm) { |
| 810 | list_del(&apcm->list); |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 811 | apcm->info->pcm = NULL; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 812 | kfree(apcm); |
| 813 | } |
| 814 | } |
| 815 | |
| 816 | #define MAX_PREALLOC_SIZE (32 * 1024 * 1024) |
| 817 | |
Dylan Reid | 7c3e438 | 2014-03-02 20:43:59 -0800 | [diff] [blame] | 818 | static int azx_attach_pcm_stream(struct hda_bus *bus, struct hda_codec *codec, |
| 819 | struct hda_pcm *cpcm) |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 820 | { |
| 821 | struct azx *chip = bus->private_data; |
| 822 | struct snd_pcm *pcm; |
| 823 | struct azx_pcm *apcm; |
| 824 | int pcm_dev = cpcm->device; |
| 825 | unsigned int size; |
| 826 | int s, err; |
| 827 | |
| 828 | list_for_each_entry(apcm, &chip->pcm_list, list) { |
| 829 | if (apcm->pcm->device == pcm_dev) { |
| 830 | dev_err(chip->card->dev, "PCM %d already exists\n", |
| 831 | pcm_dev); |
| 832 | return -EBUSY; |
| 833 | } |
| 834 | } |
| 835 | err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, |
| 836 | cpcm->stream[SNDRV_PCM_STREAM_PLAYBACK].substreams, |
| 837 | cpcm->stream[SNDRV_PCM_STREAM_CAPTURE].substreams, |
| 838 | &pcm); |
| 839 | if (err < 0) |
| 840 | return err; |
| 841 | strlcpy(pcm->name, cpcm->name, sizeof(pcm->name)); |
| 842 | apcm = kzalloc(sizeof(*apcm), GFP_KERNEL); |
| 843 | if (apcm == NULL) |
| 844 | return -ENOMEM; |
| 845 | apcm->chip = chip; |
| 846 | apcm->pcm = pcm; |
| 847 | apcm->codec = codec; |
Takashi Iwai | 820cc6c | 2015-02-20 12:50:46 +0100 | [diff] [blame] | 848 | apcm->info = cpcm; |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 849 | pcm->private_data = apcm; |
| 850 | pcm->private_free = azx_pcm_free; |
| 851 | if (cpcm->pcm_type == HDA_PCM_TYPE_MODEM) |
| 852 | pcm->dev_class = SNDRV_PCM_CLASS_MODEM; |
| 853 | list_add_tail(&apcm->list, &chip->pcm_list); |
| 854 | cpcm->pcm = pcm; |
| 855 | for (s = 0; s < 2; s++) { |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 856 | if (cpcm->stream[s].substreams) |
| 857 | snd_pcm_set_ops(pcm, s, &azx_pcm_ops); |
| 858 | } |
| 859 | /* buffer pre-allocation */ |
| 860 | size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024; |
| 861 | if (size > MAX_PREALLOC_SIZE) |
| 862 | size = MAX_PREALLOC_SIZE; |
| 863 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG, |
| 864 | chip->card->dev, |
| 865 | size, MAX_PREALLOC_SIZE); |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 866 | return 0; |
| 867 | } |
Dylan Reid | 05e8487 | 2014-02-28 15:41:22 -0800 | [diff] [blame] | 868 | |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 869 | /* |
| 870 | * CORB / RIRB interface |
| 871 | */ |
Dylan Reid | f19c3ec | 2014-02-28 15:41:26 -0800 | [diff] [blame] | 872 | static int azx_alloc_cmd_io(struct azx *chip) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 873 | { |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 874 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 875 | return chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV, |
| 876 | PAGE_SIZE, &chip->rb); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 877 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 878 | |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 879 | static void azx_init_cmd_io(struct azx *chip) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 880 | { |
| 881 | int timeout; |
| 882 | |
| 883 | spin_lock_irq(&chip->reg_lock); |
| 884 | /* CORB set up */ |
| 885 | chip->corb.addr = chip->rb.addr; |
| 886 | chip->corb.buf = (u32 *)chip->rb.area; |
| 887 | azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); |
| 888 | azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr)); |
| 889 | |
| 890 | /* set the corb size to 256 entries (ULI requires explicitly) */ |
| 891 | azx_writeb(chip, CORBSIZE, 0x02); |
| 892 | /* set the corb write pointer to 0 */ |
| 893 | azx_writew(chip, CORBWP, 0); |
| 894 | |
| 895 | /* reset the corb hw read pointer */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 896 | azx_writew(chip, CORBRP, AZX_CORBRP_RST); |
Takashi Iwai | 6ba736d | 2014-04-29 18:38:21 +0200 | [diff] [blame] | 897 | if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) { |
| 898 | for (timeout = 1000; timeout > 0; timeout--) { |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 899 | if ((azx_readw(chip, CORBRP) & AZX_CORBRP_RST) == AZX_CORBRP_RST) |
Takashi Iwai | 6ba736d | 2014-04-29 18:38:21 +0200 | [diff] [blame] | 900 | break; |
| 901 | udelay(1); |
| 902 | } |
| 903 | if (timeout <= 0) |
| 904 | dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n", |
| 905 | azx_readw(chip, CORBRP)); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 906 | |
Takashi Iwai | 6ba736d | 2014-04-29 18:38:21 +0200 | [diff] [blame] | 907 | azx_writew(chip, CORBRP, 0); |
| 908 | for (timeout = 1000; timeout > 0; timeout--) { |
| 909 | if (azx_readw(chip, CORBRP) == 0) |
| 910 | break; |
| 911 | udelay(1); |
| 912 | } |
| 913 | if (timeout <= 0) |
| 914 | dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n", |
| 915 | azx_readw(chip, CORBRP)); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 916 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 917 | |
| 918 | /* enable corb dma */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 919 | azx_writeb(chip, CORBCTL, AZX_CORBCTL_RUN); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 920 | |
| 921 | /* RIRB set up */ |
| 922 | chip->rirb.addr = chip->rb.addr + 2048; |
| 923 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); |
| 924 | chip->rirb.wp = chip->rirb.rp = 0; |
| 925 | memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); |
| 926 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); |
| 927 | azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); |
| 928 | |
| 929 | /* set the rirb size to 256 entries (ULI requires explicitly) */ |
| 930 | azx_writeb(chip, RIRBSIZE, 0x02); |
| 931 | /* reset the rirb hw write pointer */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 932 | azx_writew(chip, RIRBWP, AZX_RIRBWP_RST); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 933 | /* set N=1, get RIRB response interrupt for new entry */ |
| 934 | if (chip->driver_caps & AZX_DCAPS_CTX_WORKAROUND) |
| 935 | azx_writew(chip, RINTCNT, 0xc0); |
| 936 | else |
| 937 | azx_writew(chip, RINTCNT, 1); |
| 938 | /* enable rirb dma and response irq */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 939 | azx_writeb(chip, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 940 | spin_unlock_irq(&chip->reg_lock); |
| 941 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 942 | |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 943 | static void azx_free_cmd_io(struct azx *chip) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 944 | { |
| 945 | spin_lock_irq(&chip->reg_lock); |
| 946 | /* disable ringbuffer DMAs */ |
| 947 | azx_writeb(chip, RIRBCTL, 0); |
| 948 | azx_writeb(chip, CORBCTL, 0); |
| 949 | spin_unlock_irq(&chip->reg_lock); |
| 950 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 951 | |
| 952 | static unsigned int azx_command_addr(u32 cmd) |
| 953 | { |
| 954 | unsigned int addr = cmd >> 28; |
| 955 | |
| 956 | if (addr >= AZX_MAX_CODECS) { |
| 957 | snd_BUG(); |
| 958 | addr = 0; |
| 959 | } |
| 960 | |
| 961 | return addr; |
| 962 | } |
| 963 | |
| 964 | /* send a command */ |
| 965 | static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) |
| 966 | { |
| 967 | struct azx *chip = bus->private_data; |
| 968 | unsigned int addr = azx_command_addr(val); |
| 969 | unsigned int wp, rp; |
| 970 | |
| 971 | spin_lock_irq(&chip->reg_lock); |
| 972 | |
| 973 | /* add command to corb */ |
| 974 | wp = azx_readw(chip, CORBWP); |
| 975 | if (wp == 0xffff) { |
| 976 | /* something wrong, controller likely turned to D3 */ |
| 977 | spin_unlock_irq(&chip->reg_lock); |
| 978 | return -EIO; |
| 979 | } |
| 980 | wp++; |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 981 | wp %= AZX_MAX_CORB_ENTRIES; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 982 | |
| 983 | rp = azx_readw(chip, CORBRP); |
| 984 | if (wp == rp) { |
| 985 | /* oops, it's full */ |
| 986 | spin_unlock_irq(&chip->reg_lock); |
| 987 | return -EAGAIN; |
| 988 | } |
| 989 | |
| 990 | chip->rirb.cmds[addr]++; |
| 991 | chip->corb.buf[wp] = cpu_to_le32(val); |
| 992 | azx_writew(chip, CORBWP, wp); |
| 993 | |
| 994 | spin_unlock_irq(&chip->reg_lock); |
| 995 | |
| 996 | return 0; |
| 997 | } |
| 998 | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 999 | #define AZX_RIRB_EX_UNSOL_EV (1<<4) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1000 | |
| 1001 | /* retrieve RIRB entry - called from interrupt handler */ |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1002 | static void azx_update_rirb(struct azx *chip) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1003 | { |
| 1004 | unsigned int rp, wp; |
| 1005 | unsigned int addr; |
| 1006 | u32 res, res_ex; |
| 1007 | |
| 1008 | wp = azx_readw(chip, RIRBWP); |
| 1009 | if (wp == 0xffff) { |
| 1010 | /* something wrong, controller likely turned to D3 */ |
| 1011 | return; |
| 1012 | } |
| 1013 | |
| 1014 | if (wp == chip->rirb.wp) |
| 1015 | return; |
| 1016 | chip->rirb.wp = wp; |
| 1017 | |
| 1018 | while (chip->rirb.rp != wp) { |
| 1019 | chip->rirb.rp++; |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1020 | chip->rirb.rp %= AZX_MAX_RIRB_ENTRIES; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1021 | |
| 1022 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ |
| 1023 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); |
| 1024 | res = le32_to_cpu(chip->rirb.buf[rp]); |
| 1025 | addr = res_ex & 0xf; |
| 1026 | if ((addr >= AZX_MAX_CODECS) || !(chip->codec_mask & (1 << addr))) { |
| 1027 | dev_err(chip->card->dev, "spurious response %#x:%#x, rp = %d, wp = %d", |
| 1028 | res, res_ex, |
| 1029 | chip->rirb.rp, wp); |
| 1030 | snd_BUG(); |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1031 | } else if (res_ex & AZX_RIRB_EX_UNSOL_EV) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1032 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); |
| 1033 | else if (chip->rirb.cmds[addr]) { |
| 1034 | chip->rirb.res[addr] = res; |
| 1035 | smp_wmb(); |
| 1036 | chip->rirb.cmds[addr]--; |
| 1037 | } else if (printk_ratelimit()) { |
| 1038 | dev_err(chip->card->dev, "spurious response %#x:%#x, last cmd=%#08x\n", |
| 1039 | res, res_ex, |
| 1040 | chip->last_cmd[addr]); |
| 1041 | } |
| 1042 | } |
| 1043 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1044 | |
| 1045 | /* receive a response */ |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1046 | static int azx_rirb_get_response(struct hda_bus *bus, unsigned int addr, |
| 1047 | unsigned int *res) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1048 | { |
| 1049 | struct azx *chip = bus->private_data; |
| 1050 | unsigned long timeout; |
| 1051 | unsigned long loopcounter; |
| 1052 | int do_poll = 0; |
| 1053 | |
| 1054 | again: |
| 1055 | timeout = jiffies + msecs_to_jiffies(1000); |
| 1056 | |
| 1057 | for (loopcounter = 0;; loopcounter++) { |
| 1058 | if (chip->polling_mode || do_poll) { |
| 1059 | spin_lock_irq(&chip->reg_lock); |
| 1060 | azx_update_rirb(chip); |
| 1061 | spin_unlock_irq(&chip->reg_lock); |
| 1062 | } |
| 1063 | if (!chip->rirb.cmds[addr]) { |
| 1064 | smp_rmb(); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1065 | |
| 1066 | if (!do_poll) |
| 1067 | chip->poll_count = 0; |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1068 | if (res) |
| 1069 | *res = chip->rirb.res[addr]; /* the last value */ |
| 1070 | return 0; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1071 | } |
| 1072 | if (time_after(jiffies, timeout)) |
| 1073 | break; |
| 1074 | if (bus->needs_damn_long_delay || loopcounter > 3000) |
| 1075 | msleep(2); /* temporary workaround */ |
| 1076 | else { |
| 1077 | udelay(10); |
| 1078 | cond_resched(); |
| 1079 | } |
| 1080 | } |
| 1081 | |
Takashi Iwai | a1f3f1c | 2015-03-08 18:29:50 +0100 | [diff] [blame] | 1082 | if (bus->no_response_fallback) |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1083 | return -EIO; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1084 | |
| 1085 | if (!chip->polling_mode && chip->poll_count < 2) { |
| 1086 | dev_dbg(chip->card->dev, |
| 1087 | "azx_get_response timeout, polling the codec once: last cmd=0x%08x\n", |
| 1088 | chip->last_cmd[addr]); |
| 1089 | do_poll = 1; |
| 1090 | chip->poll_count++; |
| 1091 | goto again; |
| 1092 | } |
| 1093 | |
| 1094 | |
| 1095 | if (!chip->polling_mode) { |
| 1096 | dev_warn(chip->card->dev, |
| 1097 | "azx_get_response timeout, switching to polling mode: last cmd=0x%08x\n", |
| 1098 | chip->last_cmd[addr]); |
| 1099 | chip->polling_mode = 1; |
| 1100 | goto again; |
| 1101 | } |
| 1102 | |
| 1103 | if (chip->msi) { |
| 1104 | dev_warn(chip->card->dev, |
| 1105 | "No response from codec, disabling MSI: last cmd=0x%08x\n", |
| 1106 | chip->last_cmd[addr]); |
| 1107 | if (chip->ops->disable_msi_reset_irq(chip) && |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1108 | chip->ops->disable_msi_reset_irq(chip) < 0) |
| 1109 | return -EIO; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1110 | goto again; |
| 1111 | } |
| 1112 | |
| 1113 | if (chip->probing) { |
| 1114 | /* If this critical timeout happens during the codec probing |
| 1115 | * phase, this is likely an access to a non-existing codec |
| 1116 | * slot. Better to return an error and reset the system. |
| 1117 | */ |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1118 | return -EIO; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1119 | } |
| 1120 | |
| 1121 | /* a fatal communication error; need either to reset or to fallback |
| 1122 | * to the single_cmd mode |
| 1123 | */ |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1124 | if (bus->allow_bus_reset && !bus->response_reset && !bus->in_reset) { |
| 1125 | bus->response_reset = 1; |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1126 | return -EAGAIN; /* give a chance to retry */ |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1127 | } |
| 1128 | |
| 1129 | dev_err(chip->card->dev, |
| 1130 | "azx_get_response timeout, switching to single_cmd mode: last cmd=0x%08x\n", |
| 1131 | chip->last_cmd[addr]); |
| 1132 | chip->single_cmd = 1; |
| 1133 | bus->response_reset = 0; |
| 1134 | /* release CORB/RIRB */ |
| 1135 | azx_free_cmd_io(chip); |
| 1136 | /* disable unsolicited responses */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1137 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~AZX_GCTL_UNSOL); |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1138 | return -EIO; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1139 | } |
| 1140 | |
| 1141 | /* |
| 1142 | * Use the single immediate command instead of CORB/RIRB for simplicity |
| 1143 | * |
| 1144 | * Note: according to Intel, this is not preferred use. The command was |
| 1145 | * intended for the BIOS only, and may get confused with unsolicited |
| 1146 | * responses. So, we shouldn't use it for normal operation from the |
| 1147 | * driver. |
| 1148 | * I left the codes, however, for debugging/testing purposes. |
| 1149 | */ |
| 1150 | |
| 1151 | /* receive a response */ |
| 1152 | static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) |
| 1153 | { |
| 1154 | int timeout = 50; |
| 1155 | |
| 1156 | while (timeout--) { |
| 1157 | /* check IRV busy bit */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1158 | if (azx_readw(chip, IRS) & AZX_IRS_VALID) { |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1159 | /* reuse rirb.res as the response return value */ |
| 1160 | chip->rirb.res[addr] = azx_readl(chip, IR); |
| 1161 | return 0; |
| 1162 | } |
| 1163 | udelay(1); |
| 1164 | } |
| 1165 | if (printk_ratelimit()) |
| 1166 | dev_dbg(chip->card->dev, "get_response timeout: IRS=0x%x\n", |
| 1167 | azx_readw(chip, IRS)); |
| 1168 | chip->rirb.res[addr] = -1; |
| 1169 | return -EIO; |
| 1170 | } |
| 1171 | |
| 1172 | /* send a command */ |
| 1173 | static int azx_single_send_cmd(struct hda_bus *bus, u32 val) |
| 1174 | { |
| 1175 | struct azx *chip = bus->private_data; |
| 1176 | unsigned int addr = azx_command_addr(val); |
| 1177 | int timeout = 50; |
| 1178 | |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1179 | while (timeout--) { |
| 1180 | /* check ICB busy bit */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1181 | if (!((azx_readw(chip, IRS) & AZX_IRS_BUSY))) { |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1182 | /* Clear IRV valid bit */ |
| 1183 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1184 | AZX_IRS_VALID); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1185 | azx_writel(chip, IC, val); |
| 1186 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1187 | AZX_IRS_BUSY); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1188 | return azx_single_wait_for_response(chip, addr); |
| 1189 | } |
| 1190 | udelay(1); |
| 1191 | } |
| 1192 | if (printk_ratelimit()) |
| 1193 | dev_dbg(chip->card->dev, |
| 1194 | "send_cmd timeout: IRS=0x%x, val=0x%x\n", |
| 1195 | azx_readw(chip, IRS), val); |
| 1196 | return -EIO; |
| 1197 | } |
| 1198 | |
| 1199 | /* receive a response */ |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1200 | static int azx_single_get_response(struct hda_bus *bus, unsigned int addr, |
| 1201 | unsigned int *res) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1202 | { |
| 1203 | struct azx *chip = bus->private_data; |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1204 | |
| 1205 | if (res) |
| 1206 | *res = chip->rirb.res[addr]; |
| 1207 | return 0; |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1208 | } |
| 1209 | |
| 1210 | /* |
| 1211 | * The below are the main callbacks from hda_codec. |
| 1212 | * |
| 1213 | * They are just the skeleton to call sub-callbacks according to the |
| 1214 | * current setting of chip->single_cmd. |
| 1215 | */ |
| 1216 | |
| 1217 | /* send a command */ |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1218 | static int azx_send_cmd(struct hdac_bus *_bus, unsigned int val) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1219 | { |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1220 | struct hda_bus *bus = to_hda_bus(_bus); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1221 | struct azx *chip = bus->private_data; |
| 1222 | |
| 1223 | if (chip->disabled) |
| 1224 | return 0; |
| 1225 | chip->last_cmd[azx_command_addr(val)] = val; |
| 1226 | if (chip->single_cmd) |
| 1227 | return azx_single_send_cmd(bus, val); |
| 1228 | else |
| 1229 | return azx_corb_send_cmd(bus, val); |
| 1230 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1231 | |
| 1232 | /* get a response */ |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1233 | static int azx_get_response(struct hdac_bus *_bus, unsigned int addr, |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1234 | unsigned int *res) |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1235 | { |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1236 | struct hda_bus *bus = to_hda_bus(_bus); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1237 | struct azx *chip = bus->private_data; |
| 1238 | if (chip->disabled) |
| 1239 | return 0; |
| 1240 | if (chip->single_cmd) |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1241 | return azx_single_get_response(bus, addr, res); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1242 | else |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1243 | return azx_rirb_get_response(bus, addr, res); |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1244 | } |
Dylan Reid | 6e85ddd | 2014-02-28 15:41:25 -0800 | [diff] [blame] | 1245 | |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1246 | static const struct hdac_bus_ops bus_core_ops = { |
| 1247 | .command = azx_send_cmd, |
| 1248 | .get_response = azx_get_response, |
| 1249 | }; |
| 1250 | |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1251 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
| 1252 | /* |
| 1253 | * DSP loading code (e.g. for CA0132) |
| 1254 | */ |
| 1255 | |
| 1256 | /* use the first stream for loading DSP */ |
| 1257 | static struct azx_dev * |
| 1258 | azx_get_dsp_loader_dev(struct azx *chip) |
| 1259 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1260 | struct hdac_bus *bus = azx_bus(chip); |
| 1261 | struct hdac_stream *s; |
| 1262 | |
| 1263 | list_for_each_entry(s, &bus->stream_list, list) |
| 1264 | if (s->index == chip->playback_index_offset) |
| 1265 | return stream_to_azx_dev(s); |
| 1266 | |
| 1267 | return NULL; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1268 | } |
| 1269 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1270 | static int azx_load_dsp_prepare(struct hda_bus *bus, unsigned int format, |
| 1271 | unsigned int byte_size, |
| 1272 | struct snd_dma_buffer *bufp) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1273 | { |
| 1274 | u32 *bdl; |
| 1275 | struct azx *chip = bus->private_data; |
| 1276 | struct azx_dev *azx_dev; |
| 1277 | int err; |
| 1278 | |
| 1279 | azx_dev = azx_get_dsp_loader_dev(chip); |
| 1280 | |
| 1281 | dsp_lock(azx_dev); |
| 1282 | spin_lock_irq(&chip->reg_lock); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1283 | if (azx_dev->core.running || azx_dev->core.locked) { |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1284 | spin_unlock_irq(&chip->reg_lock); |
| 1285 | err = -EBUSY; |
| 1286 | goto unlock; |
| 1287 | } |
| 1288 | azx_dev->prepared = 0; |
| 1289 | chip->saved_azx_dev = *azx_dev; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1290 | azx_dev->core.locked = 1; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1291 | spin_unlock_irq(&chip->reg_lock); |
| 1292 | |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1293 | err = chip->io_ops->dma_alloc_pages(&bus->core, SNDRV_DMA_TYPE_DEV_SG, |
| 1294 | byte_size, bufp); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1295 | if (err < 0) |
| 1296 | goto err_alloc; |
| 1297 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1298 | azx_dev->core.bufsize = byte_size; |
| 1299 | azx_dev->core.period_bytes = byte_size; |
| 1300 | azx_dev->core.format_val = format; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1301 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1302 | snd_hdac_stream_reset(azx_stream(azx_dev)); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1303 | |
| 1304 | /* reset BDL address */ |
| 1305 | azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); |
| 1306 | azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); |
| 1307 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1308 | azx_dev->core.frags = 0; |
| 1309 | bdl = (u32 *)azx_dev->core.bdl.area; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1310 | err = setup_bdle(chip, bufp, azx_dev, &bdl, 0, byte_size, 0); |
| 1311 | if (err < 0) |
| 1312 | goto error; |
| 1313 | |
| 1314 | azx_setup_controller(chip, azx_dev); |
| 1315 | dsp_unlock(azx_dev); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1316 | return azx_dev->core.stream_tag; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1317 | |
| 1318 | error: |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1319 | chip->io_ops->dma_free_pages(&bus->core, bufp); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1320 | err_alloc: |
| 1321 | spin_lock_irq(&chip->reg_lock); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1322 | if (azx_dev->core.opened) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1323 | *azx_dev = chip->saved_azx_dev; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1324 | azx_dev->core.locked = 0; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1325 | spin_unlock_irq(&chip->reg_lock); |
| 1326 | unlock: |
| 1327 | dsp_unlock(azx_dev); |
| 1328 | return err; |
| 1329 | } |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1330 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1331 | static void azx_load_dsp_trigger(struct hda_bus *bus, bool start) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1332 | { |
| 1333 | struct azx *chip = bus->private_data; |
| 1334 | struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); |
| 1335 | |
| 1336 | if (start) |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1337 | snd_hdac_stream_start(azx_stream(azx_dev), false); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1338 | else |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1339 | snd_hdac_stream_stop(azx_stream(azx_dev)); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1340 | } |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1341 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1342 | static void azx_load_dsp_cleanup(struct hda_bus *bus, |
| 1343 | struct snd_dma_buffer *dmab) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1344 | { |
| 1345 | struct azx *chip = bus->private_data; |
| 1346 | struct azx_dev *azx_dev = azx_get_dsp_loader_dev(chip); |
| 1347 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1348 | if (!dmab->area || !azx_dev->core.locked) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1349 | return; |
| 1350 | |
| 1351 | dsp_lock(azx_dev); |
| 1352 | /* reset BDL address */ |
| 1353 | azx_sd_writel(chip, azx_dev, SD_BDLPL, 0); |
| 1354 | azx_sd_writel(chip, azx_dev, SD_BDLPU, 0); |
| 1355 | azx_sd_writel(chip, azx_dev, SD_CTL, 0); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1356 | azx_dev->core.bufsize = 0; |
| 1357 | azx_dev->core.period_bytes = 0; |
| 1358 | azx_dev->core.format_val = 0; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1359 | |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1360 | chip->io_ops->dma_free_pages(&bus->core, dmab); |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1361 | dmab->area = NULL; |
| 1362 | |
| 1363 | spin_lock_irq(&chip->reg_lock); |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1364 | if (azx_dev->core.opened) |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1365 | *azx_dev = chip->saved_azx_dev; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1366 | azx_dev->core.locked = 0; |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1367 | spin_unlock_irq(&chip->reg_lock); |
| 1368 | dsp_unlock(azx_dev); |
| 1369 | } |
Dylan Reid | 2b5fd6c | 2014-02-28 15:41:24 -0800 | [diff] [blame] | 1370 | #endif /* CONFIG_SND_HDA_DSP_LOADER */ |
| 1371 | |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1372 | int azx_alloc_stream_pages(struct azx *chip) |
| 1373 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1374 | struct hdac_bus *bus = azx_bus(chip); |
| 1375 | struct hdac_stream *s; |
| 1376 | int err; |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1377 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1378 | list_for_each_entry(s, &bus->stream_list, list) { |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1379 | /* allocate memory for the BDL for each stream */ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1380 | err = chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV, |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1381 | BDL_SIZE, &s->bdl); |
Takashi Iwai | f4de8fe | 2015-02-27 16:17:18 +0100 | [diff] [blame] | 1382 | if (err < 0) |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1383 | return -ENOMEM; |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1384 | } |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1385 | |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1386 | /* allocate memory for the position buffer */ |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1387 | err = chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV, |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1388 | chip->num_streams * 8, &chip->posbuf); |
Takashi Iwai | f4de8fe | 2015-02-27 16:17:18 +0100 | [diff] [blame] | 1389 | if (err < 0) |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1390 | return -ENOMEM; |
Dylan Reid | f19c3ec | 2014-02-28 15:41:26 -0800 | [diff] [blame] | 1391 | |
| 1392 | /* allocate CORB/RIRB */ |
| 1393 | err = azx_alloc_cmd_io(chip); |
| 1394 | if (err < 0) |
| 1395 | return err; |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1396 | return 0; |
| 1397 | } |
| 1398 | EXPORT_SYMBOL_GPL(azx_alloc_stream_pages); |
| 1399 | |
| 1400 | void azx_free_stream_pages(struct azx *chip) |
| 1401 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1402 | struct hdac_bus *bus = azx_bus(chip); |
| 1403 | struct hdac_stream *s, *next; |
| 1404 | |
| 1405 | list_for_each_entry_safe(s, next, &bus->stream_list, list) { |
| 1406 | if (s->bdl.area) |
| 1407 | chip->io_ops->dma_free_pages(azx_bus(chip), &s->bdl); |
| 1408 | kfree(s); |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1409 | } |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1410 | |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1411 | if (chip->rb.area) |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1412 | chip->io_ops->dma_free_pages(azx_bus(chip), &chip->rb); |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1413 | if (chip->posbuf.area) |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1414 | chip->io_ops->dma_free_pages(azx_bus(chip), &chip->posbuf); |
Dylan Reid | 6790899 | 2014-02-28 15:41:23 -0800 | [diff] [blame] | 1415 | } |
| 1416 | EXPORT_SYMBOL_GPL(azx_free_stream_pages); |
| 1417 | |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1418 | /* |
| 1419 | * Lowlevel interface |
| 1420 | */ |
| 1421 | |
| 1422 | /* enter link reset */ |
| 1423 | void azx_enter_link_reset(struct azx *chip) |
| 1424 | { |
| 1425 | unsigned long timeout; |
| 1426 | |
| 1427 | /* reset controller */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1428 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~AZX_GCTL_RESET); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1429 | |
| 1430 | timeout = jiffies + msecs_to_jiffies(100); |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1431 | while ((azx_readb(chip, GCTL) & AZX_GCTL_RESET) && |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1432 | time_before(jiffies, timeout)) |
| 1433 | usleep_range(500, 1000); |
| 1434 | } |
| 1435 | EXPORT_SYMBOL_GPL(azx_enter_link_reset); |
| 1436 | |
| 1437 | /* exit link reset */ |
| 1438 | static void azx_exit_link_reset(struct azx *chip) |
| 1439 | { |
| 1440 | unsigned long timeout; |
| 1441 | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1442 | azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | AZX_GCTL_RESET); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1443 | |
| 1444 | timeout = jiffies + msecs_to_jiffies(100); |
| 1445 | while (!azx_readb(chip, GCTL) && |
| 1446 | time_before(jiffies, timeout)) |
| 1447 | usleep_range(500, 1000); |
| 1448 | } |
| 1449 | |
| 1450 | /* reset codec link */ |
Thierry Reding | 17c3ad0 | 2014-04-09 12:30:57 +0200 | [diff] [blame] | 1451 | static int azx_reset(struct azx *chip, bool full_reset) |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1452 | { |
| 1453 | if (!full_reset) |
| 1454 | goto __skip; |
| 1455 | |
| 1456 | /* clear STATESTS */ |
| 1457 | azx_writew(chip, STATESTS, STATESTS_INT_MASK); |
| 1458 | |
| 1459 | /* reset controller */ |
| 1460 | azx_enter_link_reset(chip); |
| 1461 | |
| 1462 | /* delay for >= 100us for codec PLL to settle per spec |
| 1463 | * Rev 0.9 section 5.5.1 |
| 1464 | */ |
| 1465 | usleep_range(500, 1000); |
| 1466 | |
| 1467 | /* Bring controller out of reset */ |
| 1468 | azx_exit_link_reset(chip); |
| 1469 | |
| 1470 | /* Brent Chartrand said to wait >= 540us for codecs to initialize */ |
| 1471 | usleep_range(1000, 1200); |
| 1472 | |
| 1473 | __skip: |
| 1474 | /* check to see if controller is ready */ |
| 1475 | if (!azx_readb(chip, GCTL)) { |
| 1476 | dev_dbg(chip->card->dev, "azx_reset: controller not ready!\n"); |
| 1477 | return -EBUSY; |
| 1478 | } |
| 1479 | |
| 1480 | /* Accept unsolicited responses */ |
| 1481 | if (!chip->single_cmd) |
| 1482 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1483 | AZX_GCTL_UNSOL); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1484 | |
| 1485 | /* detect codecs */ |
| 1486 | if (!chip->codec_mask) { |
| 1487 | chip->codec_mask = azx_readw(chip, STATESTS); |
| 1488 | dev_dbg(chip->card->dev, "codec_mask = 0x%x\n", |
| 1489 | chip->codec_mask); |
| 1490 | } |
| 1491 | |
| 1492 | return 0; |
| 1493 | } |
| 1494 | |
| 1495 | /* enable interrupts */ |
| 1496 | static void azx_int_enable(struct azx *chip) |
| 1497 | { |
| 1498 | /* enable controller CIE and GIE */ |
| 1499 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1500 | AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1501 | } |
| 1502 | |
| 1503 | /* disable interrupts */ |
| 1504 | static void azx_int_disable(struct azx *chip) |
| 1505 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1506 | struct hdac_bus *bus = azx_bus(chip); |
| 1507 | struct hdac_stream *s; |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1508 | |
| 1509 | /* disable interrupts in stream descriptor */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1510 | list_for_each_entry(s, &bus->stream_list, list) |
| 1511 | snd_hdac_stream_updateb(s, SD_CTL, SD_INT_MASK, 0); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1512 | |
| 1513 | /* disable SIE for all streams */ |
| 1514 | azx_writeb(chip, INTCTL, 0); |
| 1515 | |
| 1516 | /* disable controller CIE and GIE */ |
| 1517 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1518 | ~(AZX_INT_CTRL_EN | AZX_INT_GLOBAL_EN)); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1519 | } |
| 1520 | |
| 1521 | /* clear interrupts */ |
| 1522 | static void azx_int_clear(struct azx *chip) |
| 1523 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1524 | struct hdac_bus *bus = azx_bus(chip); |
| 1525 | struct hdac_stream *s; |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1526 | |
| 1527 | /* clear stream status */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1528 | list_for_each_entry(s, &bus->stream_list, list) |
| 1529 | snd_hdac_stream_writeb(s, SD_STS, SD_INT_MASK); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1530 | |
| 1531 | /* clear STATESTS */ |
| 1532 | azx_writew(chip, STATESTS, STATESTS_INT_MASK); |
| 1533 | |
| 1534 | /* clear rirb status */ |
| 1535 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 1536 | |
| 1537 | /* clear int status */ |
Takashi Iwai | fb1d8ac | 2014-06-26 17:54:37 +0200 | [diff] [blame] | 1538 | azx_writel(chip, INTSTS, AZX_INT_CTRL_EN | AZX_INT_ALL_STREAM); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1539 | } |
| 1540 | |
| 1541 | /* |
| 1542 | * reset and start the controller registers |
| 1543 | */ |
Thierry Reding | 17c3ad0 | 2014-04-09 12:30:57 +0200 | [diff] [blame] | 1544 | void azx_init_chip(struct azx *chip, bool full_reset) |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1545 | { |
| 1546 | if (chip->initialized) |
| 1547 | return; |
| 1548 | |
| 1549 | /* reset controller */ |
| 1550 | azx_reset(chip, full_reset); |
| 1551 | |
| 1552 | /* initialize interrupts */ |
| 1553 | azx_int_clear(chip); |
| 1554 | azx_int_enable(chip); |
| 1555 | |
| 1556 | /* initialize the codec command I/O */ |
| 1557 | if (!chip->single_cmd) |
| 1558 | azx_init_cmd_io(chip); |
| 1559 | |
| 1560 | /* program the position buffer */ |
| 1561 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); |
| 1562 | azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr)); |
| 1563 | |
| 1564 | chip->initialized = 1; |
| 1565 | } |
| 1566 | EXPORT_SYMBOL_GPL(azx_init_chip); |
| 1567 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1568 | void azx_stop_all_streams(struct azx *chip) |
| 1569 | { |
| 1570 | struct hdac_bus *bus = azx_bus(chip); |
| 1571 | struct hdac_stream *s; |
| 1572 | |
| 1573 | list_for_each_entry(s, &bus->stream_list, list) |
| 1574 | snd_hdac_stream_stop(s); |
| 1575 | } |
| 1576 | EXPORT_SYMBOL_GPL(azx_stop_all_streams); |
| 1577 | |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1578 | void azx_stop_chip(struct azx *chip) |
| 1579 | { |
| 1580 | if (!chip->initialized) |
| 1581 | return; |
| 1582 | |
| 1583 | /* disable interrupts */ |
| 1584 | azx_int_disable(chip); |
| 1585 | azx_int_clear(chip); |
| 1586 | |
| 1587 | /* disable CORB/RIRB */ |
| 1588 | azx_free_cmd_io(chip); |
| 1589 | |
| 1590 | /* disable position buffer */ |
| 1591 | azx_writel(chip, DPLBASE, 0); |
| 1592 | azx_writel(chip, DPUBASE, 0); |
| 1593 | |
| 1594 | chip->initialized = 0; |
| 1595 | } |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1596 | EXPORT_SYMBOL_GPL(azx_stop_chip); |
Dylan Reid | f43923f | 2014-02-28 15:41:27 -0800 | [diff] [blame] | 1597 | |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1598 | /* |
| 1599 | * interrupt handler |
| 1600 | */ |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1601 | static void stream_update(struct hdac_bus *bus, struct hdac_stream *s) |
| 1602 | { |
| 1603 | struct hda_bus *hbus = container_of(bus, struct hda_bus, core); |
| 1604 | struct azx *chip = hbus->private_data; |
| 1605 | struct azx_dev *azx_dev = stream_to_azx_dev(s); |
| 1606 | |
| 1607 | /* check whether this IRQ is really acceptable */ |
| 1608 | if (!chip->ops->position_check || |
| 1609 | chip->ops->position_check(chip, azx_dev)) { |
| 1610 | spin_unlock(&chip->reg_lock); |
| 1611 | snd_pcm_period_elapsed(azx_dev->core.substream); |
| 1612 | spin_lock(&chip->reg_lock); |
| 1613 | } |
| 1614 | } |
| 1615 | |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1616 | irqreturn_t azx_interrupt(int irq, void *dev_id) |
| 1617 | { |
| 1618 | struct azx *chip = dev_id; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1619 | struct hdac_bus *bus = azx_bus(chip); |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1620 | u32 status; |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1621 | |
Rafael J. Wysocki | 641d334 | 2014-12-13 00:42:18 +0100 | [diff] [blame] | 1622 | #ifdef CONFIG_PM |
Takashi Iwai | 364aa71 | 2015-02-19 16:51:17 +0100 | [diff] [blame] | 1623 | if (azx_has_pm_runtime(chip)) |
Dylan Reid | 7b0a48f | 2014-04-08 12:06:18 -0700 | [diff] [blame] | 1624 | if (!pm_runtime_active(chip->card->dev)) |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1625 | return IRQ_NONE; |
| 1626 | #endif |
| 1627 | |
| 1628 | spin_lock(&chip->reg_lock); |
| 1629 | |
| 1630 | if (chip->disabled) { |
| 1631 | spin_unlock(&chip->reg_lock); |
| 1632 | return IRQ_NONE; |
| 1633 | } |
| 1634 | |
| 1635 | status = azx_readl(chip, INTSTS); |
| 1636 | if (status == 0 || status == 0xffffffff) { |
| 1637 | spin_unlock(&chip->reg_lock); |
| 1638 | return IRQ_NONE; |
| 1639 | } |
| 1640 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1641 | snd_hdac_bus_handle_stream_irq(bus, status, stream_update); |
Dylan Reid | f0b1df8 | 2014-02-28 15:41:29 -0800 | [diff] [blame] | 1642 | |
| 1643 | /* clear rirb int */ |
| 1644 | status = azx_readb(chip, RIRBSTS); |
| 1645 | if (status & RIRB_INT_MASK) { |
| 1646 | if (status & RIRB_INT_RESPONSE) { |
| 1647 | if (chip->driver_caps & AZX_DCAPS_RIRB_PRE_DELAY) |
| 1648 | udelay(80); |
| 1649 | azx_update_rirb(chip); |
| 1650 | } |
| 1651 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 1652 | } |
| 1653 | |
| 1654 | spin_unlock(&chip->reg_lock); |
| 1655 | |
| 1656 | return IRQ_HANDLED; |
| 1657 | } |
| 1658 | EXPORT_SYMBOL_GPL(azx_interrupt); |
| 1659 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1660 | /* |
| 1661 | * Codec initerface |
| 1662 | */ |
| 1663 | |
| 1664 | /* |
| 1665 | * Probe the given codec address |
| 1666 | */ |
| 1667 | static int probe_codec(struct azx *chip, int addr) |
| 1668 | { |
| 1669 | unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) | |
| 1670 | (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1671 | struct hdac_bus *bus = azx_bus(chip); |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1672 | int err; |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1673 | unsigned int res; |
| 1674 | |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1675 | mutex_lock(&bus->cmd_mutex); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1676 | chip->probing = 1; |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1677 | azx_send_cmd(bus, cmd); |
| 1678 | err = azx_get_response(bus, addr, &res); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1679 | chip->probing = 0; |
Takashi Iwai | 7e8be1b | 2015-04-14 16:55:31 +0200 | [diff] [blame] | 1680 | mutex_unlock(&bus->cmd_mutex); |
Takashi Iwai | cad372f | 2015-03-25 17:57:00 +0100 | [diff] [blame] | 1681 | if (err < 0 || res == -1) |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1682 | return -EIO; |
| 1683 | dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr); |
| 1684 | return 0; |
| 1685 | } |
| 1686 | |
| 1687 | static void azx_bus_reset(struct hda_bus *bus) |
| 1688 | { |
| 1689 | struct azx *chip = bus->private_data; |
| 1690 | |
| 1691 | bus->in_reset = 1; |
| 1692 | azx_stop_chip(chip); |
Thierry Reding | 17c3ad0 | 2014-04-09 12:30:57 +0200 | [diff] [blame] | 1693 | azx_init_chip(chip, true); |
Takashi Iwai | 59ed1ea | 2015-02-18 15:39:59 +0100 | [diff] [blame] | 1694 | if (chip->initialized) |
| 1695 | snd_hda_bus_reset(chip->bus); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1696 | bus->in_reset = 0; |
| 1697 | } |
| 1698 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1699 | static int get_jackpoll_interval(struct azx *chip) |
| 1700 | { |
| 1701 | int i; |
| 1702 | unsigned int j; |
| 1703 | |
| 1704 | if (!chip->jackpoll_ms) |
| 1705 | return 0; |
| 1706 | |
| 1707 | i = chip->jackpoll_ms[chip->dev_index]; |
| 1708 | if (i == 0) |
| 1709 | return 0; |
| 1710 | if (i < 50 || i > 60000) |
| 1711 | j = 0; |
| 1712 | else |
| 1713 | j = msecs_to_jiffies(i); |
| 1714 | if (j == 0) |
| 1715 | dev_warn(chip->card->dev, |
| 1716 | "jackpoll_ms value out of range: %d\n", i); |
| 1717 | return j; |
| 1718 | } |
| 1719 | |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1720 | static struct hda_bus_ops bus_ops = { |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1721 | .attach_pcm = azx_attach_pcm_stream, |
| 1722 | .bus_reset = azx_bus_reset, |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1723 | #ifdef CONFIG_SND_HDA_DSP_LOADER |
| 1724 | .load_dsp_prepare = azx_load_dsp_prepare, |
| 1725 | .load_dsp_trigger = azx_load_dsp_trigger, |
| 1726 | .load_dsp_cleanup = azx_load_dsp_cleanup, |
| 1727 | #endif |
| 1728 | }; |
| 1729 | |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 1730 | /* HD-audio bus initialization */ |
Takashi Iwai | bb57392 | 2015-02-20 09:26:04 +0100 | [diff] [blame] | 1731 | int azx_bus_create(struct azx *chip, const char *model) |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1732 | { |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1733 | struct hda_bus *bus; |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 1734 | int err; |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1735 | |
Takashi Iwai | a43ff5b | 2015-04-14 17:26:00 +0200 | [diff] [blame] | 1736 | err = snd_hda_bus_new(chip->card, &bus_core_ops, chip->io_ops, &bus); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1737 | if (err < 0) |
| 1738 | return err; |
| 1739 | |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1740 | chip->bus = bus; |
| 1741 | bus->private_data = chip; |
| 1742 | bus->pci = chip->pci; |
| 1743 | bus->modelname = model; |
| 1744 | bus->ops = bus_ops; |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1745 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1746 | if (chip->driver_caps & AZX_DCAPS_RIRB_DELAY) { |
| 1747 | dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n"); |
Takashi Iwai | ef74497 | 2015-02-17 13:56:29 +0100 | [diff] [blame] | 1748 | bus->needs_damn_long_delay = 1; |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1749 | } |
| 1750 | |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 1751 | /* AMD chipsets often cause the communication stalls upon certain |
| 1752 | * sequence like the pin-detection. It seems that forcing the synced |
| 1753 | * access works around the stall. Grrr... |
| 1754 | */ |
| 1755 | if (chip->driver_caps & AZX_DCAPS_SYNC_WRITE) { |
| 1756 | dev_dbg(chip->card->dev, "Enable sync_write for stable communication\n"); |
Takashi Iwai | d068ebc | 2015-03-02 23:22:59 +0100 | [diff] [blame] | 1757 | bus->core.sync_write = 1; |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 1758 | bus->allow_bus_reset = 1; |
| 1759 | } |
| 1760 | |
| 1761 | return 0; |
| 1762 | } |
| 1763 | EXPORT_SYMBOL_GPL(azx_bus_create); |
| 1764 | |
| 1765 | /* Probe codecs */ |
| 1766 | int azx_probe_codecs(struct azx *chip, unsigned int max_slots) |
| 1767 | { |
| 1768 | struct hda_bus *bus = chip->bus; |
| 1769 | int c, codecs, err; |
| 1770 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1771 | codecs = 0; |
| 1772 | if (!max_slots) |
| 1773 | max_slots = AZX_DEFAULT_CODECS; |
| 1774 | |
| 1775 | /* First try to probe all given codec slots */ |
| 1776 | for (c = 0; c < max_slots; c++) { |
| 1777 | if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { |
| 1778 | if (probe_codec(chip, c) < 0) { |
| 1779 | /* Some BIOSen give you wrong codec addresses |
| 1780 | * that don't exist |
| 1781 | */ |
| 1782 | dev_warn(chip->card->dev, |
| 1783 | "Codec #%d probe error; disabling it...\n", c); |
| 1784 | chip->codec_mask &= ~(1 << c); |
| 1785 | /* More badly, accessing to a non-existing |
| 1786 | * codec often screws up the controller chip, |
| 1787 | * and disturbs the further communications. |
| 1788 | * Thus if an error occurs during probing, |
| 1789 | * better to reset the controller chip to |
| 1790 | * get back to the sanity state. |
| 1791 | */ |
| 1792 | azx_stop_chip(chip); |
Thierry Reding | 17c3ad0 | 2014-04-09 12:30:57 +0200 | [diff] [blame] | 1793 | azx_init_chip(chip, true); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1794 | } |
| 1795 | } |
| 1796 | } |
| 1797 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1798 | /* Then create codec instances */ |
| 1799 | for (c = 0; c < max_slots; c++) { |
| 1800 | if ((chip->codec_mask & (1 << c)) & chip->codec_probe_mask) { |
| 1801 | struct hda_codec *codec; |
Takashi Iwai | 6efdd85 | 2015-02-27 16:09:22 +0100 | [diff] [blame] | 1802 | err = snd_hda_codec_new(bus, bus->card, c, &codec); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1803 | if (err < 0) |
| 1804 | continue; |
| 1805 | codec->jackpoll_interval = get_jackpoll_interval(chip); |
| 1806 | codec->beep_mode = chip->beep_mode; |
| 1807 | codecs++; |
| 1808 | } |
| 1809 | } |
| 1810 | if (!codecs) { |
| 1811 | dev_err(chip->card->dev, "no codecs initialized\n"); |
| 1812 | return -ENXIO; |
| 1813 | } |
| 1814 | return 0; |
| 1815 | } |
Takashi Iwai | 96d2bd6 | 2015-02-19 18:12:22 +0100 | [diff] [blame] | 1816 | EXPORT_SYMBOL_GPL(azx_probe_codecs); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1817 | |
| 1818 | /* configure each codec instance */ |
| 1819 | int azx_codec_configure(struct azx *chip) |
| 1820 | { |
| 1821 | struct hda_codec *codec; |
Takashi Iwai | d068ebc | 2015-03-02 23:22:59 +0100 | [diff] [blame] | 1822 | list_for_each_codec(codec, chip->bus) { |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1823 | snd_hda_codec_configure(codec); |
| 1824 | } |
| 1825 | return 0; |
| 1826 | } |
| 1827 | EXPORT_SYMBOL_GPL(azx_codec_configure); |
| 1828 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1829 | static int stream_direction(struct azx *chip, unsigned char index) |
Rafal Redzimski | 93e3423 | 2014-12-19 08:44:30 +0800 | [diff] [blame] | 1830 | { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1831 | if (index >= chip->capture_index_offset && |
| 1832 | index < chip->capture_index_offset + chip->capture_streams) |
| 1833 | return SNDRV_PCM_STREAM_CAPTURE; |
| 1834 | return SNDRV_PCM_STREAM_PLAYBACK; |
Rafal Redzimski | 93e3423 | 2014-12-19 08:44:30 +0800 | [diff] [blame] | 1835 | } |
| 1836 | |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1837 | /* initialize SD streams */ |
| 1838 | int azx_init_stream(struct azx *chip) |
| 1839 | { |
| 1840 | int i; |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1841 | int stream_tags[2] = { 0, 0 }; |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1842 | |
| 1843 | /* initialize each stream (aka device) |
| 1844 | * assign the starting bdl address to each stream (device) |
| 1845 | * and initialize |
| 1846 | */ |
| 1847 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1848 | struct azx_dev *azx_dev = kzalloc(sizeof(*azx_dev), GFP_KERNEL); |
| 1849 | int dir, tag; |
Rafal Redzimski | 93e3423 | 2014-12-19 08:44:30 +0800 | [diff] [blame] | 1850 | |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1851 | if (!azx_dev) |
| 1852 | return -ENOMEM; |
| 1853 | |
| 1854 | dir = stream_direction(chip, i); |
Rafal Redzimski | 93e3423 | 2014-12-19 08:44:30 +0800 | [diff] [blame] | 1855 | /* stream tag must be unique throughout |
| 1856 | * the stream direction group, |
| 1857 | * valid values 1...15 |
| 1858 | * use separate stream tag if the flag |
| 1859 | * AZX_DCAPS_SEPARATE_STREAM_TAG is used |
| 1860 | */ |
| 1861 | if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG) |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1862 | tag = ++stream_tags[dir]; |
Rafal Redzimski | 93e3423 | 2014-12-19 08:44:30 +0800 | [diff] [blame] | 1863 | else |
Takashi Iwai | 7833c3f | 2015-04-14 18:13:13 +0200 | [diff] [blame^] | 1864 | tag = i + 1; |
| 1865 | snd_hdac_stream_init(azx_bus(chip), azx_stream(azx_dev), |
| 1866 | i, dir, tag); |
Dylan Reid | 154867c | 2014-02-28 15:41:30 -0800 | [diff] [blame] | 1867 | } |
| 1868 | |
| 1869 | return 0; |
| 1870 | } |
| 1871 | EXPORT_SYMBOL_GPL(azx_init_stream); |