blob: 8ca94d379bc35f2020dea0ea3e708b0fbb0bb827 [file] [log] [blame]
Tony Lindgren92105bb2005-09-07 17:20:26 +01001/*
2 * linux/arch/arm/plat-omap/dmtimer.c
3 *
4 * OMAP Dual-Mode Timers
5 *
Tarun Kanti DebBarma97933d62011-09-20 17:00:17 +05306 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * dmtimer adaptation to platform_driver.
11 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010012 * Copyright (C) 2005 Nokia Corporation
Timo Teras77900a22006-06-26 16:16:12 -070013 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
Tony Lindgren92105bb2005-09-07 17:20:26 +010015 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070016 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
18 *
Tony Lindgren92105bb2005-09-07 17:20:26 +010019 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
23 *
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
Jon Hunterb1538832012-09-28 11:43:30 -050038#include <linux/clk.h>
Axel Lin869dec12011-11-02 09:49:46 +080039#include <linux/module.h>
Russell Kingfced80c2008-09-06 12:10:45 +010040#include <linux/io.h>
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +053041#include <linux/device.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053042#include <linux/err.h>
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +053043#include <linux/pm_runtime.h>
Jon Hunter9725f442012-05-14 10:41:37 -050044#include <linux/of.h>
45#include <linux/of_device.h>
Jon Hunter40fc3bb2012-09-28 11:34:49 -050046#include <linux/platform_device.h>
47#include <linux/platform_data/dmtimer-omap.h>
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053048
Tony Lindgrence491cf2009-10-20 09:40:47 -070049#include <plat/dmtimer.h>
Tony Lindgren2c799ce2012-02-24 10:34:35 -080050
Jon Hunterb7b4ff72012-06-05 12:34:51 -050051static u32 omap_reserved_systimers;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +053052static LIST_HEAD(omap_timer_list);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053053static DEFINE_SPINLOCK(dm_timer_lock);
Tony Lindgren92105bb2005-09-07 17:20:26 +010054
Jon Hunter8fc7fcb2013-03-19 12:38:17 -050055enum {
56 REQUEST_ANY = 0,
57 REQUEST_BY_ID,
58 REQUEST_BY_CAP,
59 REQUEST_BY_NODE,
60};
61
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053062/**
63 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
64 * @timer: timer pointer over which read operation to perform
65 * @reg: lowest byte holds the register offset
66 *
67 * The posted mode bit is encoded in reg. Note that in posted mode write
68 * pending bit must be checked. Otherwise a read of a non completed write
69 * will produce an error.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030070 */
71static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
Tony Lindgren92105bb2005-09-07 17:20:26 +010072{
Tony Lindgrenee17f112011-09-16 15:44:20 -070073 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
74 return __omap_dm_timer_read(timer, reg, timer->posted);
Timo Teras77900a22006-06-26 16:16:12 -070075}
76
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +053077/**
78 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
79 * @timer: timer pointer over which write operation is to perform
80 * @reg: lowest byte holds the register offset
81 * @value: data to write into the register
82 *
83 * The posted mode bit is encoded in reg. Note that in posted mode the write
84 * pending bit must be checked. Otherwise a write on a register which has a
85 * pending write will be lost.
Richard Woodruff0f0d0802008-07-03 12:24:30 +030086 */
87static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
88 u32 value)
Timo Teras77900a22006-06-26 16:16:12 -070089{
Tony Lindgrenee17f112011-09-16 15:44:20 -070090 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
91 __omap_dm_timer_write(timer, reg, value, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +010092}
93
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053094static void omap_timer_restore_context(struct omap_dm_timer *timer)
95{
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +053096 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
97 timer->context.twer);
98 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
99 timer->context.tcrr);
100 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
101 timer->context.tldr);
102 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
103 timer->context.tmar);
104 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
105 timer->context.tsicr);
Victor Kamensky834cacf2014-04-15 20:37:47 +0300106 writel_relaxed(timer->context.tier, timer->irq_ena);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530107 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
108 timer->context.tclr);
109}
110
Jon Hunterae6672c2012-07-11 13:47:38 -0500111static int omap_dm_timer_reset(struct omap_dm_timer *timer)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100112{
Jon Hunterae6672c2012-07-11 13:47:38 -0500113 u32 l, timeout = 100000;
Timo Teras77900a22006-06-26 16:16:12 -0700114
Jon Hunterae6672c2012-07-11 13:47:38 -0500115 if (timer->revision != 1)
116 return -EINVAL;
Tony Lindgrenee17f112011-09-16 15:44:20 -0700117
Jon Hunterffc957b2012-07-06 16:46:35 -0500118 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
Jon Hunterae6672c2012-07-11 13:47:38 -0500119
120 do {
121 l = __omap_dm_timer_read(timer,
122 OMAP_TIMER_V1_SYS_STAT_OFFSET, 0);
123 } while (!l && timeout--);
124
125 if (!timeout) {
126 dev_err(&timer->pdev->dev, "Timer failed to reset\n");
127 return -ETIMEDOUT;
128 }
129
130 /* Configure timer for smart-idle mode */
131 l = __omap_dm_timer_read(timer, OMAP_TIMER_OCP_CFG_OFFSET, 0);
132 l |= 0x2 << 0x3;
133 __omap_dm_timer_write(timer, OMAP_TIMER_OCP_CFG_OFFSET, l, 0);
134
135 timer->posted = 0;
136
137 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700138}
139
Jon Hunterb0cadb32012-09-28 12:21:09 -0500140static int omap_dm_timer_prepare(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700141{
Jon Hunterae6672c2012-07-11 13:47:38 -0500142 int rc;
143
Jon Hunterbca45802012-06-05 12:34:58 -0500144 /*
145 * FIXME: OMAP1 devices do not use the clock framework for dmtimers so
146 * do not call clk_get() for these devices.
147 */
148 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
149 timer->fclk = clk_get(&timer->pdev->dev, "fck");
Russell King86287952013-02-24 10:46:59 +0000150 if (WARN_ON_ONCE(IS_ERR(timer->fclk))) {
Jon Hunterbca45802012-06-05 12:34:58 -0500151 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
152 return -EINVAL;
153 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530154 }
155
Jon Hunter7b44cf22012-07-06 16:45:04 -0500156 omap_dm_timer_enable(timer);
157
Jon Hunterae6672c2012-07-11 13:47:38 -0500158 if (timer->capability & OMAP_TIMER_NEEDS_RESET) {
159 rc = omap_dm_timer_reset(timer);
160 if (rc) {
161 omap_dm_timer_disable(timer);
162 return rc;
163 }
164 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530165
Jon Hunter7b44cf22012-07-06 16:45:04 -0500166 __omap_dm_timer_enable_posted(timer);
167 omap_dm_timer_disable(timer);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530168
Jon Hunter7b44cf22012-07-06 16:45:04 -0500169 return omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
Timo Teras77900a22006-06-26 16:16:12 -0700170}
171
Jon Hunterb7b4ff72012-06-05 12:34:51 -0500172static inline u32 omap_dm_timer_reserved_systimer(int id)
173{
174 return (omap_reserved_systimers & (1 << (id - 1))) ? 1 : 0;
175}
176
177int omap_dm_timer_reserve_systimer(int id)
178{
179 if (omap_dm_timer_reserved_systimer(id))
180 return -ENODEV;
181
182 omap_reserved_systimers |= (1 << (id - 1));
183
184 return 0;
185}
186
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500187static struct omap_dm_timer *_omap_dm_timer_request(int req_type, void *data)
Timo Teras77900a22006-06-26 16:16:12 -0700188{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530189 struct omap_dm_timer *timer = NULL, *t;
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500190 struct device_node *np = NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700191 unsigned long flags;
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500192 u32 cap = 0;
193 int id = 0;
194
195 switch (req_type) {
196 case REQUEST_BY_ID:
197 id = *(int *)data;
198 break;
199 case REQUEST_BY_CAP:
200 cap = *(u32 *)data;
201 break;
202 case REQUEST_BY_NODE:
203 np = (struct device_node *)data;
204 break;
205 default:
206 /* REQUEST_ANY */
207 break;
208 }
Timo Teras77900a22006-06-26 16:16:12 -0700209
210 spin_lock_irqsave(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530211 list_for_each_entry(t, &omap_timer_list, node) {
212 if (t->reserved)
Timo Teras77900a22006-06-26 16:16:12 -0700213 continue;
214
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500215 switch (req_type) {
216 case REQUEST_BY_ID:
217 if (id == t->pdev->id) {
218 timer = t;
219 timer->reserved = 1;
220 goto found;
221 }
222 break;
223 case REQUEST_BY_CAP:
224 if (cap == (t->capability & cap)) {
225 /*
226 * If timer is not NULL, we have already found
227 * one timer but it was not an exact match
228 * because it had more capabilites that what
229 * was required. Therefore, unreserve the last
230 * timer found and see if this one is a better
231 * match.
232 */
233 if (timer)
234 timer->reserved = 0;
235 timer = t;
236 timer->reserved = 1;
237
238 /* Exit loop early if we find an exact match */
239 if (t->capability == cap)
240 goto found;
241 }
242 break;
243 case REQUEST_BY_NODE:
244 if (np == t->pdev->dev.of_node) {
245 timer = t;
246 timer->reserved = 1;
247 goto found;
248 }
249 break;
250 default:
251 /* REQUEST_ANY */
252 timer = t;
253 timer->reserved = 1;
254 goto found;
255 }
Timo Teras77900a22006-06-26 16:16:12 -0700256 }
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500257found:
Timo Kokkonenc5491d12012-08-12 13:45:34 +0300258 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530259
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500260 if (timer && omap_dm_timer_prepare(timer)) {
261 timer->reserved = 0;
262 timer = NULL;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530263 }
Timo Teras77900a22006-06-26 16:16:12 -0700264
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530265 if (!timer)
266 pr_debug("%s: timer request failed!\n", __func__);
Timo Teras83379c82006-06-26 16:16:23 -0700267
Timo Teras77900a22006-06-26 16:16:12 -0700268 return timer;
269}
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500270
271struct omap_dm_timer *omap_dm_timer_request(void)
272{
273 return _omap_dm_timer_request(REQUEST_ANY, NULL);
274}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700275EXPORT_SYMBOL_GPL(omap_dm_timer_request);
Timo Teras77900a22006-06-26 16:16:12 -0700276
277struct omap_dm_timer *omap_dm_timer_request_specific(int id)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100278{
Jon Hunter9725f442012-05-14 10:41:37 -0500279 /* Requesting timer by ID is not supported when device tree is used */
280 if (of_have_populated_dt()) {
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500281 pr_warn("%s: Please use omap_dm_timer_request_by_cap/node()\n",
Jon Hunter9725f442012-05-14 10:41:37 -0500282 __func__);
283 return NULL;
284 }
285
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500286 return _omap_dm_timer_request(REQUEST_BY_ID, &id);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100287}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700288EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100289
Jon Hunter373fe0b2012-09-06 15:28:00 -0500290/**
291 * omap_dm_timer_request_by_cap - Request a timer by capability
292 * @cap: Bit mask of capabilities to match
293 *
294 * Find a timer based upon capabilities bit mask. Callers of this function
295 * should use the definitions found in the plat/dmtimer.h file under the
296 * comment "timer capabilities used in hwmod database". Returns pointer to
297 * timer handle on success and a NULL pointer on failure.
298 */
299struct omap_dm_timer *omap_dm_timer_request_by_cap(u32 cap)
300{
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500301 return _omap_dm_timer_request(REQUEST_BY_CAP, &cap);
Jon Hunter373fe0b2012-09-06 15:28:00 -0500302}
303EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_cap);
304
Jon Hunter8fc7fcb2013-03-19 12:38:17 -0500305/**
306 * omap_dm_timer_request_by_node - Request a timer by device-tree node
307 * @np: Pointer to device-tree timer node
308 *
309 * Request a timer based upon a device node pointer. Returns pointer to
310 * timer handle on success and a NULL pointer on failure.
311 */
312struct omap_dm_timer *omap_dm_timer_request_by_node(struct device_node *np)
313{
314 if (!np)
315 return NULL;
316
317 return _omap_dm_timer_request(REQUEST_BY_NODE, np);
318}
319EXPORT_SYMBOL_GPL(omap_dm_timer_request_by_node);
320
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530321int omap_dm_timer_free(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700322{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530323 if (unlikely(!timer))
324 return -EINVAL;
325
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530326 clk_put(timer->fclk);
Timo Terasfa4bb622006-09-25 12:41:35 +0300327
Timo Teras77900a22006-06-26 16:16:12 -0700328 WARN_ON(!timer->reserved);
329 timer->reserved = 0;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530330 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700331}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700332EXPORT_SYMBOL_GPL(omap_dm_timer_free);
Timo Teras77900a22006-06-26 16:16:12 -0700333
Timo Teras12583a72006-09-25 12:41:42 +0300334void omap_dm_timer_enable(struct omap_dm_timer *timer)
335{
NeilBrown9cc268d2013-03-19 12:38:15 -0500336 int c;
337
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530338 pm_runtime_get_sync(&timer->pdev->dev);
NeilBrown9cc268d2013-03-19 12:38:15 -0500339
340 if (!(timer->capability & OMAP_TIMER_ALWON)) {
341 if (timer->get_context_loss_count) {
342 c = timer->get_context_loss_count(&timer->pdev->dev);
343 if (c != timer->ctx_loss_count) {
344 omap_timer_restore_context(timer);
345 timer->ctx_loss_count = c;
346 }
Jon Hunter385c4c72013-03-19 12:38:16 -0500347 } else {
348 omap_timer_restore_context(timer);
NeilBrown9cc268d2013-03-19 12:38:15 -0500349 }
350 }
Timo Teras12583a72006-09-25 12:41:42 +0300351}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700352EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
Timo Teras12583a72006-09-25 12:41:42 +0300353
354void omap_dm_timer_disable(struct omap_dm_timer *timer)
355{
Jon Hunter54f32a32012-07-13 15:12:03 -0500356 pm_runtime_put_sync(&timer->pdev->dev);
Timo Teras12583a72006-09-25 12:41:42 +0300357}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700358EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
Timo Teras12583a72006-09-25 12:41:42 +0300359
Timo Teras77900a22006-06-26 16:16:12 -0700360int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
361{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530362 if (timer)
363 return timer->irq;
364 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700365}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700366EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
Timo Teras77900a22006-06-26 16:16:12 -0700367
368#if defined(CONFIG_ARCH_OMAP1)
Tony Lindgren7136f8d2012-10-31 12:38:43 -0700369#include <mach/hardware.h>
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100370/**
371 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
372 * @inputmask: current value of idlect mask
373 */
374__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
375{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530376 int i = 0;
377 struct omap_dm_timer *timer = NULL;
378 unsigned long flags;
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100379
380 /* If ARMXOR cannot be idled this function call is unnecessary */
381 if (!(inputmask & (1 << 1)))
382 return inputmask;
383
384 /* If any active timer is using ARMXOR return modified mask */
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530385 spin_lock_irqsave(&dm_timer_lock, flags);
386 list_for_each_entry(timer, &omap_timer_list, node) {
Timo Teras77900a22006-06-26 16:16:12 -0700387 u32 l;
388
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530389 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras77900a22006-06-26 16:16:12 -0700390 if (l & OMAP_TIMER_CTRL_ST) {
391 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100392 inputmask &= ~(1 << 1);
393 else
394 inputmask &= ~(1 << 2);
395 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530396 i++;
Timo Teras77900a22006-06-26 16:16:12 -0700397 }
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530398 spin_unlock_irqrestore(&dm_timer_lock, flags);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100399
400 return inputmask;
401}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700402EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Tony Lindgrena569c6e2006-04-02 17:46:21 +0100403
Tony Lindgren140455f2010-02-12 12:26:48 -0800404#else
Timo Teras77900a22006-06-26 16:16:12 -0700405
406struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
407{
Russell King86287952013-02-24 10:46:59 +0000408 if (timer && !IS_ERR(timer->fclk))
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530409 return timer->fclk;
410 return NULL;
Timo Teras77900a22006-06-26 16:16:12 -0700411}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700412EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
Timo Teras77900a22006-06-26 16:16:12 -0700413
414__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
415{
416 BUG();
Dirk Behme21218802006-12-06 17:14:00 -0800417
418 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700419}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700420EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
Timo Teras77900a22006-06-26 16:16:12 -0700421
422#endif
423
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530424int omap_dm_timer_trigger(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700425{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530426 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
427 pr_err("%s: timer not available or enabled.\n", __func__);
428 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530429 }
430
Timo Teras77900a22006-06-26 16:16:12 -0700431 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530432 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700433}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700434EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
Timo Teras77900a22006-06-26 16:16:12 -0700435
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530436int omap_dm_timer_start(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700437{
438 u32 l;
439
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530440 if (unlikely(!timer))
441 return -EINVAL;
442
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530443 omap_dm_timer_enable(timer);
444
Timo Teras77900a22006-06-26 16:16:12 -0700445 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
446 if (!(l & OMAP_TIMER_CTRL_ST)) {
447 l |= OMAP_TIMER_CTRL_ST;
448 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
449 }
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530450
451 /* Save the context */
452 timer->context.tclr = l;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530453 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700454}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700455EXPORT_SYMBOL_GPL(omap_dm_timer_start);
Timo Teras77900a22006-06-26 16:16:12 -0700456
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530457int omap_dm_timer_stop(struct omap_dm_timer *timer)
Timo Teras77900a22006-06-26 16:16:12 -0700458{
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700459 unsigned long rate = 0;
Timo Teras77900a22006-06-26 16:16:12 -0700460
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530461 if (unlikely(!timer))
462 return -EINVAL;
463
Jon Hunter66159752012-06-05 12:34:57 -0500464 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530465 rate = clk_get_rate(timer->fclk);
Tony Lindgrencaf64f22011-03-29 15:54:48 -0700466
Tony Lindgrenee17f112011-09-16 15:44:20 -0700467 __omap_dm_timer_stop(timer, timer->posted, rate);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530468
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800469 /*
470 * Since the register values are computed and written within
471 * __omap_dm_timer_stop, we need to use read to retrieve the
472 * context.
473 */
474 timer->context.tclr =
475 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Tarun Kanti DebBarmadffc9da2012-03-05 16:11:00 -0800476 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530477 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700478}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700479EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
Timo Teras77900a22006-06-26 16:16:12 -0700480
Paul Walmsleyf2480762009-04-23 21:11:10 -0600481int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100482{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530483 int ret;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500484 char *parent_name = NULL;
Jon Hunterd7aba552012-07-18 20:10:12 -0500485 struct clk *parent;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530486 struct dmtimer_platform_data *pdata;
487
488 if (unlikely(!timer))
489 return -EINVAL;
490
491 pdata = timer->pdev->dev.platform_data;
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530492
Timo Teras77900a22006-06-26 16:16:12 -0700493 if (source < 0 || source >= 3)
Paul Walmsleyf2480762009-04-23 21:11:10 -0600494 return -EINVAL;
Timo Teras77900a22006-06-26 16:16:12 -0700495
Jon Hunter2b2d3522012-06-05 12:34:59 -0500496 /*
497 * FIXME: Used for OMAP1 devices only because they do not currently
498 * use the clock framework to set the parent clock. To be removed
499 * once OMAP1 migrated to using clock framework for dmtimers
500 */
Jon Hunter9725f442012-05-14 10:41:37 -0500501 if (pdata && pdata->set_timer_src)
Jon Hunter2b2d3522012-06-05 12:34:59 -0500502 return pdata->set_timer_src(timer->pdev, source);
503
Russell King86287952013-02-24 10:46:59 +0000504 if (IS_ERR(timer->fclk))
Jon Hunter2b2d3522012-06-05 12:34:59 -0500505 return -EINVAL;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500506
507 switch (source) {
508 case OMAP_TIMER_SRC_SYS_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500509 parent_name = "timer_sys_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500510 break;
511
512 case OMAP_TIMER_SRC_32_KHZ:
Jon Hunterc59b5372012-06-05 12:35:00 -0500513 parent_name = "timer_32k_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500514 break;
515
516 case OMAP_TIMER_SRC_EXT_CLK:
Jon Hunterc59b5372012-06-05 12:35:00 -0500517 parent_name = "timer_ext_ck";
Jon Hunter2b2d3522012-06-05 12:34:59 -0500518 break;
519 }
520
521 parent = clk_get(&timer->pdev->dev, parent_name);
Russell King86287952013-02-24 10:46:59 +0000522 if (IS_ERR(parent)) {
Jon Hunter2b2d3522012-06-05 12:34:59 -0500523 pr_err("%s: %s not found\n", __func__, parent_name);
Jon Hunterd7aba552012-07-18 20:10:12 -0500524 return -EINVAL;
Jon Hunter2b2d3522012-06-05 12:34:59 -0500525 }
526
Jon Hunterd7aba552012-07-18 20:10:12 -0500527 ret = clk_set_parent(timer->fclk, parent);
Russell Kingc48cd652013-03-13 20:44:21 +0000528 if (ret < 0)
Jon Hunter2b2d3522012-06-05 12:34:59 -0500529 pr_err("%s: failed to set %s as parent\n", __func__,
530 parent_name);
531
532 clk_put(parent);
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530533
534 return ret;
Timo Teras77900a22006-06-26 16:16:12 -0700535}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700536EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
Timo Teras77900a22006-06-26 16:16:12 -0700537
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530538int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
Timo Teras77900a22006-06-26 16:16:12 -0700539 unsigned int load)
540{
541 u32 l;
542
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530543 if (unlikely(!timer))
544 return -EINVAL;
545
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530546 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700547 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
548 if (autoreload)
549 l |= OMAP_TIMER_CTRL_AR;
550 else
551 l &= ~OMAP_TIMER_CTRL_AR;
552 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
553 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
Richard Woodruff0f0d0802008-07-03 12:24:30 +0300554
Timo Teras77900a22006-06-26 16:16:12 -0700555 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530556 /* Save the context */
557 timer->context.tclr = l;
558 timer->context.tldr = load;
559 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530560 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700561}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700562EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
Timo Teras77900a22006-06-26 16:16:12 -0700563
Richard Woodruff3fddd092008-07-03 12:24:30 +0300564/* Optimized set_load which removes costly spin wait in timer_start */
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530565int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
Richard Woodruff3fddd092008-07-03 12:24:30 +0300566 unsigned int load)
567{
568 u32 l;
569
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530570 if (unlikely(!timer))
571 return -EINVAL;
572
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530573 omap_dm_timer_enable(timer);
574
Richard Woodruff3fddd092008-07-03 12:24:30 +0300575 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Paul Walmsley64ce2902008-12-10 17:36:34 -0800576 if (autoreload) {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300577 l |= OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800578 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
579 } else {
Richard Woodruff3fddd092008-07-03 12:24:30 +0300580 l &= ~OMAP_TIMER_CTRL_AR;
Paul Walmsley64ce2902008-12-10 17:36:34 -0800581 }
Richard Woodruff3fddd092008-07-03 12:24:30 +0300582 l |= OMAP_TIMER_CTRL_ST;
583
Tony Lindgrenee17f112011-09-16 15:44:20 -0700584 __omap_dm_timer_load_start(timer, l, load, timer->posted);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530585
586 /* Save the context */
587 timer->context.tclr = l;
588 timer->context.tldr = load;
589 timer->context.tcrr = load;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530590 return 0;
Richard Woodruff3fddd092008-07-03 12:24:30 +0300591}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700592EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
Richard Woodruff3fddd092008-07-03 12:24:30 +0300593
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530594int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
Timo Teras77900a22006-06-26 16:16:12 -0700595 unsigned int match)
596{
597 u32 l;
598
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530599 if (unlikely(!timer))
600 return -EINVAL;
601
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530602 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700603 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
Timo Teras83379c82006-06-26 16:16:23 -0700604 if (enable)
Timo Teras77900a22006-06-26 16:16:12 -0700605 l |= OMAP_TIMER_CTRL_CE;
606 else
607 l &= ~OMAP_TIMER_CTRL_CE;
Timo Teras77900a22006-06-26 16:16:12 -0700608 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
Jon Hunter991ad162012-10-04 18:17:42 -0500609 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530610
611 /* Save the context */
612 timer->context.tclr = l;
613 timer->context.tmar = match;
614 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530615 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100616}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700617EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100618
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530619int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
Timo Teras77900a22006-06-26 16:16:12 -0700620 int toggle, int trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100621{
Timo Teras77900a22006-06-26 16:16:12 -0700622 u32 l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100623
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530624 if (unlikely(!timer))
625 return -EINVAL;
626
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530627 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700628 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
629 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
630 OMAP_TIMER_CTRL_PT | (0x03 << 10));
631 if (def_on)
632 l |= OMAP_TIMER_CTRL_SCPWM;
633 if (toggle)
634 l |= OMAP_TIMER_CTRL_PT;
635 l |= trigger << 10;
636 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530637
638 /* Save the context */
639 timer->context.tclr = l;
640 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530641 return 0;
Timo Teras77900a22006-06-26 16:16:12 -0700642}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700643EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
Timo Teras77900a22006-06-26 16:16:12 -0700644
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530645int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
Timo Teras77900a22006-06-26 16:16:12 -0700646{
647 u32 l;
648
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530649 if (unlikely(!timer))
650 return -EINVAL;
651
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530652 omap_dm_timer_enable(timer);
Timo Teras77900a22006-06-26 16:16:12 -0700653 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
654 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
655 if (prescaler >= 0x00 && prescaler <= 0x07) {
656 l |= OMAP_TIMER_CTRL_PRE;
657 l |= prescaler << 2;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100658 }
Timo Teras77900a22006-06-26 16:16:12 -0700659 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530660
661 /* Save the context */
662 timer->context.tclr = l;
663 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530664 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100665}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700666EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100667
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530668int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
Timo Teras77900a22006-06-26 16:16:12 -0700669 unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100670{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530671 if (unlikely(!timer))
672 return -EINVAL;
673
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530674 omap_dm_timer_enable(timer);
Tony Lindgrenee17f112011-09-16 15:44:20 -0700675 __omap_dm_timer_int_enable(timer, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530676
677 /* Save the context */
678 timer->context.tier = value;
679 timer->context.twer = value;
680 omap_dm_timer_disable(timer);
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530681 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100682}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700683EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100684
Jon Hunter4249d962012-07-13 14:03:18 -0500685/**
686 * omap_dm_timer_set_int_disable - disable timer interrupts
687 * @timer: pointer to timer handle
688 * @mask: bit mask of interrupts to be disabled
689 *
690 * Disables the specified timer interrupts for a timer.
691 */
692int omap_dm_timer_set_int_disable(struct omap_dm_timer *timer, u32 mask)
693{
694 u32 l = mask;
695
696 if (unlikely(!timer))
697 return -EINVAL;
698
699 omap_dm_timer_enable(timer);
700
701 if (timer->revision == 1)
Victor Kamensky834cacf2014-04-15 20:37:47 +0300702 l = readl_relaxed(timer->irq_ena) & ~mask;
Jon Hunter4249d962012-07-13 14:03:18 -0500703
Victor Kamensky834cacf2014-04-15 20:37:47 +0300704 writel_relaxed(l, timer->irq_dis);
Jon Hunter4249d962012-07-13 14:03:18 -0500705 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_WAKEUP_EN_REG) & ~mask;
706 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, l);
707
708 /* Save the context */
709 timer->context.tier &= ~mask;
710 timer->context.twer &= ~mask;
711 omap_dm_timer_disable(timer);
712 return 0;
713}
714EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_disable);
715
Tony Lindgren92105bb2005-09-07 17:20:26 +0100716unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
717{
Timo Terasfa4bb622006-09-25 12:41:35 +0300718 unsigned int l;
719
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530720 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
721 pr_err("%s: timer not available or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530722 return 0;
723 }
724
Victor Kamensky834cacf2014-04-15 20:37:47 +0300725 l = readl_relaxed(timer->irq_stat);
Timo Terasfa4bb622006-09-25 12:41:35 +0300726
727 return l;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100728}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700729EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100730
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530731int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100732{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530733 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
734 return -EINVAL;
735
Tony Lindgrenee17f112011-09-16 15:44:20 -0700736 __omap_dm_timer_write_status(timer, value);
Jon Hunter1eaff71012012-10-04 17:01:14 -0500737
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530738 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100739}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700740EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100741
Tony Lindgren92105bb2005-09-07 17:20:26 +0100742unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
743{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530744 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
745 pr_err("%s: timer not iavailable or enabled.\n", __func__);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530746 return 0;
747 }
748
Tony Lindgrenee17f112011-09-16 15:44:20 -0700749 return __omap_dm_timer_read_counter(timer, timer->posted);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100750}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700751EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100752
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530753int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
Timo Teras83379c82006-06-26 16:16:23 -0700754{
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530755 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
756 pr_err("%s: timer not available or enabled.\n", __func__);
757 return -EINVAL;
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530758 }
759
Timo Terasfa4bb622006-09-25 12:41:35 +0300760 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
Tarun Kanti DebBarmab4811132011-09-20 17:00:24 +0530761
762 /* Save the context */
763 timer->context.tcrr = value;
Tarun Kanti DebBarmaab4eb8b2011-09-20 17:00:26 +0530764 return 0;
Timo Teras83379c82006-06-26 16:16:23 -0700765}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700766EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
Timo Teras83379c82006-06-26 16:16:23 -0700767
Timo Teras77900a22006-06-26 16:16:12 -0700768int omap_dm_timers_active(void)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100769{
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530770 struct omap_dm_timer *timer;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100771
Tarun Kanti DebBarma3392cdd2011-09-20 17:00:20 +0530772 list_for_each_entry(timer, &omap_timer_list, node) {
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530773 if (!timer->reserved)
Timo Teras12583a72006-09-25 12:41:42 +0300774 continue;
775
Timo Teras77900a22006-06-26 16:16:12 -0700776 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
Timo Terasfa4bb622006-09-25 12:41:35 +0300777 OMAP_TIMER_CTRL_ST) {
Timo Teras77900a22006-06-26 16:16:12 -0700778 return 1;
Timo Terasfa4bb622006-09-25 12:41:35 +0300779 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100780 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100781 return 0;
782}
Timo Kokkonen6c366e32009-03-23 18:07:46 -0700783EXPORT_SYMBOL_GPL(omap_dm_timers_active);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100784
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500785static const struct of_device_id omap_timer_match[];
786
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530787/**
788 * omap_dm_timer_probe - probe function called for every registered device
789 * @pdev: pointer to current timer platform device
790 *
791 * Called by driver framework at the end of device registration for all
792 * timer devices.
793 */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800794static int omap_dm_timer_probe(struct platform_device *pdev)
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530795{
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530796 unsigned long flags;
797 struct omap_dm_timer *timer;
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530798 struct resource *mem, *irq;
799 struct device *dev = &pdev->dev;
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500800 const struct of_device_id *match;
801 const struct dmtimer_platform_data *pdata;
Suman Annaa76fc9d2015-03-16 20:14:02 -0500802 int ret;
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500803
804 match = of_match_device(of_match_ptr(omap_timer_match), dev);
805 pdata = match ? match->data : dev->platform_data;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530806
Jon Hunter9725f442012-05-14 10:41:37 -0500807 if (!pdata && !dev->of_node) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530808 dev_err(dev, "%s: no platform data.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530809 return -ENODEV;
810 }
811
812 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
813 if (unlikely(!irq)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530814 dev_err(dev, "%s: no IRQ resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530815 return -ENODEV;
816 }
817
818 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
819 if (unlikely(!mem)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530820 dev_err(dev, "%s: no memory resource.\n", __func__);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530821 return -ENODEV;
822 }
823
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530824 timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530825 if (!timer) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530826 dev_err(dev, "%s: memory alloc failed!\n", __func__);
827 return -ENOMEM;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530828 }
829
Russell King86287952013-02-24 10:46:59 +0000830 timer->fclk = ERR_PTR(-ENODEV);
Thierry Reding5857bd92013-01-21 11:08:55 +0100831 timer->io_base = devm_ioremap_resource(dev, mem);
832 if (IS_ERR(timer->io_base))
833 return PTR_ERR(timer->io_base);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530834
Jon Hunter9725f442012-05-14 10:41:37 -0500835 if (dev->of_node) {
836 if (of_find_property(dev->of_node, "ti,timer-alwon", NULL))
837 timer->capability |= OMAP_TIMER_ALWON;
838 if (of_find_property(dev->of_node, "ti,timer-dsp", NULL))
839 timer->capability |= OMAP_TIMER_HAS_DSP_IRQ;
840 if (of_find_property(dev->of_node, "ti,timer-pwm", NULL))
841 timer->capability |= OMAP_TIMER_HAS_PWM;
842 if (of_find_property(dev->of_node, "ti,timer-secure", NULL))
843 timer->capability |= OMAP_TIMER_SECURE;
844 } else {
845 timer->id = pdev->id;
846 timer->capability = pdata->timer_capability;
847 timer->reserved = omap_dm_timer_reserved_systimer(timer->id);
Tony Lindgrenf56f52e2012-11-09 14:54:17 -0800848 timer->get_context_loss_count = pdata->get_context_loss_count;
Jon Hunter9725f442012-05-14 10:41:37 -0500849 }
850
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500851 if (pdata)
852 timer->errata = pdata->timer_errata;
853
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530854 timer->irq = irq->start;
855 timer->pdev = pdev;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530856
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530857 /* Skip pm_runtime_enable for OMAP1 */
Jon Hunter66159752012-06-05 12:34:57 -0500858 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530859 pm_runtime_enable(dev);
860 pm_runtime_irq_safe(dev);
Tarun Kanti DebBarmaffe07ce2011-09-20 17:00:21 +0530861 }
862
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700863 if (!timer->reserved) {
Suman Annaa76fc9d2015-03-16 20:14:02 -0500864 ret = pm_runtime_get_sync(dev);
865 if (ret < 0) {
866 dev_err(dev, "%s: pm_runtime_get_sync failed!\n",
867 __func__);
868 goto err_get_sync;
869 }
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700870 __omap_dm_timer_init_regs(timer);
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530871 pm_runtime_put(dev);
Tony Lindgren0dad9fa2011-09-21 16:38:51 -0700872 }
873
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530874 /* add the timer element to the list */
875 spin_lock_irqsave(&dm_timer_lock, flags);
876 list_add_tail(&timer->node, &omap_timer_list);
877 spin_unlock_irqrestore(&dm_timer_lock, flags);
878
Tarun Kanti DebBarma74dd9ec2012-04-20 18:09:20 +0530879 dev_dbg(dev, "Device Probed.\n");
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530880
881 return 0;
Suman Annaa76fc9d2015-03-16 20:14:02 -0500882
883err_get_sync:
884 pm_runtime_put_noidle(dev);
885 pm_runtime_disable(dev);
886 return ret;
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530887}
888
889/**
890 * omap_dm_timer_remove - cleanup a registered timer device
891 * @pdev: pointer to current timer platform device
892 *
893 * Called by driver framework whenever a timer device is unregistered.
894 * In addition to freeing platform resources it also deletes the timer
895 * entry from the local list.
896 */
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800897static int omap_dm_timer_remove(struct platform_device *pdev)
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530898{
899 struct omap_dm_timer *timer;
900 unsigned long flags;
901 int ret = -EINVAL;
902
903 spin_lock_irqsave(&dm_timer_lock, flags);
904 list_for_each_entry(timer, &omap_timer_list, node)
Jon Hunter9725f442012-05-14 10:41:37 -0500905 if (!strcmp(dev_name(&timer->pdev->dev),
906 dev_name(&pdev->dev))) {
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530907 list_del(&timer->node);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530908 ret = 0;
909 break;
910 }
911 spin_unlock_irqrestore(&dm_timer_lock, flags);
912
Suman Anna51b7e572015-03-16 20:14:03 -0500913 pm_runtime_disable(&pdev->dev);
914
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530915 return ret;
916}
917
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500918static const struct dmtimer_platform_data omap3plus_pdata = {
919 .timer_errata = OMAP_TIMER_ERRATA_I103_I767,
920};
921
Jon Hunter9725f442012-05-14 10:41:37 -0500922static const struct of_device_id omap_timer_match[] = {
Jon Hunterd1c6ccf2013-03-19 12:38:19 -0500923 {
924 .compatible = "ti,omap2420-timer",
925 },
926 {
927 .compatible = "ti,omap3430-timer",
928 .data = &omap3plus_pdata,
929 },
930 {
931 .compatible = "ti,omap4430-timer",
932 .data = &omap3plus_pdata,
933 },
934 {
935 .compatible = "ti,omap5430-timer",
936 .data = &omap3plus_pdata,
937 },
938 {
939 .compatible = "ti,am335x-timer",
940 .data = &omap3plus_pdata,
941 },
942 {
943 .compatible = "ti,am335x-timer-1ms",
944 .data = &omap3plus_pdata,
945 },
Jon Hunter9725f442012-05-14 10:41:37 -0500946 {},
947};
948MODULE_DEVICE_TABLE(of, omap_timer_match);
949
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530950static struct platform_driver omap_dm_timer_driver = {
951 .probe = omap_dm_timer_probe,
Greg Kroah-Hartman351a1022012-12-21 14:02:24 -0800952 .remove = omap_dm_timer_remove,
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530953 .driver = {
954 .name = "omap_timer",
Jon Hunter9725f442012-05-14 10:41:37 -0500955 .of_match_table = of_match_ptr(omap_timer_match),
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530956 },
957};
958
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530959early_platform_init("earlytimer", &omap_dm_timer_driver);
Srinivas Kandagatlae4e9f7e2012-12-16 11:30:02 -0800960module_platform_driver(omap_dm_timer_driver);
Tarun Kanti DebBarmadf284722011-09-20 17:00:19 +0530961
962MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
963MODULE_LICENSE("GPL");
964MODULE_ALIAS("platform:" DRIVER_NAME);
965MODULE_AUTHOR("Texas Instruments Inc");