Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 1 | /* |
| 2 | * NVDIMM Firmware Interface Table - NFIT |
| 3 | * |
| 4 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of version 2 of the GNU General Public License as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, but |
| 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 13 | * General Public License for more details. |
| 14 | */ |
| 15 | #ifndef __NFIT_H__ |
| 16 | #define __NFIT_H__ |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 17 | #include <linux/workqueue.h> |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 18 | #include <linux/libnvdimm.h> |
| 19 | #include <linux/types.h> |
| 20 | #include <linux/uuid.h> |
| 21 | #include <linux/acpi.h> |
| 22 | #include <acpi/acuuid.h> |
| 23 | |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 24 | /* ACPI 6.1 */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 25 | #define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba" |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 26 | |
| 27 | /* http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf */ |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 28 | #define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66" |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 29 | |
| 30 | /* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */ |
| 31 | #define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6" |
| 32 | #define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e" |
| 33 | |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 34 | /* https://msdn.microsoft.com/library/windows/hardware/mt604741 */ |
| 35 | #define UUID_NFIT_DIMM_N_MSFT "1ee68b36-d4bd-4a1a-9a16-4f8e53d46e05" |
| 36 | |
Dan Williams | 5813882 | 2015-06-23 20:08:34 -0400 | [diff] [blame] | 37 | #define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \ |
| 38 | | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \ |
Bob Moore | ca321d1 | 2015-10-19 10:24:52 +0800 | [diff] [blame] | 39 | | ACPI_NFIT_MEM_NOT_ARMED) |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 40 | |
| 41 | enum nfit_uuids { |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 42 | /* for simplicity alias the uuid index with the family id */ |
| 43 | NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL, |
| 44 | NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1, |
| 45 | NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2, |
stuart hayes | e02fb72 | 2016-05-26 11:38:41 -0500 | [diff] [blame] | 46 | NFIT_DEV_DIMM_N_MSFT = NVDIMM_FAMILY_MSFT, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 47 | NFIT_SPA_VOLATILE, |
| 48 | NFIT_SPA_PM, |
| 49 | NFIT_SPA_DCR, |
| 50 | NFIT_SPA_BDW, |
| 51 | NFIT_SPA_VDISK, |
| 52 | NFIT_SPA_VCD, |
| 53 | NFIT_SPA_PDISK, |
| 54 | NFIT_SPA_PCD, |
| 55 | NFIT_DEV_BUS, |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 56 | NFIT_UUID_MAX, |
| 57 | }; |
| 58 | |
Dan Williams | 30ec5fd | 2016-04-28 18:35:23 -0700 | [diff] [blame] | 59 | /* |
| 60 | * Region format interface codes are stored as an array of bytes in the |
| 61 | * NFIT DIMM Control Region structure |
| 62 | */ |
| 63 | #define NFIT_FIC_BYTE cpu_to_be16(0x101) /* byte-addressable energy backed */ |
| 64 | #define NFIT_FIC_BLK cpu_to_be16(0x201) /* block-addressable non-energy backed */ |
| 65 | #define NFIT_FIC_BYTEN cpu_to_be16(0x301) /* byte-addressable non-energy backed */ |
Dan Williams | be26f9a | 2016-02-01 17:48:42 -0800 | [diff] [blame] | 66 | |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 67 | enum { |
Dan Williams | aef2533 | 2016-02-12 17:01:11 -0800 | [diff] [blame] | 68 | NFIT_BLK_READ_FLUSH = 1, |
| 69 | NFIT_BLK_DCR_LATCH = 2, |
| 70 | NFIT_ARS_STATUS_DONE = 0, |
| 71 | NFIT_ARS_STATUS_BUSY = 1 << 16, |
| 72 | NFIT_ARS_STATUS_NONE = 2 << 16, |
| 73 | NFIT_ARS_STATUS_INTR = 3 << 16, |
| 74 | NFIT_ARS_START_BUSY = 6, |
| 75 | NFIT_ARS_CAP_NONE = 1, |
| 76 | NFIT_ARS_F_OVERFLOW = 1, |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 77 | NFIT_ARS_TIMEOUT = 90, |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 78 | }; |
| 79 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 80 | struct nfit_spa { |
| 81 | struct acpi_nfit_system_address *spa; |
| 82 | struct list_head list; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 83 | struct nd_region *nd_region; |
| 84 | unsigned int ars_done:1; |
| 85 | u32 clear_err_unit; |
| 86 | u32 max_ars; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 87 | }; |
| 88 | |
| 89 | struct nfit_dcr { |
| 90 | struct acpi_nfit_control_region *dcr; |
| 91 | struct list_head list; |
| 92 | }; |
| 93 | |
| 94 | struct nfit_bdw { |
| 95 | struct acpi_nfit_data_region *bdw; |
| 96 | struct list_head list; |
| 97 | }; |
| 98 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 99 | struct nfit_idt { |
| 100 | struct acpi_nfit_interleave *idt; |
| 101 | struct list_head list; |
| 102 | }; |
| 103 | |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 104 | struct nfit_flush { |
| 105 | struct acpi_nfit_flush_address *flush; |
| 106 | struct list_head list; |
| 107 | }; |
| 108 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 109 | struct nfit_memdev { |
| 110 | struct acpi_nfit_memory_map *memdev; |
| 111 | struct list_head list; |
| 112 | }; |
| 113 | |
| 114 | /* assembled tables for a given dimm/memory-device */ |
| 115 | struct nfit_mem { |
Dan Williams | e6dfb2d | 2015-04-25 03:56:17 -0400 | [diff] [blame] | 116 | struct nvdimm *nvdimm; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 117 | struct acpi_nfit_memory_map *memdev_dcr; |
| 118 | struct acpi_nfit_memory_map *memdev_pmem; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 119 | struct acpi_nfit_memory_map *memdev_bdw; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 120 | struct acpi_nfit_control_region *dcr; |
| 121 | struct acpi_nfit_data_region *bdw; |
| 122 | struct acpi_nfit_system_address *spa_dcr; |
| 123 | struct acpi_nfit_system_address *spa_bdw; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 124 | struct acpi_nfit_interleave *idt_dcr; |
| 125 | struct acpi_nfit_interleave *idt_bdw; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 126 | struct nfit_flush *nfit_flush; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 127 | struct list_head list; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 128 | struct acpi_device *adev; |
Dan Williams | 8cc6ddf | 2016-04-05 15:26:50 -0700 | [diff] [blame] | 129 | struct acpi_nfit_desc *acpi_desc; |
Dan Williams | e5ae3b2 | 2016-06-07 17:00:04 -0700 | [diff] [blame] | 130 | struct resource *flush_wpq; |
Dan Williams | 62232e45 | 2015-06-08 14:27:06 -0400 | [diff] [blame] | 131 | unsigned long dsm_mask; |
Dan Williams | 31eca76 | 2016-04-28 16:23:43 -0700 | [diff] [blame] | 132 | int family; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 133 | }; |
| 134 | |
| 135 | struct acpi_nfit_desc { |
| 136 | struct nvdimm_bus_descriptor nd_desc; |
Linda Knippers | 6b577c9 | 2015-11-20 19:05:49 -0500 | [diff] [blame] | 137 | struct acpi_table_header acpi_header; |
| 138 | struct acpi_nfit_header *nfit; |
Vishal Verma | 2098516 | 2015-10-27 16:58:27 -0600 | [diff] [blame] | 139 | struct mutex init_mutex; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 140 | struct list_head memdevs; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 141 | struct list_head flushes; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 142 | struct list_head dimms; |
| 143 | struct list_head spas; |
| 144 | struct list_head dcrs; |
| 145 | struct list_head bdws; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 146 | struct list_head idts; |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 147 | struct nvdimm_bus *nvdimm_bus; |
| 148 | struct device *dev; |
Dan Williams | 1cf03c0 | 2016-02-17 13:01:23 -0800 | [diff] [blame] | 149 | struct nd_cmd_ars_status *ars_status; |
| 150 | size_t ars_status_size; |
Dan Williams | 7ae0fa43 | 2016-02-19 12:16:34 -0800 | [diff] [blame] | 151 | struct work_struct work; |
| 152 | unsigned int cancel:1; |
Dan Williams | e3654ec | 2016-04-28 16:17:07 -0700 | [diff] [blame] | 153 | unsigned long dimm_cmd_force_en; |
| 154 | unsigned long bus_cmd_force_en; |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 155 | int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
| 156 | void *iobuf, u64 len, int rw); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 157 | }; |
| 158 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 159 | enum nd_blk_mmio_selector { |
| 160 | BDW, |
| 161 | DCR, |
| 162 | }; |
| 163 | |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 164 | struct nd_blk_addr { |
| 165 | union { |
| 166 | void __iomem *base; |
Dan Williams | 7a9eb20 | 2016-06-03 18:06:47 -0700 | [diff] [blame^] | 167 | void *aperture; |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 168 | }; |
| 169 | }; |
| 170 | |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 171 | struct nfit_blk { |
| 172 | struct nfit_blk_mmio { |
Ross Zwisler | 67a3e8f | 2015-08-27 13:14:20 -0600 | [diff] [blame] | 173 | struct nd_blk_addr addr; |
Ross Zwisler | 047fc8a | 2015-06-25 04:21:02 -0400 | [diff] [blame] | 174 | u64 size; |
| 175 | u64 base_offset; |
| 176 | u32 line_size; |
| 177 | u32 num_lines; |
| 178 | u32 table_size; |
| 179 | struct acpi_nfit_interleave *idt; |
| 180 | struct acpi_nfit_system_address *spa; |
| 181 | } mmio[2]; |
| 182 | struct nd_region *nd_region; |
| 183 | u64 bdw_offset; /* post interleave offset */ |
| 184 | u64 stat_offset; |
| 185 | u64 cmd_offset; |
Ross Zwisler | f0f2c07 | 2015-07-10 11:06:14 -0600 | [diff] [blame] | 186 | u32 dimm_flags; |
Ross Zwisler | c2ad295 | 2015-07-10 11:06:13 -0600 | [diff] [blame] | 187 | }; |
| 188 | |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 189 | static inline struct acpi_nfit_memory_map *__to_nfit_memdev( |
| 190 | struct nfit_mem *nfit_mem) |
| 191 | { |
| 192 | if (nfit_mem->memdev_dcr) |
| 193 | return nfit_mem->memdev_dcr; |
| 194 | return nfit_mem->memdev_pmem; |
| 195 | } |
Dan Williams | 45def22 | 2015-04-26 19:26:48 -0400 | [diff] [blame] | 196 | |
| 197 | static inline struct acpi_nfit_desc *to_acpi_desc( |
| 198 | struct nvdimm_bus_descriptor *nd_desc) |
| 199 | { |
| 200 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 201 | } |
Dan Williams | 6bc7561 | 2015-06-17 17:23:32 -0400 | [diff] [blame] | 202 | |
| 203 | const u8 *to_nfit_uuid(enum nfit_uuids id); |
| 204 | int acpi_nfit_init(struct acpi_nfit_desc *nfit, acpi_size sz); |
Dan Williams | a61fe6f | 2016-02-19 12:29:32 -0800 | [diff] [blame] | 205 | void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev); |
Dan Williams | b94d523 | 2015-05-19 22:54:31 -0400 | [diff] [blame] | 206 | #endif /* __NFIT_H__ */ |