Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand/au1550nd.c |
| 3 | * |
| 4 | * Copyright (C) 2004 Embedded Edge, LLC |
| 5 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 6 | * $Id: au1550nd.c,v 1.13 2005/11/07 11:14:30 gleixner Exp $ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/init.h> |
| 16 | #include <linux/module.h> |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 17 | #include <linux/interrupt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | #include <linux/mtd/mtd.h> |
| 19 | #include <linux/mtd/nand.h> |
| 20 | #include <linux/mtd/partitions.h> |
Olaf Hering | 733482e | 2005-11-08 21:34:55 -0800 | [diff] [blame] | 21 | #include <linux/version.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <asm/io.h> |
| 23 | |
| 24 | /* fixme: this is ugly */ |
| 25 | #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0) |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 26 | #include <asm/mach-au1x00/au1xxx.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #else |
| 28 | #include <asm/au1000.h> |
| 29 | #ifdef CONFIG_MIPS_PB1550 |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 30 | #include <asm/pb1550.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #endif |
| 32 | #ifdef CONFIG_MIPS_DB1550 |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 33 | #include <asm/db1x00.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #endif |
| 35 | #endif |
| 36 | |
| 37 | /* |
| 38 | * MTD structure for NAND controller |
| 39 | */ |
| 40 | static struct mtd_info *au1550_mtd = NULL; |
| 41 | static void __iomem *p_nand; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 42 | static int nand_width = 1; /* default x8 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | /* |
| 45 | * Define partitions for flash device |
| 46 | */ |
Jesper Juhl | 3c6bee1 | 2006-01-09 20:54:01 -0800 | [diff] [blame] | 47 | static const struct mtd_partition partition_info[] = { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 48 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 49 | .name = "NAND FS 0", |
| 50 | .offset = 0, |
| 51 | .size = 8 * 1024 * 1024}, |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 52 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 53 | .name = "NAND FS 1", |
| 54 | .offset = MTDPART_OFS_APPEND, |
| 55 | .size = MTDPART_SIZ_FULL} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | |
| 58 | /** |
| 59 | * au_read_byte - read one byte from the chip |
| 60 | * @mtd: MTD device structure |
| 61 | * |
| 62 | * read function for 8bit buswith |
| 63 | */ |
| 64 | static u_char au_read_byte(struct mtd_info *mtd) |
| 65 | { |
| 66 | struct nand_chip *this = mtd->priv; |
| 67 | u_char ret = readb(this->IO_ADDR_R); |
| 68 | au_sync(); |
| 69 | return ret; |
| 70 | } |
| 71 | |
| 72 | /** |
| 73 | * au_write_byte - write one byte to the chip |
| 74 | * @mtd: MTD device structure |
| 75 | * @byte: pointer to data byte to write |
| 76 | * |
| 77 | * write function for 8it buswith |
| 78 | */ |
| 79 | static void au_write_byte(struct mtd_info *mtd, u_char byte) |
| 80 | { |
| 81 | struct nand_chip *this = mtd->priv; |
| 82 | writeb(byte, this->IO_ADDR_W); |
| 83 | au_sync(); |
| 84 | } |
| 85 | |
| 86 | /** |
| 87 | * au_read_byte16 - read one byte endianess aware from the chip |
| 88 | * @mtd: MTD device structure |
| 89 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 90 | * read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | * endianess conversion |
| 92 | */ |
| 93 | static u_char au_read_byte16(struct mtd_info *mtd) |
| 94 | { |
| 95 | struct nand_chip *this = mtd->priv; |
| 96 | u_char ret = (u_char) cpu_to_le16(readw(this->IO_ADDR_R)); |
| 97 | au_sync(); |
| 98 | return ret; |
| 99 | } |
| 100 | |
| 101 | /** |
| 102 | * au_write_byte16 - write one byte endianess aware to the chip |
| 103 | * @mtd: MTD device structure |
| 104 | * @byte: pointer to data byte to write |
| 105 | * |
| 106 | * write function for 16bit buswith with |
| 107 | * endianess conversion |
| 108 | */ |
| 109 | static void au_write_byte16(struct mtd_info *mtd, u_char byte) |
| 110 | { |
| 111 | struct nand_chip *this = mtd->priv; |
| 112 | writew(le16_to_cpu((u16) byte), this->IO_ADDR_W); |
| 113 | au_sync(); |
| 114 | } |
| 115 | |
| 116 | /** |
| 117 | * au_read_word - read one word from the chip |
| 118 | * @mtd: MTD device structure |
| 119 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 120 | * read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | * endianess conversion |
| 122 | */ |
| 123 | static u16 au_read_word(struct mtd_info *mtd) |
| 124 | { |
| 125 | struct nand_chip *this = mtd->priv; |
| 126 | u16 ret = readw(this->IO_ADDR_R); |
| 127 | au_sync(); |
| 128 | return ret; |
| 129 | } |
| 130 | |
| 131 | /** |
| 132 | * au_write_word - write one word to the chip |
| 133 | * @mtd: MTD device structure |
| 134 | * @word: data word to write |
| 135 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 136 | * write function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | * endianess conversion |
| 138 | */ |
| 139 | static void au_write_word(struct mtd_info *mtd, u16 word) |
| 140 | { |
| 141 | struct nand_chip *this = mtd->priv; |
| 142 | writew(word, this->IO_ADDR_W); |
| 143 | au_sync(); |
| 144 | } |
| 145 | |
| 146 | /** |
| 147 | * au_write_buf - write buffer to chip |
| 148 | * @mtd: MTD device structure |
| 149 | * @buf: data buffer |
| 150 | * @len: number of bytes to write |
| 151 | * |
| 152 | * write function for 8bit buswith |
| 153 | */ |
| 154 | static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 155 | { |
| 156 | int i; |
| 157 | struct nand_chip *this = mtd->priv; |
| 158 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 159 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | writeb(buf[i], this->IO_ADDR_W); |
| 161 | au_sync(); |
| 162 | } |
| 163 | } |
| 164 | |
| 165 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 166 | * au_read_buf - read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | * @mtd: MTD device structure |
| 168 | * @buf: buffer to store date |
| 169 | * @len: number of bytes to read |
| 170 | * |
| 171 | * read function for 8bit buswith |
| 172 | */ |
| 173 | static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 174 | { |
| 175 | int i; |
| 176 | struct nand_chip *this = mtd->priv; |
| 177 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 178 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | buf[i] = readb(this->IO_ADDR_R); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 180 | au_sync(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | } |
| 182 | } |
| 183 | |
| 184 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 185 | * au_verify_buf - Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | * @mtd: MTD device structure |
| 187 | * @buf: buffer containing the data to compare |
| 188 | * @len: number of bytes to compare |
| 189 | * |
| 190 | * verify function for 8bit buswith |
| 191 | */ |
| 192 | static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 193 | { |
| 194 | int i; |
| 195 | struct nand_chip *this = mtd->priv; |
| 196 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 197 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | if (buf[i] != readb(this->IO_ADDR_R)) |
| 199 | return -EFAULT; |
| 200 | au_sync(); |
| 201 | } |
| 202 | |
| 203 | return 0; |
| 204 | } |
| 205 | |
| 206 | /** |
| 207 | * au_write_buf16 - write buffer to chip |
| 208 | * @mtd: MTD device structure |
| 209 | * @buf: data buffer |
| 210 | * @len: number of bytes to write |
| 211 | * |
| 212 | * write function for 16bit buswith |
| 213 | */ |
| 214 | static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len) |
| 215 | { |
| 216 | int i; |
| 217 | struct nand_chip *this = mtd->priv; |
| 218 | u16 *p = (u16 *) buf; |
| 219 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 220 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 221 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 222 | writew(p[i], this->IO_ADDR_W); |
| 223 | au_sync(); |
| 224 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 225 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | } |
| 227 | |
| 228 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 229 | * au_read_buf16 - read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | * @mtd: MTD device structure |
| 231 | * @buf: buffer to store date |
| 232 | * @len: number of bytes to read |
| 233 | * |
| 234 | * read function for 16bit buswith |
| 235 | */ |
| 236 | static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len) |
| 237 | { |
| 238 | int i; |
| 239 | struct nand_chip *this = mtd->priv; |
| 240 | u16 *p = (u16 *) buf; |
| 241 | len >>= 1; |
| 242 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 243 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | p[i] = readw(this->IO_ADDR_R); |
| 245 | au_sync(); |
| 246 | } |
| 247 | } |
| 248 | |
| 249 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 250 | * au_verify_buf16 - Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | * @mtd: MTD device structure |
| 252 | * @buf: buffer containing the data to compare |
| 253 | * @len: number of bytes to compare |
| 254 | * |
| 255 | * verify function for 16bit buswith |
| 256 | */ |
| 257 | static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len) |
| 258 | { |
| 259 | int i; |
| 260 | struct nand_chip *this = mtd->priv; |
| 261 | u16 *p = (u16 *) buf; |
| 262 | len >>= 1; |
| 263 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 264 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | if (p[i] != readw(this->IO_ADDR_R)) |
| 266 | return -EFAULT; |
| 267 | au_sync(); |
| 268 | } |
| 269 | return 0; |
| 270 | } |
| 271 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 272 | /* Select the chip by setting nCE to low */ |
| 273 | #define NAND_CTL_SETNCE 1 |
| 274 | /* Deselect the chip by setting nCE to high */ |
| 275 | #define NAND_CTL_CLRNCE 2 |
| 276 | /* Select the command latch by setting CLE to high */ |
| 277 | #define NAND_CTL_SETCLE 3 |
| 278 | /* Deselect the command latch by setting CLE to low */ |
| 279 | #define NAND_CTL_CLRCLE 4 |
| 280 | /* Select the address latch by setting ALE to high */ |
| 281 | #define NAND_CTL_SETALE 5 |
| 282 | /* Deselect the address latch by setting ALE to low */ |
| 283 | #define NAND_CTL_CLRALE 6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | |
| 285 | static void au1550_hwcontrol(struct mtd_info *mtd, int cmd) |
| 286 | { |
| 287 | register struct nand_chip *this = mtd->priv; |
| 288 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 289 | switch (cmd) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 291 | case NAND_CTL_SETCLE: |
| 292 | this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; |
| 293 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 295 | case NAND_CTL_CLRCLE: |
| 296 | this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; |
| 297 | break; |
| 298 | |
| 299 | case NAND_CTL_SETALE: |
| 300 | this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; |
| 301 | break; |
| 302 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 303 | case NAND_CTL_CLRALE: |
| 304 | this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 305 | /* FIXME: Nobody knows why this is necessary, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | * but it works only that way */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 307 | udelay(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | break; |
| 309 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 310 | case NAND_CTL_SETNCE: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | /* assert (force assert) chip enable */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 312 | au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | break; |
| 314 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 315 | case NAND_CTL_CLRNCE: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 316 | /* deassert chip enable */ |
| 317 | au_writel(0, MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 318 | break; |
| 319 | } |
| 320 | |
| 321 | this->IO_ADDR_R = this->IO_ADDR_W; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 322 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | /* Drain the writebuffer */ |
| 324 | au_sync(); |
| 325 | } |
| 326 | |
| 327 | int au1550_device_ready(struct mtd_info *mtd) |
| 328 | { |
| 329 | int ret = (au_readl(MEM_STSTAT) & 0x1) ? 1 : 0; |
| 330 | au_sync(); |
| 331 | return ret; |
| 332 | } |
| 333 | |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 334 | /** |
| 335 | * au1550_select_chip - control -CE line |
| 336 | * Forbid driving -CE manually permitting the NAND controller to do this. |
| 337 | * Keeping -CE asserted during the whole sector reads interferes with the |
| 338 | * NOR flash and PCMCIA drivers as it causes contention on the static bus. |
| 339 | * We only have to hold -CE low for the NAND read commands since the flash |
| 340 | * chip needs it to be asserted during chip not ready time but the NAND |
| 341 | * controller keeps it released. |
| 342 | * |
| 343 | * @mtd: MTD device structure |
| 344 | * @chip: chipnumber to select, -1 for deselect |
| 345 | */ |
| 346 | static void au1550_select_chip(struct mtd_info *mtd, int chip) |
| 347 | { |
| 348 | } |
| 349 | |
| 350 | /** |
| 351 | * au1550_command - Send command to NAND device |
| 352 | * @mtd: MTD device structure |
| 353 | * @command: the command to be sent |
| 354 | * @column: the column address for this command, -1 if none |
| 355 | * @page_addr: the page address for this command, -1 if none |
| 356 | */ |
| 357 | static void au1550_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) |
| 358 | { |
| 359 | register struct nand_chip *this = mtd->priv; |
| 360 | int ce_override = 0, i; |
| 361 | ulong flags; |
| 362 | |
| 363 | /* Begin command latch cycle */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 364 | au1550_hwcontrol(mtd, NAND_CTL_SETCLE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 365 | /* |
| 366 | * Write out the command to the device. |
| 367 | */ |
| 368 | if (command == NAND_CMD_SEQIN) { |
| 369 | int readcmd; |
| 370 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 371 | if (column >= mtd->writesize) { |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 372 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 373 | column -= mtd->writesize; |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 374 | readcmd = NAND_CMD_READOOB; |
| 375 | } else if (column < 256) { |
| 376 | /* First 256 bytes --> READ0 */ |
| 377 | readcmd = NAND_CMD_READ0; |
| 378 | } else { |
| 379 | column -= 256; |
| 380 | readcmd = NAND_CMD_READ1; |
| 381 | } |
| 382 | this->write_byte(mtd, readcmd); |
| 383 | } |
| 384 | this->write_byte(mtd, command); |
| 385 | |
| 386 | /* Set ALE and clear CLE to start address cycle */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 387 | au1550_hwcontrol(mtd, NAND_CTL_CLRCLE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 388 | |
| 389 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 390 | au1550_hwcontrol(mtd, NAND_CTL_SETALE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 391 | |
| 392 | /* Serially input address */ |
| 393 | if (column != -1) { |
| 394 | /* Adjust columns for 16 bit buswidth */ |
| 395 | if (this->options & NAND_BUSWIDTH_16) |
| 396 | column >>= 1; |
| 397 | this->write_byte(mtd, column); |
| 398 | } |
| 399 | if (page_addr != -1) { |
| 400 | this->write_byte(mtd, (u8)(page_addr & 0xff)); |
| 401 | |
| 402 | if (command == NAND_CMD_READ0 || |
| 403 | command == NAND_CMD_READ1 || |
| 404 | command == NAND_CMD_READOOB) { |
| 405 | /* |
| 406 | * NAND controller will release -CE after |
| 407 | * the last address byte is written, so we'll |
| 408 | * have to forcibly assert it. No interrupts |
| 409 | * are allowed while we do this as we don't |
| 410 | * want the NOR flash or PCMCIA drivers to |
| 411 | * steal our precious bytes of data... |
| 412 | */ |
| 413 | ce_override = 1; |
| 414 | local_irq_save(flags); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 415 | au1550_hwcontrol(mtd, NAND_CTL_SETNCE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 416 | } |
| 417 | |
| 418 | this->write_byte(mtd, (u8)(page_addr >> 8)); |
| 419 | |
| 420 | /* One more address cycle for devices > 32MiB */ |
| 421 | if (this->chipsize > (32 << 20)) |
| 422 | this->write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); |
| 423 | } |
| 424 | /* Latch in address */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 425 | au1550_hwcontrol(mtd, NAND_CTL_CLRALE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 426 | } |
| 427 | |
| 428 | /* |
| 429 | * Program and erase have their own busy handlers. |
| 430 | * Status and sequential in need no delay. |
| 431 | */ |
| 432 | switch (command) { |
| 433 | |
| 434 | case NAND_CMD_PAGEPROG: |
| 435 | case NAND_CMD_ERASE1: |
| 436 | case NAND_CMD_ERASE2: |
| 437 | case NAND_CMD_SEQIN: |
| 438 | case NAND_CMD_STATUS: |
| 439 | return; |
| 440 | |
| 441 | case NAND_CMD_RESET: |
| 442 | break; |
| 443 | |
| 444 | case NAND_CMD_READ0: |
| 445 | case NAND_CMD_READ1: |
| 446 | case NAND_CMD_READOOB: |
| 447 | /* Check if we're really driving -CE low (just in case) */ |
| 448 | if (unlikely(!ce_override)) |
| 449 | break; |
| 450 | |
| 451 | /* Apply a short delay always to ensure that we do wait tWB. */ |
| 452 | ndelay(100); |
| 453 | /* Wait for a chip to become ready... */ |
| 454 | for (i = this->chip_delay; !this->dev_ready(mtd) && i > 0; --i) |
| 455 | udelay(1); |
| 456 | |
| 457 | /* Release -CE and re-enable interrupts. */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame^] | 458 | au1550_hwcontrol(mtd, NAND_CTL_CLRNCE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 459 | local_irq_restore(flags); |
| 460 | return; |
| 461 | } |
| 462 | /* Apply this short delay always to ensure that we do wait tWB. */ |
| 463 | ndelay(100); |
| 464 | |
| 465 | while(!this->dev_ready(mtd)); |
| 466 | } |
| 467 | |
| 468 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 469 | /* |
| 470 | * Main initialization routine |
| 471 | */ |
David Woodhouse | cead4db | 2006-05-16 13:54:50 +0100 | [diff] [blame] | 472 | static int __init au1xxx_nand_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | { |
| 474 | struct nand_chip *this; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 475 | u16 boot_swapboot = 0; /* default value */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | int retval; |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 477 | u32 mem_staddr; |
| 478 | u32 nand_phys; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | |
| 480 | /* Allocate memory for MTD device structure and private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 481 | au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | if (!au1550_mtd) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 483 | printk("Unable to allocate NAND MTD dev structure.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | return -ENOMEM; |
| 485 | } |
| 486 | |
| 487 | /* Get pointer to private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 488 | this = (struct nand_chip *)(&au1550_mtd[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | |
| 490 | /* Initialize structures */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 491 | memset(au1550_mtd, 0, sizeof(struct mtd_info)); |
| 492 | memset(this, 0, sizeof(struct nand_chip)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | |
| 494 | /* Link the private data with the MTD structure */ |
| 495 | au1550_mtd->priv = this; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 496 | au1550_mtd->owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 498 | |
Sergei Shtylyov | 155285c | 2006-05-16 20:16:41 +0400 | [diff] [blame] | 499 | /* MEM_STNDCTL: disable ints, disable nand boot */ |
| 500 | au_writel(0, MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | |
| 502 | #ifdef CONFIG_MIPS_PB1550 |
| 503 | /* set gpio206 high */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 504 | au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 506 | boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 507 | switch (boot_swapboot) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 508 | case 0: |
| 509 | case 2: |
| 510 | case 8: |
| 511 | case 0xC: |
| 512 | case 0xD: |
| 513 | /* x16 NAND Flash */ |
| 514 | nand_width = 0; |
| 515 | break; |
| 516 | case 1: |
| 517 | case 9: |
| 518 | case 3: |
| 519 | case 0xE: |
| 520 | case 0xF: |
| 521 | /* x8 NAND Flash */ |
| 522 | nand_width = 1; |
| 523 | break; |
| 524 | default: |
| 525 | printk("Pb1550 NAND: bad boot:swap\n"); |
| 526 | retval = -EINVAL; |
| 527 | goto outmem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | } |
| 529 | #endif |
| 530 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 531 | /* Configure chip-select; normally done by boot code, e.g. YAMON */ |
| 532 | #ifdef NAND_STCFG |
| 533 | if (NAND_CS == 0) { |
| 534 | au_writel(NAND_STCFG, MEM_STCFG0); |
| 535 | au_writel(NAND_STTIME, MEM_STTIME0); |
| 536 | au_writel(NAND_STADDR, MEM_STADDR0); |
| 537 | } |
| 538 | if (NAND_CS == 1) { |
| 539 | au_writel(NAND_STCFG, MEM_STCFG1); |
| 540 | au_writel(NAND_STTIME, MEM_STTIME1); |
| 541 | au_writel(NAND_STADDR, MEM_STADDR1); |
| 542 | } |
| 543 | if (NAND_CS == 2) { |
| 544 | au_writel(NAND_STCFG, MEM_STCFG2); |
| 545 | au_writel(NAND_STTIME, MEM_STTIME2); |
| 546 | au_writel(NAND_STADDR, MEM_STADDR2); |
| 547 | } |
| 548 | if (NAND_CS == 3) { |
| 549 | au_writel(NAND_STCFG, MEM_STCFG3); |
| 550 | au_writel(NAND_STTIME, MEM_STTIME3); |
| 551 | au_writel(NAND_STADDR, MEM_STADDR3); |
| 552 | } |
| 553 | #endif |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 554 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 555 | /* Locate NAND chip-select in order to determine NAND phys address */ |
| 556 | mem_staddr = 0x00000000; |
| 557 | if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0)) |
| 558 | mem_staddr = au_readl(MEM_STADDR0); |
| 559 | else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1)) |
| 560 | mem_staddr = au_readl(MEM_STADDR1); |
| 561 | else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2)) |
| 562 | mem_staddr = au_readl(MEM_STADDR2); |
| 563 | else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3)) |
| 564 | mem_staddr = au_readl(MEM_STADDR3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 565 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 566 | if (mem_staddr == 0x00000000) { |
| 567 | printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n"); |
| 568 | kfree(au1550_mtd); |
| 569 | return 1; |
| 570 | } |
| 571 | nand_phys = (mem_staddr << 4) & 0xFFFC0000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 573 | p_nand = (void __iomem *)ioremap(nand_phys, 0x1000); |
| 574 | |
| 575 | /* make controller and MTD agree */ |
| 576 | if (NAND_CS == 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 577 | nand_width = au_readl(MEM_STCFG0) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 578 | if (NAND_CS == 1) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 579 | nand_width = au_readl(MEM_STCFG1) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 580 | if (NAND_CS == 2) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 581 | nand_width = au_readl(MEM_STCFG2) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 582 | if (NAND_CS == 3) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 583 | nand_width = au_readl(MEM_STCFG3) & (1 << 22); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | |
| 585 | /* Set address of hardware control function */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | this->dev_ready = au1550_device_ready; |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 587 | this->select_chip = au1550_select_chip; |
| 588 | this->cmdfunc = au1550_command; |
| 589 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | /* 30 us command delay time */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 591 | this->chip_delay = 30; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 592 | this->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | |
| 594 | this->options = NAND_NO_AUTOINCR; |
| 595 | |
| 596 | if (!nand_width) |
| 597 | this->options |= NAND_BUSWIDTH_16; |
| 598 | |
| 599 | this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte; |
| 600 | this->write_byte = (!nand_width) ? au_write_byte16 : au_write_byte; |
| 601 | this->write_word = au_write_word; |
| 602 | this->read_word = au_read_word; |
| 603 | this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf; |
| 604 | this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf; |
| 605 | this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf; |
| 606 | |
| 607 | /* Scan to find existence of the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 608 | if (nand_scan(au1550_mtd, 1)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | retval = -ENXIO; |
| 610 | goto outio; |
| 611 | } |
| 612 | |
| 613 | /* Register the partitions */ |
Tobias Klauser | 87d10f3 | 2006-03-31 02:29:45 -0800 | [diff] [blame] | 614 | add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | |
| 616 | return 0; |
| 617 | |
| 618 | outio: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 619 | iounmap((void *)p_nand); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 620 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | outmem: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 622 | kfree(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | return retval; |
| 624 | } |
| 625 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 626 | module_init(au1xxx_nand_init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | |
| 628 | /* |
| 629 | * Clean up routine |
| 630 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 631 | static void __exit au1550_cleanup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 632 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 633 | struct nand_chip *this = (struct nand_chip *)&au1550_mtd[1]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | |
| 635 | /* Release resources, unregister device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 636 | nand_release(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | |
| 638 | /* Free the MTD device structure */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 639 | kfree(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | |
| 641 | /* Unmap */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 642 | iounmap((void *)p_nand); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 643 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 644 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | module_exit(au1550_cleanup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | |
| 647 | MODULE_LICENSE("GPL"); |
| 648 | MODULE_AUTHOR("Embedded Edge, LLC"); |
| 649 | MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board"); |