Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "skeleton64.dtsi" |
| 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 15 | #include <dt-bindings/clock/qcom,gcc-sdm845.h> |
| 16 | #include <dt-bindings/clock/qcom,camcc-sdm845.h> |
| 17 | #include <dt-bindings/clock/qcom,dispcc-sdm845.h> |
| 18 | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> |
| 19 | #include <dt-bindings/clock/qcom,videocc-sdm845.h> |
| 20 | #include <dt-bindings/clock/qcom,cpucc-sdm845.h> |
| 21 | #include <dt-bindings/clock/qcom,rpmh.h> |
Maulik Shah | c77d1d2 | 2017-06-15 14:04:50 +0530 | [diff] [blame] | 22 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 23 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 24 | |
| 25 | / { |
| 26 | model = "Qualcomm Technologies, Inc. SDM670"; |
| 27 | compatible = "qcom,sdm670"; |
| 28 | qcom,msm-id = <336 0x0>; |
Maulik Shah | 30ebbde | 2017-06-15 10:02:54 +0530 | [diff] [blame] | 29 | interrupt-parent = <&pdc>; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 30 | |
Sayali Lokhande | 099af9c | 2017-06-08 10:18:29 +0530 | [diff] [blame] | 31 | aliases { |
| 32 | ufshc1 = &ufshc_mem; /* Embedded UFS slot */ |
| 33 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 34 | |
Mukesh Kumar Savaliya | 7b27254 | 2017-07-10 19:35:29 +0530 | [diff] [blame^] | 35 | aliases { |
| 36 | serial0 = &qupv3_se12_2uart; |
| 37 | spi0 = &qupv3_se8_spi; |
| 38 | i2c0 = &qupv3_se10_i2c; |
| 39 | i2c1 = &qupv3_se3_i2c; |
| 40 | hsuart0 = &qupv3_se6_4uart; |
| 41 | }; |
| 42 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 43 | cpus { |
| 44 | #address-cells = <2>; |
| 45 | #size-cells = <0>; |
| 46 | |
| 47 | CPU0: cpu@0 { |
| 48 | device_type = "cpu"; |
| 49 | compatible = "arm,armv8"; |
| 50 | reg = <0x0 0x0>; |
| 51 | enable-method = "psci"; |
| 52 | efficiency = <1024>; |
| 53 | cache-size = <0x8000>; |
| 54 | cpu-release-addr = <0x0 0x90000000>; |
| 55 | next-level-cache = <&L2_0>; |
| 56 | L2_0: l2-cache { |
| 57 | compatible = "arm,arch-cache"; |
| 58 | cache-size = <0x20000>; |
| 59 | cache-level = <2>; |
| 60 | next-level-cache = <&L3_0>; |
| 61 | L3_0: l3-cache { |
| 62 | compatible = "arm,arch-cache"; |
| 63 | cache-size = <0x100000>; |
| 64 | cache-level = <3>; |
| 65 | }; |
| 66 | }; |
| 67 | L1_I_0: l1-icache { |
| 68 | compatible = "arm,arch-cache"; |
| 69 | qcom,dump-size = <0x9000>; |
| 70 | }; |
| 71 | L1_D_0: l1-dcache { |
| 72 | compatible = "arm,arch-cache"; |
| 73 | qcom,dump-size = <0x9000>; |
| 74 | }; |
| 75 | }; |
| 76 | |
| 77 | CPU1: cpu@100 { |
| 78 | device_type = "cpu"; |
| 79 | compatible = "arm,armv8"; |
| 80 | reg = <0x0 0x100>; |
| 81 | enable-method = "psci"; |
| 82 | efficiency = <1024>; |
| 83 | cache-size = <0x8000>; |
| 84 | cpu-release-addr = <0x0 0x90000000>; |
| 85 | next-level-cache = <&L2_100>; |
| 86 | L2_100: l2-cache { |
| 87 | compatible = "arm,arch-cache"; |
| 88 | cache-size = <0x20000>; |
| 89 | cache-level = <2>; |
| 90 | next-level-cache = <&L3_0>; |
| 91 | }; |
| 92 | L1_I_100: l1-icache { |
| 93 | compatible = "arm,arch-cache"; |
| 94 | qcom,dump-size = <0x9000>; |
| 95 | }; |
| 96 | L1_D_100: l1-dcache { |
| 97 | compatible = "arm,arch-cache"; |
| 98 | qcom,dump-size = <0x9000>; |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | CPU2: cpu@200 { |
| 103 | device_type = "cpu"; |
| 104 | compatible = "arm,armv8"; |
| 105 | reg = <0x0 0x200>; |
| 106 | enable-method = "psci"; |
| 107 | efficiency = <1024>; |
| 108 | cache-size = <0x8000>; |
| 109 | cpu-release-addr = <0x0 0x90000000>; |
| 110 | next-level-cache = <&L2_200>; |
| 111 | L2_200: l2-cache { |
| 112 | compatible = "arm,arch-cache"; |
| 113 | cache-size = <0x20000>; |
| 114 | cache-level = <2>; |
| 115 | next-level-cache = <&L3_0>; |
| 116 | }; |
| 117 | L1_I_200: l1-icache { |
| 118 | compatible = "arm,arch-cache"; |
| 119 | qcom,dump-size = <0x9000>; |
| 120 | }; |
| 121 | L1_D_200: l1-dcache { |
| 122 | compatible = "arm,arch-cache"; |
| 123 | qcom,dump-size = <0x9000>; |
| 124 | }; |
| 125 | }; |
| 126 | |
| 127 | CPU3: cpu@300 { |
| 128 | device_type = "cpu"; |
| 129 | compatible = "arm,armv8"; |
| 130 | reg = <0x0 0x300>; |
| 131 | enable-method = "psci"; |
| 132 | efficiency = <1024>; |
| 133 | cache-size = <0x8000>; |
| 134 | cpu-release-addr = <0x0 0x90000000>; |
| 135 | next-level-cache = <&L2_300>; |
| 136 | L2_300: l2-cache { |
| 137 | compatible = "arm,arch-cache"; |
| 138 | cache-size = <0x20000>; |
| 139 | cache-level = <2>; |
| 140 | next-level-cache = <&L3_0>; |
| 141 | }; |
| 142 | L1_I_300: l1-icache { |
| 143 | compatible = "arm,arch-cache"; |
| 144 | qcom,dump-size = <0x9000>; |
| 145 | }; |
| 146 | L1_D_300: l1-dcache { |
| 147 | compatible = "arm,arch-cache"; |
| 148 | qcom,dump-size = <0x9000>; |
| 149 | }; |
| 150 | }; |
| 151 | |
| 152 | CPU4: cpu@400 { |
| 153 | device_type = "cpu"; |
| 154 | compatible = "arm,armv8"; |
| 155 | reg = <0x0 0x400>; |
| 156 | enable-method = "psci"; |
| 157 | efficiency = <1024>; |
| 158 | cache-size = <0x8000>; |
| 159 | cpu-release-addr = <0x0 0x90000000>; |
| 160 | next-level-cache = <&L2_400>; |
| 161 | L2_400: l2-cache { |
| 162 | compatible = "arm,arch-cache"; |
| 163 | cache-size = <0x20000>; |
| 164 | cache-level = <2>; |
| 165 | next-level-cache = <&L3_0>; |
| 166 | }; |
| 167 | L1_I_400: l1-icache { |
| 168 | compatible = "arm,arch-cache"; |
| 169 | qcom,dump-size = <0x9000>; |
| 170 | }; |
| 171 | L1_D_400: l1-dcache { |
| 172 | compatible = "arm,arch-cache"; |
| 173 | qcom,dump-size = <0x9000>; |
| 174 | }; |
| 175 | }; |
| 176 | |
| 177 | CPU5: cpu@500 { |
| 178 | device_type = "cpu"; |
| 179 | compatible = "arm,armv8"; |
| 180 | reg = <0x0 0x500>; |
| 181 | enable-method = "psci"; |
| 182 | efficiency = <1024>; |
| 183 | cache-size = <0x8000>; |
| 184 | cpu-release-addr = <0x0 0x90000000>; |
| 185 | next-level-cache = <&L2_500>; |
| 186 | L2_500: l2-cache { |
| 187 | compatible = "arm,arch-cache"; |
| 188 | cache-size = <0x20000>; |
| 189 | cache-level = <2>; |
| 190 | next-level-cache = <&L3_0>; |
| 191 | }; |
| 192 | L1_I_500: l1-icache { |
| 193 | compatible = "arm,arch-cache"; |
| 194 | qcom,dump-size = <0x9000>; |
| 195 | }; |
| 196 | L1_D_500: l1-dcache { |
| 197 | compatible = "arm,arch-cache"; |
| 198 | qcom,dump-size = <0x9000>; |
| 199 | }; |
| 200 | }; |
| 201 | |
| 202 | CPU6: cpu@600 { |
| 203 | device_type = "cpu"; |
| 204 | compatible = "arm,armv8"; |
| 205 | reg = <0x0 0x600>; |
| 206 | enable-method = "psci"; |
| 207 | efficiency = <1740>; |
| 208 | cache-size = <0x10000>; |
| 209 | cpu-release-addr = <0x0 0x90000000>; |
| 210 | next-level-cache = <&L2_600>; |
| 211 | L2_600: l2-cache { |
| 212 | compatible = "arm,arch-cache"; |
| 213 | cache-size = <0x40000>; |
| 214 | cache-level = <2>; |
| 215 | next-level-cache = <&L3_0>; |
| 216 | }; |
| 217 | L1_I_600: l1-icache { |
| 218 | compatible = "arm,arch-cache"; |
| 219 | qcom,dump-size = <0x12000>; |
| 220 | }; |
| 221 | L1_D_600: l1-dcache { |
| 222 | compatible = "arm,arch-cache"; |
| 223 | qcom,dump-size = <0x12000>; |
| 224 | }; |
| 225 | }; |
| 226 | |
| 227 | CPU7: cpu@700 { |
| 228 | device_type = "cpu"; |
| 229 | compatible = "arm,armv8"; |
| 230 | reg = <0x0 0x700>; |
| 231 | enable-method = "psci"; |
| 232 | efficiency = <1740>; |
| 233 | cache-size = <0x10000>; |
| 234 | cpu-release-addr = <0x0 0x90000000>; |
| 235 | next-level-cache = <&L2_700>; |
| 236 | L2_700: l2-cache { |
| 237 | compatible = "arm,arch-cache"; |
| 238 | cache-size = <0x40000>; |
| 239 | cache-level = <2>; |
| 240 | next-level-cache = <&L3_0>; |
| 241 | }; |
| 242 | L1_I_700: l1-icache { |
| 243 | compatible = "arm,arch-cache"; |
| 244 | qcom,dump-size = <0x12000>; |
| 245 | }; |
| 246 | L1_D_700: l1-dcache { |
| 247 | compatible = "arm,arch-cache"; |
| 248 | qcom,dump-size = <0x12000>; |
| 249 | }; |
| 250 | }; |
| 251 | |
| 252 | cpu-map { |
| 253 | cluster0 { |
| 254 | core0 { |
| 255 | cpu = <&CPU0>; |
| 256 | }; |
| 257 | |
| 258 | core1 { |
| 259 | cpu = <&CPU1>; |
| 260 | }; |
| 261 | |
| 262 | core2 { |
| 263 | cpu = <&CPU2>; |
| 264 | }; |
| 265 | |
| 266 | core3 { |
| 267 | cpu = <&CPU3>; |
| 268 | }; |
| 269 | |
| 270 | core4 { |
| 271 | cpu = <&CPU4>; |
| 272 | }; |
| 273 | |
| 274 | core5 { |
| 275 | cpu = <&CPU5>; |
| 276 | }; |
| 277 | }; |
| 278 | cluster1 { |
| 279 | core0 { |
| 280 | cpu = <&CPU6>; |
| 281 | }; |
| 282 | |
| 283 | core1 { |
| 284 | cpu = <&CPU7>; |
| 285 | }; |
| 286 | }; |
| 287 | }; |
| 288 | }; |
| 289 | |
| 290 | psci { |
| 291 | compatible = "arm,psci-1.0"; |
| 292 | method = "smc"; |
| 293 | }; |
| 294 | |
| 295 | soc: soc { }; |
| 296 | |
| 297 | reserved-memory { |
| 298 | #address-cells = <2>; |
| 299 | #size-cells = <2>; |
| 300 | ranges; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 301 | |
| 302 | removed_regions: removed_regions@85700000 { |
| 303 | compatible = "removed-dma-pool"; |
| 304 | no-map; |
| 305 | reg = <0 0x85700000 0 0x3800000>; |
| 306 | }; |
| 307 | |
| 308 | pil_camera_mem: camera_region@8ab00000 { |
| 309 | compatible = "removed-dma-pool"; |
| 310 | no-map; |
| 311 | reg = <0 0x8ab00000 0 0x500000>; |
| 312 | }; |
| 313 | |
| 314 | pil_modem_mem: modem_region@8b000000 { |
| 315 | compatible = "removed-dma-pool"; |
| 316 | no-map; |
| 317 | reg = <0 0x8b000000 0 0x7e00000>; |
| 318 | }; |
| 319 | |
| 320 | pil_video_mem: pil_video_region@92e00000 { |
| 321 | compatible = "removed-dma-pool"; |
| 322 | no-map; |
| 323 | reg = <0 0x92e00000 0 0x500000>; |
| 324 | }; |
| 325 | |
| 326 | pil_cdsp_mem: cdsp_regions@93300000 { |
| 327 | compatible = "removed-dma-pool"; |
| 328 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 329 | reg = <0 0x93300000 0 0x800000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 330 | }; |
| 331 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 332 | pil_mba_mem: pil_mba_region@0x93b00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 333 | compatible = "removed-dma-pool"; |
| 334 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 335 | reg = <0 0x93b00000 0 0x200000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 336 | }; |
| 337 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 338 | pil_adsp_mem: pil_adsp_region@93d00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 339 | compatible = "removed-dma-pool"; |
| 340 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 341 | reg = <0 0x93d00000 0 0x1e00000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 342 | }; |
| 343 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 344 | pil_ipa_fw_mem: pil_ipa_fw_region@95b00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 345 | compatible = "removed-dma-pool"; |
| 346 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 347 | reg = <0 0x95b00000 0 0x10000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 348 | }; |
| 349 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 350 | pil_ipa_gsi_mem: pil_ipa_gsi_region@95b10000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 351 | compatible = "removed-dma-pool"; |
| 352 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 353 | reg = <0 0x95b10000 0 0x5000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 354 | }; |
| 355 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 356 | pil_gpu_mem: pil_gpu_region@95b15000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 357 | compatible = "removed-dma-pool"; |
| 358 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 359 | reg = <0 0x95b15000 0 0x1000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 360 | }; |
| 361 | |
| 362 | adsp_mem: adsp_region { |
| 363 | compatible = "shared-dma-pool"; |
| 364 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 365 | reusable; |
| 366 | alignment = <0 0x400000>; |
| 367 | size = <0 0xc00000>; |
| 368 | }; |
| 369 | |
| 370 | qseecom_mem: qseecom_region { |
| 371 | compatible = "shared-dma-pool"; |
| 372 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 373 | reusable; |
| 374 | alignment = <0 0x400000>; |
| 375 | size = <0 0x1400000>; |
| 376 | }; |
| 377 | |
| 378 | sp_mem: sp_region { /* SPSS-HLOS ION shared mem */ |
| 379 | compatible = "shared-dma-pool"; |
| 380 | alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */ |
| 381 | reusable; |
| 382 | alignment = <0 0x400000>; |
| 383 | size = <0 0x800000>; |
| 384 | }; |
| 385 | |
| 386 | secure_display_memory: secure_display_region { |
| 387 | compatible = "shared-dma-pool"; |
| 388 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 389 | reusable; |
| 390 | alignment = <0 0x400000>; |
| 391 | size = <0 0x5c00000>; |
| 392 | }; |
| 393 | |
| 394 | /* global autoconfigured region for contiguous allocations */ |
| 395 | linux,cma { |
| 396 | compatible = "shared-dma-pool"; |
| 397 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 398 | reusable; |
| 399 | alignment = <0 0x400000>; |
| 400 | size = <0 0x2000000>; |
| 401 | linux,cma-default; |
| 402 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 403 | }; |
| 404 | }; |
| 405 | |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 406 | #include "sdm670-ion.dtsi" |
| 407 | |
Dhoat Harpal | 92d63dea | 2017-06-06 21:20:26 +0530 | [diff] [blame] | 408 | #include "sdm670-smp2p.dtsi" |
| 409 | |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 410 | #include "sdm670-qupv3.dtsi" |
| 411 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 412 | &soc { |
| 413 | #address-cells = <1>; |
| 414 | #size-cells = <1>; |
| 415 | ranges = <0 0 0 0xffffffff>; |
| 416 | compatible = "simple-bus"; |
| 417 | |
| 418 | intc: interrupt-controller@17a00000 { |
| 419 | compatible = "arm,gic-v3"; |
| 420 | #interrupt-cells = <3>; |
| 421 | interrupt-controller; |
| 422 | #redistributor-regions = <1>; |
| 423 | redistributor-stride = <0x0 0x20000>; |
| 424 | reg = <0x17a00000 0x10000>, /* GICD */ |
| 425 | <0x17a60000 0x100000>; /* GICR * 8 */ |
| 426 | interrupts = <1 9 4>; |
Maulik Shah | 30ebbde | 2017-06-15 10:02:54 +0530 | [diff] [blame] | 427 | interrupt-parent = <&intc>; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 428 | }; |
| 429 | |
| 430 | timer { |
| 431 | compatible = "arm,armv8-timer"; |
| 432 | interrupts = <1 1 0xf08>, |
| 433 | <1 2 0xf08>, |
| 434 | <1 3 0xf08>, |
| 435 | <1 0 0xf08>; |
| 436 | clock-frequency = <19200000>; |
| 437 | }; |
| 438 | |
Lakshmi Sunkara | bbd6989 | 2017-06-09 13:17:10 +0530 | [diff] [blame] | 439 | qcom,sps { |
| 440 | compatible = "qcom,msm_sps_4k"; |
| 441 | qcom,pipe-attr-ee; |
| 442 | }; |
| 443 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 444 | timer@0x17c90000{ |
| 445 | #address-cells = <1>; |
| 446 | #size-cells = <1>; |
| 447 | ranges; |
| 448 | compatible = "arm,armv7-timer-mem"; |
| 449 | reg = <0x17c90000 0x1000>; |
| 450 | clock-frequency = <19200000>; |
| 451 | |
| 452 | frame@0x17ca0000 { |
| 453 | frame-number = <0>; |
| 454 | interrupts = <0 7 0x4>, |
| 455 | <0 6 0x4>; |
| 456 | reg = <0x17ca0000 0x1000>, |
| 457 | <0x17cb0000 0x1000>; |
| 458 | }; |
| 459 | |
| 460 | frame@17cc0000 { |
| 461 | frame-number = <1>; |
| 462 | interrupts = <0 8 0x4>; |
| 463 | reg = <0x17cc0000 0x1000>; |
| 464 | status = "disabled"; |
| 465 | }; |
| 466 | |
| 467 | frame@17cd0000 { |
| 468 | frame-number = <2>; |
| 469 | interrupts = <0 9 0x4>; |
| 470 | reg = <0x17cd0000 0x1000>; |
| 471 | status = "disabled"; |
| 472 | }; |
| 473 | |
| 474 | frame@17ce0000 { |
| 475 | frame-number = <3>; |
| 476 | interrupts = <0 10 0x4>; |
| 477 | reg = <0x17ce0000 0x1000>; |
| 478 | status = "disabled"; |
| 479 | }; |
| 480 | |
| 481 | frame@17cf0000 { |
| 482 | frame-number = <4>; |
| 483 | interrupts = <0 11 0x4>; |
| 484 | reg = <0x17cf0000 0x1000>; |
| 485 | status = "disabled"; |
| 486 | }; |
| 487 | |
| 488 | frame@17d00000 { |
| 489 | frame-number = <5>; |
| 490 | interrupts = <0 12 0x4>; |
| 491 | reg = <0x17d00000 0x1000>; |
| 492 | status = "disabled"; |
| 493 | }; |
| 494 | |
| 495 | frame@17d10000 { |
| 496 | frame-number = <6>; |
| 497 | interrupts = <0 13 0x4>; |
| 498 | reg = <0x17d10000 0x1000>; |
| 499 | status = "disabled"; |
| 500 | }; |
| 501 | }; |
| 502 | |
| 503 | restart@10ac000 { |
| 504 | compatible = "qcom,pshold"; |
| 505 | reg = <0xC264000 0x4>, |
| 506 | <0x1fd3000 0x4>; |
| 507 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 508 | }; |
| 509 | |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 510 | clock_rpmh: qcom,rpmhclk { |
| 511 | compatible = "qcom,dummycc"; |
| 512 | clock-output-names = "rpmh_clocks"; |
| 513 | #clock-cells = <1>; |
| 514 | }; |
| 515 | |
| 516 | clock_gcc: qcom,gcc@100000 { |
| 517 | compatible = "qcom,dummycc"; |
| 518 | clock-output-names = "gcc_clocks"; |
| 519 | #clock-cells = <1>; |
| 520 | #reset-cells = <1>; |
| 521 | }; |
| 522 | |
| 523 | clock_videocc: qcom,videocc@ab00000 { |
| 524 | compatible = "qcom,dummycc"; |
| 525 | clock-output-names = "videocc_clocks"; |
| 526 | #clock-cells = <1>; |
| 527 | #reset-cells = <1>; |
| 528 | }; |
| 529 | |
| 530 | clock_camcc: qcom,camcc@ad00000 { |
| 531 | compatible = "qcom,dummycc"; |
| 532 | clock-output-names = "camcc_clocks"; |
| 533 | #clock-cells = <1>; |
| 534 | #reset-cells = <1>; |
| 535 | }; |
| 536 | |
| 537 | clock_dispcc: qcom,dispcc@af00000 { |
| 538 | compatible = "qcom,dummycc"; |
| 539 | clock-output-names = "dispcc_clocks"; |
| 540 | #clock-cells = <1>; |
| 541 | #reset-cells = <1>; |
| 542 | }; |
| 543 | |
| 544 | clock_gpucc: qcom,gpucc@5090000 { |
| 545 | compatible = "qcom,dummycc"; |
| 546 | clock-output-names = "gpucc_clocks"; |
| 547 | #clock-cells = <1>; |
| 548 | #reset-cells = <1>; |
| 549 | }; |
| 550 | |
| 551 | clock_gfx: qcom,gfxcc@5090000 { |
| 552 | compatible = "qcom,dummycc"; |
| 553 | clock-output-names = "gfxcc_clocks"; |
| 554 | #clock-cells = <1>; |
| 555 | #reset-cells = <1>; |
| 556 | }; |
| 557 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 558 | clock_cpucc: qcom,cpucc { |
| 559 | compatible = "qcom,dummycc"; |
| 560 | clock-output-names = "cpucc_clocks"; |
| 561 | #clock-cells = <1>; |
| 562 | #reset-cells = <1>; |
| 563 | }; |
| 564 | |
Shrey Vijay | 6b6b3a5 | 2017-06-21 15:06:03 +0530 | [diff] [blame] | 565 | slim_aud: slim@62dc0000 { |
| 566 | cell-index = <1>; |
| 567 | compatible = "qcom,slim-ngd"; |
| 568 | reg = <0x62dc0000 0x2c000>, |
| 569 | <0x62d84000 0x2a000>; |
| 570 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 571 | interrupts = <0 163 0>, <0 164 0>; |
| 572 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
| 573 | qcom,apps-ch-pipes = <0x780000>; |
| 574 | qcom,ea-pc = <0x290>; |
| 575 | status = "disabled"; |
| 576 | }; |
| 577 | |
| 578 | slim_qca: slim@62e40000 { |
| 579 | cell-index = <3>; |
| 580 | compatible = "qcom,slim-ngd"; |
| 581 | reg = <0x62e40000 0x2c000>, |
| 582 | <0x62e04000 0x20000>; |
| 583 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 584 | interrupts = <0 291 0>, <0 292 0>; |
| 585 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
| 586 | status = "disabled"; |
| 587 | }; |
| 588 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 589 | wdog: qcom,wdt@17980000{ |
| 590 | compatible = "qcom,msm-watchdog"; |
| 591 | reg = <0x17980000 0x1000>; |
| 592 | reg-names = "wdt-base"; |
| 593 | interrupts = <0 3 0>, <0 4 0>; |
| 594 | qcom,bark-time = <11000>; |
| 595 | qcom,pet-time = <10000>; |
| 596 | qcom,ipi-ping; |
| 597 | qcom,wakeup-enable; |
| 598 | }; |
| 599 | |
| 600 | qcom,msm-rtb { |
| 601 | compatible = "qcom,msm-rtb"; |
| 602 | qcom,rtb-size = <0x100000>; |
| 603 | }; |
| 604 | |
| 605 | qcom,msm-imem@146bf000 { |
| 606 | compatible = "qcom,msm-imem"; |
| 607 | reg = <0x146bf000 0x1000>; |
| 608 | ranges = <0x0 0x146bf000 0x1000>; |
| 609 | #address-cells = <1>; |
| 610 | #size-cells = <1>; |
| 611 | |
| 612 | mem_dump_table@10 { |
| 613 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 614 | reg = <0x10 8>; |
| 615 | }; |
| 616 | |
| 617 | restart_reason@65c { |
| 618 | compatible = "qcom,msm-imem-restart_reason"; |
| 619 | reg = <0x65c 4>; |
| 620 | }; |
| 621 | |
| 622 | pil@94c { |
| 623 | compatible = "qcom,msm-imem-pil"; |
| 624 | reg = <0x94c 200>; |
| 625 | }; |
| 626 | |
| 627 | kaslr_offset@6d0 { |
| 628 | compatible = "qcom,msm-imem-kaslr_offset"; |
| 629 | reg = <0x6d0 12>; |
| 630 | }; |
| 631 | }; |
| 632 | |
Rama Krishna Phani A | 2acd96a | 2017-07-03 17:12:46 +0530 | [diff] [blame] | 633 | gpi_dma0: qcom,gpi-dma@0x800000 { |
| 634 | #dma-cells = <6>; |
| 635 | compatible = "qcom,gpi-dma"; |
| 636 | reg = <0x800000 0x60000>; |
| 637 | reg-names = "gpi-top"; |
| 638 | interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, |
| 639 | <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, |
| 640 | <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, |
| 641 | <0 256 0>; |
| 642 | qcom,max-num-gpii = <13>; |
| 643 | qcom,gpii-mask = <0xfa>; |
| 644 | qcom,ev-factor = <2>; |
| 645 | iommus = <&apps_smmu 0x0016 0x0>; |
| 646 | status = "ok"; |
| 647 | }; |
| 648 | |
| 649 | gpi_dma1: qcom,gpi-dma@0xa00000 { |
| 650 | #dma-cells = <6>; |
| 651 | compatible = "qcom,gpi-dma"; |
| 652 | reg = <0xa00000 0x60000>; |
| 653 | reg-names = "gpi-top"; |
| 654 | interrupts = <0 279 0>, <0 280 0>, <0 281 0>, <0 282 0>, |
| 655 | <0 283 0>, <0 284 0>, <0 293 0>, <0 294 0>, |
| 656 | <0 295 0>, <0 296 0>, <0 297 0>, <0 298 0>, |
| 657 | <0 299 0>; |
| 658 | qcom,max-num-gpii = <13>; |
| 659 | qcom,gpii-mask = <0xfa>; |
| 660 | qcom,ev-factor = <2>; |
| 661 | iommus = <&apps_smmu 0x06d6 0x0>; |
| 662 | status = "ok"; |
| 663 | }; |
| 664 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 665 | cpuss_dump { |
| 666 | compatible = "qcom,cpuss-dump"; |
| 667 | qcom,l1_i_cache0 { |
| 668 | qcom,dump-node = <&L1_I_0>; |
| 669 | qcom,dump-id = <0x60>; |
| 670 | }; |
| 671 | qcom,l1_i_cache1 { |
| 672 | qcom,dump-node = <&L1_I_100>; |
| 673 | qcom,dump-id = <0x61>; |
| 674 | }; |
| 675 | qcom,l1_i_cache2 { |
| 676 | qcom,dump-node = <&L1_I_200>; |
| 677 | qcom,dump-id = <0x62>; |
| 678 | }; |
| 679 | qcom,l1_i_cache3 { |
| 680 | qcom,dump-node = <&L1_I_300>; |
| 681 | qcom,dump-id = <0x63>; |
| 682 | }; |
| 683 | qcom,l1_i_cache100 { |
| 684 | qcom,dump-node = <&L1_I_400>; |
| 685 | qcom,dump-id = <0x64>; |
| 686 | }; |
| 687 | qcom,l1_i_cache101 { |
| 688 | qcom,dump-node = <&L1_I_500>; |
| 689 | qcom,dump-id = <0x65>; |
| 690 | }; |
| 691 | qcom,l1_i_cache102 { |
| 692 | qcom,dump-node = <&L1_I_600>; |
| 693 | qcom,dump-id = <0x66>; |
| 694 | }; |
| 695 | qcom,l1_i_cache103 { |
| 696 | qcom,dump-node = <&L1_I_700>; |
| 697 | qcom,dump-id = <0x67>; |
| 698 | }; |
| 699 | qcom,l1_d_cache0 { |
| 700 | qcom,dump-node = <&L1_D_0>; |
| 701 | qcom,dump-id = <0x80>; |
| 702 | }; |
| 703 | qcom,l1_d_cache1 { |
| 704 | qcom,dump-node = <&L1_D_100>; |
| 705 | qcom,dump-id = <0x81>; |
| 706 | }; |
| 707 | qcom,l1_d_cache2 { |
| 708 | qcom,dump-node = <&L1_D_200>; |
| 709 | qcom,dump-id = <0x82>; |
| 710 | }; |
| 711 | qcom,l1_d_cache3 { |
| 712 | qcom,dump-node = <&L1_D_300>; |
| 713 | qcom,dump-id = <0x83>; |
| 714 | }; |
| 715 | qcom,l1_d_cache100 { |
| 716 | qcom,dump-node = <&L1_D_400>; |
| 717 | qcom,dump-id = <0x84>; |
| 718 | }; |
| 719 | qcom,l1_d_cache101 { |
| 720 | qcom,dump-node = <&L1_D_500>; |
| 721 | qcom,dump-id = <0x85>; |
| 722 | }; |
| 723 | qcom,l1_d_cache102 { |
| 724 | qcom,dump-node = <&L1_D_600>; |
| 725 | qcom,dump-id = <0x86>; |
| 726 | }; |
| 727 | qcom,l1_d_cache103 { |
| 728 | qcom,dump-node = <&L1_D_700>; |
| 729 | qcom,dump-id = <0x87>; |
| 730 | }; |
Lingutla Chandrasekhar | ee4f187 | 2017-06-07 13:50:53 +0530 | [diff] [blame] | 731 | qcom,llcc1_d_cache { |
| 732 | qcom,dump-node = <&LLCC_1>; |
| 733 | qcom,dump-id = <0x140>; |
| 734 | }; |
| 735 | qcom,llcc2_d_cache { |
| 736 | qcom,dump-node = <&LLCC_2>; |
| 737 | qcom,dump-id = <0x141>; |
| 738 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 739 | }; |
| 740 | |
| 741 | kryo3xx-erp { |
| 742 | compatible = "arm,arm64-kryo3xx-cpu-erp"; |
| 743 | interrupts = <1 6 4>, |
| 744 | <1 7 4>, |
| 745 | <0 34 4>, |
| 746 | <0 35 4>; |
| 747 | |
| 748 | interrupt-names = "l1-l2-faultirq", |
| 749 | "l1-l2-errirq", |
| 750 | "l3-scu-errirq", |
| 751 | "l3-scu-faultirq"; |
| 752 | }; |
| 753 | |
Dhoat Harpal | a24cb2c | 2017-06-06 20:39:54 +0530 | [diff] [blame] | 754 | qcom,ipc-spinlock@1f40000 { |
| 755 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 756 | reg = <0x1f40000 0x8000>; |
| 757 | qcom,num-locks = <8>; |
| 758 | }; |
| 759 | |
Dhoat Harpal | dd9bfaf | 2017-06-06 20:43:16 +0530 | [diff] [blame] | 760 | qcom,smem@86000000 { |
| 761 | compatible = "qcom,smem"; |
| 762 | reg = <0x86000000 0x200000>, |
| 763 | <0x17911008 0x4>, |
| 764 | <0x778000 0x7000>, |
| 765 | <0x1fd4000 0x8>; |
| 766 | reg-names = "smem", "irq-reg-base", "aux-mem1", |
| 767 | "smem_targ_info_reg"; |
| 768 | qcom,mpu-enabled; |
| 769 | }; |
| 770 | |
Dhoat Harpal | 5f909ef | 2017-06-09 21:18:00 +0530 | [diff] [blame] | 771 | qmp_aop: mailbox@1799000c { |
| 772 | compatible = "qcom,qmp-mbox"; |
| 773 | label = "aop"; |
| 774 | reg = <0xc300000 0x100000>, |
| 775 | <0x1799000c 0x4>; |
| 776 | reg-names = "msgram", "irq-reg-base"; |
| 777 | qcom,irq-mask = <0x1>; |
| 778 | interrupts = <0 389 1>; |
| 779 | mbox-desc-offset = <0x0>; |
| 780 | #mbox-cells = <1>; |
| 781 | }; |
| 782 | |
Dhoat Harpal | 466ffcc | 2017-06-06 20:54:51 +0530 | [diff] [blame] | 783 | qcom,glink-smem-native-xprt-modem@86000000 { |
| 784 | compatible = "qcom,glink-smem-native-xprt"; |
| 785 | reg = <0x86000000 0x200000>, |
| 786 | <0x1799000c 0x4>; |
| 787 | reg-names = "smem", "irq-reg-base"; |
| 788 | qcom,irq-mask = <0x1000>; |
| 789 | interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; |
| 790 | label = "mpss"; |
| 791 | }; |
| 792 | |
| 793 | qcom,glink-smem-native-xprt-adsp@86000000 { |
| 794 | compatible = "qcom,glink-smem-native-xprt"; |
| 795 | reg = <0x86000000 0x200000>, |
| 796 | <0x1799000c 0x4>; |
| 797 | reg-names = "smem", "irq-reg-base"; |
| 798 | qcom,irq-mask = <0x100>; |
| 799 | interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>; |
| 800 | label = "lpass"; |
| 801 | qcom,qos-config = <&glink_qos_adsp>; |
| 802 | qcom,ramp-time = <0xaf>; |
| 803 | }; |
| 804 | |
| 805 | glink_qos_adsp: qcom,glink-qos-config-adsp { |
| 806 | compatible = "qcom,glink-qos-config"; |
| 807 | qcom,flow-info = <0x3c 0x0>, |
| 808 | <0x3c 0x0>, |
| 809 | <0x3c 0x0>, |
| 810 | <0x3c 0x0>; |
| 811 | qcom,mtu-size = <0x800>; |
| 812 | qcom,tput-stats-cycle = <0xa>; |
| 813 | }; |
| 814 | |
| 815 | glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { |
| 816 | compatible = "qcom,glink-spi-xprt"; |
| 817 | label = "wdsp"; |
| 818 | qcom,remote-fifo-config = <&glink_fifo_wdsp>; |
| 819 | qcom,qos-config = <&glink_qos_wdsp>; |
| 820 | qcom,ramp-time = <0x10>, |
| 821 | <0x20>, |
| 822 | <0x30>, |
| 823 | <0x40>; |
| 824 | }; |
| 825 | |
| 826 | glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { |
| 827 | compatible = "qcom,glink-fifo-config"; |
| 828 | qcom,out-read-idx-reg = <0x12000>; |
| 829 | qcom,out-write-idx-reg = <0x12004>; |
| 830 | qcom,in-read-idx-reg = <0x1200C>; |
| 831 | qcom,in-write-idx-reg = <0x12010>; |
| 832 | }; |
| 833 | |
| 834 | glink_qos_wdsp: qcom,glink-qos-config-wdsp { |
| 835 | compatible = "qcom,glink-qos-config"; |
| 836 | qcom,flow-info = <0x80 0x0>, |
| 837 | <0x70 0x1>, |
| 838 | <0x60 0x2>, |
| 839 | <0x50 0x3>; |
| 840 | qcom,mtu-size = <0x800>; |
| 841 | qcom,tput-stats-cycle = <0xa>; |
| 842 | }; |
| 843 | |
| 844 | qcom,glink-smem-native-xprt-cdsp@86000000 { |
| 845 | compatible = "qcom,glink-smem-native-xprt"; |
| 846 | reg = <0x86000000 0x200000>, |
| 847 | <0x1799000c 0x4>; |
| 848 | reg-names = "smem", "irq-reg-base"; |
| 849 | qcom,irq-mask = <0x10>; |
| 850 | interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; |
| 851 | label = "cdsp"; |
| 852 | }; |
| 853 | |
Dhoat Harpal | 9cb73cc | 2017-06-06 20:58:14 +0530 | [diff] [blame] | 854 | glink_mpss: qcom,glink-ssr-modem { |
| 855 | compatible = "qcom,glink_ssr"; |
| 856 | label = "modem"; |
| 857 | qcom,edge = "mpss"; |
| 858 | qcom,notify-edges = <&glink_lpass>, <&glink_cdsp>; |
| 859 | qcom,xprt = "smem"; |
| 860 | }; |
| 861 | |
| 862 | glink_lpass: qcom,glink-ssr-adsp { |
| 863 | compatible = "qcom,glink_ssr"; |
| 864 | label = "adsp"; |
| 865 | qcom,edge = "lpass"; |
| 866 | qcom,notify-edges = <&glink_mpss>, <&glink_cdsp>; |
| 867 | qcom,xprt = "smem"; |
| 868 | }; |
| 869 | |
| 870 | glink_cdsp: qcom,glink-ssr-cdsp { |
| 871 | compatible = "qcom,glink_ssr"; |
| 872 | label = "cdsp"; |
| 873 | qcom,edge = "cdsp"; |
| 874 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>; |
| 875 | qcom,xprt = "smem"; |
| 876 | }; |
| 877 | |
Dhoat Harpal | 22dafa9 | 2017-06-06 21:03:34 +0530 | [diff] [blame] | 878 | qcom,ipc_router { |
| 879 | compatible = "qcom,ipc_router"; |
| 880 | qcom,node-id = <1>; |
| 881 | }; |
| 882 | |
| 883 | qcom,ipc_router_modem_xprt { |
| 884 | compatible = "qcom,ipc_router_glink_xprt"; |
| 885 | qcom,ch-name = "IPCRTR"; |
| 886 | qcom,xprt-remote = "mpss"; |
| 887 | qcom,glink-xprt = "smem"; |
| 888 | qcom,xprt-linkid = <1>; |
| 889 | qcom,xprt-version = <1>; |
| 890 | qcom,fragmented-data; |
| 891 | }; |
| 892 | |
| 893 | qcom,ipc_router_q6_xprt { |
| 894 | compatible = "qcom,ipc_router_glink_xprt"; |
| 895 | qcom,ch-name = "IPCRTR"; |
| 896 | qcom,xprt-remote = "lpass"; |
| 897 | qcom,glink-xprt = "smem"; |
| 898 | qcom,xprt-linkid = <1>; |
| 899 | qcom,xprt-version = <1>; |
| 900 | qcom,fragmented-data; |
| 901 | }; |
| 902 | |
| 903 | qcom,ipc_router_cdsp_xprt { |
| 904 | compatible = "qcom,ipc_router_glink_xprt"; |
| 905 | qcom,ch-name = "IPCRTR"; |
| 906 | qcom,xprt-remote = "cdsp"; |
| 907 | qcom,glink-xprt = "smem"; |
| 908 | qcom,xprt-linkid = <1>; |
| 909 | qcom,xprt-version = <1>; |
| 910 | qcom,fragmented-data; |
| 911 | }; |
| 912 | |
Dhoat Harpal | 11d3448 | 2017-06-06 21:00:14 +0530 | [diff] [blame] | 913 | qcom,glink_pkt { |
| 914 | compatible = "qcom,glinkpkt"; |
| 915 | |
| 916 | qcom,glinkpkt-at-mdm0 { |
| 917 | qcom,glinkpkt-transport = "smem"; |
| 918 | qcom,glinkpkt-edge = "mpss"; |
| 919 | qcom,glinkpkt-ch-name = "DS"; |
| 920 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 921 | }; |
| 922 | |
| 923 | qcom,glinkpkt-loopback_cntl { |
| 924 | qcom,glinkpkt-transport = "lloop"; |
| 925 | qcom,glinkpkt-edge = "local"; |
| 926 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 927 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 928 | }; |
| 929 | |
| 930 | qcom,glinkpkt-loopback_data { |
| 931 | qcom,glinkpkt-transport = "lloop"; |
| 932 | qcom,glinkpkt-edge = "local"; |
| 933 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 934 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 935 | }; |
| 936 | |
| 937 | qcom,glinkpkt-apr-apps2 { |
| 938 | qcom,glinkpkt-transport = "smem"; |
| 939 | qcom,glinkpkt-edge = "adsp"; |
| 940 | qcom,glinkpkt-ch-name = "apr_apps2"; |
| 941 | qcom,glinkpkt-dev-name = "apr_apps2"; |
| 942 | }; |
| 943 | |
| 944 | qcom,glinkpkt-data40-cntl { |
| 945 | qcom,glinkpkt-transport = "smem"; |
| 946 | qcom,glinkpkt-edge = "mpss"; |
| 947 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 948 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 949 | }; |
| 950 | |
| 951 | qcom,glinkpkt-data1 { |
| 952 | qcom,glinkpkt-transport = "smem"; |
| 953 | qcom,glinkpkt-edge = "mpss"; |
| 954 | qcom,glinkpkt-ch-name = "DATA1"; |
| 955 | qcom,glinkpkt-dev-name = "smd7"; |
| 956 | }; |
| 957 | |
| 958 | qcom,glinkpkt-data4 { |
| 959 | qcom,glinkpkt-transport = "smem"; |
| 960 | qcom,glinkpkt-edge = "mpss"; |
| 961 | qcom,glinkpkt-ch-name = "DATA4"; |
| 962 | qcom,glinkpkt-dev-name = "smd8"; |
| 963 | }; |
| 964 | |
| 965 | qcom,glinkpkt-data11 { |
| 966 | qcom,glinkpkt-transport = "smem"; |
| 967 | qcom,glinkpkt-edge = "mpss"; |
| 968 | qcom,glinkpkt-ch-name = "DATA11"; |
| 969 | qcom,glinkpkt-dev-name = "smd11"; |
| 970 | }; |
| 971 | }; |
| 972 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 973 | qcom,chd_sliver { |
| 974 | compatible = "qcom,core-hang-detect"; |
| 975 | label = "silver"; |
| 976 | qcom,threshold-arr = <0x17e00058 0x17e10058 0x17e20058 |
| 977 | 0x17e30058 0x17e40058 0x17e50058>; |
| 978 | qcom,config-arr = <0x17e00060 0x17e10060 0x17e20060 |
| 979 | 0x17e30060 0x17e40060 0x17e50060>; |
| 980 | }; |
| 981 | |
| 982 | qcom,chd_gold { |
| 983 | compatible = "qcom,core-hang-detect"; |
| 984 | label = "gold"; |
| 985 | qcom,threshold-arr = <0x17e60058 0x17e70058>; |
| 986 | qcom,config-arr = <0x17e60060 0x17e70060>; |
| 987 | }; |
| 988 | |
| 989 | qcom,ghd { |
| 990 | compatible = "qcom,gladiator-hang-detect-v2"; |
| 991 | qcom,threshold-arr = <0x1799041c 0x17990420>; |
| 992 | qcom,config-reg = <0x17990434>; |
| 993 | }; |
| 994 | |
| 995 | qcom,msm-gladiator-v3@17900000 { |
| 996 | compatible = "qcom,msm-gladiator-v3"; |
| 997 | reg = <0x17900000 0xd080>; |
| 998 | reg-names = "gladiator_base"; |
| 999 | interrupts = <0 17 0>; |
| 1000 | }; |
| 1001 | |
Lingutla Chandrasekhar | ee4f187 | 2017-06-07 13:50:53 +0530 | [diff] [blame] | 1002 | qcom,llcc@1100000 { |
| 1003 | compatible = "qcom,llcc-core", "syscon", "simple-mfd"; |
| 1004 | reg = <0x1100000 0x250000>; |
| 1005 | reg-names = "llcc_base"; |
| 1006 | qcom,llcc-banks-off = <0x0 0x80000 >; |
| 1007 | qcom,llcc-broadcast-off = <0x200000>; |
| 1008 | |
| 1009 | llcc: qcom,sdm670-llcc { |
| 1010 | compatible = "qcom,sdm670-llcc"; |
| 1011 | #cache-cells = <1>; |
| 1012 | max-slices = <32>; |
| 1013 | qcom,dump-size = <0x80000>; |
| 1014 | }; |
| 1015 | |
| 1016 | qcom,llcc-erp { |
| 1017 | compatible = "qcom,llcc-erp"; |
| 1018 | interrupt-names = "ecc_irq"; |
| 1019 | interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; |
| 1020 | }; |
| 1021 | |
| 1022 | qcom,llcc-amon { |
| 1023 | compatible = "qcom,llcc-amon"; |
| 1024 | }; |
| 1025 | |
| 1026 | LLCC_1: llcc_1_dcache { |
| 1027 | qcom,dump-size = <0xd8000>; |
| 1028 | }; |
| 1029 | |
| 1030 | LLCC_2: llcc_2_dcache { |
| 1031 | qcom,dump-size = <0xd8000>; |
| 1032 | }; |
| 1033 | }; |
| 1034 | |
Maulik Shah | 210773d | 2017-06-15 09:49:12 +0530 | [diff] [blame] | 1035 | cmd_db: qcom,cmd-db@c3f000c { |
| 1036 | compatible = "qcom,cmd-db"; |
| 1037 | reg = <0xc3f000c 0x8>; |
| 1038 | }; |
| 1039 | |
Maulik Shah | c77d1d2 | 2017-06-15 14:04:50 +0530 | [diff] [blame] | 1040 | apps_rsc: mailbox@179e0000 { |
| 1041 | compatible = "qcom,tcs-drv"; |
| 1042 | label = "apps_rsc"; |
| 1043 | reg = <0x179e0000 0x100>, <0x179e0d00 0x3000>; |
| 1044 | interrupts = <0 5 0>; |
| 1045 | #mbox-cells = <1>; |
| 1046 | qcom,drv-id = <2>; |
| 1047 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 1048 | <SLEEP_TCS 3>, |
| 1049 | <WAKE_TCS 3>, |
| 1050 | <CONTROL_TCS 1>; |
| 1051 | }; |
| 1052 | |
Maulik Shah | 0dd203f | 2017-06-15 09:44:59 +0530 | [diff] [blame] | 1053 | system_pm { |
| 1054 | compatible = "qcom,system-pm"; |
| 1055 | mboxes = <&apps_rsc 0>; |
| 1056 | }; |
| 1057 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1058 | dcc: dcc_v2@10a2000 { |
| 1059 | compatible = "qcom,dcc_v2"; |
| 1060 | reg = <0x10a2000 0x1000>, |
| 1061 | <0x10ae000 0x2000>; |
| 1062 | reg-names = "dcc-base", "dcc-ram-base"; |
| 1063 | }; |
| 1064 | |
Tirupathi Reddy | 9ae4c89 | 2017-06-09 12:30:31 +0530 | [diff] [blame] | 1065 | spmi_bus: qcom,spmi@c440000 { |
| 1066 | compatible = "qcom,spmi-pmic-arb"; |
| 1067 | reg = <0xc440000 0x1100>, |
| 1068 | <0xc600000 0x2000000>, |
| 1069 | <0xe600000 0x100000>, |
| 1070 | <0xe700000 0xa0000>, |
| 1071 | <0xc40a000 0x26000>; |
| 1072 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 1073 | interrupt-names = "periph_irq"; |
| 1074 | interrupts = <GIC_SPI 481 IRQ_TYPE_NONE>; |
| 1075 | qcom,ee = <0>; |
| 1076 | qcom,channel = <0>; |
| 1077 | #address-cells = <2>; |
| 1078 | #size-cells = <0>; |
| 1079 | interrupt-controller; |
| 1080 | #interrupt-cells = <4>; |
| 1081 | cell-index = <0>; |
| 1082 | }; |
Sayali Lokhande | 099af9c | 2017-06-08 10:18:29 +0530 | [diff] [blame] | 1083 | |
| 1084 | ufsphy_mem: ufsphy_mem@1d87000 { |
| 1085 | reg = <0x1d87000 0xe00>; /* PHY regs */ |
| 1086 | reg-names = "phy_mem"; |
| 1087 | #phy-cells = <0>; |
| 1088 | |
| 1089 | lanes-per-direction = <1>; |
| 1090 | |
| 1091 | clock-names = "ref_clk_src", |
| 1092 | "ref_clk", |
| 1093 | "ref_aux_clk"; |
| 1094 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
| 1095 | <&clock_gcc GCC_UFS_MEM_CLKREF_CLK>, |
| 1096 | <&clock_gcc GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK>; |
| 1097 | |
| 1098 | status = "disabled"; |
| 1099 | }; |
| 1100 | |
| 1101 | ufshc_mem: ufshc@1d84000 { |
| 1102 | compatible = "qcom,ufshc"; |
| 1103 | reg = <0x1d84000 0x3000>; |
| 1104 | interrupts = <0 265 0>; |
| 1105 | phys = <&ufsphy_mem>; |
| 1106 | phy-names = "ufsphy"; |
| 1107 | |
| 1108 | lanes-per-direction = <1>; |
| 1109 | dev-ref-clk-freq = <0>; /* 19.2 MHz */ |
| 1110 | |
| 1111 | clock-names = |
| 1112 | "core_clk", |
| 1113 | "bus_aggr_clk", |
| 1114 | "iface_clk", |
| 1115 | "core_clk_unipro", |
| 1116 | "core_clk_ice", |
| 1117 | "ref_clk", |
| 1118 | "tx_lane0_sync_clk", |
| 1119 | "rx_lane0_sync_clk"; |
| 1120 | clocks = |
| 1121 | <&clock_gcc GCC_UFS_PHY_AXI_HW_CTL_CLK>, |
| 1122 | <&clock_gcc GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK>, |
| 1123 | <&clock_gcc GCC_UFS_PHY_AHB_CLK>, |
| 1124 | <&clock_gcc GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK>, |
| 1125 | <&clock_gcc GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK>, |
| 1126 | <&clock_rpmh RPMH_CXO_CLK>, |
| 1127 | <&clock_gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, |
| 1128 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>; |
| 1129 | freq-table-hz = |
| 1130 | <50000000 200000000>, |
| 1131 | <0 0>, |
| 1132 | <0 0>, |
| 1133 | <37500000 150000000>, |
| 1134 | <75000000 300000000>, |
| 1135 | <0 0>, |
| 1136 | <0 0>, |
| 1137 | <0 0>; |
| 1138 | |
| 1139 | resets = <&clock_gcc GCC_UFS_PHY_BCR>; |
| 1140 | reset-names = "core_reset"; |
| 1141 | |
| 1142 | status = "disabled"; |
| 1143 | }; |
Gaurav Kohli | b28d556 | 2017-06-12 11:26:27 +0530 | [diff] [blame] | 1144 | |
| 1145 | qcom,lpass@62400000 { |
| 1146 | compatible = "qcom,pil-tz-generic"; |
| 1147 | reg = <0x62400000 0x00100>; |
| 1148 | interrupts = <0 162 1>; |
| 1149 | |
| 1150 | vdd_cx-supply = <&pm660l_l9_level>; |
| 1151 | qcom,proxy-reg-names = "vdd_cx"; |
| 1152 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
| 1153 | |
| 1154 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 1155 | clock-names = "xo"; |
| 1156 | qcom,proxy-clock-names = "xo"; |
| 1157 | |
| 1158 | qcom,pas-id = <1>; |
| 1159 | qcom,proxy-timeout-ms = <10000>; |
| 1160 | qcom,smem-id = <423>; |
| 1161 | qcom,sysmon-id = <1>; |
| 1162 | qcom,ssctl-instance-id = <0x14>; |
| 1163 | qcom,firmware-name = "adsp"; |
| 1164 | memory-region = <&pil_adsp_mem>; |
| 1165 | |
| 1166 | /* GPIO inputs from lpass */ |
| 1167 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; |
| 1168 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; |
| 1169 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; |
| 1170 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; |
| 1171 | |
| 1172 | /* GPIO output to lpass */ |
| 1173 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; |
| 1174 | status = "ok"; |
| 1175 | }; |
Mohammed Javid | 736c25c | 2017-06-19 13:23:18 +0530 | [diff] [blame] | 1176 | |
| 1177 | qcom,rmnet-ipa { |
| 1178 | compatible = "qcom,rmnet-ipa3"; |
| 1179 | qcom,rmnet-ipa-ssr; |
| 1180 | qcom,ipa-loaduC; |
| 1181 | qcom,ipa-advertise-sg-support; |
| 1182 | qcom,ipa-napi-enable; |
| 1183 | }; |
| 1184 | |
| 1185 | ipa_hw: qcom,ipa@01e00000 { |
| 1186 | compatible = "qcom,ipa"; |
| 1187 | reg = <0x1e00000 0x34000>, |
| 1188 | <0x1e04000 0x2c000>; |
| 1189 | reg-names = "ipa-base", "gsi-base"; |
| 1190 | interrupts = |
| 1191 | <0 311 0>, |
| 1192 | <0 432 0>; |
| 1193 | interrupt-names = "ipa-irq", "gsi-irq"; |
| 1194 | qcom,ipa-hw-ver = <13>; /* IPA core version = IPAv3.5.1 */ |
| 1195 | qcom,ipa-hw-mode = <1>; |
| 1196 | qcom,ee = <0>; |
| 1197 | qcom,use-ipa-tethering-bridge; |
| 1198 | qcom,modem-cfg-emb-pipe-flt; |
| 1199 | qcom,ipa-wdi2; |
| 1200 | qcom,use-64-bit-dma-mask; |
| 1201 | qcom,arm-smmu; |
| 1202 | qcom,smmu-s1-bypass; |
| 1203 | qcom,bandwidth-vote-for-ipa; |
| 1204 | qcom,msm-bus,name = "ipa"; |
| 1205 | qcom,msm-bus,num-cases = <4>; |
| 1206 | qcom,msm-bus,num-paths = <4>; |
| 1207 | qcom,msm-bus,vectors-KBps = |
| 1208 | /* No vote */ |
| 1209 | <90 512 0 0>, |
| 1210 | <90 585 0 0>, |
| 1211 | <1 676 0 0>, |
| 1212 | <143 777 0 0>, |
| 1213 | /* SVS */ |
| 1214 | <90 512 80000 640000>, |
| 1215 | <90 585 80000 640000>, |
| 1216 | <1 676 80000 80000>, |
| 1217 | <143 777 0 150000>, |
| 1218 | /* NOMINAL */ |
| 1219 | <90 512 206000 960000>, |
| 1220 | <90 585 206000 960000>, |
| 1221 | <1 676 206000 160000>, |
| 1222 | <143 777 0 300000>, |
| 1223 | /* TURBO */ |
| 1224 | <90 512 206000 3600000>, |
| 1225 | <90 585 206000 3600000>, |
| 1226 | <1 676 206000 300000>, |
| 1227 | <143 777 0 355333>; |
| 1228 | qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; |
| 1229 | |
| 1230 | /* IPA RAM mmap */ |
| 1231 | qcom,ipa-ram-mmap = < |
| 1232 | 0x280 /* ofst_start; */ |
| 1233 | 0x0 /* nat_ofst; */ |
| 1234 | 0x0 /* nat_size; */ |
| 1235 | 0x288 /* v4_flt_hash_ofst; */ |
| 1236 | 0x78 /* v4_flt_hash_size; */ |
| 1237 | 0x4000 /* v4_flt_hash_size_ddr; */ |
| 1238 | 0x308 /* v4_flt_nhash_ofst; */ |
| 1239 | 0x78 /* v4_flt_nhash_size; */ |
| 1240 | 0x4000 /* v4_flt_nhash_size_ddr; */ |
| 1241 | 0x388 /* v6_flt_hash_ofst; */ |
| 1242 | 0x78 /* v6_flt_hash_size; */ |
| 1243 | 0x4000 /* v6_flt_hash_size_ddr; */ |
| 1244 | 0x408 /* v6_flt_nhash_ofst; */ |
| 1245 | 0x78 /* v6_flt_nhash_size; */ |
| 1246 | 0x4000 /* v6_flt_nhash_size_ddr; */ |
| 1247 | 0xf /* v4_rt_num_index; */ |
| 1248 | 0x0 /* v4_modem_rt_index_lo; */ |
| 1249 | 0x7 /* v4_modem_rt_index_hi; */ |
| 1250 | 0x8 /* v4_apps_rt_index_lo; */ |
| 1251 | 0xe /* v4_apps_rt_index_hi; */ |
| 1252 | 0x488 /* v4_rt_hash_ofst; */ |
| 1253 | 0x78 /* v4_rt_hash_size; */ |
| 1254 | 0x4000 /* v4_rt_hash_size_ddr; */ |
| 1255 | 0x508 /* v4_rt_nhash_ofst; */ |
| 1256 | 0x78 /* v4_rt_nhash_size; */ |
| 1257 | 0x4000 /* v4_rt_nhash_size_ddr; */ |
| 1258 | 0xf /* v6_rt_num_index; */ |
| 1259 | 0x0 /* v6_modem_rt_index_lo; */ |
| 1260 | 0x7 /* v6_modem_rt_index_hi; */ |
| 1261 | 0x8 /* v6_apps_rt_index_lo; */ |
| 1262 | 0xe /* v6_apps_rt_index_hi; */ |
| 1263 | 0x588 /* v6_rt_hash_ofst; */ |
| 1264 | 0x78 /* v6_rt_hash_size; */ |
| 1265 | 0x4000 /* v6_rt_hash_size_ddr; */ |
| 1266 | 0x608 /* v6_rt_nhash_ofst; */ |
| 1267 | 0x78 /* v6_rt_nhash_size; */ |
| 1268 | 0x4000 /* v6_rt_nhash_size_ddr; */ |
| 1269 | 0x688 /* modem_hdr_ofst; */ |
| 1270 | 0x140 /* modem_hdr_size; */ |
| 1271 | 0x7c8 /* apps_hdr_ofst; */ |
| 1272 | 0x0 /* apps_hdr_size; */ |
| 1273 | 0x800 /* apps_hdr_size_ddr; */ |
| 1274 | 0x7d0 /* modem_hdr_proc_ctx_ofst; */ |
| 1275 | 0x200 /* modem_hdr_proc_ctx_size; */ |
| 1276 | 0x9d0 /* apps_hdr_proc_ctx_ofst; */ |
| 1277 | 0x200 /* apps_hdr_proc_ctx_size; */ |
| 1278 | 0x0 /* apps_hdr_proc_ctx_size_ddr; */ |
| 1279 | 0x0 /* modem_comp_decomp_ofst; diff */ |
| 1280 | 0x0 /* modem_comp_decomp_size; diff */ |
| 1281 | 0xbd8 /* modem_ofst; */ |
| 1282 | 0x1024 /* modem_size; */ |
| 1283 | 0x2000 /* apps_v4_flt_hash_ofst; */ |
| 1284 | 0x0 /* apps_v4_flt_hash_size; */ |
| 1285 | 0x2000 /* apps_v4_flt_nhash_ofst; */ |
| 1286 | 0x0 /* apps_v4_flt_nhash_size; */ |
| 1287 | 0x2000 /* apps_v6_flt_hash_ofst; */ |
| 1288 | 0x0 /* apps_v6_flt_hash_size; */ |
| 1289 | 0x2000 /* apps_v6_flt_nhash_ofst; */ |
| 1290 | 0x0 /* apps_v6_flt_nhash_size; */ |
| 1291 | 0x80 /* uc_info_ofst; */ |
| 1292 | 0x200 /* uc_info_size; */ |
| 1293 | 0x2000 /* end_ofst; */ |
| 1294 | 0x2000 /* apps_v4_rt_hash_ofst; */ |
| 1295 | 0x0 /* apps_v4_rt_hash_size; */ |
| 1296 | 0x2000 /* apps_v4_rt_nhash_ofst; */ |
| 1297 | 0x0 /* apps_v4_rt_nhash_size; */ |
| 1298 | 0x2000 /* apps_v6_rt_hash_ofst; */ |
| 1299 | 0x0 /* apps_v6_rt_hash_size; */ |
| 1300 | 0x2000 /* apps_v6_rt_nhash_ofst; */ |
| 1301 | 0x0 /* apps_v6_rt_nhash_size; */ |
| 1302 | 0x1c00 /* uc_event_ring_ofst; */ |
| 1303 | 0x400 /* uc_event_ring_size; */ |
| 1304 | >; |
| 1305 | |
| 1306 | /* smp2p gpio information */ |
| 1307 | qcom,smp2pgpio_map_ipa_1_out { |
| 1308 | compatible = "qcom,smp2pgpio-map-ipa-1-out"; |
| 1309 | gpios = <&smp2pgpio_ipa_1_out 0 0>; |
| 1310 | }; |
| 1311 | |
| 1312 | qcom,smp2pgpio_map_ipa_1_in { |
| 1313 | compatible = "qcom,smp2pgpio-map-ipa-1-in"; |
| 1314 | gpios = <&smp2pgpio_ipa_1_in 0 0>; |
| 1315 | }; |
| 1316 | |
| 1317 | ipa_smmu_ap: ipa_smmu_ap { |
| 1318 | compatible = "qcom,ipa-smmu-ap-cb"; |
| 1319 | iommus = <&apps_smmu 0x720 0x0>; |
| 1320 | qcom,iova-mapping = <0x20000000 0x40000000>; |
| 1321 | }; |
| 1322 | |
| 1323 | ipa_smmu_wlan: ipa_smmu_wlan { |
| 1324 | compatible = "qcom,ipa-smmu-wlan-cb"; |
| 1325 | iommus = <&apps_smmu 0x721 0x0>; |
| 1326 | }; |
| 1327 | |
| 1328 | ipa_smmu_uc: ipa_smmu_uc { |
| 1329 | compatible = "qcom,ipa-smmu-uc-cb"; |
| 1330 | iommus = <&apps_smmu 0x722 0x0>; |
| 1331 | qcom,iova-mapping = <0x40000000 0x20000000>; |
| 1332 | }; |
| 1333 | }; |
| 1334 | |
| 1335 | qcom,ipa_fws { |
| 1336 | compatible = "qcom,pil-tz-generic"; |
| 1337 | qcom,pas-id = <0xf>; |
| 1338 | qcom,firmware-name = "ipa_fws"; |
| 1339 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1340 | }; |
| 1341 | |
| 1342 | #include "sdm670-pinctrl.dtsi" |
Vijayanand Jitta | d48c408 | 2017-06-07 15:07:51 +0530 | [diff] [blame] | 1343 | #include "msm-arm-smmu-sdm670.dtsi" |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1344 | #include "msm-gdsc-sdm845.dtsi" |
Maulik Shah | d313ea8 | 2017-06-14 13:10:52 +0530 | [diff] [blame] | 1345 | #include "sdm670-pm.dtsi" |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1346 | |
| 1347 | &usb30_prim_gdsc { |
| 1348 | status = "ok"; |
| 1349 | }; |
| 1350 | |
| 1351 | &ufs_phy_gdsc { |
| 1352 | status = "ok"; |
| 1353 | }; |
| 1354 | |
| 1355 | &hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc { |
| 1356 | status = "ok"; |
| 1357 | }; |
| 1358 | |
| 1359 | &hlos1_vote_aggre_noc_mmu_tbu1_gdsc { |
| 1360 | status = "ok"; |
| 1361 | }; |
| 1362 | |
| 1363 | &hlos1_vote_aggre_noc_mmu_tbu2_gdsc { |
| 1364 | status = "ok"; |
| 1365 | }; |
| 1366 | |
| 1367 | &bps_gdsc { |
| 1368 | status = "ok"; |
| 1369 | }; |
| 1370 | |
| 1371 | &ife_0_gdsc { |
| 1372 | status = "ok"; |
| 1373 | }; |
| 1374 | |
| 1375 | &ife_1_gdsc { |
| 1376 | status = "ok"; |
| 1377 | }; |
| 1378 | |
| 1379 | &ipe_0_gdsc { |
| 1380 | status = "ok"; |
| 1381 | }; |
| 1382 | |
| 1383 | &ipe_1_gdsc { |
| 1384 | status = "ok"; |
| 1385 | }; |
| 1386 | |
| 1387 | &titan_top_gdsc { |
| 1388 | status = "ok"; |
| 1389 | }; |
| 1390 | |
| 1391 | &mdss_core_gdsc { |
| 1392 | status = "ok"; |
| 1393 | }; |
| 1394 | |
| 1395 | &gpu_cx_gdsc { |
| 1396 | status = "ok"; |
| 1397 | }; |
| 1398 | |
| 1399 | &gpu_gx_gdsc { |
| 1400 | clock-names = "core_root_clk"; |
| 1401 | clocks = <&clock_gfx GPU_CC_GX_GFX3D_CLK_SRC>; |
| 1402 | qcom,force-enable-root-clk; |
| 1403 | status = "ok"; |
| 1404 | }; |
| 1405 | |
| 1406 | &vcodec0_gdsc { |
| 1407 | qcom,support-hw-trigger; |
| 1408 | status = "ok"; |
| 1409 | }; |
| 1410 | |
| 1411 | &vcodec1_gdsc { |
| 1412 | qcom,support-hw-trigger; |
| 1413 | status = "ok"; |
| 1414 | }; |
| 1415 | |
| 1416 | &venus_gdsc { |
| 1417 | status = "ok"; |
| 1418 | }; |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 1419 | |
Tirupathi Reddy | 242bd80 | 2017-06-09 11:31:05 +0530 | [diff] [blame] | 1420 | #include "pm660.dtsi" |
| 1421 | #include "pm660l.dtsi" |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 1422 | #include "sdm670-regulator.dtsi" |