David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/phy/micrel.c |
| 3 | * |
| 4 | * Driver for Micrel PHYs |
| 5 | * |
| 6 | * Author: David J. Choi |
| 7 | * |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 8 | * Copyright (c) 2010-2013 Micrel, Inc. |
Johan Hovold | ee0dc2f | 2014-11-19 12:59:23 +0100 | [diff] [blame] | 9 | * Copyright (c) 2014 Johan Hovold <johan@kernel.org> |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify it |
| 12 | * under the terms of the GNU General Public License as published by the |
| 13 | * Free Software Foundation; either version 2 of the License, or (at your |
| 14 | * option) any later version. |
| 15 | * |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 16 | * Support : Micrel Phys: |
| 17 | * Giga phys: ksz9021, ksz9031 |
| 18 | * 100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041 |
| 19 | * ksz8021, ksz8031, ksz8051, |
| 20 | * ksz8081, ksz8091, |
| 21 | * ksz8061, |
| 22 | * Switch : ksz8873, ksz886x |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/phy.h> |
Baruch Siach | d606ef3 | 2011-02-14 02:05:33 +0000 | [diff] [blame] | 28 | #include <linux/micrel_phy.h> |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 29 | #include <linux/of.h> |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 30 | #include <linux/clk.h> |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 31 | |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 32 | /* Operation Mode Strap Override */ |
| 33 | #define MII_KSZPHY_OMSO 0x16 |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 34 | #define KSZPHY_OMSO_B_CAST_OFF BIT(9) |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 35 | #define KSZPHY_OMSO_NAND_TREE_ON BIT(5) |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 36 | #define KSZPHY_OMSO_RMII_OVERRIDE BIT(1) |
| 37 | #define KSZPHY_OMSO_MII_OVERRIDE BIT(0) |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 38 | |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 39 | /* general Interrupt control/status reg in vendor specific block. */ |
| 40 | #define MII_KSZPHY_INTCS 0x1B |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 41 | #define KSZPHY_INTCS_JABBER BIT(15) |
| 42 | #define KSZPHY_INTCS_RECEIVE_ERR BIT(14) |
| 43 | #define KSZPHY_INTCS_PAGE_RECEIVE BIT(13) |
| 44 | #define KSZPHY_INTCS_PARELLEL BIT(12) |
| 45 | #define KSZPHY_INTCS_LINK_PARTNER_ACK BIT(11) |
| 46 | #define KSZPHY_INTCS_LINK_DOWN BIT(10) |
| 47 | #define KSZPHY_INTCS_REMOTE_FAULT BIT(9) |
| 48 | #define KSZPHY_INTCS_LINK_UP BIT(8) |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 49 | #define KSZPHY_INTCS_ALL (KSZPHY_INTCS_LINK_UP |\ |
| 50 | KSZPHY_INTCS_LINK_DOWN) |
| 51 | |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 52 | /* PHY Control 1 */ |
| 53 | #define MII_KSZPHY_CTRL_1 0x1e |
| 54 | |
| 55 | /* PHY Control 2 / PHY Control (if no PHY Control 1) */ |
| 56 | #define MII_KSZPHY_CTRL_2 0x1f |
| 57 | #define MII_KSZPHY_CTRL MII_KSZPHY_CTRL_2 |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 58 | /* bitmap of PHY register to set interrupt mode */ |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 59 | #define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9) |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 60 | #define KSZPHY_RMII_REF_CLK_SEL BIT(7) |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 61 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 62 | /* Write/read to/from extended registers */ |
| 63 | #define MII_KSZPHY_EXTREG 0x0b |
| 64 | #define KSZPHY_EXTREG_WRITE 0x8000 |
| 65 | |
| 66 | #define MII_KSZPHY_EXTREG_WRITE 0x0c |
| 67 | #define MII_KSZPHY_EXTREG_READ 0x0d |
| 68 | |
| 69 | /* Extended registers */ |
| 70 | #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW 0x104 |
| 71 | #define MII_KSZPHY_RX_DATA_PAD_SKEW 0x105 |
| 72 | #define MII_KSZPHY_TX_DATA_PAD_SKEW 0x106 |
| 73 | |
| 74 | #define PS_TO_REG 200 |
| 75 | |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 76 | struct kszphy_hw_stat { |
| 77 | const char *string; |
| 78 | u8 reg; |
| 79 | u8 bits; |
| 80 | }; |
| 81 | |
| 82 | static struct kszphy_hw_stat kszphy_hw_stats[] = { |
| 83 | { "phy_receive_errors", 21, 16}, |
| 84 | { "phy_idle_errors", 10, 8 }, |
| 85 | }; |
| 86 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 87 | struct kszphy_type { |
| 88 | u32 led_mode_reg; |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 89 | u16 interrupt_level_mask; |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 90 | bool has_broadcast_disable; |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 91 | bool has_nand_tree_disable; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 92 | bool has_rmii_ref_clk_sel; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | struct kszphy_priv { |
| 96 | const struct kszphy_type *type; |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 97 | int led_mode; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 98 | bool rmii_ref_clk_sel; |
| 99 | bool rmii_ref_clk_sel_val; |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 100 | u64 stats[ARRAY_SIZE(kszphy_hw_stats)]; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 101 | }; |
| 102 | |
| 103 | static const struct kszphy_type ksz8021_type = { |
| 104 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
Johan Hovold | d0e1df9 | 2014-12-23 12:59:17 +0100 | [diff] [blame] | 105 | .has_broadcast_disable = true, |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 106 | .has_nand_tree_disable = true, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 107 | .has_rmii_ref_clk_sel = true, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 108 | }; |
| 109 | |
| 110 | static const struct kszphy_type ksz8041_type = { |
| 111 | .led_mode_reg = MII_KSZPHY_CTRL_1, |
| 112 | }; |
| 113 | |
| 114 | static const struct kszphy_type ksz8051_type = { |
| 115 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 116 | .has_nand_tree_disable = true, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 117 | }; |
| 118 | |
| 119 | static const struct kszphy_type ksz8081_type = { |
| 120 | .led_mode_reg = MII_KSZPHY_CTRL_2, |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 121 | .has_broadcast_disable = true, |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 122 | .has_nand_tree_disable = true, |
Johan Hovold | 86dc134 | 2014-11-19 12:59:19 +0100 | [diff] [blame] | 123 | .has_rmii_ref_clk_sel = true, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 124 | }; |
| 125 | |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 126 | static const struct kszphy_type ks8737_type = { |
| 127 | .interrupt_level_mask = BIT(14), |
| 128 | }; |
| 129 | |
| 130 | static const struct kszphy_type ksz9021_type = { |
| 131 | .interrupt_level_mask = BIT(14), |
| 132 | }; |
| 133 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 134 | static int kszphy_extended_write(struct phy_device *phydev, |
Florian Fainelli | 756b508 | 2013-12-17 21:38:11 -0800 | [diff] [blame] | 135 | u32 regnum, u16 val) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 136 | { |
| 137 | phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum); |
| 138 | return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val); |
| 139 | } |
| 140 | |
| 141 | static int kszphy_extended_read(struct phy_device *phydev, |
Florian Fainelli | 756b508 | 2013-12-17 21:38:11 -0800 | [diff] [blame] | 142 | u32 regnum) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 143 | { |
| 144 | phy_write(phydev, MII_KSZPHY_EXTREG, regnum); |
| 145 | return phy_read(phydev, MII_KSZPHY_EXTREG_READ); |
| 146 | } |
| 147 | |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 148 | static int kszphy_ack_interrupt(struct phy_device *phydev) |
| 149 | { |
| 150 | /* bit[7..0] int status, which is a read and clear register. */ |
| 151 | int rc; |
| 152 | |
| 153 | rc = phy_read(phydev, MII_KSZPHY_INTCS); |
| 154 | |
| 155 | return (rc < 0) ? rc : 0; |
| 156 | } |
| 157 | |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 158 | static int kszphy_config_intr(struct phy_device *phydev) |
| 159 | { |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 160 | const struct kszphy_type *type = phydev->drv->driver_data; |
| 161 | int temp; |
| 162 | u16 mask; |
| 163 | |
| 164 | if (type && type->interrupt_level_mask) |
| 165 | mask = type->interrupt_level_mask; |
| 166 | else |
| 167 | mask = KSZPHY_CTRL_INT_ACTIVE_HIGH; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 168 | |
| 169 | /* set the interrupt pin active low */ |
| 170 | temp = phy_read(phydev, MII_KSZPHY_CTRL); |
Johan Hovold | 5bb8fc0 | 2014-11-11 20:00:08 +0100 | [diff] [blame] | 171 | if (temp < 0) |
| 172 | return temp; |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 173 | temp &= ~mask; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 174 | phy_write(phydev, MII_KSZPHY_CTRL, temp); |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 175 | |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 176 | /* enable / disable interrupts */ |
| 177 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
| 178 | temp = KSZPHY_INTCS_ALL; |
| 179 | else |
| 180 | temp = 0; |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 181 | |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 182 | return phy_write(phydev, MII_KSZPHY_INTCS, temp); |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 183 | } |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 184 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 185 | static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val) |
| 186 | { |
| 187 | int ctrl; |
| 188 | |
| 189 | ctrl = phy_read(phydev, MII_KSZPHY_CTRL); |
| 190 | if (ctrl < 0) |
| 191 | return ctrl; |
| 192 | |
| 193 | if (val) |
| 194 | ctrl |= KSZPHY_RMII_REF_CLK_SEL; |
| 195 | else |
| 196 | ctrl &= ~KSZPHY_RMII_REF_CLK_SEL; |
| 197 | |
| 198 | return phy_write(phydev, MII_KSZPHY_CTRL, ctrl); |
| 199 | } |
| 200 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 201 | static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val) |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 202 | { |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 203 | int rc, temp, shift; |
Johan Hovold | 8620546 | 2014-11-11 20:00:12 +0100 | [diff] [blame] | 204 | |
Johan Hovold | 5a16778 | 2014-11-11 20:00:14 +0100 | [diff] [blame] | 205 | switch (reg) { |
| 206 | case MII_KSZPHY_CTRL_1: |
| 207 | shift = 14; |
| 208 | break; |
| 209 | case MII_KSZPHY_CTRL_2: |
| 210 | shift = 4; |
| 211 | break; |
| 212 | default: |
| 213 | return -EINVAL; |
| 214 | } |
| 215 | |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 216 | temp = phy_read(phydev, reg); |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 217 | if (temp < 0) { |
| 218 | rc = temp; |
| 219 | goto out; |
| 220 | } |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 221 | |
Sergei Shtylyov | 28bdc49 | 2014-03-19 02:58:16 +0300 | [diff] [blame] | 222 | temp &= ~(3 << shift); |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 223 | temp |= val << shift; |
| 224 | rc = phy_write(phydev, reg, temp); |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 225 | out: |
| 226 | if (rc < 0) |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 227 | phydev_err(phydev, "failed to set led mode\n"); |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 228 | |
Johan Hovold | b703586 | 2014-11-11 20:00:13 +0100 | [diff] [blame] | 229 | return rc; |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 230 | } |
| 231 | |
Johan Hovold | bde1512 | 2014-11-11 20:00:10 +0100 | [diff] [blame] | 232 | /* Disable PHY address 0 as the broadcast address, so that it can be used as a |
| 233 | * unique (non-broadcast) address on a shared bus. |
| 234 | */ |
| 235 | static int kszphy_broadcast_disable(struct phy_device *phydev) |
| 236 | { |
| 237 | int ret; |
| 238 | |
| 239 | ret = phy_read(phydev, MII_KSZPHY_OMSO); |
| 240 | if (ret < 0) |
| 241 | goto out; |
| 242 | |
| 243 | ret = phy_write(phydev, MII_KSZPHY_OMSO, ret | KSZPHY_OMSO_B_CAST_OFF); |
| 244 | out: |
| 245 | if (ret) |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 246 | phydev_err(phydev, "failed to disable broadcast address\n"); |
Johan Hovold | bde1512 | 2014-11-11 20:00:10 +0100 | [diff] [blame] | 247 | |
| 248 | return ret; |
| 249 | } |
| 250 | |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 251 | static int kszphy_nand_tree_disable(struct phy_device *phydev) |
| 252 | { |
| 253 | int ret; |
| 254 | |
| 255 | ret = phy_read(phydev, MII_KSZPHY_OMSO); |
| 256 | if (ret < 0) |
| 257 | goto out; |
| 258 | |
| 259 | if (!(ret & KSZPHY_OMSO_NAND_TREE_ON)) |
| 260 | return 0; |
| 261 | |
| 262 | ret = phy_write(phydev, MII_KSZPHY_OMSO, |
| 263 | ret & ~KSZPHY_OMSO_NAND_TREE_ON); |
| 264 | out: |
| 265 | if (ret) |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 266 | phydev_err(phydev, "failed to disable NAND tree mode\n"); |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 267 | |
| 268 | return ret; |
| 269 | } |
| 270 | |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 271 | static int kszphy_config_init(struct phy_device *phydev) |
| 272 | { |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 273 | struct kszphy_priv *priv = phydev->priv; |
| 274 | const struct kszphy_type *type; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 275 | int ret; |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 276 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 277 | if (!priv) |
| 278 | return 0; |
| 279 | |
| 280 | type = priv->type; |
| 281 | |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 282 | if (type->has_broadcast_disable) |
| 283 | kszphy_broadcast_disable(phydev); |
| 284 | |
Sylvain Rochet | 2b0ba96 | 2015-02-13 21:35:33 +0100 | [diff] [blame] | 285 | if (type->has_nand_tree_disable) |
| 286 | kszphy_nand_tree_disable(phydev); |
| 287 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 288 | if (priv->rmii_ref_clk_sel) { |
| 289 | ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val); |
| 290 | if (ret) { |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 291 | phydev_err(phydev, |
| 292 | "failed to set rmii reference clock\n"); |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 293 | return ret; |
| 294 | } |
| 295 | } |
| 296 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 297 | if (priv->led_mode >= 0) |
| 298 | kszphy_setup_led(phydev, type->led_mode_reg, priv->led_mode); |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 299 | |
Alexandre Belloni | 99f81af | 2016-02-26 19:18:23 +0100 | [diff] [blame] | 300 | if (phy_interrupt_is_valid(phydev)) { |
| 301 | int ctl = phy_read(phydev, MII_BMCR); |
| 302 | |
| 303 | if (ctl < 0) |
| 304 | return ctl; |
| 305 | |
| 306 | ret = phy_write(phydev, MII_BMCR, ctl & ~BMCR_ANENABLE); |
| 307 | if (ret < 0) |
| 308 | return ret; |
| 309 | } |
| 310 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 311 | return 0; |
Ben Dooks | 20d8435 | 2014-02-26 11:48:00 +0000 | [diff] [blame] | 312 | } |
| 313 | |
Philipp Zabel | 77501a7 | 2016-07-14 16:29:43 +0200 | [diff] [blame] | 314 | static int ksz8041_config_init(struct phy_device *phydev) |
| 315 | { |
| 316 | struct device_node *of_node = phydev->mdio.dev.of_node; |
| 317 | |
| 318 | /* Limit supported and advertised modes in fiber mode */ |
| 319 | if (of_property_read_bool(of_node, "micrel,fiber-mode")) { |
| 320 | phydev->dev_flags |= MICREL_PHY_FXEN; |
Kirill Esipov | ffa54a2 | 2016-11-21 19:53:31 +0300 | [diff] [blame] | 321 | phydev->supported &= SUPPORTED_100baseT_Full | |
Philipp Zabel | 77501a7 | 2016-07-14 16:29:43 +0200 | [diff] [blame] | 322 | SUPPORTED_100baseT_Half; |
Kirill Esipov | ffa54a2 | 2016-11-21 19:53:31 +0300 | [diff] [blame] | 323 | phydev->supported |= SUPPORTED_FIBRE; |
| 324 | phydev->advertising &= ADVERTISED_100baseT_Full | |
Philipp Zabel | 77501a7 | 2016-07-14 16:29:43 +0200 | [diff] [blame] | 325 | ADVERTISED_100baseT_Half; |
Kirill Esipov | ffa54a2 | 2016-11-21 19:53:31 +0300 | [diff] [blame] | 326 | phydev->advertising |= ADVERTISED_FIBRE; |
Philipp Zabel | 77501a7 | 2016-07-14 16:29:43 +0200 | [diff] [blame] | 327 | phydev->autoneg = AUTONEG_DISABLE; |
| 328 | } |
| 329 | |
| 330 | return kszphy_config_init(phydev); |
| 331 | } |
| 332 | |
| 333 | static int ksz8041_config_aneg(struct phy_device *phydev) |
| 334 | { |
| 335 | /* Skip auto-negotiation in fiber mode */ |
| 336 | if (phydev->dev_flags & MICREL_PHY_FXEN) { |
| 337 | phydev->speed = SPEED_100; |
| 338 | return 0; |
| 339 | } |
| 340 | |
| 341 | return genphy_config_aneg(phydev); |
| 342 | } |
| 343 | |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 344 | static int ksz9021_load_values_from_of(struct phy_device *phydev, |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 345 | const struct device_node *of_node, |
| 346 | u16 reg, |
| 347 | const char *field1, const char *field2, |
| 348 | const char *field3, const char *field4) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 349 | { |
| 350 | int val1 = -1; |
| 351 | int val2 = -2; |
| 352 | int val3 = -3; |
| 353 | int val4 = -4; |
| 354 | int newval; |
| 355 | int matches = 0; |
| 356 | |
| 357 | if (!of_property_read_u32(of_node, field1, &val1)) |
| 358 | matches++; |
| 359 | |
| 360 | if (!of_property_read_u32(of_node, field2, &val2)) |
| 361 | matches++; |
| 362 | |
| 363 | if (!of_property_read_u32(of_node, field3, &val3)) |
| 364 | matches++; |
| 365 | |
| 366 | if (!of_property_read_u32(of_node, field4, &val4)) |
| 367 | matches++; |
| 368 | |
| 369 | if (!matches) |
| 370 | return 0; |
| 371 | |
| 372 | if (matches < 4) |
| 373 | newval = kszphy_extended_read(phydev, reg); |
| 374 | else |
| 375 | newval = 0; |
| 376 | |
| 377 | if (val1 != -1) |
| 378 | newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0); |
| 379 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 380 | if (val2 != -2) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 381 | newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4); |
| 382 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 383 | if (val3 != -3) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 384 | newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8); |
| 385 | |
Hubert Chaumette | 6a11974 | 2014-04-22 15:01:04 +0200 | [diff] [blame] | 386 | if (val4 != -4) |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 387 | newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12); |
| 388 | |
| 389 | return kszphy_extended_write(phydev, reg, newval); |
| 390 | } |
| 391 | |
| 392 | static int ksz9021_config_init(struct phy_device *phydev) |
| 393 | { |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 394 | const struct device *dev = &phydev->mdio.dev; |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 395 | const struct device_node *of_node = dev->of_node; |
Andrew Lunn | 651df21 | 2015-12-09 19:56:31 +0100 | [diff] [blame] | 396 | const struct device *dev_walker; |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 397 | |
Andrew Lunn | 651df21 | 2015-12-09 19:56:31 +0100 | [diff] [blame] | 398 | /* The Micrel driver has a deprecated option to place phy OF |
| 399 | * properties in the MAC node. Walk up the tree of devices to |
| 400 | * find a device with an OF node. |
| 401 | */ |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 402 | dev_walker = &phydev->mdio.dev; |
Andrew Lunn | 651df21 | 2015-12-09 19:56:31 +0100 | [diff] [blame] | 403 | do { |
| 404 | of_node = dev_walker->of_node; |
| 405 | dev_walker = dev_walker->parent; |
| 406 | |
| 407 | } while (!of_node && dev_walker); |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 408 | |
| 409 | if (of_node) { |
| 410 | ksz9021_load_values_from_of(phydev, of_node, |
| 411 | MII_KSZPHY_CLK_CONTROL_PAD_SKEW, |
| 412 | "txen-skew-ps", "txc-skew-ps", |
| 413 | "rxdv-skew-ps", "rxc-skew-ps"); |
| 414 | ksz9021_load_values_from_of(phydev, of_node, |
| 415 | MII_KSZPHY_RX_DATA_PAD_SKEW, |
| 416 | "rxd0-skew-ps", "rxd1-skew-ps", |
| 417 | "rxd2-skew-ps", "rxd3-skew-ps"); |
| 418 | ksz9021_load_values_from_of(phydev, of_node, |
| 419 | MII_KSZPHY_TX_DATA_PAD_SKEW, |
| 420 | "txd0-skew-ps", "txd1-skew-ps", |
| 421 | "txd2-skew-ps", "txd3-skew-ps"); |
| 422 | } |
| 423 | return 0; |
| 424 | } |
| 425 | |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 426 | #define MII_KSZ9031RN_MMD_CTRL_REG 0x0d |
| 427 | #define MII_KSZ9031RN_MMD_REGDATA_REG 0x0e |
| 428 | #define OP_DATA 1 |
| 429 | #define KSZ9031_PS_TO_REG 60 |
| 430 | |
| 431 | /* Extended registers */ |
Jaeden Amero | 6270e1a | 2015-06-05 18:00:26 -0500 | [diff] [blame] | 432 | /* MMD Address 0x0 */ |
| 433 | #define MII_KSZ9031RN_FLP_BURST_TX_LO 3 |
| 434 | #define MII_KSZ9031RN_FLP_BURST_TX_HI 4 |
| 435 | |
Jaeden Amero | ae6c97b | 2015-06-05 18:00:25 -0500 | [diff] [blame] | 436 | /* MMD Address 0x2 */ |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 437 | #define MII_KSZ9031RN_CONTROL_PAD_SKEW 4 |
| 438 | #define MII_KSZ9031RN_RX_DATA_PAD_SKEW 5 |
| 439 | #define MII_KSZ9031RN_TX_DATA_PAD_SKEW 6 |
| 440 | #define MII_KSZ9031RN_CLK_PAD_SKEW 8 |
| 441 | |
Mike Looijmans | af70c1f | 2016-10-04 07:52:04 +0200 | [diff] [blame] | 442 | /* MMD Address 0x1C */ |
| 443 | #define MII_KSZ9031RN_EDPD 0x23 |
| 444 | #define MII_KSZ9031RN_EDPD_ENABLE BIT(0) |
| 445 | |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 446 | static int ksz9031_extended_write(struct phy_device *phydev, |
| 447 | u8 mode, u32 dev_addr, u32 regnum, u16 val) |
| 448 | { |
| 449 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); |
| 450 | phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); |
| 451 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); |
| 452 | return phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, val); |
| 453 | } |
| 454 | |
| 455 | static int ksz9031_extended_read(struct phy_device *phydev, |
| 456 | u8 mode, u32 dev_addr, u32 regnum) |
| 457 | { |
| 458 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, dev_addr); |
| 459 | phy_write(phydev, MII_KSZ9031RN_MMD_REGDATA_REG, regnum); |
| 460 | phy_write(phydev, MII_KSZ9031RN_MMD_CTRL_REG, (mode << 14) | dev_addr); |
| 461 | return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG); |
| 462 | } |
| 463 | |
| 464 | static int ksz9031_of_load_skew_values(struct phy_device *phydev, |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 465 | const struct device_node *of_node, |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 466 | u16 reg, size_t field_sz, |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 467 | const char *field[], u8 numfields) |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 468 | { |
| 469 | int val[4] = {-1, -2, -3, -4}; |
| 470 | int matches = 0; |
| 471 | u16 mask; |
| 472 | u16 maxval; |
| 473 | u16 newval; |
| 474 | int i; |
| 475 | |
| 476 | for (i = 0; i < numfields; i++) |
| 477 | if (!of_property_read_u32(of_node, field[i], val + i)) |
| 478 | matches++; |
| 479 | |
| 480 | if (!matches) |
| 481 | return 0; |
| 482 | |
| 483 | if (matches < numfields) |
| 484 | newval = ksz9031_extended_read(phydev, OP_DATA, 2, reg); |
| 485 | else |
| 486 | newval = 0; |
| 487 | |
| 488 | maxval = (field_sz == 4) ? 0xf : 0x1f; |
| 489 | for (i = 0; i < numfields; i++) |
| 490 | if (val[i] != -(i + 1)) { |
| 491 | mask = 0xffff; |
| 492 | mask ^= maxval << (field_sz * i); |
| 493 | newval = (newval & mask) | |
| 494 | (((val[i] / KSZ9031_PS_TO_REG) & maxval) |
| 495 | << (field_sz * i)); |
| 496 | } |
| 497 | |
| 498 | return ksz9031_extended_write(phydev, OP_DATA, 2, reg, newval); |
| 499 | } |
| 500 | |
Jaeden Amero | 6270e1a | 2015-06-05 18:00:26 -0500 | [diff] [blame] | 501 | static int ksz9031_center_flp_timing(struct phy_device *phydev) |
| 502 | { |
| 503 | int result; |
| 504 | |
| 505 | /* Center KSZ9031RNX FLP timing at 16ms. */ |
| 506 | result = ksz9031_extended_write(phydev, OP_DATA, 0, |
| 507 | MII_KSZ9031RN_FLP_BURST_TX_HI, 0x0006); |
| 508 | result = ksz9031_extended_write(phydev, OP_DATA, 0, |
| 509 | MII_KSZ9031RN_FLP_BURST_TX_LO, 0x1A80); |
| 510 | |
| 511 | if (result) |
| 512 | return result; |
| 513 | |
| 514 | return genphy_restart_aneg(phydev); |
| 515 | } |
| 516 | |
Mike Looijmans | af70c1f | 2016-10-04 07:52:04 +0200 | [diff] [blame] | 517 | /* Enable energy-detect power-down mode */ |
| 518 | static int ksz9031_enable_edpd(struct phy_device *phydev) |
| 519 | { |
| 520 | int reg; |
| 521 | |
| 522 | reg = ksz9031_extended_read(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD); |
| 523 | if (reg < 0) |
| 524 | return reg; |
| 525 | return ksz9031_extended_write(phydev, OP_DATA, 0x1C, MII_KSZ9031RN_EDPD, |
| 526 | reg | MII_KSZ9031RN_EDPD_ENABLE); |
| 527 | } |
| 528 | |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 529 | static int ksz9031_config_init(struct phy_device *phydev) |
| 530 | { |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 531 | const struct device *dev = &phydev->mdio.dev; |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 532 | const struct device_node *of_node = dev->of_node; |
| 533 | static const char *clk_skews[2] = {"rxc-skew-ps", "txc-skew-ps"}; |
| 534 | static const char *rx_data_skews[4] = { |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 535 | "rxd0-skew-ps", "rxd1-skew-ps", |
| 536 | "rxd2-skew-ps", "rxd3-skew-ps" |
| 537 | }; |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 538 | static const char *tx_data_skews[4] = { |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 539 | "txd0-skew-ps", "txd1-skew-ps", |
| 540 | "txd2-skew-ps", "txd3-skew-ps" |
| 541 | }; |
Jaeden Amero | 3c9a9f7 | 2015-06-05 18:00:24 -0500 | [diff] [blame] | 542 | static const char *control_skews[2] = {"txen-skew-ps", "rxdv-skew-ps"}; |
Roosen Henri | b4c19f7 | 2016-01-07 09:31:15 +0100 | [diff] [blame] | 543 | const struct device *dev_walker; |
Mike Looijmans | af70c1f | 2016-10-04 07:52:04 +0200 | [diff] [blame] | 544 | int result; |
| 545 | |
| 546 | result = ksz9031_enable_edpd(phydev); |
| 547 | if (result < 0) |
| 548 | return result; |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 549 | |
Roosen Henri | b4c19f7 | 2016-01-07 09:31:15 +0100 | [diff] [blame] | 550 | /* The Micrel driver has a deprecated option to place phy OF |
| 551 | * properties in the MAC node. Walk up the tree of devices to |
| 552 | * find a device with an OF node. |
| 553 | */ |
David S. Miller | 9d367ed | 2016-01-11 23:55:43 -0500 | [diff] [blame] | 554 | dev_walker = &phydev->mdio.dev; |
Roosen Henri | b4c19f7 | 2016-01-07 09:31:15 +0100 | [diff] [blame] | 555 | do { |
| 556 | of_node = dev_walker->of_node; |
| 557 | dev_walker = dev_walker->parent; |
| 558 | } while (!of_node && dev_walker); |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 559 | |
| 560 | if (of_node) { |
| 561 | ksz9031_of_load_skew_values(phydev, of_node, |
| 562 | MII_KSZ9031RN_CLK_PAD_SKEW, 5, |
| 563 | clk_skews, 2); |
| 564 | |
| 565 | ksz9031_of_load_skew_values(phydev, of_node, |
| 566 | MII_KSZ9031RN_CONTROL_PAD_SKEW, 4, |
| 567 | control_skews, 2); |
| 568 | |
| 569 | ksz9031_of_load_skew_values(phydev, of_node, |
| 570 | MII_KSZ9031RN_RX_DATA_PAD_SKEW, 4, |
| 571 | rx_data_skews, 4); |
| 572 | |
| 573 | ksz9031_of_load_skew_values(phydev, of_node, |
| 574 | MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4, |
| 575 | tx_data_skews, 4); |
| 576 | } |
Jaeden Amero | 6270e1a | 2015-06-05 18:00:26 -0500 | [diff] [blame] | 577 | |
| 578 | return ksz9031_center_flp_timing(phydev); |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 579 | } |
| 580 | |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 581 | #define KSZ8873MLL_GLOBAL_CONTROL_4 0x06 |
Johan Hovold | 00aee09 | 2014-11-11 20:00:09 +0100 | [diff] [blame] | 582 | #define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX BIT(6) |
| 583 | #define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED BIT(4) |
Jingoo Han | 32d73b1 | 2013-08-06 17:29:35 +0900 | [diff] [blame] | 584 | static int ksz8873mll_read_status(struct phy_device *phydev) |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 585 | { |
| 586 | int regval; |
| 587 | |
| 588 | /* dummy read */ |
| 589 | regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); |
| 590 | |
| 591 | regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); |
| 592 | |
| 593 | if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX) |
| 594 | phydev->duplex = DUPLEX_HALF; |
| 595 | else |
| 596 | phydev->duplex = DUPLEX_FULL; |
| 597 | |
| 598 | if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_SPEED) |
| 599 | phydev->speed = SPEED_10; |
| 600 | else |
| 601 | phydev->speed = SPEED_100; |
| 602 | |
| 603 | phydev->link = 1; |
| 604 | phydev->pause = phydev->asym_pause = 0; |
| 605 | |
| 606 | return 0; |
| 607 | } |
| 608 | |
Nathan Sullivan | d2fd719 | 2015-10-21 14:17:04 -0500 | [diff] [blame] | 609 | static int ksz9031_read_status(struct phy_device *phydev) |
| 610 | { |
| 611 | int err; |
| 612 | int regval; |
| 613 | |
| 614 | err = genphy_read_status(phydev); |
| 615 | if (err) |
| 616 | return err; |
| 617 | |
| 618 | /* Make sure the PHY is not broken. Read idle error count, |
| 619 | * and reset the PHY if it is maxed out. |
| 620 | */ |
| 621 | regval = phy_read(phydev, MII_STAT1000); |
| 622 | if ((regval & 0xFF) == 0xFF) { |
| 623 | phy_init_hw(phydev); |
| 624 | phydev->link = 0; |
| 625 | } |
| 626 | |
| 627 | return 0; |
| 628 | } |
| 629 | |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 630 | static int ksz8873mll_config_aneg(struct phy_device *phydev) |
| 631 | { |
| 632 | return 0; |
| 633 | } |
| 634 | |
Vince Bridgers | 1993694 | 2014-07-29 15:19:58 -0500 | [diff] [blame] | 635 | /* This routine returns -1 as an indication to the caller that the |
| 636 | * Micrel ksz9021 10/100/1000 PHY does not support standard IEEE |
| 637 | * MMD extended PHY registers. |
| 638 | */ |
| 639 | static int |
| 640 | ksz9021_rd_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum, |
| 641 | int regnum) |
| 642 | { |
| 643 | return -1; |
| 644 | } |
| 645 | |
| 646 | /* This routine does nothing since the Micrel ksz9021 does not support |
| 647 | * standard IEEE MMD extended PHY registers. |
| 648 | */ |
| 649 | static void |
| 650 | ksz9021_wr_mmd_phyreg(struct phy_device *phydev, int ptrad, int devnum, |
| 651 | int regnum, u32 val) |
| 652 | { |
| 653 | } |
| 654 | |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 655 | static int kszphy_get_sset_count(struct phy_device *phydev) |
| 656 | { |
| 657 | return ARRAY_SIZE(kszphy_hw_stats); |
| 658 | } |
| 659 | |
| 660 | static void kszphy_get_strings(struct phy_device *phydev, u8 *data) |
| 661 | { |
| 662 | int i; |
| 663 | |
| 664 | for (i = 0; i < ARRAY_SIZE(kszphy_hw_stats); i++) { |
| 665 | memcpy(data + i * ETH_GSTRING_LEN, |
| 666 | kszphy_hw_stats[i].string, ETH_GSTRING_LEN); |
| 667 | } |
| 668 | } |
| 669 | |
| 670 | #ifndef UINT64_MAX |
| 671 | #define UINT64_MAX (u64)(~((u64)0)) |
| 672 | #endif |
| 673 | static u64 kszphy_get_stat(struct phy_device *phydev, int i) |
| 674 | { |
| 675 | struct kszphy_hw_stat stat = kszphy_hw_stats[i]; |
| 676 | struct kszphy_priv *priv = phydev->priv; |
Andrew Lunn | 321b4d4 | 2016-02-20 00:35:29 +0100 | [diff] [blame] | 677 | int val; |
| 678 | u64 ret; |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 679 | |
| 680 | val = phy_read(phydev, stat.reg); |
| 681 | if (val < 0) { |
Andrew Lunn | 321b4d4 | 2016-02-20 00:35:29 +0100 | [diff] [blame] | 682 | ret = UINT64_MAX; |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 683 | } else { |
| 684 | val = val & ((1 << stat.bits) - 1); |
| 685 | priv->stats[i] += val; |
Andrew Lunn | 321b4d4 | 2016-02-20 00:35:29 +0100 | [diff] [blame] | 686 | ret = priv->stats[i]; |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 687 | } |
| 688 | |
Andrew Lunn | 321b4d4 | 2016-02-20 00:35:29 +0100 | [diff] [blame] | 689 | return ret; |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 690 | } |
| 691 | |
| 692 | static void kszphy_get_stats(struct phy_device *phydev, |
| 693 | struct ethtool_stats *stats, u64 *data) |
| 694 | { |
| 695 | int i; |
| 696 | |
| 697 | for (i = 0; i < ARRAY_SIZE(kszphy_hw_stats); i++) |
| 698 | data[i] = kszphy_get_stat(phydev, i); |
| 699 | } |
| 700 | |
Wenyou Yang | 836384d | 2016-08-05 14:35:41 +0800 | [diff] [blame] | 701 | static int kszphy_suspend(struct phy_device *phydev) |
| 702 | { |
| 703 | /* Disable PHY Interrupts */ |
| 704 | if (phy_interrupt_is_valid(phydev)) { |
| 705 | phydev->interrupts = PHY_INTERRUPT_DISABLED; |
| 706 | if (phydev->drv->config_intr) |
| 707 | phydev->drv->config_intr(phydev); |
| 708 | } |
| 709 | |
| 710 | return genphy_suspend(phydev); |
| 711 | } |
| 712 | |
Alexandre Belloni | f5aba91 | 2016-02-26 19:18:22 +0100 | [diff] [blame] | 713 | static int kszphy_resume(struct phy_device *phydev) |
| 714 | { |
Wenyou Yang | 836384d | 2016-08-05 14:35:41 +0800 | [diff] [blame] | 715 | genphy_resume(phydev); |
Alexandre Belloni | f5aba91 | 2016-02-26 19:18:22 +0100 | [diff] [blame] | 716 | |
Wenyou Yang | 836384d | 2016-08-05 14:35:41 +0800 | [diff] [blame] | 717 | /* Enable PHY Interrupts */ |
| 718 | if (phy_interrupt_is_valid(phydev)) { |
| 719 | phydev->interrupts = PHY_INTERRUPT_ENABLED; |
| 720 | if (phydev->drv->config_intr) |
| 721 | phydev->drv->config_intr(phydev); |
| 722 | } |
Alexandre Belloni | f5aba91 | 2016-02-26 19:18:22 +0100 | [diff] [blame] | 723 | |
| 724 | return 0; |
| 725 | } |
| 726 | |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 727 | static int kszphy_probe(struct phy_device *phydev) |
| 728 | { |
| 729 | const struct kszphy_type *type = phydev->drv->driver_data; |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 730 | const struct device_node *np = phydev->mdio.dev.of_node; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 731 | struct kszphy_priv *priv; |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 732 | struct clk *clk; |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 733 | int ret; |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 734 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 735 | priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 736 | if (!priv) |
| 737 | return -ENOMEM; |
| 738 | |
| 739 | phydev->priv = priv; |
| 740 | |
| 741 | priv->type = type; |
| 742 | |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 743 | if (type->led_mode_reg) { |
| 744 | ret = of_property_read_u32(np, "micrel,led-mode", |
| 745 | &priv->led_mode); |
| 746 | if (ret) |
| 747 | priv->led_mode = -1; |
| 748 | |
| 749 | if (priv->led_mode > 3) { |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 750 | phydev_err(phydev, "invalid led mode: 0x%02x\n", |
| 751 | priv->led_mode); |
Johan Hovold | e7a792e | 2014-11-19 12:59:16 +0100 | [diff] [blame] | 752 | priv->led_mode = -1; |
| 753 | } |
| 754 | } else { |
| 755 | priv->led_mode = -1; |
| 756 | } |
| 757 | |
Andrew Lunn | e5a03bf | 2016-01-06 20:11:16 +0100 | [diff] [blame] | 758 | clk = devm_clk_get(&phydev->mdio.dev, "rmii-ref"); |
Niklas Cassel | bced870 | 2015-05-12 09:43:14 +0200 | [diff] [blame] | 759 | /* NOTE: clk may be NULL if building without CONFIG_HAVE_CLK */ |
| 760 | if (!IS_ERR_OR_NULL(clk)) { |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 761 | unsigned long rate = clk_get_rate(clk); |
Johan Hovold | 86dc134 | 2014-11-19 12:59:19 +0100 | [diff] [blame] | 762 | bool rmii_ref_clk_sel_25_mhz; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 763 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 764 | priv->rmii_ref_clk_sel = type->has_rmii_ref_clk_sel; |
Johan Hovold | 86dc134 | 2014-11-19 12:59:19 +0100 | [diff] [blame] | 765 | rmii_ref_clk_sel_25_mhz = of_property_read_bool(np, |
| 766 | "micrel,rmii-reference-clock-select-25-mhz"); |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 767 | |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 768 | if (rate > 24500000 && rate < 25500000) { |
Johan Hovold | 86dc134 | 2014-11-19 12:59:19 +0100 | [diff] [blame] | 769 | priv->rmii_ref_clk_sel_val = rmii_ref_clk_sel_25_mhz; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 770 | } else if (rate > 49500000 && rate < 50500000) { |
Johan Hovold | 86dc134 | 2014-11-19 12:59:19 +0100 | [diff] [blame] | 771 | priv->rmii_ref_clk_sel_val = !rmii_ref_clk_sel_25_mhz; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 772 | } else { |
Andrew Lunn | 72ba48b | 2016-01-06 20:11:09 +0100 | [diff] [blame] | 773 | phydev_err(phydev, "Clock rate out of range: %ld\n", |
| 774 | rate); |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 775 | return -EINVAL; |
| 776 | } |
| 777 | } |
| 778 | |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 779 | /* Support legacy board-file configuration */ |
| 780 | if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) { |
| 781 | priv->rmii_ref_clk_sel = true; |
| 782 | priv->rmii_ref_clk_sel_val = true; |
| 783 | } |
| 784 | |
| 785 | return 0; |
Sascha Hauer | 1fadee0 | 2014-10-10 09:48:05 +0200 | [diff] [blame] | 786 | } |
| 787 | |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 788 | static struct phy_driver ksphy_driver[] = { |
| 789 | { |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 790 | .phy_id = PHY_ID_KS8737, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 791 | .phy_id_mask = MICREL_PHY_ID_MASK, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 792 | .name = "Micrel KS8737", |
| 793 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 794 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 795 | .driver_data = &ks8737_type, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 796 | .config_init = kszphy_config_init, |
| 797 | .config_aneg = genphy_config_aneg, |
| 798 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 799 | .ack_interrupt = kszphy_ack_interrupt, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 800 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 801 | .get_sset_count = kszphy_get_sset_count, |
| 802 | .get_strings = kszphy_get_strings, |
| 803 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 804 | .suspend = genphy_suspend, |
| 805 | .resume = genphy_resume, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 806 | }, { |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 807 | .phy_id = PHY_ID_KSZ8021, |
| 808 | .phy_id_mask = 0x00ffffff, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 809 | .name = "Micrel KSZ8021 or KSZ8031", |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 810 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
| 811 | SUPPORTED_Asym_Pause), |
| 812 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 813 | .driver_data = &ksz8021_type, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 814 | .probe = kszphy_probe, |
Johan Hovold | d0e1df9 | 2014-12-23 12:59:17 +0100 | [diff] [blame] | 815 | .config_init = kszphy_config_init, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 816 | .config_aneg = genphy_config_aneg, |
| 817 | .read_status = genphy_read_status, |
| 818 | .ack_interrupt = kszphy_ack_interrupt, |
| 819 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 820 | .get_sset_count = kszphy_get_sset_count, |
| 821 | .get_strings = kszphy_get_strings, |
| 822 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 823 | .suspend = genphy_suspend, |
| 824 | .resume = genphy_resume, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 825 | }, { |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 826 | .phy_id = PHY_ID_KSZ8031, |
| 827 | .phy_id_mask = 0x00ffffff, |
| 828 | .name = "Micrel KSZ8031", |
| 829 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | |
| 830 | SUPPORTED_Asym_Pause), |
| 831 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 832 | .driver_data = &ksz8021_type, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 833 | .probe = kszphy_probe, |
Johan Hovold | d0e1df9 | 2014-12-23 12:59:17 +0100 | [diff] [blame] | 834 | .config_init = kszphy_config_init, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 835 | .config_aneg = genphy_config_aneg, |
| 836 | .read_status = genphy_read_status, |
| 837 | .ack_interrupt = kszphy_ack_interrupt, |
| 838 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 839 | .get_sset_count = kszphy_get_sset_count, |
| 840 | .get_strings = kszphy_get_strings, |
| 841 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 842 | .suspend = genphy_suspend, |
| 843 | .resume = genphy_resume, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 844 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 845 | .phy_id = PHY_ID_KSZ8041, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 846 | .phy_id_mask = MICREL_PHY_ID_MASK, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 847 | .name = "Micrel KSZ8041", |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 848 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
| 849 | | SUPPORTED_Asym_Pause), |
| 850 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 851 | .driver_data = &ksz8041_type, |
| 852 | .probe = kszphy_probe, |
Philipp Zabel | 77501a7 | 2016-07-14 16:29:43 +0200 | [diff] [blame] | 853 | .config_init = ksz8041_config_init, |
| 854 | .config_aneg = ksz8041_config_aneg, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 855 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 856 | .ack_interrupt = kszphy_ack_interrupt, |
| 857 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 858 | .get_sset_count = kszphy_get_sset_count, |
| 859 | .get_strings = kszphy_get_strings, |
| 860 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 861 | .suspend = genphy_suspend, |
| 862 | .resume = genphy_resume, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 863 | }, { |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 864 | .phy_id = PHY_ID_KSZ8041RNLI, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 865 | .phy_id_mask = MICREL_PHY_ID_MASK, |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 866 | .name = "Micrel KSZ8041RNLI", |
| 867 | .features = PHY_BASIC_FEATURES | |
| 868 | SUPPORTED_Pause | SUPPORTED_Asym_Pause, |
| 869 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 870 | .driver_data = &ksz8041_type, |
| 871 | .probe = kszphy_probe, |
| 872 | .config_init = kszphy_config_init, |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 873 | .config_aneg = genphy_config_aneg, |
| 874 | .read_status = genphy_read_status, |
| 875 | .ack_interrupt = kszphy_ack_interrupt, |
| 876 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 877 | .get_sset_count = kszphy_get_sset_count, |
| 878 | .get_strings = kszphy_get_strings, |
| 879 | .get_stats = kszphy_get_stats, |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 880 | .suspend = genphy_suspend, |
| 881 | .resume = genphy_resume, |
Sergei Shtylyov | 4bd7b51 | 2013-12-10 02:20:41 +0300 | [diff] [blame] | 882 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 883 | .phy_id = PHY_ID_KSZ8051, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 884 | .phy_id_mask = MICREL_PHY_ID_MASK, |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 885 | .name = "Micrel KSZ8051", |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 886 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
| 887 | | SUPPORTED_Asym_Pause), |
| 888 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 889 | .driver_data = &ksz8051_type, |
| 890 | .probe = kszphy_probe, |
Johan Hovold | 63f44b2 | 2014-11-19 12:59:18 +0100 | [diff] [blame] | 891 | .config_init = kszphy_config_init, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 892 | .config_aneg = genphy_config_aneg, |
| 893 | .read_status = genphy_read_status, |
| 894 | .ack_interrupt = kszphy_ack_interrupt, |
| 895 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 896 | .get_sset_count = kszphy_get_sset_count, |
| 897 | .get_strings = kszphy_get_strings, |
| 898 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 899 | .suspend = genphy_suspend, |
| 900 | .resume = genphy_resume, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 901 | }, { |
Marek Vasut | 510d573 | 2012-09-23 16:58:50 +0000 | [diff] [blame] | 902 | .phy_id = PHY_ID_KSZ8001, |
| 903 | .name = "Micrel KSZ8001 or KS8721", |
Alexander Stein | ecd5a32 | 2016-07-29 12:12:08 +0200 | [diff] [blame] | 904 | .phy_id_mask = 0x00fffffc, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 905 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 906 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 907 | .driver_data = &ksz8041_type, |
| 908 | .probe = kszphy_probe, |
| 909 | .config_init = kszphy_config_init, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 910 | .config_aneg = genphy_config_aneg, |
| 911 | .read_status = genphy_read_status, |
| 912 | .ack_interrupt = kszphy_ack_interrupt, |
| 913 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 914 | .get_sset_count = kszphy_get_sset_count, |
| 915 | .get_strings = kszphy_get_strings, |
| 916 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 917 | .suspend = genphy_suspend, |
| 918 | .resume = genphy_resume, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 919 | }, { |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 920 | .phy_id = PHY_ID_KSZ8081, |
| 921 | .name = "Micrel KSZ8081 or KSZ8091", |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 922 | .phy_id_mask = MICREL_PHY_ID_MASK, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 923 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 924 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | e6a423a | 2014-11-19 12:59:15 +0100 | [diff] [blame] | 925 | .driver_data = &ksz8081_type, |
| 926 | .probe = kszphy_probe, |
Johan Hovold | 0f95903 | 2014-11-19 12:59:17 +0100 | [diff] [blame] | 927 | .config_init = kszphy_config_init, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 928 | .config_aneg = genphy_config_aneg, |
| 929 | .read_status = genphy_read_status, |
| 930 | .ack_interrupt = kszphy_ack_interrupt, |
| 931 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 932 | .get_sset_count = kszphy_get_sset_count, |
| 933 | .get_strings = kszphy_get_strings, |
| 934 | .get_stats = kszphy_get_stats, |
Wenyou Yang | 836384d | 2016-08-05 14:35:41 +0800 | [diff] [blame] | 935 | .suspend = kszphy_suspend, |
Alexandre Belloni | f5aba91 | 2016-02-26 19:18:22 +0100 | [diff] [blame] | 936 | .resume = kszphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 937 | }, { |
| 938 | .phy_id = PHY_ID_KSZ8061, |
| 939 | .name = "Micrel KSZ8061", |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 940 | .phy_id_mask = MICREL_PHY_ID_MASK, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 941 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 942 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
| 943 | .config_init = kszphy_config_init, |
| 944 | .config_aneg = genphy_config_aneg, |
| 945 | .read_status = genphy_read_status, |
| 946 | .ack_interrupt = kszphy_ack_interrupt, |
| 947 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 948 | .get_sset_count = kszphy_get_sset_count, |
| 949 | .get_strings = kszphy_get_strings, |
| 950 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 951 | .suspend = genphy_suspend, |
| 952 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 953 | }, { |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 954 | .phy_id = PHY_ID_KSZ9021, |
Jason Wang | 48d7d0a | 2012-06-17 22:52:09 +0000 | [diff] [blame] | 955 | .phy_id_mask = 0x000ffffe, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 956 | .name = "Micrel KSZ9021 Gigabit PHY", |
Vlastimil Kosar | 32fcafb | 2013-02-28 08:45:22 +0000 | [diff] [blame] | 957 | .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause), |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 958 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 959 | .driver_data = &ksz9021_type, |
Sean Cross | 954c396 | 2013-08-21 01:46:12 +0000 | [diff] [blame] | 960 | .config_init = ksz9021_config_init, |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 961 | .config_aneg = genphy_config_aneg, |
| 962 | .read_status = genphy_read_status, |
Choi, David | 51f932c | 2010-06-28 15:23:41 +0000 | [diff] [blame] | 963 | .ack_interrupt = kszphy_ack_interrupt, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 964 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 965 | .get_sset_count = kszphy_get_sset_count, |
| 966 | .get_strings = kszphy_get_strings, |
| 967 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 968 | .suspend = genphy_suspend, |
| 969 | .resume = genphy_resume, |
Vince Bridgers | 1993694 | 2014-07-29 15:19:58 -0500 | [diff] [blame] | 970 | .read_mmd_indirect = ksz9021_rd_mmd_phyreg, |
| 971 | .write_mmd_indirect = ksz9021_wr_mmd_phyreg, |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 972 | }, { |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 973 | .phy_id = PHY_ID_KSZ9031, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 974 | .phy_id_mask = MICREL_PHY_ID_MASK, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 975 | .name = "Micrel KSZ9031 Gigabit PHY", |
Mike Looijmans | 95e8b10 | 2014-09-15 12:06:33 +0200 | [diff] [blame] | 976 | .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause), |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 977 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 978 | .driver_data = &ksz9021_type, |
Hubert Chaumette | 6e4b827 | 2014-05-06 09:40:17 +0200 | [diff] [blame] | 979 | .config_init = ksz9031_config_init, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 980 | .config_aneg = genphy_config_aneg, |
Nathan Sullivan | d2fd719 | 2015-10-21 14:17:04 -0500 | [diff] [blame] | 981 | .read_status = ksz9031_read_status, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 982 | .ack_interrupt = kszphy_ack_interrupt, |
Johan Hovold | c6f9575 | 2014-11-19 12:59:22 +0100 | [diff] [blame] | 983 | .config_intr = kszphy_config_intr, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 984 | .get_sset_count = kszphy_get_sset_count, |
| 985 | .get_strings = kszphy_get_strings, |
| 986 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 987 | .suspend = genphy_suspend, |
Xander Huff | f64f148 | 2016-08-22 15:57:16 -0500 | [diff] [blame] | 988 | .resume = kszphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 989 | }, { |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 990 | .phy_id = PHY_ID_KSZ8873MLL, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 991 | .phy_id_mask = MICREL_PHY_ID_MASK, |
Jean-Christophe PLAGNIOL-VILLARD | 93272e0 | 2012-11-21 05:38:07 +0000 | [diff] [blame] | 992 | .name = "Micrel KSZ8873MLL Switch", |
| 993 | .features = (SUPPORTED_Pause | SUPPORTED_Asym_Pause), |
| 994 | .flags = PHY_HAS_MAGICANEG, |
| 995 | .config_init = kszphy_config_init, |
| 996 | .config_aneg = ksz8873mll_config_aneg, |
| 997 | .read_status = ksz8873mll_read_status, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 998 | .get_sset_count = kszphy_get_sset_count, |
| 999 | .get_strings = kszphy_get_strings, |
| 1000 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 1001 | .suspend = genphy_suspend, |
| 1002 | .resume = genphy_resume, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 1003 | }, { |
| 1004 | .phy_id = PHY_ID_KSZ886X, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 1005 | .phy_id_mask = MICREL_PHY_ID_MASK, |
David J. Choi | 7ab59dc | 2013-01-23 14:05:15 +0000 | [diff] [blame] | 1006 | .name = "Micrel KSZ886X Switch", |
| 1007 | .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), |
| 1008 | .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, |
| 1009 | .config_init = kszphy_config_init, |
| 1010 | .config_aneg = genphy_config_aneg, |
| 1011 | .read_status = genphy_read_status, |
Andrew Lunn | 2b2427d | 2015-12-30 16:28:27 +0100 | [diff] [blame] | 1012 | .get_sset_count = kszphy_get_sset_count, |
| 1013 | .get_strings = kszphy_get_strings, |
| 1014 | .get_stats = kszphy_get_stats, |
Patrice Vilchez | 1a5465f | 2013-09-19 19:40:48 +0200 | [diff] [blame] | 1015 | .suspend = genphy_suspend, |
| 1016 | .resume = genphy_resume, |
Christian Hohnstaedt | d5bf907 | 2012-07-04 05:44:34 +0000 | [diff] [blame] | 1017 | } }; |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 1018 | |
Johan Hovold | 50fd715 | 2014-11-11 19:45:59 +0100 | [diff] [blame] | 1019 | module_phy_driver(ksphy_driver); |
David J. Choi | d050700 | 2010-04-29 06:12:41 +0000 | [diff] [blame] | 1020 | |
| 1021 | MODULE_DESCRIPTION("Micrel PHY driver"); |
| 1022 | MODULE_AUTHOR("David J. Choi"); |
| 1023 | MODULE_LICENSE("GPL"); |
David S. Miller | 52a60ed | 2010-05-03 15:48:29 -0700 | [diff] [blame] | 1024 | |
Uwe Kleine-König | cf93c94 | 2010-10-03 23:43:32 +0000 | [diff] [blame] | 1025 | static struct mdio_device_id __maybe_unused micrel_tbl[] = { |
Jason Wang | 48d7d0a | 2012-06-17 22:52:09 +0000 | [diff] [blame] | 1026 | { PHY_ID_KSZ9021, 0x000ffffe }, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 1027 | { PHY_ID_KSZ9031, MICREL_PHY_ID_MASK }, |
Alexander Stein | ecd5a32 | 2016-07-29 12:12:08 +0200 | [diff] [blame] | 1028 | { PHY_ID_KSZ8001, 0x00fffffc }, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 1029 | { PHY_ID_KS8737, MICREL_PHY_ID_MASK }, |
Marek Vasut | 212ea99 | 2012-09-23 16:58:49 +0000 | [diff] [blame] | 1030 | { PHY_ID_KSZ8021, 0x00ffffff }, |
Hector Palacios | b818d1a | 2013-03-10 22:50:02 +0000 | [diff] [blame] | 1031 | { PHY_ID_KSZ8031, 0x00ffffff }, |
Fabio Estevam | f893a99 | 2016-05-11 17:02:05 -0300 | [diff] [blame] | 1032 | { PHY_ID_KSZ8041, MICREL_PHY_ID_MASK }, |
| 1033 | { PHY_ID_KSZ8051, MICREL_PHY_ID_MASK }, |
| 1034 | { PHY_ID_KSZ8061, MICREL_PHY_ID_MASK }, |
| 1035 | { PHY_ID_KSZ8081, MICREL_PHY_ID_MASK }, |
| 1036 | { PHY_ID_KSZ8873MLL, MICREL_PHY_ID_MASK }, |
| 1037 | { PHY_ID_KSZ886X, MICREL_PHY_ID_MASK }, |
David S. Miller | 52a60ed | 2010-05-03 15:48:29 -0700 | [diff] [blame] | 1038 | { } |
| 1039 | }; |
| 1040 | |
| 1041 | MODULE_DEVICE_TABLE(mdio, micrel_tbl); |