Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 7cd2b0a34ab8e4db971920eef8982f985441adfb / . / Documentation / arm64 / memory.txt
blob: d50fa618371b3fa35c79bf3beb46e2f7dd4f4122 [file] [log] [blame]
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]1 Memory Layout on AArch64 Linux
2 ==============================
3
4Author: Catalin Marinas <catalin.marinas@arm.com>
5Date : 20 February 2012
6
7This document describes the virtual memory layout used by the AArch64
8Linux kernel. The architecture allows up to 4 levels of translation
9tables with a 4KB page size and up to 3 levels with a 64KB page size.
10
11AArch64 Linux uses 3 levels of translation tables with the 4KB page
12configuration, allowing 39-bit (512GB) virtual addresses for both user
13and kernel. With 64KB pages, only 2 levels of translation tables are
14used but the memory layout is the same.
15
16User addresses have bits 63:39 set to 0 while the kernel addresses have
17the same bits set to 1. TTBRx selection is given by bit 63 of the
18virtual address. The swapper_pg_dir contains only kernel (global)
19mappings while the user pgd contains only user (non-global) mappings.
20The swapper_pgd_dir address is written to TTBR1 and never written to
21TTBR0.
22
23
Catalin Marinas847264fb2013-10-23 16:50:07 +0100[diff] [blame]24AArch64 Linux memory layout with 4KB pages:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]25
26Start End Size Use
27-----------------------------------------------------------------------
280000000000000000 0000007fffffffff 512GB user
29
Catalin Marinase3978cd2012-10-23 14:51:16 +0100[diff] [blame]30ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]31
Catalin Marinase3978cd2012-10-23 14:51:16 +0100[diff] [blame]32ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]33
34ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
35
Catalin Marinase3978cd2012-10-23 14:51:16 +0100[diff] [blame]36ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
37
Catalin Marinas22bd1c92014-02-04 16:37:59 +0000[diff] [blame]38ffffffbffa000000 ffffffbffaffffff 16MB PCI I/O space
39
40ffffffbffb000000 ffffffbffbbfffff 12MB [guard]
41
Mark Salterbf4b5582014-04-07 15:39:52 -0700[diff] [blame]42ffffffbffbc00000 ffffffbffbdfffff 2MB fixed mappings
Catalin Marinas2475ff92012-10-23 14:55:08 +0100[diff] [blame]43
Catalin Marinas22bd1c92014-02-04 16:37:59 +0000[diff] [blame]44ffffffbffbe00000 ffffffbffbffffff 2MB [guard]
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]45
46ffffffbffc000000 ffffffbfffffffff 64MB modules
47
Tekkaman Ninja715a7112012-10-28 03:30:20 +0000[diff] [blame]48ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]49
50
Catalin Marinas847264fb2013-10-23 16:50:07 +0100[diff] [blame]51AArch64 Linux memory layout with 64KB pages:
52
53Start End Size Use
54-----------------------------------------------------------------------
550000000000000000 000003ffffffffff 4TB user
56
57fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc
58
59fffffdfbffff0000 fffffdfbffffffff 64KB [guard page]
60
61fffffdfc00000000 fffffdfdffffffff 8GB vmemmap
62
63fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap]
64
Catalin Marinas22bd1c92014-02-04 16:37:59 +0000[diff] [blame]65fffffdfffa000000 fffffdfffaffffff 16MB PCI I/O space
66
67fffffdfffb000000 fffffdfffbbfffff 12MB [guard]
68
Mark Salterbf4b5582014-04-07 15:39:52 -0700[diff] [blame]69fffffdfffbc00000 fffffdfffbdfffff 2MB fixed mappings
Catalin Marinas847264fb2013-10-23 16:50:07 +0100[diff] [blame]70
Catalin Marinas22bd1c92014-02-04 16:37:59 +0000[diff] [blame]71fffffdfffbe00000 fffffdfffbffffff 2MB [guard]
Catalin Marinas847264fb2013-10-23 16:50:07 +0100[diff] [blame]72
73fffffdfffc000000 fffffdffffffffff 64MB modules
74
75fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
76
77
Catalin Marinas4f04d8f2012-03-05 11:49:27 +0000[diff] [blame]78Translation table lookup with 4KB pages:
79
80+--------+--------+--------+--------+--------+--------+--------+--------+
81|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
82+--------+--------+--------+--------+--------+--------+--------+--------+
83 | | | | | |
84 | | | | | v
85 | | | | | [11:0] in-page offset
86 | | | | +-> [20:12] L3 index
87 | | | +-----------> [29:21] L2 index
88 | | +---------------------> [38:30] L1 index
89 | +-------------------------------> [47:39] L0 index (not used)
90 +-------------------------------------------------> [63] TTBR0/1
91
92
93Translation table lookup with 64KB pages:
94
95+--------+--------+--------+--------+--------+--------+--------+--------+
96|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
97+--------+--------+--------+--------+--------+--------+--------+--------+
98 | | | | |
99 | | | | v
100 | | | | [15:0] in-page offset
101 | | | +----------> [28:16] L3 index
102 | | +--------------------------> [41:29] L2 index (only 38:29 used)
103 | +-------------------------------> [47:42] L1 index (not used)
104 +-------------------------------------------------> [63] TTBR0/1
Marc Zyngieraa4a73a2013-05-02 14:31:03 +0100[diff] [blame]105
106When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
107offset from the kernel VA (top 24bits of the kernel VA set to zero):
108
109Start End Size Use
110-----------------------------------------------------------------------
1110000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP