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Ben Skeggs50254072015-01-14 14:11:21 +10001#ifndef __NVKM_DEVICE_H__
2#define __NVKM_DEVICE_H__
Ben Skeggsed76a872014-06-13 12:42:21 +10003#include <core/event.h>
Ben Skeggs68f3f702015-08-20 14:54:22 +10004#include <core/object.h>
Ben Skeggs9274f4a2012-07-06 07:36:43 +10005
Ben Skeggs9ace4042015-08-20 14:54:06 +10006enum nvkm_devidx {
Ben Skeggs0a34fb32015-08-20 14:54:22 +10007 NVKM_SUBDEV_PCI,
Ben Skeggs68f3f702015-08-20 14:54:22 +10008 NVKM_SUBDEV_VBIOS,
9 NVKM_SUBDEV_DEVINIT,
10 NVKM_SUBDEV_IBUS,
11 NVKM_SUBDEV_GPIO,
12 NVKM_SUBDEV_I2C,
13 NVKM_SUBDEV_FUSE,
14 NVKM_SUBDEV_MXM,
15 NVKM_SUBDEV_MC,
16 NVKM_SUBDEV_BUS,
17 NVKM_SUBDEV_TIMER,
18 NVKM_SUBDEV_FB,
19 NVKM_SUBDEV_LTC,
20 NVKM_SUBDEV_INSTMEM,
21 NVKM_SUBDEV_MMU,
22 NVKM_SUBDEV_BAR,
23 NVKM_SUBDEV_PMU,
24 NVKM_SUBDEV_VOLT,
Martin Peresdc06e362016-02-18 14:10:49 +010025 NVKM_SUBDEV_ICCSENSE,
Ben Skeggs68f3f702015-08-20 14:54:22 +100026 NVKM_SUBDEV_THERM,
27 NVKM_SUBDEV_CLK,
Alexandre Courbot7d123882016-02-24 14:42:20 +090028 NVKM_SUBDEV_SECBOOT,
Ben Skeggs9ace4042015-08-20 14:54:06 +100029
Ben Skeggs68f3f702015-08-20 14:54:22 +100030 NVKM_ENGINE_BSP,
Ben Skeggs7cee0432016-03-11 13:09:28 +100031
Ben Skeggs68f3f702015-08-20 14:54:22 +100032 NVKM_ENGINE_CE0,
33 NVKM_ENGINE_CE1,
34 NVKM_ENGINE_CE2,
Ben Skeggs7cee0432016-03-11 13:09:28 +100035 NVKM_ENGINE_CE_LAST = NVKM_ENGINE_CE2,
36
37 NVKM_ENGINE_CIPHER,
Ben Skeggs68f3f702015-08-20 14:54:22 +100038 NVKM_ENGINE_DISP,
Ben Skeggs7cee0432016-03-11 13:09:28 +100039 NVKM_ENGINE_DMAOBJ,
40 NVKM_ENGINE_FIFO,
41 NVKM_ENGINE_GR,
42 NVKM_ENGINE_IFB,
43 NVKM_ENGINE_ME,
44 NVKM_ENGINE_MPEG,
45 NVKM_ENGINE_MSENC,
Ben Skeggs68f3f702015-08-20 14:54:22 +100046 NVKM_ENGINE_MSPDEC,
Ben Skeggs7cee0432016-03-11 13:09:28 +100047 NVKM_ENGINE_MSPPP,
48 NVKM_ENGINE_MSVLD,
49 NVKM_ENGINE_PM,
50 NVKM_ENGINE_SEC,
51 NVKM_ENGINE_SW,
52 NVKM_ENGINE_VIC,
53 NVKM_ENGINE_VP,
Ben Skeggs9ace4042015-08-20 14:54:06 +100054
Ben Skeggs26c9e8e2015-08-20 14:54:23 +100055 NVKM_SUBDEV_NR
56};
57
58enum nvkm_device_type {
59 NVKM_DEVICE_PCI,
60 NVKM_DEVICE_AGP,
61 NVKM_DEVICE_PCIE,
62 NVKM_DEVICE_TEGRA,
Ben Skeggs9ace4042015-08-20 14:54:06 +100063};
64
Ben Skeggs50254072015-01-14 14:11:21 +100065struct nvkm_device {
Ben Skeggs7974dd12015-08-20 14:54:17 +100066 const struct nvkm_device_func *func;
67 const struct nvkm_device_quirk *quirk;
68 struct device *dev;
Ben Skeggs26c9e8e2015-08-20 14:54:23 +100069 enum nvkm_device_type type;
Ben Skeggs7974dd12015-08-20 14:54:17 +100070 u64 handle;
71 const char *name;
72 const char *cfgopt;
73 const char *dbgopt;
74
Ben Skeggs9274f4a2012-07-06 07:36:43 +100075 struct list_head head;
Ben Skeggsa1e88732015-08-20 14:54:15 +100076 struct mutex mutex;
77 int refcount;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100078
Ben Skeggs2ebfa1b2015-08-20 14:54:10 +100079 void __iomem *pri;
80
Ben Skeggs79ca2772014-08-10 04:10:20 +100081 struct nvkm_event event;
Ben Skeggsed76a872014-06-13 12:42:21 +100082
Ilia Mirkinf0d13e32014-01-09 21:19:11 -050083 u64 disable_mask;
Ben Skeggs68f3f702015-08-20 14:54:22 +100084 u32 debug;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100085
Ben Skeggs6cf813f2015-08-20 14:54:17 +100086 const struct nvkm_device_chip *chip;
Ben Skeggs9274f4a2012-07-06 07:36:43 +100087 enum {
88 NV_04 = 0x04,
89 NV_10 = 0x10,
Ilia Mirkin4a0ff752013-09-05 04:45:02 -040090 NV_11 = 0x11,
Ben Skeggs9274f4a2012-07-06 07:36:43 +100091 NV_20 = 0x20,
92 NV_30 = 0x30,
93 NV_40 = 0x40,
94 NV_50 = 0x50,
95 NV_C0 = 0xc0,
Ben Skeggs9274f4a2012-07-06 07:36:43 +100096 NV_E0 = 0xe0,
Ben Skeggs3f204642014-02-24 11:28:37 +100097 GM100 = 0x110,
Ben Skeggs9274f4a2012-07-06 07:36:43 +100098 } card_type;
99 u32 chipset;
Ben Skeggs37047912014-11-17 22:56:37 +1000100 u8 chiprev;
Ben Skeggs9274f4a2012-07-06 07:36:43 +1000101 u32 crystal;
102
Ben Skeggsed76a872014-06-13 12:42:21 +1000103 struct {
104 struct notifier_block nb;
105 } acpi;
Ben Skeggs741d7782015-08-20 14:54:05 +1000106
107 struct nvkm_bar *bar;
108 struct nvkm_bios *bios;
109 struct nvkm_bus *bus;
110 struct nvkm_clk *clk;
111 struct nvkm_devinit *devinit;
112 struct nvkm_fb *fb;
113 struct nvkm_fuse *fuse;
114 struct nvkm_gpio *gpio;
115 struct nvkm_i2c *i2c;
116 struct nvkm_subdev *ibus;
Martin Peresdc06e362016-02-18 14:10:49 +0100117 struct nvkm_iccsense *iccsense;
Ben Skeggs741d7782015-08-20 14:54:05 +1000118 struct nvkm_instmem *imem;
119 struct nvkm_ltc *ltc;
120 struct nvkm_mc *mc;
121 struct nvkm_mmu *mmu;
122 struct nvkm_subdev *mxm;
Ben Skeggs0a34fb32015-08-20 14:54:22 +1000123 struct nvkm_pci *pci;
Ben Skeggs741d7782015-08-20 14:54:05 +1000124 struct nvkm_pmu *pmu;
Alexandre Courbot7d123882016-02-24 14:42:20 +0900125 struct nvkm_secboot *secboot;
Ben Skeggs741d7782015-08-20 14:54:05 +1000126 struct nvkm_therm *therm;
127 struct nvkm_timer *timer;
128 struct nvkm_volt *volt;
129
130 struct nvkm_engine *bsp;
131 struct nvkm_engine *ce[3];
132 struct nvkm_engine *cipher;
133 struct nvkm_disp *disp;
Ben Skeggs19fef522015-08-20 14:54:18 +1000134 struct nvkm_dma *dma;
Ben Skeggs741d7782015-08-20 14:54:05 +1000135 struct nvkm_fifo *fifo;
136 struct nvkm_gr *gr;
137 struct nvkm_engine *ifb;
138 struct nvkm_engine *me;
139 struct nvkm_engine *mpeg;
140 struct nvkm_engine *msenc;
141 struct nvkm_engine *mspdec;
142 struct nvkm_engine *msppp;
143 struct nvkm_engine *msvld;
144 struct nvkm_pm *pm;
145 struct nvkm_engine *sec;
146 struct nvkm_sw *sw;
147 struct nvkm_engine *vic;
148 struct nvkm_engine *vp;
Ben Skeggs9274f4a2012-07-06 07:36:43 +1000149};
150
Ben Skeggs6cf813f2015-08-20 14:54:17 +1000151struct nvkm_subdev *nvkm_device_subdev(struct nvkm_device *, int index);
152struct nvkm_engine *nvkm_device_engine(struct nvkm_device *, int index);
153
Ben Skeggs7974dd12015-08-20 14:54:17 +1000154struct nvkm_device_func {
155 struct nvkm_device_pci *(*pci)(struct nvkm_device *);
156 struct nvkm_device_tegra *(*tegra)(struct nvkm_device *);
157 void *(*dtor)(struct nvkm_device *);
158 int (*preinit)(struct nvkm_device *);
Ben Skeggs2b700822015-08-20 14:54:22 +1000159 int (*init)(struct nvkm_device *);
Ben Skeggs7974dd12015-08-20 14:54:17 +1000160 void (*fini)(struct nvkm_device *, bool suspend);
Ben Skeggs7e8820f2015-08-20 14:54:23 +1000161 resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar);
162 resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar);
Ben Skeggs26c9e8e2015-08-20 14:54:23 +1000163 bool cpu_coherent;
Ben Skeggs7974dd12015-08-20 14:54:17 +1000164};
165
166struct nvkm_device_quirk {
Ben Skeggsc7af0ff2015-08-20 14:54:23 +1000167 u8 tv_pin_mask;
168 u8 tv_gpio;
Ben Skeggs7974dd12015-08-20 14:54:17 +1000169};
170
Ben Skeggs6cf813f2015-08-20 14:54:17 +1000171struct nvkm_device_chip {
172 const char *name;
173
Martin Peresdc06e362016-02-18 14:10:49 +0100174 int (*bar )(struct nvkm_device *, int idx, struct nvkm_bar **);
175 int (*bios )(struct nvkm_device *, int idx, struct nvkm_bios **);
176 int (*bus )(struct nvkm_device *, int idx, struct nvkm_bus **);
177 int (*clk )(struct nvkm_device *, int idx, struct nvkm_clk **);
178 int (*devinit )(struct nvkm_device *, int idx, struct nvkm_devinit **);
179 int (*fb )(struct nvkm_device *, int idx, struct nvkm_fb **);
180 int (*fuse )(struct nvkm_device *, int idx, struct nvkm_fuse **);
181 int (*gpio )(struct nvkm_device *, int idx, struct nvkm_gpio **);
182 int (*i2c )(struct nvkm_device *, int idx, struct nvkm_i2c **);
183 int (*ibus )(struct nvkm_device *, int idx, struct nvkm_subdev **);
184 int (*iccsense)(struct nvkm_device *, int idx, struct nvkm_iccsense **);
185 int (*imem )(struct nvkm_device *, int idx, struct nvkm_instmem **);
186 int (*ltc )(struct nvkm_device *, int idx, struct nvkm_ltc **);
187 int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **);
188 int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **);
189 int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **);
190 int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **);
191 int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **);
192 int (*secboot )(struct nvkm_device *, int idx, struct nvkm_secboot **);
193 int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **);
194 int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **);
195 int (*volt )(struct nvkm_device *, int idx, struct nvkm_volt **);
Ben Skeggs6cf813f2015-08-20 14:54:17 +1000196
Martin Peresdc06e362016-02-18 14:10:49 +0100197 int (*bsp )(struct nvkm_device *, int idx, struct nvkm_engine **);
198 int (*ce[3] )(struct nvkm_device *, int idx, struct nvkm_engine **);
199 int (*cipher )(struct nvkm_device *, int idx, struct nvkm_engine **);
200 int (*disp )(struct nvkm_device *, int idx, struct nvkm_disp **);
201 int (*dma )(struct nvkm_device *, int idx, struct nvkm_dma **);
202 int (*fifo )(struct nvkm_device *, int idx, struct nvkm_fifo **);
203 int (*gr )(struct nvkm_device *, int idx, struct nvkm_gr **);
204 int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **);
205 int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **);
206 int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **);
207 int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **);
208 int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **);
209 int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **);
210 int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **);
211 int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **);
212 int (*sec )(struct nvkm_device *, int idx, struct nvkm_engine **);
213 int (*sw )(struct nvkm_device *, int idx, struct nvkm_sw **);
214 int (*vic )(struct nvkm_device *, int idx, struct nvkm_engine **);
215 int (*vp )(struct nvkm_device *, int idx, struct nvkm_engine **);
Ben Skeggs6cf813f2015-08-20 14:54:17 +1000216};
217
Ben Skeggs50254072015-01-14 14:11:21 +1000218struct nvkm_device *nvkm_device_find(u64 name);
219int nvkm_device_list(u64 *name, int size);
Ben Skeggs803c1782014-08-10 04:10:21 +1000220
Ben Skeggsdd646942015-08-20 14:54:08 +1000221/* privileged register interface accessor macros */
Ben Skeggs2ebfa1b2015-08-20 14:54:10 +1000222#define nvkm_rd08(d,a) ioread8((d)->pri + (a))
223#define nvkm_rd16(d,a) ioread16_native((d)->pri + (a))
224#define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
225#define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a))
226#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a))
227#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a))
Ben Skeggsdd646942015-08-20 14:54:08 +1000228#define nvkm_mask(d,a,m,v) ({ \
229 struct nvkm_device *_device = (d); \
230 u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \
231 nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \
232 _temp; \
233})
234
Ben Skeggse781dc82015-08-20 14:54:15 +1000235void nvkm_device_del(struct nvkm_device **);
Ben Skeggs65943632015-08-20 14:54:11 +1000236
Ben Skeggs0e299982015-08-20 14:54:18 +1000237struct nvkm_device_oclass {
238 int (*ctor)(struct nvkm_device *, const struct nvkm_oclass *,
239 void *data, u32 size, struct nvkm_object **);
240 struct nvkm_sclass base;
241};
242
Ben Skeggs2a9f8472015-08-20 14:54:18 +1000243extern const struct nvkm_sclass nvkm_udevice_sclass;
244
Ben Skeggs65943632015-08-20 14:54:11 +1000245/* device logging */
246#define nvdev_printk_(d,l,p,f,a...) do { \
247 struct nvkm_device *_device = (d); \
Ben Skeggs68f3f702015-08-20 14:54:22 +1000248 if (_device->debug >= (l)) \
Ben Skeggs65943632015-08-20 14:54:11 +1000249 dev_##p(_device->dev, f, ##a); \
250} while(0)
251#define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a)
252#define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL, crit, f, ##a)
253#define nvdev_error(d,f,a...) nvdev_printk((d), ERROR, err, f, ##a)
254#define nvdev_warn(d,f,a...) nvdev_printk((d), WARN, notice, f, ##a)
255#define nvdev_info(d,f,a...) nvdev_printk((d), INFO, info, f, ##a)
256#define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG, info, f, ##a)
257#define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE, info, f, ##a)
258#define nvdev_spam(d,f,a...) nvdev_printk((d), SPAM, dbg, f, ##a)
Ben Skeggs9274f4a2012-07-06 07:36:43 +1000259#endif