Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 1 | #ifndef __NVKM_DEVICE_H__ |
| 2 | #define __NVKM_DEVICE_H__ |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 3 | #include <core/event.h> |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 4 | #include <core/object.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 5 | |
Ben Skeggs | 9ace404 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 6 | enum nvkm_devidx { |
Ben Skeggs | 0a34fb3 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 7 | NVKM_SUBDEV_PCI, |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 8 | NVKM_SUBDEV_VBIOS, |
| 9 | NVKM_SUBDEV_DEVINIT, |
| 10 | NVKM_SUBDEV_IBUS, |
| 11 | NVKM_SUBDEV_GPIO, |
| 12 | NVKM_SUBDEV_I2C, |
| 13 | NVKM_SUBDEV_FUSE, |
| 14 | NVKM_SUBDEV_MXM, |
| 15 | NVKM_SUBDEV_MC, |
| 16 | NVKM_SUBDEV_BUS, |
| 17 | NVKM_SUBDEV_TIMER, |
| 18 | NVKM_SUBDEV_FB, |
| 19 | NVKM_SUBDEV_LTC, |
| 20 | NVKM_SUBDEV_INSTMEM, |
| 21 | NVKM_SUBDEV_MMU, |
| 22 | NVKM_SUBDEV_BAR, |
| 23 | NVKM_SUBDEV_PMU, |
| 24 | NVKM_SUBDEV_VOLT, |
| 25 | NVKM_SUBDEV_THERM, |
| 26 | NVKM_SUBDEV_CLK, |
Ben Skeggs | 9ace404 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 27 | |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 28 | NVKM_ENGINE_DMAOBJ, |
| 29 | NVKM_ENGINE_IFB, |
| 30 | NVKM_ENGINE_FIFO, |
| 31 | NVKM_ENGINE_SW, |
| 32 | NVKM_ENGINE_GR, |
| 33 | NVKM_ENGINE_MPEG, |
| 34 | NVKM_ENGINE_ME, |
| 35 | NVKM_ENGINE_VP, |
| 36 | NVKM_ENGINE_CIPHER, |
| 37 | NVKM_ENGINE_BSP, |
| 38 | NVKM_ENGINE_MSPPP, |
| 39 | NVKM_ENGINE_CE0, |
| 40 | NVKM_ENGINE_CE1, |
| 41 | NVKM_ENGINE_CE2, |
| 42 | NVKM_ENGINE_VIC, |
| 43 | NVKM_ENGINE_MSENC, |
| 44 | NVKM_ENGINE_DISP, |
| 45 | NVKM_ENGINE_PM, |
| 46 | NVKM_ENGINE_MSVLD, |
| 47 | NVKM_ENGINE_SEC, |
| 48 | NVKM_ENGINE_MSPDEC, |
Ben Skeggs | 9ace404 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 49 | |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 50 | NVKM_SUBDEV_NR, |
Ben Skeggs | 9ace404 | 2015-08-20 14:54:06 +1000 | [diff] [blame] | 51 | }; |
| 52 | |
Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 53 | struct nvkm_device { |
Ben Skeggs | 7974dd1 | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 54 | const struct nvkm_device_func *func; |
| 55 | const struct nvkm_device_quirk *quirk; |
| 56 | struct device *dev; |
| 57 | u64 handle; |
| 58 | const char *name; |
| 59 | const char *cfgopt; |
| 60 | const char *dbgopt; |
| 61 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 62 | struct list_head head; |
Ben Skeggs | a1e8873 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 63 | struct mutex mutex; |
| 64 | int refcount; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 65 | |
| 66 | struct pci_dev *pdev; |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 67 | struct platform_device *platformdev; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 68 | |
Ben Skeggs | 2ebfa1b | 2015-08-20 14:54:10 +1000 | [diff] [blame] | 69 | void __iomem *pri; |
| 70 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 71 | struct nvkm_event event; |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 72 | |
Ilia Mirkin | f0d13e3 | 2014-01-09 21:19:11 -0500 | [diff] [blame] | 73 | u64 disable_mask; |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 74 | u32 debug; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 75 | |
Ben Skeggs | 6cf813f | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 76 | const struct nvkm_device_chip *chip; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 77 | enum { |
| 78 | NV_04 = 0x04, |
| 79 | NV_10 = 0x10, |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 80 | NV_11 = 0x11, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 81 | NV_20 = 0x20, |
| 82 | NV_30 = 0x30, |
| 83 | NV_40 = 0x40, |
| 84 | NV_50 = 0x50, |
| 85 | NV_C0 = 0xc0, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 86 | NV_E0 = 0xe0, |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 87 | GM100 = 0x110, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 88 | } card_type; |
| 89 | u32 chipset; |
Ben Skeggs | 3704791 | 2014-11-17 22:56:37 +1000 | [diff] [blame] | 90 | u8 chiprev; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 91 | u32 crystal; |
| 92 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 93 | struct { |
| 94 | struct notifier_block nb; |
| 95 | } acpi; |
Ben Skeggs | 741d778 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 96 | |
| 97 | struct nvkm_bar *bar; |
| 98 | struct nvkm_bios *bios; |
| 99 | struct nvkm_bus *bus; |
| 100 | struct nvkm_clk *clk; |
| 101 | struct nvkm_devinit *devinit; |
| 102 | struct nvkm_fb *fb; |
| 103 | struct nvkm_fuse *fuse; |
| 104 | struct nvkm_gpio *gpio; |
| 105 | struct nvkm_i2c *i2c; |
| 106 | struct nvkm_subdev *ibus; |
| 107 | struct nvkm_instmem *imem; |
| 108 | struct nvkm_ltc *ltc; |
| 109 | struct nvkm_mc *mc; |
| 110 | struct nvkm_mmu *mmu; |
| 111 | struct nvkm_subdev *mxm; |
Ben Skeggs | 0a34fb3 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 112 | struct nvkm_pci *pci; |
Ben Skeggs | 741d778 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 113 | struct nvkm_pmu *pmu; |
| 114 | struct nvkm_therm *therm; |
| 115 | struct nvkm_timer *timer; |
| 116 | struct nvkm_volt *volt; |
| 117 | |
| 118 | struct nvkm_engine *bsp; |
| 119 | struct nvkm_engine *ce[3]; |
| 120 | struct nvkm_engine *cipher; |
| 121 | struct nvkm_disp *disp; |
Ben Skeggs | 19fef52 | 2015-08-20 14:54:18 +1000 | [diff] [blame] | 122 | struct nvkm_dma *dma; |
Ben Skeggs | 741d778 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 123 | struct nvkm_fifo *fifo; |
| 124 | struct nvkm_gr *gr; |
| 125 | struct nvkm_engine *ifb; |
| 126 | struct nvkm_engine *me; |
| 127 | struct nvkm_engine *mpeg; |
| 128 | struct nvkm_engine *msenc; |
| 129 | struct nvkm_engine *mspdec; |
| 130 | struct nvkm_engine *msppp; |
| 131 | struct nvkm_engine *msvld; |
| 132 | struct nvkm_pm *pm; |
| 133 | struct nvkm_engine *sec; |
| 134 | struct nvkm_sw *sw; |
| 135 | struct nvkm_engine *vic; |
| 136 | struct nvkm_engine *vp; |
Ben Skeggs | 47b2505 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 137 | |
| 138 | struct nouveau_platform_gpu *gpu; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 139 | }; |
| 140 | |
Ben Skeggs | 6cf813f | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 141 | struct nvkm_subdev *nvkm_device_subdev(struct nvkm_device *, int index); |
| 142 | struct nvkm_engine *nvkm_device_engine(struct nvkm_device *, int index); |
| 143 | |
Ben Skeggs | 7974dd1 | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 144 | struct nvkm_device_func { |
| 145 | struct nvkm_device_pci *(*pci)(struct nvkm_device *); |
| 146 | struct nvkm_device_tegra *(*tegra)(struct nvkm_device *); |
| 147 | void *(*dtor)(struct nvkm_device *); |
| 148 | int (*preinit)(struct nvkm_device *); |
Ben Skeggs | 2b70082 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 149 | int (*init)(struct nvkm_device *); |
Ben Skeggs | 7974dd1 | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 150 | void (*fini)(struct nvkm_device *, bool suspend); |
Ben Skeggs | 7e8820f | 2015-08-20 14:54:23 +1000 | [diff] [blame^] | 151 | resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar); |
| 152 | resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar); |
Ben Skeggs | 7974dd1 | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 153 | }; |
| 154 | |
| 155 | struct nvkm_device_quirk { |
| 156 | }; |
| 157 | |
Ben Skeggs | 6cf813f | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 158 | struct nvkm_device_chip { |
| 159 | const char *name; |
| 160 | |
| 161 | int (*bar )(struct nvkm_device *, int idx, struct nvkm_bar **); |
| 162 | int (*bios )(struct nvkm_device *, int idx, struct nvkm_bios **); |
| 163 | int (*bus )(struct nvkm_device *, int idx, struct nvkm_bus **); |
| 164 | int (*clk )(struct nvkm_device *, int idx, struct nvkm_clk **); |
| 165 | int (*devinit)(struct nvkm_device *, int idx, struct nvkm_devinit **); |
| 166 | int (*fb )(struct nvkm_device *, int idx, struct nvkm_fb **); |
| 167 | int (*fuse )(struct nvkm_device *, int idx, struct nvkm_fuse **); |
| 168 | int (*gpio )(struct nvkm_device *, int idx, struct nvkm_gpio **); |
| 169 | int (*i2c )(struct nvkm_device *, int idx, struct nvkm_i2c **); |
| 170 | int (*ibus )(struct nvkm_device *, int idx, struct nvkm_subdev **); |
| 171 | int (*imem )(struct nvkm_device *, int idx, struct nvkm_instmem **); |
| 172 | int (*ltc )(struct nvkm_device *, int idx, struct nvkm_ltc **); |
| 173 | int (*mc )(struct nvkm_device *, int idx, struct nvkm_mc **); |
| 174 | int (*mmu )(struct nvkm_device *, int idx, struct nvkm_mmu **); |
| 175 | int (*mxm )(struct nvkm_device *, int idx, struct nvkm_subdev **); |
Ben Skeggs | 0a34fb3 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 176 | int (*pci )(struct nvkm_device *, int idx, struct nvkm_pci **); |
Ben Skeggs | 6cf813f | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 177 | int (*pmu )(struct nvkm_device *, int idx, struct nvkm_pmu **); |
| 178 | int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **); |
| 179 | int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **); |
| 180 | int (*volt )(struct nvkm_device *, int idx, struct nvkm_volt **); |
| 181 | |
| 182 | int (*bsp )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 183 | int (*ce[3] )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 184 | int (*cipher )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 185 | int (*disp )(struct nvkm_device *, int idx, struct nvkm_disp **); |
Ben Skeggs | 19fef52 | 2015-08-20 14:54:18 +1000 | [diff] [blame] | 186 | int (*dma )(struct nvkm_device *, int idx, struct nvkm_dma **); |
Ben Skeggs | 6cf813f | 2015-08-20 14:54:17 +1000 | [diff] [blame] | 187 | int (*fifo )(struct nvkm_device *, int idx, struct nvkm_fifo **); |
| 188 | int (*gr )(struct nvkm_device *, int idx, struct nvkm_gr **); |
| 189 | int (*ifb )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 190 | int (*me )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 191 | int (*mpeg )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 192 | int (*msenc )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 193 | int (*mspdec )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 194 | int (*msppp )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 195 | int (*msvld )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 196 | int (*pm )(struct nvkm_device *, int idx, struct nvkm_pm **); |
| 197 | int (*sec )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 198 | int (*sw )(struct nvkm_device *, int idx, struct nvkm_sw **); |
| 199 | int (*vic )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 200 | int (*vp )(struct nvkm_device *, int idx, struct nvkm_engine **); |
| 201 | }; |
| 202 | |
Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 203 | struct nvkm_device *nvkm_device_find(u64 name); |
| 204 | int nvkm_device_list(u64 *name, int size); |
Ben Skeggs | 803c178 | 2014-08-10 04:10:21 +1000 | [diff] [blame] | 205 | |
Ben Skeggs | dd64694 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 206 | /* privileged register interface accessor macros */ |
Ben Skeggs | 2ebfa1b | 2015-08-20 14:54:10 +1000 | [diff] [blame] | 207 | #define nvkm_rd08(d,a) ioread8((d)->pri + (a)) |
| 208 | #define nvkm_rd16(d,a) ioread16_native((d)->pri + (a)) |
| 209 | #define nvkm_rd32(d,a) ioread32_native((d)->pri + (a)) |
| 210 | #define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a)) |
| 211 | #define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a)) |
| 212 | #define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a)) |
Ben Skeggs | dd64694 | 2015-08-20 14:54:08 +1000 | [diff] [blame] | 213 | #define nvkm_mask(d,a,m,v) ({ \ |
| 214 | struct nvkm_device *_device = (d); \ |
| 215 | u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \ |
| 216 | nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v)); \ |
| 217 | _temp; \ |
| 218 | }) |
| 219 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 220 | static inline bool |
Ben Skeggs | d351b85 | 2015-08-20 14:54:05 +1000 | [diff] [blame] | 221 | nv_device_match(struct nvkm_device *device, u16 dev, u16 ven, u16 sub) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 222 | { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 223 | return device->pdev->device == dev && |
| 224 | device->pdev->subsystem_vendor == ven && |
| 225 | device->pdev->subsystem_device == sub; |
| 226 | } |
| 227 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 228 | static inline bool |
Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 229 | nv_device_is_pci(struct nvkm_device *device) |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 230 | { |
| 231 | return device->pdev != NULL; |
| 232 | } |
| 233 | |
Alexandre Courbot | c5d7ddf | 2014-10-27 18:49:16 +0900 | [diff] [blame] | 234 | static inline bool |
Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 235 | nv_device_is_cpu_coherent(struct nvkm_device *device) |
Alexandre Courbot | c5d7ddf | 2014-10-27 18:49:16 +0900 | [diff] [blame] | 236 | { |
| 237 | return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device)); |
| 238 | } |
| 239 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 240 | static inline struct device * |
Ben Skeggs | 5025407 | 2015-01-14 14:11:21 +1000 | [diff] [blame] | 241 | nv_device_base(struct nvkm_device *device) |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 242 | { |
| 243 | return nv_device_is_pci(device) ? &device->pdev->dev : |
| 244 | &device->platformdev->dev; |
| 245 | } |
| 246 | |
Ben Skeggs | 9719047 | 2015-01-14 15:35:00 +1000 | [diff] [blame] | 247 | struct platform_device; |
| 248 | |
| 249 | enum nv_bus_type { |
| 250 | NVKM_BUS_PCI, |
| 251 | NVKM_BUS_PLATFORM, |
| 252 | }; |
| 253 | |
Ben Skeggs | e781dc8 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 254 | void nvkm_device_del(struct nvkm_device **); |
Ben Skeggs | 6594363 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 255 | |
Ben Skeggs | 0e29998 | 2015-08-20 14:54:18 +1000 | [diff] [blame] | 256 | struct nvkm_device_oclass { |
| 257 | int (*ctor)(struct nvkm_device *, const struct nvkm_oclass *, |
| 258 | void *data, u32 size, struct nvkm_object **); |
| 259 | struct nvkm_sclass base; |
| 260 | }; |
| 261 | |
Ben Skeggs | 2a9f847 | 2015-08-20 14:54:18 +1000 | [diff] [blame] | 262 | extern const struct nvkm_sclass nvkm_udevice_sclass; |
| 263 | |
Ben Skeggs | 6594363 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 264 | /* device logging */ |
| 265 | #define nvdev_printk_(d,l,p,f,a...) do { \ |
| 266 | struct nvkm_device *_device = (d); \ |
Ben Skeggs | 68f3f70 | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 267 | if (_device->debug >= (l)) \ |
Ben Skeggs | 6594363 | 2015-08-20 14:54:11 +1000 | [diff] [blame] | 268 | dev_##p(_device->dev, f, ##a); \ |
| 269 | } while(0) |
| 270 | #define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a) |
| 271 | #define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL, crit, f, ##a) |
| 272 | #define nvdev_error(d,f,a...) nvdev_printk((d), ERROR, err, f, ##a) |
| 273 | #define nvdev_warn(d,f,a...) nvdev_printk((d), WARN, notice, f, ##a) |
| 274 | #define nvdev_info(d,f,a...) nvdev_printk((d), INFO, info, f, ##a) |
| 275 | #define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG, info, f, ##a) |
| 276 | #define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE, info, f, ##a) |
| 277 | #define nvdev_spam(d,f,a...) nvdev_printk((d), SPAM, dbg, f, ##a) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 278 | #endif |