blob: 5d1a318f1302c53b37b6fa896f24c03ac247404b [file] [log] [blame]
Rob Herring21278ae2014-06-10 09:06:10 -05001menuconfig ARCH_TEGRA
Stephen Warren90027222012-09-26 13:08:59 -06002 bool "NVIDIA Tegra" if ARCH_MULTI_V7
Stephen Warren90027222012-09-26 13:08:59 -06003 select ARCH_REQUIRE_GPIOLIB
Alexandre Courbot1a5de3a2013-11-24 15:30:49 +09004 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
Thierry Redingbd968d52014-07-29 16:24:25 +02005 select ARM_AMBA
Stephen Warren20984c42013-08-06 14:38:51 -06006 select ARM_GIC
Stephen Warren90027222012-09-26 13:08:59 -06007 select CLKSRC_MMIO
Stephen Boyd4c3ffff2013-02-27 15:28:14 -08008 select HAVE_ARM_SCU if SMP
Stephen Boyda894fcc2013-02-15 16:02:20 -08009 select HAVE_ARM_TWD if SMP
Stephen Warren20984c42013-08-06 14:38:51 -060010 select PINCTRL
Stephen Warrene0421462013-11-06 15:23:29 -070011 select ARCH_HAS_RESET_CONTROLLER
12 select RESET_CONTROLLER
Stephen Warren90027222012-09-26 13:08:59 -060013 select SOC_BUS
Stephen Warren20984c42013-08-06 14:38:51 -060014 select USB_ULPI if USB_PHY
15 select USB_ULPI_VIEWPORT if USB_PHY
Stephen Warren90027222012-09-26 13:08:59 -060016 help
17 This enables support for NVIDIA Tegra based systems.
Erik Gillingc5f80062010-01-21 16:53:02 -080018
Rob Herring21278ae2014-06-10 09:06:10 -050019if ARCH_TEGRA
Erik Gillingc5f80062010-01-21 16:53:02 -080020
Erik Gillingc5f80062010-01-21 16:53:02 -080021config ARCH_TEGRA_2x_SOC
Peter De Schrijver44107d82011-12-14 17:03:25 +020022 bool "Enable support for Tegra20 family"
Joseph Lo1d328602013-01-16 17:33:55 +000023 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
Stephen Warrenf35b4312012-02-14 13:39:39 -070024 select ARM_ERRATA_720789
Stephen Warren45c9e592013-01-02 14:34:15 -070025 select ARM_ERRATA_754327 if SMP
Arnd Bergmann8f90cce2012-08-16 09:36:04 +000026 select ARM_ERRATA_764369 if SMP
Russell Kingb1b3f492012-10-06 17:12:25 +010027 select PINCTRL_TEGRA20
Stephen Warrenf35b4312012-02-14 13:39:39 -070028 select PL310_ERRATA_727915 if CACHE_L2X0
29 select PL310_ERRATA_769419 if CACHE_L2X0
Thierry Reding910978e72014-07-07 15:26:30 +020030 select TEGRA_TIMER
Erik Gillingc5f80062010-01-21 16:53:02 -080031 help
32 Support for NVIDIA Tegra AP20 and T20 processors, based on the
33 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
34
Peter De Schrijver44107d82011-12-14 17:03:25 +020035config ARCH_TEGRA_3x_SOC
36 bool "Enable support for Tegra30 family"
Stephen Warrenf35b4312012-02-14 13:39:39 -070037 select ARM_ERRATA_754322
Arnd Bergmann8f90cce2012-08-16 09:36:04 +000038 select ARM_ERRATA_764369 if SMP
Russell Kingb1b3f492012-10-06 17:12:25 +010039 select PINCTRL_TEGRA30
40 select PL310_ERRATA_769419 if CACHE_L2X0
Thierry Reding910978e72014-07-07 15:26:30 +020041 select TEGRA_TIMER
Peter De Schrijver44107d82011-12-14 17:03:25 +020042 help
43 Support for NVIDIA Tegra T30 processor family, based on the
44 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
Erik Gillingc5f80062010-01-21 16:53:02 -080045
Hiroshi Doyu5c541b82013-01-24 01:10:26 +000046config ARCH_TEGRA_114_SOC
47 bool "Enable support for Tegra114 family"
Russell King59fd3032013-10-21 09:33:49 +010048 select ARM_ERRATA_798181 if SMP
Stephen Warren1d7e5c22013-02-07 14:43:24 -070049 select ARM_L1_CACHE_SHIFT_6
Stephen Warrenb6bda4e2013-10-07 11:11:42 -060050 select HAVE_ARM_ARCH_TIMER
Laxman Dewangan20fd4802013-01-29 18:26:17 +053051 select PINCTRL_TEGRA114
Thierry Reding910978e72014-07-07 15:26:30 +020052 select TEGRA_TIMER
Hiroshi Doyu5c541b82013-01-24 01:10:26 +000053 help
54 Support for NVIDIA Tegra T114 processor family, based on the
55 ARM CortexA15MP CPU
56
Joseph Lo73944472013-10-08 12:50:03 +080057config ARCH_TEGRA_124_SOC
58 bool "Enable support for Tegra124 family"
59 select ARM_L1_CACHE_SHIFT_6
60 select HAVE_ARM_ARCH_TIMER
Laxman Dewangan7e1161f2013-12-05 16:27:49 +053061 select PINCTRL_TEGRA124
Thierry Reding910978e72014-07-07 15:26:30 +020062 select TEGRA_TIMER
Joseph Lo73944472013-10-08 12:50:03 +080063 help
64 Support for NVIDIA Tegra T124 processor family, based on the
65 ARM CortexA15MP CPU
66
Rob Herring21278ae2014-06-10 09:06:10 -050067endif