blob: 24b59c75f6afde705c6fb7df06d7d97d7e949963 [file] [log] [blame]
Andrew Victor8fc5ffa2006-06-29 16:06:33 +01001if ARCH_AT91
SAN People73a59c12006-01-09 17:05:41 +00002
Boris BREZILLONf090fb32013-10-11 12:22:06 +02003config HAVE_AT91_UTMI
4 bool
5
Boris BREZILLONc84a61d2013-10-17 18:55:41 +02006config HAVE_AT91_USB_CLK
7 bool
8
Boris BREZILLONc8a8c632013-10-11 09:37:46 +02009config COMMON_CLK_AT91
10 bool
Boris BREZILLONc8a8c632013-10-11 09:37:46 +020011 select COMMON_CLK
12
Boris BREZILLONa9c06882013-10-11 13:27:06 +020013config HAVE_AT91_SMD
14 bool
15
Alexandre Bellonibcc5fd42014-09-15 18:15:53 +020016config HAVE_AT91_H32MX
17 bool
18
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000019config SOC_SAMA5
20 bool
Boris BREZILLON3b26f392014-07-10 19:14:21 +020021 select ATMEL_AIC5_IRQ
Nicolas Ferreef7eda22014-11-21 17:10:06 +010022 select COMMON_CLK_AT91
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000023 select CPU_V7
24 select GENERIC_CLOCKEVENTS
Alexandre Belloni63e60362014-07-08 18:21:13 +020025 select MEMORY
26 select ATMEL_SDRAMC
Wenyou Yang896bc872015-03-09 11:44:50 +080027 select SRAM if PM
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000028
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010029menu "Atmel AT91 System-on-Chip"
30
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000031choice
32
33 prompt "Core type"
34
Arnd Bergmannfe138c22014-03-13 15:18:31 +010035config SOC_SAM_V4_V5
36 bool "ARM9 AT91SAM9/AT91RM9200"
37 help
38 Select this if you are using one of Atmel's AT91SAM9 or
39 AT91RM9200 SoC.
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000040
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000041config SOC_SAM_V7
42 bool "Cortex A5"
43 help
44 Select this if you are using one of Atmel's SAMA5D3 SoC.
45
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000046endchoice
47
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080048comment "Atmel AT91 Processor"
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010049
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000050if SOC_SAM_V7
51config SOC_SAMA5D3
52 bool "SAMA5D3 family"
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000053 select SOC_SAMA5
54 select HAVE_FB_ATMEL
Boris BREZILLONf090fb32013-10-11 12:22:06 +020055 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +020056 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020057 select HAVE_AT91_USB_CLK
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000058 help
59 Select this if you are using one of Atmel's SAMA5D3 family SoC.
Josh Wu7f457162013-11-06 18:01:11 +080060 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020061
62config SOC_SAMA5D4
63 bool "SAMA5D4 family"
64 select SOC_SAMA5
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020065 select CLKSRC_MMIO
66 select CACHE_L2X0
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020067 select HAVE_FB_ATMEL
68 select HAVE_AT91_UTMI
69 select HAVE_AT91_SMD
70 select HAVE_AT91_USB_CLK
71 select HAVE_AT91_H32MX
72 help
73 Select this if you are using one of Atmel's SAMA5D4 family SoC.
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000074endif
75
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000076if SOC_SAM_V4_V5
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080077config SOC_AT91RM9200
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010078 bool "AT91RM9200"
Nicolas Ferreef7eda22014-11-21 17:10:06 +010079 select ATMEL_AIC_IRQ
Alexandre Bellonib53cdd02015-03-12 13:07:31 +010080 select ATMEL_ST
Nicolas Ferreef7eda22014-11-21 17:10:06 +010081 select COMMON_CLK_AT91
Russell Kingc7508152008-10-26 10:55:14 +000082 select CPU_ARM920T
David Brownell5e802df2007-07-31 01:41:26 +010083 select GENERIC_CLOCKEVENTS
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020084 select HAVE_AT91_USB_CLK
Arnd Bergmann1be27c62015-03-12 15:54:23 +010085 select MIGHT_HAVE_PCI
Wenyou Yang896bc872015-03-09 11:44:50 +080086 select SRAM if PM
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010087
Alexandre Belloni2b019a42015-01-15 22:58:13 +010088config SOC_AT91SAM9
89 bool "AT91SAM9"
90 select ATMEL_AIC_IRQ
91 select ATMEL_SDRAMC
92 select COMMON_CLK_AT91
93 select CPU_ARM926T
94 select GENERIC_CLOCKEVENTS
Boris BREZILLONa9c06882013-10-11 13:27:06 +020095 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +020096 select HAVE_AT91_USB_CLK
Alexandre Belloni2b019a42015-01-15 22:58:13 +010097 select HAVE_AT91_UTMI
Hong Xu74db4fb2012-04-17 14:26:31 +080098 select HAVE_FB_ATMEL
Alexandre Belloni2b019a42015-01-15 22:58:13 +010099 select MEMORY
Wenyou Yang896bc872015-03-09 11:44:50 +0800100 select SRAM if PM
Hong Xu74db4fb2012-04-17 14:26:31 +0800101 help
Alexandre Belloni2b019a42015-01-15 22:58:13 +0100102 Select this if you are using one of those Atmel SoC:
103 AT91SAM9260
104 AT91SAM9261
105 AT91SAM9263
106 AT91SAM9G15
107 AT91SAM9G20
108 AT91SAM9G25
109 AT91SAM9G35
110 AT91SAM9G45
111 AT91SAM9G46
112 AT91SAM9M10
113 AT91SAM9M11
114 AT91SAM9N12
115 AT91SAM9RL
116 AT91SAM9X25
117 AT91SAM9X35
118 AT91SAM9XE
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +0000119endif # SOC_SAM_V4_V5
Greg Ungerer9f1ccef2007-07-30 02:39:21 +0100120
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100121comment "AT91 Feature Selections"
SAN People73a59c12006-01-09 17:05:41 +0000122
David Brownell5248c652007-11-12 17:59:10 +0100123config AT91_TIMER_HZ
124 int "Kernel HZ (jiffies per second)"
125 range 32 1024
126 depends on ARCH_AT91
Nicolas Ferree1520152014-11-21 16:22:17 +0100127 default "128" if SOC_AT91RM9200
David Brownell5248c652007-11-12 17:59:10 +0100128 default "100"
129 help
130 On AT91rm9200 chips where you're using a system clock derived
131 from the 32768 Hz hardware clock, this tick rate should divide
132 it exactly: use a power-of-two value, such as 128 or 256, to
133 reduce timing errors caused by rounding.
134
135 On AT91sam926x chips, or otherwise when using a higher precision
136 system clock (of at least several MHz), rounding is less of a
137 problem so it can be safer to use a decimal values like 100.
138
SAN People73a59c12006-01-09 17:05:41 +0000139endmenu
140
141endif